LCD.elf: file format elf32-msp430 SYMBOL TABLE: 00008000 l d .text 00000000 .text 0000aa90 l d .rodata 00000000 .rodata 00000200 l d .data 00000000 .data 00000202 l d .bss 00000000 .bss 00000210 l d .noinit 00000000 .noinit 0000ffe0 l d .vectors 00000000 .vectors 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 00008d7c l .text 00000000 lcdloop 00008822 l .text 00000000 __br_unexpected_ 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 fp-bit.c 000091e6 l F .text 00000292 _fpadd_parts 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 strchr.c 00000000 l df *ABS* 00000000 memcmp.c 00000000 l df *ABS* 00000000 memset.c 00000000 l df *ABS* 00000000 strstr.c 00000000 l df *ABS* 00000000 atoi.c 00000000 l df *ABS* 00000000 sprintf.c 0000a084 l F .text 00000022 append 00000204 l O .bss 00000002 available_ 00000202 l O .bss 00000002 destination_ 0000a0a6 l F .text 0000003c call_vuprintf 00000000 l df *ABS* 00000000 vuprintf.c 0000a140 l F .text 00000198 print_field 00000000 l df *ABS* 00000000 strncmp.c 00008ebe g F .text 00000018 lcdBusy 00000057 g *ABS* 00000000 __BCSCTL1 00000174 g *ABS* 00000000 __TACCR1 00000002 g *ABS* 00000000 __data_size 00008822 w .text 00000000 __isr_14 00000128 g *ABS* 00000000 __FCTL1 00008fd0 g F .text 0000005e CCXX_SPI_RDREG 00000024 g *ABS* 00000000 __P1IES 0000004b g *ABS* 00000000 __ADC10AE1 00000069 g *ABS* 00000000 __UCB0CTL1 0000a118 g F .text 00000016 vsprintf 0000912a g .text 00000000 __ext_divmod16 00008822 w .text 00000000 __isr_4 00000002 g *ABS* 00000000 __IFG1 00000060 g *ABS* 00000000 __UCA0CTL0 000089e2 g F .text 0000003a sample_adc_chan 00009738 g F .text 00000150 __divsf3 00008a5a g F .text 00000020 init_UART_SPI 0000012e g *ABS* 00000000 __TAIV 0000a0fe g F .text 0000001a snprintf 0000997e g F .text 00000090 __fixsfsi 00000000 g .vectors 00000000 _efartext 00009108 g F .text 00000000 __udivhi3 00000001 g *ABS* 00000000 __IE2 0000002b g *ABS* 00000000 __P2IFG 0000001a g *ABS* 00000000 __P3DIR 0000ac9e g *ABS* 00000000 _etext 00000190 g *ABS* 00000000 __TBR 000010f8 g *ABS* 00000000 __CALDCO_16MHZ 000094c4 g F .text 00000050 __subsf3 0000001d g *ABS* 00000000 __P4OUT 000089d0 g F .text 00000012 sample_adc 0000000e g *ABS* 00000000 __bss_size 000010fd g *ABS* 00000000 __CALBC1_8MHZ 00008000 w .text 00000000 __watchdog_support 0000881c w .text 00000000 __stop_progExec__ 0000002d g *ABS* 00000000 __P2IE 0000895c g F .text 00000066 sys_init 00000192 g *ABS* 00000000 __TBCCR0 00008822 w .text 00000000 __isr_11 00000186 g *ABS* 00000000 __TBCCTL2 00009164 g F .text 00000000 __udivsi3 00000025 g *ABS* 00000000 __P1IE 0000006b g *ABS* 00000000 __UCB0BR1 000088a4 g F .text 0000008a tinit 0000a12e g F .text 00000012 vsnprintf 00000049 g *ABS* 00000000 __ADC10DTC1 00000066 g *ABS* 00000000 __UCA0RXBUF 00000061 g *ABS* 00000000 __UCA0CTL1 0000aa50 g .text 00000000 __udivmoddi4 00008826 g F .text 00000024 P2_VEC 00008f98 g F .text 00000038 CCXX_SPI_STROBE 00008e06 g F .text 00000070 lcdInstr 00000182 g *ABS* 00000000 __TBCCTL0 0000006d g *ABS* 00000000 __UCB0STAT 0000884a g .text 00000000 __isr_5 00000063 g *ABS* 00000000 __UCA0BR1 0000aa22 g F .text 00000000 __umoddi3 0000ac9e g *ABS* 00000000 __data_load_start 00008822 g .text 00000000 __dtors_end 00000053 g *ABS* 00000000 __BCSCTL3 000001bc g *ABS* 00000000 __ADC10SA 00000166 g *ABS* 00000000 __TACCTL2 0000902e g F .text 0000004e CCXX_SPI_WRREG 0000a9fc g F .text 00000000 __udivdi3 00000065 g *ABS* 00000000 __UCA0STAT 00008822 w .text 00000000 __isr_2 00008a7a g F .text 0000019e CCXX_WRITE_SPI_RF_SETTINGS 000090f0 g .text 00000000 __mulhi3 00000160 g *ABS* 00000000 __TACTL 0000915c g F .text 00000000 __modhi3 0000012c g *ABS* 00000000 __FCTL3 00008d82 g F .text 00000084 lcdPutc 00008822 w .text 00000000 __isr_10 0000002e g *ABS* 00000000 __P2SEL 00000180 g *ABS* 00000000 __TBCTL 000010f9 g *ABS* 00000000 __CALBC1_16MHZ 000000c3 g *ABS* 00000000 __OA1CTL1 00000023 g *ABS* 00000000 __P1IFG 000010fb g *ABS* 00000000 __CALBC1_12MHZ 00009d40 g F .text 00000124 __unpack_f 0000907c g F .text 00000074 CCXX_SPI_BURST_WRREG 00000206 g O .bss 00000001 RSSI_DBM 0000004a g *ABS* 00000000 __ADC10AE0 0000011a g *ABS* 00000000 __UCB0I2CSA 00000172 g *ABS* 00000000 __TACCR0 00000056 g *ABS* 00000000 __DCOCTL 00000003 g *ABS* 00000000 __IFG2 00000210 g O .noinit 00000002 __wdt_clear_value 0000001b g *ABS* 00000000 __P3SEL 00008888 g .text 00000000 __isr_7 0000ffe0 g O .vectors 00000020 __ivtbl_16 0000006c g *ABS* 00000000 __UCB0I2CIE 0000006a g *ABS* 00000000 __UCB0BR0 0000919a g F .text 00000000 __umodsi3 00000028 g *ABS* 00000000 __P2IN 00009b62 g F .text 000001de __pack_f 00000118 g *ABS* 00000000 __UCB0I2COA 00000184 g *ABS* 00000000 __TBCCTL1 000001b4 g *ABS* 00000000 __ADC10MEM 00000200 g O .data 00000001 mode 00009122 g F .text 00000000 __umodhi3 00008822 w .text 00000000 __isr_0 00000207 g O .bss 00000001 RSSI 00000029 g *ABS* 00000000 __P2OUT 0000012a g *ABS* 00000000 __FCTL2 00009af0 g F .text 00000072 __clzsi2 00000064 g *ABS* 00000000 __UCA0MCTL 00008028 w .text 00000000 __do_clear_bss 00008ed6 g F .text 00000028 lcdInit 00000021 g *ABS* 00000000 __P1OUT 0000002c g *ABS* 00000000 __P2IES 00000026 g *ABS* 00000000 __P1SEL 00009fa4 g F .text 00000056 strstr 00008858 g F .text 00000030 TA1_VEC 000098d8 g F .text 000000a6 __floatsisf 00008a3a g F .text 00000020 init_UART_232 0000a976 g F .text 00000028 strncmp 00009164 g .text 00000000 __ext_udivmod32 00000027 g *ABS* 00000000 __P1REN 000000c0 g *ABS* 00000000 __OA0CTL0 0000aa8e w .text 00000000 _unexpected_ 00008858 g .text 00000000 __isr_8 00008826 g .text 00000000 __isr_3 0000a2d8 g F .text 0000069e vuprintf 00009f1a g F .text 00000020 memcmp 000089c2 g F .text 0000000e init_adc 000010fc g *ABS* 00000000 __CALDCO_8MHZ 0000912a g F .text 00000000 __divhi3 00009108 g .text 00000000 __ext_udivmod16 00008000 w .text 00000000 _reset_vector__ 00008822 g .text 00000000 __ctors_start 0000a99e g .text 00000000 __xabi_udivmod64 00008822 w .text 00000000 __isr_12 000010fa g *ABS* 00000000 __CALDCO_12MHZ 0000ab8e g O .rodata 00000008 __thenan_sf 00000018 g *ABS* 00000000 __P3IN 00008010 w .text 00000000 __do_copy_data 0000884a g F .text 0000000e ADC_VEC 00000202 g .bss 00000000 __bss_start 00009f3a g F .text 0000006a memset 0000803e g F .text 000007de main 00000176 g *ABS* 00000000 __TACCR2 000000c2 g *ABS* 00000000 __OA1CTL0 00008822 w .text 00000000 __isr_13 00008e76 g F .text 0000002e lcdPutsn 00000170 g *ABS* 00000000 __TAR 0000001e g *ABS* 00000000 __P4DIR 00000208 g O .bss 00000002 seconds 00000162 g *ABS* 00000000 __TACCTL0 00010000 g .vectors 00000000 _vectors_end 00009514 g F .text 00000224 __mulsf3 0000002a g *ABS* 00000000 __P2DIR 0000892e g F .text 0000002e delay 00000068 g *ABS* 00000000 __UCB0CTL0 00008d30 g F .text 0000004c TX_STRING 0000002f g *ABS* 00000000 __P2REN 0000a0e2 g F .text 0000001c sprintf 0000ab96 g O .rodata 00000100 __clz_tab 0000020a g O .bss 00000001 LQI 00009888 g F .text 00000050 __gesf2 00008888 g F .text 0000001c RX_VEC 0000006e g *ABS* 00000000 __UCB0RXBUF 000001b0 g *ABS* 00000000 __ADC10CTL0 00008822 w .text 00000000 __isr_9 0000005e g *ABS* 00000000 __UCA0IRTCTL 00008c42 g F .text 000000ee RX_STRING 000010fe g *ABS* 00000000 __CALDCO_1MHZ 00000067 g *ABS* 00000000 __UCA0TXBUF 00008ea4 g F .text 0000001a lcdPuts 0000800c w .text 00000000 __init_stack 0000005d g *ABS* 00000000 __UCA0ABCTL 00000019 g *ABS* 00000000 __P3OUT 000000c1 g *ABS* 00000000 __OA0CTL1 0000020b g O .bss 00000001 PKTSTATUS 00008822 g .text 00000000 __dtors_start 00008822 w .text 00000000 __isr_6 00008822 g .text 00000000 __ctors_end 00000062 g *ABS* 00000000 __UCA0BR0 00000600 g *ABS* 00000000 __stack 00008822 w .text 00000000 __isr_1 00000202 g .data 00000000 _edata 00000212 g *ABS* 00000000 _end 00000194 g *ABS* 00000000 __TBCCR1 00000048 g *ABS* 00000000 __ADC10DTC0 0000011e g *ABS* 00000000 __TBIV 000001b2 g *ABS* 00000000 __ADC10CTL1 0000020c g O .bss 00000002 flags 00009a0e g F .text 000000e2 __floatunsisf 00000058 g *ABS* 00000000 __BCSCTL2 0000881c w .text 00000000 _endless_loop__ 0000001f g *ABS* 00000000 __P4SEL 00000196 g *ABS* 00000000 __TBCCR2 00009ffa g F .text 0000008a atoi 00000022 g *ABS* 00000000 __P1DIR 000091a4 g F .text 00000042 __fixunssfsi 00009e64 g F .text 000000a4 __fpcmp_parts_f 00008c18 g F .text 0000002a RX_MODE 0000005f g *ABS* 00000000 __UCA0IRRCTL 00000010 g *ABS* 00000000 __P3REN 00000164 g *ABS* 00000000 __TACCTL1 00008efe g F .text 0000009a lcdOn 0000006f g *ABS* 00000000 __UCB0TXBUF 000010ff g *ABS* 00000000 __CALBC1_1MHZ 00008010 w .text 00000000 __low_level_init 00009f08 g F .text 00000012 strchr 00000011 g *ABS* 00000000 __P4REN 00000200 g .data 00000000 __data_start 00000120 g *ABS* 00000000 __WDTCTL 00000000 g *ABS* 00000000 __IE1 00000020 g *ABS* 00000000 __P1IN 0000001c g *ABS* 00000000 __P4IN 0000020e g O .bss 00000001 status 0000020f g O .bss 00000001 rx_char 00009478 g F .text 0000004c __addsf3 00008d7c g F .text 00000006 lcdDelay 00008a1c g F .text 0000001e TX232String Disassembly of section .text: 00008000 <__watchdog_support>: 8000: 55 42 20 01 mov.b &0x0120,r5 8004: 35 d0 08 5a bis #23048, r5 ;#0x5a08 8008: 82 45 10 02 mov r5, &0x0210 0000800c <__init_stack>: 800c: 31 40 00 06 mov #1536, r1 ;#0x0600 00008010 <__do_copy_data>: 8010: 3f 40 02 00 mov #2, r15 ;#0x0002 8014: 0f 93 tst r15 8016: 08 24 jz $+18 ;abs 0x8028 8018: 92 42 10 02 mov &0x0210,&0x0120 801c: 20 01 801e: 2f 83 decd r15 8020: 9f 4f 9e ac mov -21346(r15),512(r15);0xac9e(r15), 0x0200(r15) 8024: 00 02 8026: f8 23 jnz $-14 ;abs 0x8018 00008028 <__do_clear_bss>: 8028: 3f 40 0e 00 mov #14, r15 ;#0x000e 802c: 0f 93 tst r15 802e: 07 24 jz $+16 ;abs 0x803e 8030: 92 42 10 02 mov &0x0210,&0x0120 8034: 20 01 8036: 1f 83 dec r15 8038: cf 43 02 02 mov.b #0, 514(r15);r3 As==00, 0x0202(r15) 803c: f9 23 jnz $-12 ;abs 0x8030 0000803e
: /** Main function. */ int main(void) { 803e: 31 50 98 ff add #-104, r1 ;#0xff98 unsigned char rxbuf[64]; unsigned char loop, commacount=0, gps_speed=0; int degC, volt,t0=0,t1=0,scooter_temp=0; float vbat,ibat,batt_capacity=0; volatile long traw,vraw,batt_capacity_raw=0; 8042: 81 43 00 00 mov #0, 0(r1) ;r3 As==00, 0x0000(r1) 8046: 81 43 02 00 mov #0, 2(r1) ;r3 As==00, 0x0002(r1) int interval=5; //set report interval to every other interrupt (5hz) sys_init(); //initialize system parameters 804a: b0 12 5c 89 call #0x895c IE2 |= UCA0RXIE; } void init_UART_SPI() { UCB0CTL1 = UCSWRST; 804e: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 8052: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8056: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8058: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 805c: 68 00 UCB0BR0 = 2; 805e: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 8062: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 8066: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 806a: 69 00 /**init the ADC10 */ void init_adc() { //ADC10AE = ADC_0_IN | ADC_2_IN; ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 806c: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 8070: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8072: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8076: b2 01 //init_UART_232(); //uncommect to enable RS232 init_UART_SPI(); //get the UART into SPI mode such that we can talk to the radio init_adc(); //turn on the ADC P1OUT ^= LED_GRN; 8078: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 delay(0xFFFF); //lil bit O delay 807c: 3f 43 mov #-1, r15 ;r3 As==11 807e: b0 12 2e 89 call #0x892e P1OUT ^= LED_GRN; 8082: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 memset(rxbuf, '\0', 64); //clear the buffer 8086: 3d 40 40 00 mov #64, r13 ;#0x0040 808a: 0e 43 clr r14 808c: 0f 41 mov r1, r15 808e: 3f 52 add #8, r15 ;r2 As==11 8090: b0 12 3a 9f call #0x9f3a P3OUT &= ~CSn; //power on reset for radio, strobe CSn 8094: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8098: 19 00 delay(0xFF); 809a: 3f 40 ff 00 mov #255, r15 ;#0x00ff 809e: b0 12 2e 89 call #0x892e P3OUT |= CSn; 80a2: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 delay(0xFFFF); 80a6: 3f 43 mov #-1, r15 ;r3 As==11 80a8: b0 12 2e 89 call #0x892e CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 80ac: 7f 40 30 00 mov.b #48, r15 ;#0x0030 80b0: b0 12 98 8f call #0x8f98 CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 80b4: b0 12 7a 8a call #0x8a7a CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 80b8: 7f 40 36 00 mov.b #54, r15 ;#0x0036 80bc: b0 12 98 8f call #0x8f98 do{ i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 80c0: 7f 40 35 00 mov.b #53, r15 ;#0x0035 80c4: b0 12 d0 8f call #0x8fd0 }while(i != 1); //this loop won't finish if theres a problem with the chip 80c8: 5f 93 cmp.b #1, r15 ;r3 As==01 80ca: fa 23 jnz $-10 ;abs 0x80c0 //P1SEL |= bit4; P1OUT ^= LED_RED; 80cc: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 delay(0xFF); //lil bit O delay 80d0: 3f 40 ff 00 mov #255, r15 ;#0x00ff 80d4: b0 12 2e 89 call #0x892e P1OUT ^= LED_RED; 80d8: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 flags = 0; 80dc: 82 43 0c 02 mov #0, &0x020c ;r3 As==00 P2IFG = 0x00; 80e0: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { TACCTL0 = CCIE; // TACCR0 interrupt enabled 80e4: b2 40 10 00 mov #16, &0x0162 ;#0x0010 80e8: 62 01 TACTL = TASSEL_1; // ACLK, upmode 80ea: b2 40 00 01 mov #256, &0x0160 ;#0x0100 80ee: 60 01 TACTL &= ~TAIFG; //clear interrupt 80f0: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 80f4: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 80f6: b2 40 b0 04 mov #1200, &0x0172 ;#0x04b0 80fa: 72 01 //TACCR0 = 12000; // ~1 second TAR = 0; 80fc: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 8100: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8104: 60 01 P1OUT ^= LED_RED; flags = 0; P2IFG = 0x00; tinit(100); //start generating 10 interrupts every second seconds = 0; 8106: 82 43 08 02 mov #0, &0x0208 ;r3 As==00 TX_STRING("GND:LCD Startup", 15); 810a: 7e 40 0f 00 mov.b #15, r14 ;#0x000f 810e: 3f 40 90 aa mov #-21872,r15 ;#0xaa90 8112: b0 12 30 8d call #0x8d30 P2IFG &= ~GDO0; //reset trashed interrupt state 8116: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 811a: 2b 00 // lcdDelay(LCDDELAY1MS); // P2OUT ^= (LCD_D7 | LCD_D6 | LCD_D5 | LCD_D4); //} eint(); //enable interrupts 811c: 32 d2 eint RX_MODE(); //put radio into listen mode. 811e: b0 12 18 8c call #0x8c18 P1OUT ^= LED_RED; 8122: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 lcdOn(); //reset sequence 8126: b0 12 fe 8e call #0x8efe lcdInit(); 812a: b0 12 d6 8e call #0x8ed6 lcdInstr(LCD_LINE1); 812e: 7f 40 80 ff mov.b #-128, r15 ;#0xff80 8132: b0 12 06 8e call #0x8e06 //lcdDelay(LCDDELAY1MS); //lcdDelay(LCDDELAY1MS); lcdPuts("Well hi there!"); 8136: 3f 40 a0 aa mov #-21856,r15 ;#0xaaa0 813a: b0 12 a4 8e call #0x8ea4 lcdInstr(LCD_LINE2); 813e: 7f 40 c0 ff mov.b #-64, r15 ;#0xffc0 8142: b0 12 06 8e call #0x8e06 lcdPuts("1-208-409-4954"); 8146: 3f 40 af aa mov #-21841,r15 ;#0xaaaf 814a: b0 12 a4 8e call #0x8ea4 lcdBusy(5000); //display my information for 5 seconds 814e: 3f 40 88 13 mov #5000, r15 ;#0x1388 8152: b0 12 be 8e call #0x8ebe lcdInstr(LCD_CLEAR); 8156: 5f 43 mov.b #1, r15 ;r3 As==01 8158: b0 12 06 8e call #0x8e06 P1OUT ^= LED_RED; 815c: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 int degC, volt,t0=0,t1=0,scooter_temp=0; float vbat,ibat,batt_capacity=0; volatile long traw,vraw,batt_capacity_raw=0; int interval=5; //set report interval to every other interrupt (5hz) 8160: b1 40 05 00 mov #5, 72(r1) ;#0x0005, 0x0048(r1) 8164: 48 00 unsigned int batt_capacity_ipart=0,sample,length=0,i,batt_volts=0,vbat_ipart,batt_amps=0,ibat_ipart;; unsigned char rxbuf[64]; unsigned char loop, commacount=0, gps_speed=0; int degC, volt,t0=0,t1=0,scooter_temp=0; float vbat,ibat,batt_capacity=0; 8166: 06 43 clr r6 8168: 07 43 clr r7 { unsigned int batt_capacity_ipart=0,sample,length=0,i,batt_volts=0,vbat_ipart,batt_amps=0,ibat_ipart;; unsigned char rxbuf[64]; unsigned char loop, commacount=0, gps_speed=0; int degC, volt,t0=0,t1=0,scooter_temp=0; 816a: 81 43 60 00 mov #0, 96(r1) ;r3 As==00, 0x0060(r1) 816e: 81 43 62 00 mov #0, 98(r1) ;r3 As==00, 0x0062(r1) */ int main(void) { unsigned int batt_capacity_ipart=0,sample,length=0,i,batt_volts=0,vbat_ipart,batt_amps=0,ibat_ipart;; unsigned char rxbuf[64]; unsigned char loop, commacount=0, gps_speed=0; 8172: c1 43 58 00 mov.b #0, 88(r1) ;r3 As==00, 0x0058(r1) /** Main function. */ int main(void) { unsigned int batt_capacity_ipart=0,sample,length=0,i,batt_volts=0,vbat_ipart,batt_amps=0,ibat_ipart;; 8176: 81 43 5e 00 mov #0, 94(r1) ;r3 As==00, 0x005e(r1) 817a: 81 43 5c 00 mov #0, 92(r1) ;r3 As==00, 0x005c(r1) 817e: 09 43 clr r9 8180: 81 43 4a 00 mov #0, 74(r1) ;r3 As==00, 0x004a(r1) //while(1); while (1) //main loop, never ends... { loop = 0; if(flags & RXCHAR_RDY) 8184: b2 b2 0c 02 bit #8, &0x020c ;r2 As==11 8188: 0d 24 jz $+28 ;abs 0x81a4 { dint(); 818a: 32 c2 dint 818c: 03 43 nop P1OUT |= LED_RED; 818e: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 loop = 1; flags &= ~RXCHAR_RDY; 8192: b2 f0 f7 ff and #-9, &0x020c ;#0xfff7 8196: 0c 02 //do stuff here P1OUT &= ~LED_RED; 8198: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 819c: 21 00 eint(); 819e: 32 d2 eint if(flags & RXCHAR_RDY) { dint(); P1OUT |= LED_RED; loop = 1; 81a0: 5c 43 mov.b #1, r12 ;r3 As==01 81a2: 01 3c jmp $+4 ;abs 0x81a6 //while(1); while (1) //main loop, never ends... { loop = 0; 81a4: 4c 43 clr.b r12 flags &= ~RXCHAR_RDY; //do stuff here P1OUT &= ~LED_RED; eint(); } if(flags & CONTROLLER_RDY) //Someone is sending us something 81a6: a2 b3 0c 02 bit #2, &0x020c ;r3 As==10 81aa: 02 20 jnz $+6 ;abs 0x81b0 81ac: 30 40 52 84 br #0x8452 { dint(); 81b0: 32 c2 dint 81b2: 03 43 nop loop = 1; P1OUT |= LED_RED; 81b4: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 flags &= ~CONTROLLER_RDY; 81b8: b2 f0 fd ff and #-3, &0x020c ;#0xfffd 81bc: 0c 02 memset(rxbuf, 0, 64); 81be: 3d 40 40 00 mov #64, r13 ;#0x0040 81c2: 0e 43 clr r14 81c4: 0f 41 mov r1, r15 81c6: 3f 52 add #8, r15 ;r2 As==11 81c8: b0 12 3a 9f call #0x9f3a length = RX_STRING(rxbuf, 64); 81cc: 7e 40 40 00 mov.b #64, r14 ;#0x0040 81d0: 0f 41 mov r1, r15 81d2: 3f 52 add #8, r15 ;r2 As==11 81d4: b0 12 42 8c call #0x8c42 81d8: 49 4f mov.b r15, r9 81da: 89 11 sxt r9 if(LQI & bit7) //CRC ok 81dc: 5b 42 0a 02 mov.b &0x020a,r11 81e0: 4b 93 tst.b r11 81e2: 02 38 jl $+6 ;abs 0x81e8 81e4: 30 40 3e 84 br #0x843e { P1OUT |= LED_GRN; 81e8: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 81ec: 3d 40 03 00 mov #3, r13 ;#0x0003 81f0: 0e 41 mov r1, r14 81f2: 3e 52 add #8, r14 ;r2 As==11 81f4: 3f 40 be aa mov #-21826,r15 ;#0xaabe 81f8: b0 12 1a 9f call #0x9f1a 81fc: 0f 93 tst r15 81fe: 91 20 jnz $+292 ;abs 0x8322 { if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 8200: 3e 40 c2 aa mov #-21822,r14 ;#0xaac2 8204: 0f 41 mov r1, r15 8206: 3f 52 add #8, r15 ;r2 As==11 8208: b0 12 a4 9f call #0x9fa4 820c: 0f 93 tst r15 820e: 2f 24 jz $+96 ;abs 0x826e { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8210: 3e 40 3d 00 mov #61, r14 ;#0x003d 8214: 0f 41 mov r1, r15 8216: 3f 52 add #8, r15 ;r2 As==11 8218: b0 12 08 9f call #0x9f08 821c: 1f 53 inc r15 821e: b0 12 fa 9f call #0x9ffa 8222: 0b 4f mov r15, r11 if(length > 0) 8224: 0f 93 tst r15 8226: 0f 24 jz $+32 ;abs 0x8246 { interval = length; length = sprintf(rxbuf,"\e[32mGND:LCD Interval is now %d\e[30m",interval); 8228: 0f 12 push r15 822a: 30 12 cb aa push #-21813 ;#0xaacb 822e: 3f 40 0c 00 mov #12, r15 ;#0x000c 8232: 0f 51 add r1, r15 8234: 0f 12 push r15 8236: b0 12 e2 a0 call #0xa0e2 823a: 31 50 06 00 add #6, r1 ;#0x0006 823e: 09 4f mov r15, r9 8240: 81 4b 48 00 mov r11, 72(r1) ;0x0048(r1) 8244: 0d 3c jmp $+28 ;abs 0x8260 } else length = sprintf(rxbuf,"\e[32mGND:LCD Reporting every %d seconds\e[30m",interval); 8246: 11 12 4a 00 push 74(r1) ;0x004a(r1) 824a: 30 12 f0 aa push #-21776 ;#0xaaf0 824e: 3f 40 0c 00 mov #12, r15 ;#0x000c 8252: 0f 51 add r1, r15 8254: 0f 12 push r15 8256: b0 12 e2 a0 call #0xa0e2 825a: 31 50 06 00 add #6, r1 ;#0x0006 825e: 09 4f mov r15, r9 TX_STRING(rxbuf,length); 8260: 4e 49 mov.b r9, r14 8262: 0f 41 mov r1, r15 8264: 3f 52 add #8, r15 ;r2 As==11 8266: b0 12 30 8d call #0x8d30 826a: 30 40 3e 84 br #0x843e } else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 826e: 3e 40 1d ab mov #-21731,r14 ;#0xab1d 8272: 0f 41 mov r1, r15 8274: 3f 52 add #8, r15 ;r2 As==11 8276: b0 12 a4 9f call #0x9fa4 827a: 0f 93 tst r15 827c: 19 24 jz $+52 ;abs 0x82b0 { length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 827e: 4b 4b mov.b r11, r11 8280: 0b 12 push r11 8282: 5d 42 06 02 mov.b &0x0206,r13 8286: 8d 11 sxt r13 8288: 0d 12 push r13 828a: 30 12 be aa push #-21826 ;#0xaabe 828e: 30 12 24 ab push #-21724 ;#0xab24 8292: 3f 40 10 00 mov #16, r15 ;#0x0010 8296: 0f 51 add r1, r15 8298: 0f 12 push r15 829a: b0 12 e2 a0 call #0xa0e2 829e: 31 50 0a 00 add #10, r1 ;#0x000a 82a2: 09 4f mov r15, r9 TX_STRING(rxbuf,length); 82a4: 4e 4f mov.b r15, r14 82a6: 0f 41 mov r1, r15 82a8: 3f 52 add #8, r15 ;r2 As==11 82aa: b0 12 30 8d call #0x8d30 82ae: c7 3c jmp $+400 ;abs 0x843e } else if(strstr( rxbuf, "now" ) != NULL) //report now 82b0: 3e 40 3d ab mov #-21699,r14 ;#0xab3d 82b4: 0f 41 mov r1, r15 82b6: 3f 52 add #8, r15 ;r2 As==11 82b8: b0 12 a4 9f call #0x9fa4 82bc: 0f 93 tst r15 82be: 04 24 jz $+10 ;abs 0x82c8 { flags |= GO_NOW | TIMER_UP; ///set event flags to trigger the reporting 82c0: b2 d0 05 00 bis #5, &0x020c ;#0x0005 82c4: 0c 02 82c6: bb 3c jmp $+376 ;abs 0x843e } else //command not recognized, give a pong to ack reception { length = sprintf(rxbuf,"\e[34mGND:LCD Pong!\e[30m"); 82c8: b1 40 1b 5b mov #23323, 8(r1) ;#0x5b1b, 0x0008(r1) 82cc: 08 00 82ce: b1 40 33 34 mov #13363, 10(r1) ;#0x3433, 0x000a(r1) 82d2: 0a 00 82d4: b1 40 6d 47 mov #18285, 12(r1) ;#0x476d, 0x000c(r1) 82d8: 0c 00 82da: b1 40 4e 44 mov #17486, 14(r1) ;#0x444e, 0x000e(r1) 82de: 0e 00 82e0: b1 40 3a 4c mov #19514, 16(r1) ;#0x4c3a, 0x0010(r1) 82e4: 10 00 82e6: b1 40 43 44 mov #17475, 18(r1) ;#0x4443, 0x0012(r1) 82ea: 12 00 82ec: b1 40 20 50 mov #20512, 20(r1) ;#0x5020, 0x0014(r1) 82f0: 14 00 82f2: b1 40 6f 6e mov #28271, 22(r1) ;#0x6e6f, 0x0016(r1) 82f6: 16 00 82f8: b1 40 67 21 mov #8551, 24(r1) ;#0x2167, 0x0018(r1) 82fc: 18 00 82fe: b1 40 1b 5b mov #23323, 26(r1) ;#0x5b1b, 0x001a(r1) 8302: 1a 00 8304: b1 40 33 30 mov #12339, 28(r1) ;#0x3033, 0x001c(r1) 8308: 1c 00 830a: b1 40 6d 00 mov #109, 30(r1) ;#0x006d, 0x001e(r1) 830e: 1e 00 TX_STRING(rxbuf, length); 8310: 7e 40 17 00 mov.b #23, r14 ;#0x0017 8314: 0f 41 mov r1, r15 8316: 3f 52 add #8, r15 ;r2 As==11 8318: b0 12 30 8d call #0x8d30 } else //command not recognized, give a pong to ack reception { length = sprintf(rxbuf,"\e[34mGND:LCD Pong!\e[30m"); 831c: 39 40 17 00 mov #23, r9 ;#0x0017 8320: 8e 3c jmp $+286 ;abs 0x843e TX_STRING(rxbuf, length); } } else if(!memcmp("GND:RZR",rxbuf,7)) //packet addressed to us 8322: 3d 40 07 00 mov #7, r13 ;#0x0007 8326: 0e 41 mov r1, r14 8328: 3e 52 add #8, r14 ;r2 As==11 832a: 3f 40 41 ab mov #-21695,r15 ;#0xab41 832e: b0 12 1a 9f call #0x9f1a 8332: 0f 93 tst r15 8334: 59 20 jnz $+180 ;abs 0x83e8 { //sample //GND:RZR S:22450 T:318 V:30 VB:834 IB:0 if(strstr( rxbuf, "S:" ) != NULL) 8336: 3e 40 49 ab mov #-21687,r14 ;#0xab49 833a: 0f 41 mov r1, r15 833c: 3f 52 add #8, r15 ;r2 As==11 833e: b0 12 a4 9f call #0x9fa4 8342: 0f 93 tst r15 8344: 08 24 jz $+18 ;abs 0x8356 { t0 = t1; t1 = atoi(strstr(rxbuf,"S:")+2); 8346: 2f 53 incd r15 8348: b0 12 fa 9f call #0x9ffa { //sample //GND:RZR S:22450 T:318 V:30 VB:834 IB:0 if(strstr( rxbuf, "S:" ) != NULL) { t0 = t1; 834c: 91 41 60 00 mov 96(r1), 98(r1) ;0x0060(r1), 0x0062(r1) 8350: 62 00 t1 = atoi(strstr(rxbuf,"S:")+2); 8352: 81 4f 60 00 mov r15, 96(r1) ;0x0060(r1) } if(strstr( rxbuf, "VB:" ) != NULL) 8356: 3e 40 4c ab mov #-21684,r14 ;#0xab4c 835a: 0f 41 mov r1, r15 835c: 3f 52 add #8, r15 ;r2 As==11 835e: b0 12 a4 9f call #0x9fa4 8362: 0f 93 tst r15 8364: 06 24 jz $+14 ;abs 0x8372 { batt_volts = atoi(strstr(rxbuf,"VB:")+3); 8366: 3f 50 03 00 add #3, r15 ;#0x0003 836a: b0 12 fa 9f call #0x9ffa 836e: 81 4f 5c 00 mov r15, 92(r1) ;0x005c(r1) } if(strstr( rxbuf, "IB:" ) != NULL) 8372: 3e 40 50 ab mov #-21680,r14 ;#0xab50 8376: 0f 41 mov r1, r15 8378: 3f 52 add #8, r15 ;r2 As==11 837a: b0 12 a4 9f call #0x9fa4 837e: 0f 93 tst r15 8380: 21 24 jz $+68 ;abs 0x83c4 { batt_amps = atoi(strstr(rxbuf,"IB:")+3); 8382: 3f 50 03 00 add #3, r15 ;#0x0003 8386: b0 12 fa 9f call #0x9ffa 838a: 81 4f 5e 00 mov r15, 94(r1) ;0x005e(r1) if(t1-t0 < 20) //only add the current if the last packet was within 2 seconds. 838e: 1d 41 60 00 mov 96(r1), r13 ;0x0060(r1) 8392: 1d 81 62 00 sub 98(r1), r13 ;0x0062(r1) 8396: 3d 90 14 00 cmp #20, r13 ;#0x0014 839a: 14 34 jge $+42 ;abs 0x83c4 batt_capacity_raw += batt_amps*(t1-t0); 839c: 2a 41 mov @r1, r10 839e: 1b 41 02 00 mov 2(r1), r11 ;0x0002(r1) 83a2: 0e 4d mov r13, r14 83a4: b0 12 f0 90 call #0x90f0 83a8: 81 4f 64 00 mov r15, 100(r1) ;0x0064(r1) 83ac: 81 43 66 00 mov #0, 102(r1) ;r3 As==00, 0x0066(r1) 83b0: 1c 41 64 00 mov 100(r1),r12 ;0x0064(r1) 83b4: 1d 41 66 00 mov 102(r1),r13 ;0x0066(r1) 83b8: 0c 5a add r10, r12 83ba: 0d 6b addc r11, r13 83bc: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 83c0: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) } if(strstr( rxbuf, "T:" ) != NULL) 83c4: 3e 40 54 ab mov #-21676,r14 ;#0xab54 83c8: 0f 41 mov r1, r15 83ca: 3f 52 add #8, r15 ;r2 As==11 83cc: b0 12 a4 9f call #0x9fa4 83d0: 0f 93 tst r15 83d2: 35 24 jz $+108 ;abs 0x843e { scooter_temp = atoi(strstr(rxbuf,"IB:")+2); 83d4: 3e 40 50 ab mov #-21680,r14 ;#0xab50 83d8: 0f 41 mov r1, r15 83da: 3f 52 add #8, r15 ;r2 As==11 83dc: b0 12 a4 9f call #0x9fa4 83e0: 2f 53 incd r15 83e2: b0 12 fa 9f call #0x9ffa 83e6: 2b 3c jmp $+88 ;abs 0x843e //if(t1-t0 < 20) //only add the current if the last packet was within 2 seconds. // batt_capacity_raw += batt_amps/(t1-t0); } } else if(!memcmp("GND:GPS",rxbuf,7)) //packet addressed to us 83e8: 3d 40 07 00 mov #7, r13 ;#0x0007 83ec: 0e 41 mov r1, r14 83ee: 3e 52 add #8, r14 ;r2 As==11 83f0: 3f 40 57 ab mov #-21673,r15 ;#0xab57 83f4: b0 12 1a 9f call #0x9f1a 83f8: 0f 93 tst r15 83fa: 21 20 jnz $+68 ;abs 0x843e { commacount = 0; gps_speed=1; for(i=0;i 0; degC-- ); // delay to allow reference to settle ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 8498: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 849c: b0 01 LPM3; 849e: 32 d0 d0 00 bis #208, r2 ;#0x00d0 traw = ADC10MEM; 84a2: 91 42 b4 01 mov &0x01b4,80(r1) ;0x0050(r1) 84a6: 50 00 84a8: 81 43 52 00 mov #0, 82(r1) ;r3 As==00, 0x0052(r1) 84ac: 91 41 50 00 mov 80(r1), 4(r1) ;0x0050(r1), 0x0004(r1) 84b0: 04 00 84b2: 91 41 52 00 mov 82(r1), 6(r1) ;0x0052(r1), 0x0006(r1) 84b6: 06 00 ADC10CTL0 &= ~ENC; 84b8: b2 f0 fd ff and #-3, &0x01b0 ;#0xfffd 84bc: b0 01 ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 84be: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 84c2: b0 01 //-16 allspice = -9.9 DMM ! AWECRAP! //6.1 //-22.7 = -16.3 //6 //Why is there a 6 degree difference? I swear! //Calibration is empty.. hmmm! degC = (((traw - 673) * 4230) / 1024); 84c4: 18 41 04 00 mov 4(r1), r8 ;0x0004(r1) 84c8: 19 41 06 00 mov 6(r1), r9 ;0x0006(r1) 84cc: 0a 48 mov r8, r10 84ce: 0b 49 mov r9, r11 84d0: 0a 5a rla r10 84d2: 0b 6b rlc r11 84d4: 0a 5a rla r10 84d6: 0b 6b rlc r11 84d8: 0a 5a rla r10 84da: 0b 6b rlc r11 84dc: 0a 5a rla r10 84de: 0b 6b rlc r11 84e0: 0c 4a mov r10, r12 84e2: 0d 4b mov r11, r13 84e4: 0c 5c rla r12 84e6: 0d 6d rlc r13 84e8: 0c 5c rla r12 84ea: 0d 6d rlc r13 84ec: 0c 5c rla r12 84ee: 0d 6d rlc r13 84f0: 0c 5c rla r12 84f2: 0d 6d rlc r13 84f4: 0c 5c rla r12 84f6: 0d 6d rlc r13 84f8: 0c 5a add r10, r12 84fa: 0d 6b addc r11, r13 84fc: 0c 58 add r8, r12 84fe: 0d 69 addc r9, r13 8500: 0c 5c rla r12 8502: 0d 6d rlc r13 8504: 0c 5c rla r12 8506: 0d 6d rlc r13 8508: 0c 88 sub r8, r12 850a: 0d 79 subc r9, r13 850c: 0c 5c rla r12 850e: 0d 6d rlc r13 8510: 08 4c mov r12, r8 8512: 09 4d mov r13, r9 8514: 38 50 ba 8f add #-28742,r8 ;#0x8fba 8518: 39 60 d4 ff addc #-44, r9 ;#0xffd4 851c: 09 93 tst r9 851e: 06 34 jge $+14 ;abs 0x852c 8520: 08 4c mov r12, r8 8522: 09 4d mov r13, r9 8524: 38 50 b9 93 add #-27719,r8 ;#0x93b9 8528: 39 60 d4 ff addc #-44, r9 ;#0xffd4 852c: 0a 48 mov r8, r10 852e: 0b 49 mov r9, r11 8530: 0a 48 mov r8, r10 8532: 8a 10 swpb r10 8534: 8b 10 swpb r11 8536: 4a eb xor.b r11, r10 8538: 0a eb xor r11, r10 853a: 8b 11 sxt r11 853c: 0b 11 rra r11 853e: 0a 10 rrc r10 8540: 0b 11 rra r11 8542: 0a 10 rrc r10 8544: 81 4a 5a 00 mov r10, 90(r1) ;0x005a(r1) vbat = batt_volts * 0.03225404732254047322540473225405; 8548: 1e 41 5c 00 mov 92(r1), r14 ;0x005c(r1) 854c: 0f 43 clr r15 854e: b0 12 0e 9a call #0x9a0e 8552: 3c 40 d2 1c mov #7378, r12 ;#0x1cd2 8556: 3d 40 04 3d mov #15620, r13 ;#0x3d04 855a: b0 12 14 95 call #0x9514 855e: 81 4e 54 00 mov r14, 84(r1) ;0x0054(r1) 8562: 81 4f 56 00 mov r15, 86(r1) ;0x0056(r1) vbat_ipart = vbat; 8566: b0 12 a4 91 call #0x91a4 856a: 81 4e 4c 00 mov r14, 76(r1) ;0x004c(r1) //3.95m = 2.5m*I //1.58 Amps //is 79 on the ADC //ibat = batt_amps * 0.03720930232558139534883720930233; ibat = batt_amps * 0.046629001883239171374764595103578; 856e: 1e 41 5e 00 mov 94(r1), r14 ;0x005e(r1) 8572: 0f 43 clr r15 8574: b0 12 0e 9a call #0x9a0e 8578: 3c 40 0d fe mov #-499, r12 ;#0xfe0d 857c: 3d 40 3e 3d mov #15678, r13 ;#0x3d3e 8580: b0 12 14 95 call #0x9514 8584: 04 4e mov r14, r4 8586: 05 4f mov r15, r5 ibat_ipart = ibat; 8588: b0 12 a4 91 call #0x91a4 858c: 81 4e 4e 00 mov r14, 78(r1) ;0x004e(r1) batt_capacity = (batt_capacity_raw * 0.046629001883239171374764595103578)/(3600.0 * 10.0); //0.02 amps/adc 3600 seconds per hour, 10 centiseconds per second 8590: 2c 41 mov @r1, r12 8592: 1d 41 02 00 mov 2(r1), r13 ;0x0002(r1) 8596: 0e 4c mov r12, r14 8598: 0f 4d mov r13, r15 859a: b0 12 d8 98 call #0x98d8 859e: 3c 40 0d fe mov #-499, r12 ;#0xfe0d 85a2: 3d 40 3e 3d mov #15678, r13 ;#0x3d3e 85a6: b0 12 14 95 call #0x9514 85aa: 3c 40 00 a0 mov #-24576,r12 ;#0xa000 85ae: 3d 40 0c 47 mov #18188, r13 ;#0x470c 85b2: b0 12 38 97 call #0x9738 85b6: 06 4e mov r14, r6 85b8: 07 4f mov r15, r7 batt_capacity_ipart = batt_capacity; 85ba: b0 12 a4 91 call #0x91a4 85be: 81 4e 4a 00 mov r14, 74(r1) ;0x004a(r1) degC += CAL_OFFSET_TEMP + 60; }*/ //length=sprintf(rxbuf, "GND:LCD %d.%d,%dmV", degC&0xFF,(degC>>8)&0xFF,volt); //send the temperature to the ground lcdInstr(LCD_CLEAR); 85c2: 5f 43 mov.b #1, r15 ;r3 As==01 85c4: b0 12 06 8e call #0x8e06 length=snprintf(rxbuf, 17, "%dC %dmph %ld", degC/10,gps_speed,batt_capacity_raw); //send the temperature to the ground 85c8: 2c 41 mov @r1, r12 85ca: 1d 41 02 00 mov 2(r1), r13 ;0x0002(r1) 85ce: 0d 12 push r13 85d0: 0c 12 push r12 85d2: 5d 41 5c 00 mov.b 92(r1), r13 ;0x005c(r1) 85d6: 0d 12 push r13 85d8: 3e 40 0a 00 mov #10, r14 ;#0x000a 85dc: 0f 4a mov r10, r15 85de: b0 12 2a 91 call #0x912a 85e2: 0f 12 push r15 85e4: 30 12 5f ab push #-21665 ;#0xab5f 85e8: 30 12 11 00 push #17 ;#0x0011 85ec: 3f 40 14 00 mov #20, r15 ;#0x0014 85f0: 0f 51 add r1, r15 85f2: 0f 12 push r15 85f4: b0 12 fe a0 call #0xa0fe 85f8: 31 50 0e 00 add #14, r1 ;#0x000e lcdInstr(LCD_LINE1); 85fc: 7f 40 80 ff mov.b #-128, r15 ;#0xff80 8600: b0 12 06 8e call #0x8e06 lcdPuts(rxbuf); 8604: 0f 41 mov r1, r15 8606: 3f 52 add #8, r15 ;r2 As==11 8608: b0 12 a4 8e call #0x8ea4 length=snprintf(rxbuf, 17, "%d.%dV %02d.%dA %d.%02dC",vbat_ipart,(int)((vbat-vbat_ipart)*10),ibat_ipart,(int)((ibat-ibat_ipart)*10),batt_capacity_ipart,(int)((batt_capacity-batt_capacity_ipart)*100)); 860c: 1e 41 4a 00 mov 74(r1), r14 ;0x004a(r1) 8610: 0f 43 clr r15 8612: b0 12 0e 9a call #0x9a0e 8616: 0c 4e mov r14, r12 8618: 0d 4f mov r15, r13 861a: 0e 46 mov r6, r14 861c: 0f 47 mov r7, r15 861e: b0 12 c4 94 call #0x94c4 8622: 0c 43 clr r12 8624: 3d 40 c8 42 mov #17096, r13 ;#0x42c8 8628: b0 12 14 95 call #0x9514 862c: b0 12 7e 99 call #0x997e 8630: 0e 12 push r14 8632: 11 12 4e 00 push 78(r1) ;0x004e(r1) 8636: 1e 41 52 00 mov 82(r1), r14 ;0x0052(r1) 863a: 0f 43 clr r15 863c: b0 12 0e 9a call #0x9a0e 8640: 0c 4e mov r14, r12 8642: 0d 4f mov r15, r13 8644: 0e 44 mov r4, r14 8646: 0f 45 mov r5, r15 8648: b0 12 c4 94 call #0x94c4 864c: 0c 43 clr r12 864e: 3d 40 20 41 mov #16672, r13 ;#0x4120 8652: b0 12 14 95 call #0x9514 8656: b0 12 7e 99 call #0x997e 865a: 0e 12 push r14 865c: 11 12 56 00 push 86(r1) ;0x0056(r1) 8660: 1e 41 54 00 mov 84(r1), r14 ;0x0054(r1) 8664: 0f 43 clr r15 8666: b0 12 0e 9a call #0x9a0e 866a: 0c 4e mov r14, r12 866c: 0d 4f mov r15, r13 866e: 1e 41 5c 00 mov 92(r1), r14 ;0x005c(r1) 8672: 1f 41 5e 00 mov 94(r1), r15 ;0x005e(r1) 8676: b0 12 c4 94 call #0x94c4 867a: 0c 43 clr r12 867c: 3d 40 20 41 mov #16672, r13 ;#0x4120 8680: b0 12 14 95 call #0x9514 8684: b0 12 7e 99 call #0x997e 8688: 0e 12 push r14 868a: 11 12 58 00 push 88(r1) ;0x0058(r1) 868e: 30 12 6d ab push #-21651 ;#0xab6d 8692: 30 12 11 00 push #17 ;#0x0011 8696: 3f 40 18 00 mov #24, r15 ;#0x0018 869a: 0f 51 add r1, r15 869c: 0f 12 push r15 869e: b0 12 fe a0 call #0xa0fe 86a2: 31 50 12 00 add #18, r1 ;#0x0012 86a6: 09 4f mov r15, r9 lcdInstr(LCD_LINE2); 86a8: 7f 40 c0 ff mov.b #-64, r15 ;#0xffc0 86ac: b0 12 06 8e call #0x8e06 lcdPuts(rxbuf); 86b0: 0f 41 mov r1, r15 86b2: 3f 52 add #8, r15 ;r2 As==11 86b4: b0 12 a4 8e call #0x8ea4 //TX_STRING(rxbuf,length); //P2IFG &= ~GDO0; //clear our soiled GDO0 register //RX_MODE(); P1OUT &= ~LED_RED; 86b8: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 86bc: 21 00 eint(); 86be: 32 d2 eint 86c0: 30 40 84 81 br #0x8184 } else if(mode == MODE_GPS) 86c4: 6d 93 cmp.b #2, r13 ;r3 As==10 86c6: 7d 20 jnz $+252 ;abs 0x87c2 { //sample GPS packet //GND:GPS 306,070449.00,3317.9960,11150.5116,1,408.7,0.0 :-64dBm //length=sprintf(rxbuf, "GND:LCD %d.%d,%dmV", degC&0xFF,(degC>>8)&0xFF,volt); //send the temperature to the ground lcdInstr(LCD_CLEAR); 86c8: 5f 43 mov.b #1, r15 ;r3 As==01 86ca: b0 12 06 8e call #0x8e06 length=snprintf(rxbuf, 17, "%dC. %d", degC/10,gps_speed); //send the temperature to the ground 86ce: 5d 41 58 00 mov.b 88(r1), r13 ;0x0058(r1) 86d2: 0d 12 push r13 86d4: 3e 40 0a 00 mov #10, r14 ;#0x000a 86d8: 1f 41 5c 00 mov 92(r1), r15 ;0x005c(r1) 86dc: b0 12 2a 91 call #0x912a 86e0: 0f 12 push r15 86e2: 30 12 86 ab push #-21626 ;#0xab86 86e6: 30 12 11 00 push #17 ;#0x0011 86ea: 3f 40 10 00 mov #16, r15 ;#0x0010 86ee: 0f 51 add r1, r15 86f0: 0f 12 push r15 86f2: b0 12 fe a0 call #0xa0fe 86f6: 31 50 0a 00 add #10, r1 ;#0x000a lcdInstr(LCD_LINE1); 86fa: 7f 40 80 ff mov.b #-128, r15 ;#0xff80 86fe: b0 12 06 8e call #0x8e06 lcdPuts(rxbuf); 8702: 0f 41 mov r1, r15 8704: 3f 52 add #8, r15 ;r2 As==11 8706: b0 12 a4 8e call #0x8ea4 length=snprintf(rxbuf, 17, "%d.%dV %02d.%dA %d.%02dC",vbat_ipart,(int)((vbat-vbat_ipart)*10),ibat_ipart,(int)((ibat-ibat_ipart)*10),batt_capacity_ipart,(int)((batt_capacity-batt_capacity_ipart)*100)); 870a: 1e 41 4a 00 mov 74(r1), r14 ;0x004a(r1) 870e: 0f 43 clr r15 8710: b0 12 0e 9a call #0x9a0e 8714: 0c 4e mov r14, r12 8716: 0d 4f mov r15, r13 8718: 0e 46 mov r6, r14 871a: 0f 47 mov r7, r15 871c: b0 12 c4 94 call #0x94c4 8720: 0c 43 clr r12 8722: 3d 40 c8 42 mov #17096, r13 ;#0x42c8 8726: b0 12 14 95 call #0x9514 872a: b0 12 7e 99 call #0x997e 872e: 0e 12 push r14 8730: 11 12 4e 00 push 78(r1) ;0x004e(r1) 8734: 1e 41 52 00 mov 82(r1), r14 ;0x0052(r1) 8738: 0f 43 clr r15 873a: b0 12 0e 9a call #0x9a0e 873e: 0c 4e mov r14, r12 8740: 0d 4f mov r15, r13 8742: 0e 44 mov r4, r14 8744: 0f 45 mov r5, r15 8746: b0 12 c4 94 call #0x94c4 874a: 0c 43 clr r12 874c: 3d 40 20 41 mov #16672, r13 ;#0x4120 8750: b0 12 14 95 call #0x9514 8754: b0 12 7e 99 call #0x997e 8758: 0e 12 push r14 875a: 11 12 56 00 push 86(r1) ;0x0056(r1) 875e: 1e 41 54 00 mov 84(r1), r14 ;0x0054(r1) 8762: 0f 43 clr r15 8764: b0 12 0e 9a call #0x9a0e 8768: 0c 4e mov r14, r12 876a: 0d 4f mov r15, r13 876c: 1e 41 5c 00 mov 92(r1), r14 ;0x005c(r1) 8770: 1f 41 5e 00 mov 94(r1), r15 ;0x005e(r1) 8774: b0 12 c4 94 call #0x94c4 8778: 0c 43 clr r12 877a: 3d 40 20 41 mov #16672, r13 ;#0x4120 877e: b0 12 14 95 call #0x9514 8782: b0 12 7e 99 call #0x997e 8786: 0e 12 push r14 8788: 11 12 58 00 push 88(r1) ;0x0058(r1) 878c: 30 12 6d ab push #-21651 ;#0xab6d 8790: 30 12 11 00 push #17 ;#0x0011 8794: 3f 40 18 00 mov #24, r15 ;#0x0018 8798: 0f 51 add r1, r15 879a: 0f 12 push r15 879c: b0 12 fe a0 call #0xa0fe 87a0: 31 50 12 00 add #18, r1 ;#0x0012 87a4: 09 4f mov r15, r9 lcdInstr(LCD_LINE2); 87a6: 7f 40 c0 ff mov.b #-64, r15 ;#0xffc0 87aa: b0 12 06 8e call #0x8e06 lcdPuts(rxbuf); 87ae: 0f 41 mov r1, r15 87b0: 3f 52 add #8, r15 ;r2 As==11 87b2: b0 12 a4 8e call #0x8ea4 P1OUT &= ~LED_RED; 87b6: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 87ba: 21 00 eint(); 87bc: 32 d2 eint 87be: 30 40 84 81 br #0x8184 } else if(mode == MODE_PKT) 87c2: 6d 92 cmp.b #4, r13 ;r2 As==10 87c4: 02 24 jz $+6 ;abs 0x87ca 87c6: 30 40 84 81 br #0x8184 { //sample GPS packet //GND:GPS 306,070449.00,3317.9960,11150.5116,1,408.7,0.0 :-64dBm //length=sprintf(rxbuf, "GND:LCD %d.%d,%dmV", degC&0xFF,(degC>>8)&0xFF,volt); //send the temperature to the ground lcdInstr(LCD_CLEAR); 87ca: 5f 43 mov.b #1, r15 ;r3 As==01 87cc: b0 12 06 8e call #0x8e06 //length=snprintf(rxbuf, 17, "%dC. %ld", degC/10,gps_speed,batt_capacity_raw); //send the temperature to the ground lcdInstr(LCD_LINE1); 87d0: 7f 40 80 ff mov.b #-128, r15 ;#0xff80 87d4: b0 12 06 8e call #0x8e06 lcdPutsn(rxbuf,16); 87d8: 7e 40 10 00 mov.b #16, r14 ;#0x0010 87dc: 0f 41 mov r1, r15 87de: 3f 52 add #8, r15 ;r2 As==11 87e0: b0 12 76 8e call #0x8e76 //length=snprintf(rxbuf, 17, "%d.%dV %02d.%dA %d.%02dC",vbat_ipart,(int)((vbat-vbat_ipart)*10),ibat_ipart,(int)((ibat-ibat_ipart)*10),batt_capacity_ipart,(int)((batt_capacity-batt_capacity_ipart)*100)); if(length > 16) 87e4: 39 90 11 00 cmp #17, r9 ;#0x0011 87e8: 0b 28 jnc $+24 ;abs 0x8800 { lcdInstr(LCD_LINE2); 87ea: 7f 40 c0 ff mov.b #-64, r15 ;#0xffc0 87ee: b0 12 06 8e call #0x8e06 lcdPutsn(rxbuf+16,16); 87f2: 7e 40 10 00 mov.b #16, r14 ;#0x0010 87f6: 0f 41 mov r1, r15 87f8: 3f 50 18 00 add #24, r15 ;#0x0018 87fc: b0 12 76 8e call #0x8e76 } P1OUT &= ~LED_RED; 8800: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 8804: 21 00 eint(); 8806: 32 d2 eint 8808: 30 40 84 81 br #0x8184 } } } if(loop == 0) 880c: 4c 93 tst.b r12 880e: 02 24 jz $+6 ;abs 0x8814 8810: 30 40 84 81 br #0x8184 LPM3; //when we wake up it'll be because of an event 8814: 32 d0 d0 00 bis #208, r2 ;#0x00d0 8818: 30 40 84 81 br #0x8184 0000881c <__stop_progExec__>: 881c: 32 d0 f0 00 bis #240, r2 ;#0x00f0 8820: fd 3f jmp $-4 ;abs 0x881c 00008822 <__ctors_end>: 8822: 30 40 8e aa br #0xaa8e 00008826 : This interrupt is caused by external pin events on handshake lines */ // Port 2 interripts : the allspice controller is talking to us interrupt (PORT2_VECTOR) P2_VEC(void) { 8826: 0f 12 push r15 dint(); //no nesting! 8828: 32 c2 dint 882a: 03 43 nop if((P2IFG & GDO0) == GDO0) 882c: 5f 42 2b 00 mov.b &0x002b,r15 8830: 3f f0 40 00 and #64, r15 ;#0x0040 8834: 05 24 jz $+12 ;abs 0x8840 { flags |= CONTROLLER_RDY; 8836: a2 d3 0c 02 bis #2, &0x020c ;r3 As==10 LPM3_EXIT; 883a: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 883e: 02 00 //We need to grab that byte! } P2IFG=0x00; 8840: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 eint(); 8844: 32 d2 eint } 8846: 3f 41 pop r15 8848: 00 13 reti 0000884a : */ // Port 2 interripts : the allspice controller is talking to us interrupt (ADC10_VECTOR) ADC_VEC(void) { dint(); //no nesting! 884a: 32 c2 dint 884c: 03 43 nop LPM3_EXIT; 884e: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 8852: 00 00 eint(); 8854: 32 d2 eint } 8856: 00 13 reti 00008858 : /** This is called once every overflow */ interrupt (TIMERA1_VECTOR) TA1_VEC(void) { 8858: 0f 12 push r15 dint(); //no nesting! 885a: 32 c2 dint 885c: 03 43 nop if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 885e: 1f 42 2e 01 mov &0x012e,r15 8862: 3f 90 0a 00 cmp #10, r15 ;#0x000a 8866: 03 24 jz $+8 ;abs 0x886e flags |= TIMER_UP; seconds++; TACTL &= ~TAIFG; //clear the flag LPM3_EXIT; } eint(); 8868: 32 d2 eint } 886a: 3f 41 pop r15 886c: 00 13 reti dint(); //no nesting! if(TAIV == 0x0A) //reading this bit will clear the interrupt flags { //P1OUT ^= LED_RED; flags |= TIMER_UP; 886e: 92 d3 0c 02 bis #1, &0x020c ;r3 As==01 seconds++; 8872: 92 53 08 02 inc &0x0208 TACTL &= ~TAIFG; //clear the flag 8876: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 887a: 60 01 LPM3_EXIT; 887c: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8880: 02 00 } eint(); 8882: 32 d2 eint } 8884: 3f 41 pop r15 8886: 00 13 reti 00008888 : /** This is called once for every RS232 character that comes in */ interrupt (USCIAB0RX_VECTOR) RX_VEC(void) { 8888: 0f 12 push r15 dint(); //no nesting! 888a: 32 c2 dint 888c: 03 43 nop rx_char = UCA0RXBUF; 888e: d2 42 66 00 mov.b &0x0066,&0x020f 8892: 0f 02 flags |= RXCHAR_RDY; 8894: b2 d2 0c 02 bis #8, &0x020c ;r2 As==11 LPM3_EXIT; 8898: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 889c: 02 00 eint(); 889e: 32 d2 eint } 88a0: 3f 41 pop r15 88a2: 00 13 reti 000088a4 : /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { 88a4: 0b 12 push r11 88a6: 0a 12 push r10 TACCTL0 = CCIE; // TACCR0 interrupt enabled 88a8: b2 40 10 00 mov #16, &0x0162 ;#0x0010 88ac: 62 01 TACTL = TASSEL_1; // ACLK, upmode 88ae: b2 40 00 01 mov #256, &0x0160 ;#0x0100 88b2: 60 01 TACTL &= ~TAIFG; //clear interrupt 88b4: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 88b8: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 88ba: 0c 43 clr r12 88bc: 0e 4f mov r15, r14 88be: 0f 4c mov r12, r15 88c0: 0e 5e rla r14 88c2: 0f 6f rlc r15 88c4: 0e 5e rla r14 88c6: 0f 6f rlc r15 88c8: 0e 5e rla r14 88ca: 0f 6f rlc r15 88cc: 0e 5e rla r14 88ce: 0f 6f rlc r15 88d0: 0e 5e rla r14 88d2: 0f 6f rlc r15 88d4: 0c 4e mov r14, r12 88d6: 0d 4f mov r15, r13 88d8: 0c 5c rla r12 88da: 0d 6d rlc r13 88dc: 0c 5c rla r12 88de: 0d 6d rlc r13 88e0: 0e 5c add r12, r14 88e2: 0f 6d addc r13, r15 88e4: 0c 4e mov r14, r12 88e6: 0d 4f mov r15, r13 88e8: 0c 5c rla r12 88ea: 0d 6d rlc r13 88ec: 0c 5c rla r12 88ee: 0d 6d rlc r13 88f0: 0a 4e mov r14, r10 88f2: 0b 4f mov r15, r11 88f4: 0a 5c add r12, r10 88f6: 0b 6d addc r13, r11 88f8: 0e 4a mov r10, r14 88fa: 0f 4b mov r11, r15 88fc: 0e 5e rla r14 88fe: 0f 6f rlc r15 8900: 0e 5e rla r14 8902: 0f 6f rlc r15 8904: 0e 5e rla r14 8906: 0f 6f rlc r15 8908: 0e 5e rla r14 890a: 0f 6f rlc r15 890c: 3c 40 e8 03 mov #1000, r12 ;#0x03e8 8910: 0d 43 clr r13 8912: 0e 8a sub r10, r14 8914: 0f 7b subc r11, r15 8916: b0 12 64 91 call #0x9164 891a: 82 4e 72 01 mov r14, &0x0172 //TACCR0 = 12000; // ~1 second TAR = 0; 891e: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 8922: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8926: 60 01 } 8928: 3a 41 pop r10 892a: 3b 41 pop r11 892c: 30 41 ret 0000892e : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 895c: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 8960: 20 01 P1OUT = P1OUT_INIT; //Init output data of port1 8962: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 P2OUT = P2OUT_INIT; //Init output data of port2 8966: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 P3OUT = P3OUT_INIT; 896a: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 P4OUT = P4OUT_INIT; 896e: c2 43 1d 00 mov.b #0, &0x001d ;r3 As==00 P1SEL = P1SEL_INIT; //Select port or module -function on port1 8972: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 P2SEL = P2SEL_INIT; //Select port or module -function on port2 8976: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 P3SEL = P3SEL_INIT; 897a: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 897e: 1b 00 P4SEL = P4SEL_INIT; 8980: c2 43 1f 00 mov.b #0, &0x001f ;r3 As==00 P1DIR = P1DIR_INIT; //Init port direction register of port1 8984: f2 40 fb ff mov.b #-5, &0x0022 ;#0xfffb 8988: 22 00 P2DIR = P2DIR_INIT; //Init port direction register of port2 898a: f2 40 3f 00 mov.b #63, &0x002a ;#0x003f 898e: 2a 00 P3DIR = P3DIR_INIT; 8990: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 8994: 1a 00 P4DIR = P4DIR_INIT; 8996: f2 43 1e 00 mov.b #-1, &0x001e ;r3 As==11 P1IES = P1IES_INIT; //init port interrupts 899a: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 P2IES = P2IES_INIT; 899e: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 89a2: 2c 00 P1IE = P1IE_INIT; 89a4: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 P2IE = P2IE_INIT; 89a8: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 89ac: 2d 00 BCSCTL1 = CALBC1_12MHZ; // Set DCO 89ae: d2 42 fb 10 mov.b &0x10fb,&0x0057 89b2: 57 00 DCOCTL = CALDCO_12MHZ; 89b4: d2 42 fa 10 mov.b &0x10fa,&0x0056 89b8: 56 00 BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 89ba: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 89be: 53 00 } 89c0: 30 41 ret 000089c2 : /**init the ADC10 */ void init_adc() { //ADC10AE = ADC_0_IN | ADC_2_IN; ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 89c2: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 89c6: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 89c8: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 89cc: b2 01 } 89ce: 30 41 ret 000089d0 : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 89d0: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 89d4: b0 01 while(ADC10CTL1 & ADC10BUSY); 89d6: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 89da: fd 23 jnz $-4 ;abs 0x89d6 return ADC10MEM; 89dc: 1f 42 b4 01 mov &0x01b4,r15 } 89e0: 30 41 ret 000089e2 : int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel 89e2: b2 f0 fd ff and #-3, &0x01b0 ;#0xfffd 89e6: b0 01 if(chan == INCH_TEMP) ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor 89e8: 1e 42 b0 01 mov &0x01b0,r14 } int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel if(chan == INCH_TEMP) 89ec: 3f 90 00 a0 cmp #-24576,r15 ;#0xa000 89f0: 10 24 jz $+34 ;abs 0x8a12 ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor else ADC10CTL0 &= ~SREF_VREF_AVSS; //set the ref to VCC for the external sensors 89f2: 3e f0 ff df and #-8193, r14 ;#0xdfff 89f6: 82 4e b0 01 mov r14, &0x01b0 ADC10CTL1 = ADC10SSEL_ACLK | chan; //ACLK sourced, A2 input 89fa: 3f d2 bis #8, r15 ;r2 As==11 89fc: 82 4f b2 01 mov r15, &0x01b2 ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 8a00: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8a04: b0 01 while(ADC10CTL1 & ADC10BUSY); 8a06: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 8a0a: fd 23 jnz $-4 ;abs 0x8a06 return ADC10MEM; 8a0c: 1f 42 b4 01 mov &0x01b4,r15 } 8a10: 30 41 ret int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel if(chan == INCH_TEMP) ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor 8a12: 3e d0 00 20 bis #8192, r14 ;#0x2000 8a16: 82 4e b0 01 mov r14, &0x01b0 8a1a: ef 3f jmp $-32 ;abs 0x89fa 00008a1c : } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 8a1c: 1e 93 cmp #1, r14 ;r3 As==01 8a1e: 0c 38 jl $+26 ;abs 0x8a38 8a20: 0c 43 clr r12 ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start while(ADC10CTL1 & ADC10BUSY); return ADC10MEM; } void TX232String( char* string, int length ) 8a22: 0d 4f mov r15, r13 8a24: 0d 5c add r12, r13 { int pointer; for( pointer = 0; pointer < length; pointer++) { volatile int i; UCA0TXBUF = string[pointer]; 8a26: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8a2a: 5d 42 03 00 mov.b &0x0003,r13 8a2e: 2d f3 and #2, r13 ;r3 As==10 8a30: fc 27 jz $-6 ;abs 0x8a2a } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 8a32: 1c 53 inc r12 8a34: 0c 9e cmp r14, r12 8a36: f5 23 jnz $-20 ;abs 0x8a22 8a38: 30 41 ret 00008a3a : } } void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 8a3a: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 8a3e: 61 00 //UCA0BR1 = 0x3; //UCA0BR0 = 0x82; // 9600 from 16Mhz //UCA0BR1 = 0x6; UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 8a40: f2 40 e2 ff mov.b #-30, &0x0062 ;#0xffe2 8a44: 62 00 8a46: e2 42 63 00 mov.b #4, &0x0063 ;r2 As==10 UCA0MCTL = UCBRS_2; 8a4a: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 8a4e: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe 8a52: 61 00 IE2 |= UCA0RXIE; 8a54: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 } 8a58: 30 41 ret 00008a5a : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 8a5a: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 8a5e: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8a62: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8a64: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 8a68: 68 00 UCB0BR0 = 2; 8a6a: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 8a6e: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 8a72: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 8a76: 69 00 } 8a78: 30 41 ret 00008a7a : void CCXX_WRITE_SPI_RF_SETTINGS() { // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 8a7a: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8a7e: 4f 43 clr.b r15 8a80: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 8a84: 7e 40 06 00 mov.b #6, r14 ;#0x0006 8a88: 6f 43 mov.b #2, r15 ;r3 As==10 8a8a: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 8a8e: 7e 40 3c 00 mov.b #60, r14 ;#0x003c 8a92: 7f 40 06 00 mov.b #6, r15 ;#0x0006 8a96: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 8a9a: 6e 42 mov.b #4, r14 ;r2 As==10 8a9c: 7f 40 07 00 mov.b #7, r15 ;#0x0007 8aa0: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 8aa4: 7e 40 05 00 mov.b #5, r14 ;#0x0005 8aa8: 7f 42 mov.b #8, r15 ;r2 As==11 8aaa: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 8aae: 5e 43 mov.b #1, r14 ;r3 As==01 8ab0: 7f 40 09 00 mov.b #9, r15 ;#0x0009 8ab4: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 8ab8: 7e 40 9a ff mov.b #-102, r14 ;#0xff9a 8abc: 7f 40 0a 00 mov.b #10, r15 ;#0x000a 8ac0: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 8ac4: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 8ac8: 7f 40 0b 00 mov.b #11, r15 ;#0x000b 8acc: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 8ad0: 4e 43 clr.b r14 8ad2: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 8ad6: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 8ada: 7e 40 5c 00 mov.b #92, r14 ;#0x005c 8ade: 7f 40 0d 00 mov.b #13, r15 ;#0x000d 8ae2: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 8ae6: 7e 40 4f 00 mov.b #79, r14 ;#0x004f 8aea: 7f 40 0e 00 mov.b #14, r15 ;#0x000e 8aee: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 8af2: 7e 40 c0 ff mov.b #-64, r14 ;#0xffc0 8af6: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 8afa: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 8afe: 7e 40 2d 00 mov.b #45, r14 ;#0x002d 8b02: 7f 40 10 00 mov.b #16, r15 ;#0x0010 8b06: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 8b0a: 7e 40 3b 00 mov.b #59, r14 ;#0x003b 8b0e: 7f 40 11 00 mov.b #17, r15 ;#0x0011 8b12: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 8b16: 7e 40 73 00 mov.b #115, r14 ;#0x0073 8b1a: 7f 40 12 00 mov.b #18, r15 ;#0x0012 8b1e: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 8b22: 7e 40 23 00 mov.b #35, r14 ;#0x0023 8b26: 7f 40 13 00 mov.b #19, r15 ;#0x0013 8b2a: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 8b2e: 7e 40 b9 ff mov.b #-71, r14 ;#0xffb9 8b32: 7f 40 14 00 mov.b #20, r15 ;#0x0014 8b36: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 8b3a: 5e 43 mov.b #1, r14 ;r3 As==01 8b3c: 7f 40 15 00 mov.b #21, r15 ;#0x0015 8b40: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 8b44: 7e 40 33 00 mov.b #51, r14 ;#0x0033 8b48: 7f 40 17 00 mov.b #23, r15 ;#0x0017 8b4c: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 8b50: 7e 40 18 00 mov.b #24, r14 ;#0x0018 8b54: 7f 40 18 00 mov.b #24, r15 ;#0x0018 8b58: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 8b5c: 7e 40 1d 00 mov.b #29, r14 ;#0x001d 8b60: 7f 40 19 00 mov.b #25, r15 ;#0x0019 8b64: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 8b68: 7e 40 1c 00 mov.b #28, r14 ;#0x001c 8b6c: 7f 40 1a 00 mov.b #26, r15 ;#0x001a 8b70: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 8b74: 7e 40 c7 ff mov.b #-57, r14 ;#0xffc7 8b78: 7f 40 1b 00 mov.b #27, r15 ;#0x001b 8b7c: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 8b80: 4e 43 clr.b r14 8b82: 7f 40 1c 00 mov.b #28, r15 ;#0x001c 8b86: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 8b8a: 7e 40 b0 ff mov.b #-80, r14 ;#0xffb0 8b8e: 7f 40 1d 00 mov.b #29, r15 ;#0x001d 8b92: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 8b96: 7e 40 b6 ff mov.b #-74, r14 ;#0xffb6 8b9a: 7f 40 21 00 mov.b #33, r15 ;#0x0021 8b9e: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 8ba2: 7e 40 10 00 mov.b #16, r14 ;#0x0010 8ba6: 7f 40 22 00 mov.b #34, r15 ;#0x0022 8baa: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 8bae: 7e 40 ea ff mov.b #-22, r14 ;#0xffea 8bb2: 7f 40 23 00 mov.b #35, r15 ;#0x0023 8bb6: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 8bba: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 8bbe: 7f 40 24 00 mov.b #36, r15 ;#0x0024 8bc2: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 8bc6: 4e 43 clr.b r14 8bc8: 7f 40 25 00 mov.b #37, r15 ;#0x0025 8bcc: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 8bd0: 7e 40 11 00 mov.b #17, r14 ;#0x0011 8bd4: 7f 40 26 00 mov.b #38, r15 ;#0x0026 8bd8: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 8bdc: 7e 40 59 00 mov.b #89, r14 ;#0x0059 8be0: 7f 40 29 00 mov.b #41, r15 ;#0x0029 8be4: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 8be8: 7e 40 88 ff mov.b #-120, r14 ;#0xff88 8bec: 7f 40 2c 00 mov.b #44, r15 ;#0x002c 8bf0: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 8bf4: 7e 40 31 00 mov.b #49, r14 ;#0x0031 8bf8: 7f 40 2d 00 mov.b #45, r15 ;#0x002d 8bfc: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 8c00: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8c04: 7f 40 2e 00 mov.b #46, r15 ;#0x002e 8c08: b0 12 2e 90 call #0x902e CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 8c0c: 7e 43 mov.b #-1, r14 ;r3 As==11 8c0e: 7f 40 3e 00 mov.b #62, r15 ;#0x003e 8c12: b0 12 2e 90 call #0x902e } 8c16: 30 41 ret 00008c18 : Interrupt driven! yay! */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); 8c18: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8c1c: b0 12 98 8f call #0x8f98 while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8c20: f2 90 0f 00 cmp.b #15, &0x020e ;#0x000f 8c24: 0e 02 8c26: 08 24 jz $+18 ;abs 0x8c38 CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8c28: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8c2c: b0 12 98 8f call #0x8f98 */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8c30: f2 90 0f 00 cmp.b #15, &0x020e ;#0x000f 8c34: 0e 02 8c36: f8 23 jnz $-14 ;abs 0x8c28 CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 8c38: 7f 40 34 00 mov.b #52, r15 ;#0x0034 8c3c: b0 12 98 8f call #0x8f98 } 8c40: 30 41 ret 00008c42 : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 8c42: 0b 12 push r11 8c44: 0a 12 push r10 8c46: 09 12 push r9 8c48: 08 12 push r8 8c4a: 07 12 push r7 8c4c: 06 12 push r6 8c4e: 07 4f mov r15, r7 8c50: 48 4e mov.b r14, r8 //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 8c52: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8c56: b0 12 d0 8f call #0x8fd0 8c5a: 49 4f mov.b r15, r9 real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 8c5c: 7f 40 3b 00 mov.b #59, r15 ;#0x003b 8c60: b0 12 d0 8f call #0x8fd0 8c64: 46 4f mov.b r15, r6 for(i=0; i < length && i < pkt_length; i++) 8c66: 48 93 tst.b r8 8c68: 59 24 jz $+180 ;abs 0x8d1c 8c6a: 49 93 tst.b r9 8c6c: 5b 24 jz $+184 ;abs 0x8d24 8c6e: 0a 47 mov r7, r10 8c70: 4b 43 clr.b r11 8c72: 03 3c jmp $+8 ;abs 0x8c7a 8c74: 1a 53 inc r10 8c76: 49 9b cmp.b r11, r9 8c78: 41 24 jz $+132 ;abs 0x8cfc { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 8c7a: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8c7e: b0 12 d0 8f call #0x8fd0 8c82: ca 4f 00 00 mov.b r15, 0(r10) ;0x0000(r10) //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8c86: 5b 53 inc.b r11 8c88: 4b 98 cmp.b r8, r11 8c8a: f4 23 jnz $-22 ;abs 0x8c74 8c8c: 4e 4b mov.b r11, r14 8c8e: 4a 49 mov.b r9, r10 { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte //GPSbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 8c90: 0e 57 add r7, r14 8c92: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 8c96: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8c9a: b0 12 d0 8f call #0x8fd0 8c9e: c2 4f 07 02 mov.b r15, &0x0207 LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 8ca2: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8ca6: b0 12 d0 8f call #0x8fd0 8caa: c2 4f 0a 02 mov.b r15, &0x020a PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 8cae: 7f 40 38 00 mov.b #56, r15 ;#0x0038 8cb2: b0 12 d0 8f call #0x8fd0 8cb6: c2 4f 0b 02 mov.b r15, &0x020b if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 8cba: 4e 46 mov.b r6, r14 8cbc: 2a 53 incd r10 8cbe: 0e 9a cmp r10, r14 8cc0: 03 24 jz $+8 ;abs 0x8cc8 LQI &= ~bit7; //force it to be INVALID! 8cc2: f2 f0 7f 00 and.b #127, &0x020a ;#0x007f 8cc6: 0a 02 if (RSSI >= 128) 8cc8: 5e 42 07 02 mov.b &0x0207,r14 8ccc: 4e 93 tst.b r14 8cce: 1a 38 jl $+54 ;abs 0x8d04 RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; 8cd0: 12 c3 clrc 8cd2: 4e 10 rrc.b r14 8cd4: 7e 50 b8 ff add.b #-72, r14 ;#0xffb8 8cd8: c2 4e 06 02 mov.b r14, &0x0206 CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 8cdc: 7f 40 3a 00 mov.b #58, r15 ;#0x003a 8ce0: b0 12 98 8f call #0x8f98 CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 8ce4: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8ce8: b0 12 98 8f call #0x8f98 return i; //i = real length } 8cec: 4f 4b mov.b r11, r15 8cee: 36 41 pop r6 8cf0: 37 41 pop r7 8cf2: 38 41 pop r8 8cf4: 39 41 pop r9 8cf6: 3a 41 pop r10 8cf8: 3b 41 pop r11 8cfa: 30 41 ret //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8cfc: 4a 49 mov.b r9, r10 8cfe: 0e 4a mov r10, r14 8d00: 4b 49 mov.b r9, r11 8d02: c6 3f jmp $-114 ;abs 0x8c90 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8d04: 4e 4e mov.b r14, r14 8d06: 0f 4e mov r14, r15 8d08: 3f 50 00 ff add #-256, r15 ;#0xff00 8d0c: 0f 93 tst r15 8d0e: 0e 38 jl $+30 ;abs 0x8d2c 8d10: 0f 11 rra r15 8d12: 7f 50 b8 ff add.b #-72, r15 ;#0xffb8 8d16: c2 4f 06 02 mov.b r15, &0x0206 8d1a: e0 3f jmp $-62 ;abs 0x8cdc //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8d1c: 4b 43 clr.b r11 8d1e: 0e 43 clr r14 8d20: 4a 49 mov.b r9, r10 8d22: b6 3f jmp $-146 ;abs 0x8c90 8d24: 4b 43 clr.b r11 8d26: 0e 43 clr r14 8d28: 0a 43 clr r10 8d2a: b2 3f jmp $-154 ;abs 0x8c90 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8d2c: 1f 53 inc r15 8d2e: f0 3f jmp $-30 ;abs 0x8d10 00008d30 : /** Transmit a string of bytes. */ void TX_STRING(unsigned char *txstring, unsigned char length) { 8d30: 0b 12 push r11 8d32: 0a 12 push r10 8d34: 0b 4f mov r15, r11 8d36: 4a 4e mov.b r14, r10 unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8d38: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8d3c: b0 12 98 8f call #0x8f98 }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 8d40: 5f 42 0e 02 mov.b &0x020e,r15 8d44: 3f b0 70 00 bit #112, r15 ;#0x0070 8d48: f7 23 jnz $-16 ;abs 0x8d38 { if(i < length) CCXX_SPI_WRREG(CCxxx0_TXFIFO, txstring[i]);//Write data to FIFO }*/ CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8d4a: 4d 4a mov.b r10, r13 8d4c: 0e 4b mov r11, r14 8d4e: 7f 40 7f 00 mov.b #127, r15 ;#0x007f 8d52: b0 12 7c 90 call #0x907c CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8d56: 7f 40 35 00 mov.b #53, r15 ;#0x0035 8d5a: b0 12 98 8f call #0x8f98 do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8d5e: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8d62: b0 12 98 8f call #0x8f98 if(status == 31) //fast RX mode yay 8d66: 5f 42 0e 02 mov.b &0x020e,r15 8d6a: 7f 90 1f 00 cmp.b #31, r15 ;#0x001f 8d6e: 03 24 jz $+8 ;abs 0x8d76 break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 8d70: 3f b0 70 00 bit #112, r15 ;#0x0070 8d74: f4 23 jnz $-22 ;abs 0x8d5e } 8d76: 3a 41 pop r10 8d78: 3b 41 pop r11 8d7a: 30 41 ret 00008d7c : //first arg comes in register R15 //the loop uses 3 cycles per round //the eight cycles come from the call overhead and ret // //delay_time = (1/MCLK)*(8+(3*n)) asm("lcdloop: dec %0\n jnz lcdloop\n ret" :: "r" (n)); 8d7c: 1f 83 dec r15 8d7e: fe 23 jnz $-2 ;abs 0x8d7c 8d80: 30 41 ret 00008d82 : lcdDelay(LCDDELAY1MS*5); //wait until instr is finished } void lcdPutc( char c ) { P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8d82: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8d86: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8d88: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8d8c: 29 00 P4OUT |= LCD_RS; 8d8e: f2 d2 1d 00 bis.b #8, &0x001d ;r2 As==11 P2OUT |= (c >> 4) & 0x0F;//output upper nibble 8d92: 5d 42 29 00 mov.b &0x0029,r13 8d96: 4e 4f mov.b r15, r14 8d98: 12 c3 clrc 8d9a: 4e 10 rrc.b r14 8d9c: 12 c3 clrc 8d9e: 4e 10 rrc.b r14 8da0: 12 c3 clrc 8da2: 4e 10 rrc.b r14 8da4: 12 c3 clrc 8da6: 4e 10 rrc.b r14 8da8: 4e dd bis.b r13, r14 8daa: c2 4e 29 00 mov.b r14, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8dae: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8db2: 1d 00 nop(); 8db4: 03 43 nop nop(); 8db6: 03 43 nop nop(); 8db8: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8dba: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8dbe: 1d 00 P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8dc0: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8dc4: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8dc6: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8dca: 29 00 P4OUT |= LCD_RS; 8dcc: f2 d2 1d 00 bis.b #8, &0x001d ;r2 As==11 P2OUT |= (c & 0x0F); //and then the lower nibble 8dd0: 5e 42 29 00 mov.b &0x0029,r14 8dd4: 7f f0 0f 00 and.b #15, r15 ;#0x000f 8dd8: 4f de bis.b r14, r15 8dda: c2 4f 29 00 mov.b r15, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8dde: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8de2: 1d 00 nop(); 8de4: 03 43 nop nop(); 8de6: 03 43 nop nop(); 8de8: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8dea: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8dee: 1d 00 lcdDelay(LCDDELAY1MS); //wait until instr is finished 8df0: 3f 40 d0 07 mov #2000, r15 ;#0x07d0 8df4: b0 12 7c 8d call #0x8d7c P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8df8: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8dfc: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8dfe: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8e02: 29 00 } 8e04: 30 41 ret 00008e06 : P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); } void lcdInstr( char cmd ) { P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8e06: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8e0a: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8e0c: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8e10: 29 00 P2OUT |= (cmd >> 4) & 0x0F; //output upper nibble 8e12: 5d 42 29 00 mov.b &0x0029,r13 8e16: 4e 4f mov.b r15, r14 8e18: 12 c3 clrc 8e1a: 4e 10 rrc.b r14 8e1c: 12 c3 clrc 8e1e: 4e 10 rrc.b r14 8e20: 12 c3 clrc 8e22: 4e 10 rrc.b r14 8e24: 12 c3 clrc 8e26: 4e 10 rrc.b r14 8e28: 4e dd bis.b r13, r14 8e2a: c2 4e 29 00 mov.b r14, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8e2e: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8e32: 1d 00 nop(); 8e34: 03 43 nop nop(); 8e36: 03 43 nop nop(); 8e38: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8e3a: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8e3e: 1d 00 P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8e40: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8e44: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8e46: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8e4a: 29 00 P2OUT |= (cmd & 0x0F);//and then the lower nibble 8e4c: 5e 42 29 00 mov.b &0x0029,r14 8e50: 7f f0 0f 00 and.b #15, r15 ;#0x000f 8e54: 4f de bis.b r14, r15 8e56: c2 4f 29 00 mov.b r15, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8e5a: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8e5e: 1d 00 nop(); 8e60: 03 43 nop nop(); 8e62: 03 43 nop nop(); 8e64: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8e66: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8e6a: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait until instr is finished 8e6c: 3f 40 10 27 mov #10000, r15 ;#0x2710 8e70: b0 12 7c 8d call #0x8d7c } 8e74: 30 41 ret 00008e76 : //delay_time = (1/MCLK)*(8+(3*n)) asm("lcdloop: dec %0\n jnz lcdloop\n ret" :: "r" (n)); } char lcdPutsn( char * str, char maxchars ) //write until null char, { 8e76: 0b 12 push r11 8e78: 0a 12 push r10 8e7a: 0b 4f mov r15, r11 8e7c: 4a 4e mov.b r14, r10 while (*str != 0 && maxchars > 0) 8e7e: 6f 4f mov.b @r15, r15 8e80: 4f 93 tst.b r15 8e82: 0c 24 jz $+26 ;abs 0x8e9c 8e84: 5e 93 cmp.b #1, r14 ;r3 As==01 8e86: 03 34 jge $+8 ;abs 0x8e8e 8e88: 09 3c jmp $+20 ;abs 0x8e9c 8e8a: 4a 93 tst.b r10 8e8c: 07 24 jz $+16 ;abs 0x8e9c { lcdPutc(*str++); //write char and increment pointer 8e8e: 1b 53 inc r11 8e90: b0 12 82 8d call #0x8d82 maxchars--; 8e94: 7a 53 add.b #-1, r10 ;r3 As==11 asm("lcdloop: dec %0\n jnz lcdloop\n ret" :: "r" (n)); } char lcdPutsn( char * str, char maxchars ) //write until null char, { while (*str != 0 && maxchars > 0) 8e96: 6f 4b mov.b @r11, r15 8e98: 4f 93 tst.b r15 8e9a: f7 23 jnz $-16 ;abs 0x8e8a { lcdPutc(*str++); //write char and increment pointer maxchars--; } return maxchars; } 8e9c: 4f 4a mov.b r10, r15 8e9e: 3a 41 pop r10 8ea0: 3b 41 pop r11 8ea2: 30 41 ret 00008ea4 : void lcdPuts( char * str ) //write until null char, { 8ea4: 0b 12 push r11 8ea6: 0b 4f mov r15, r11 while (*str != 0) { 8ea8: 6f 4f mov.b @r15, r15 8eaa: 4f 93 tst.b r15 8eac: 06 24 jz $+14 ;abs 0x8eba lcdPutc(*str++); //write char and increment pointer 8eae: 1b 53 inc r11 8eb0: b0 12 82 8d call #0x8d82 return maxchars; } void lcdPuts( char * str ) //write until null char, { while (*str != 0) { 8eb4: 6f 4b mov.b @r11, r15 8eb6: 4f 93 tst.b r15 8eb8: fa 23 jnz $-10 ;abs 0x8eae lcdPutc(*str++); //write char and increment pointer } } 8eba: 3b 41 pop r11 8ebc: 30 41 ret 00008ebe : /** Wait until LCD signals that it is ready */ void lcdBusy(unsigned int time) { 8ebe: 0b 12 push r11 unsigned int time2=time; while(time2 > 0) 8ec0: 0f 93 tst r15 8ec2: 07 24 jz $+16 ;abs 0x8ed2 8ec4: 0b 4f mov r15, r11 { lcdDelay(LCDDELAY1MS); 8ec6: 3f 40 d0 07 mov #2000, r15 ;#0x07d0 8eca: b0 12 7c 8d call #0x8d7c time2--; 8ece: 3b 53 add #-1, r11 ;r3 As==11 Wait until LCD signals that it is ready */ void lcdBusy(unsigned int time) { unsigned int time2=time; while(time2 > 0) 8ed0: fa 23 jnz $-10 ;abs 0x8ec6 { lcdDelay(LCDDELAY1MS); time2--; } } 8ed2: 3b 41 pop r11 8ed4: 30 41 ret 00008ed6 : } void lcdInit( void ) { // set the 2-line display mode lcdInstr(LCD_FUNCTIONSET | LCD_2LINES); 8ed6: 7f 40 28 00 mov.b #40, r15 ;#0x0028 8eda: b0 12 06 8e call #0x8e06 //lcdInstr(LCD_DISP_CTRL); //display off lcdInstr(LCD_CLEAR); 8ede: 5f 43 mov.b #1, r15 ;r3 As==01 8ee0: b0 12 06 8e call #0x8e06 lcdBusy(10); 8ee4: 3f 40 0a 00 mov #10, r15 ;#0x000a 8ee8: b0 12 be 8e call #0x8ebe //lcdInstr(LCD_ENTRYMODE | LCD_INC); lcdInstr(LCD_CURSORON); 8eec: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 8ef0: b0 12 06 8e call #0x8e06 //lcdInstr(LCD_DISP_CTRL); lcdInstr(LCD_CURSOROFF); //hide cursor 8ef4: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 8ef8: b0 12 06 8e call #0x8e06 //lcdInstr(LCD_CLEAR); //clear display } 8efc: 30 41 ret 00008efe : /** Turn on the LCD and initialize it to 4 bit interface. */ void lcdOn( void ) { P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); //reset pins 8efe: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8f02: 29 00 P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8f04: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8f08: 1d 00 lcdBusy(100); //wait more than 30ms 8f0a: 3f 40 64 00 mov #100, r15 ;#0x0064 8f0e: b0 12 be 8e call #0x8ebe //send the reset sequece (3 times the same pattern) //P4OUT |= LCD_RS; //set 8 bit interface P2OUT |= LCD_D4 | LCD_D5; 8f12: f2 d0 03 00 bis.b #3, &0x0029 ;#0x0003 8f16: 29 00 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8f18: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8f1c: 1d 00 nop(); 8f1e: 03 43 nop nop(); 8f20: 03 43 nop nop(); 8f22: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8f24: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8f28: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait > 4.1 8f2a: 3f 40 10 27 mov #10000, r15 ;#0x2710 8f2e: b0 12 7c 8d call #0x8d7c P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8f32: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8f36: 1d 00 nop(); 8f38: 03 43 nop nop(); 8f3a: 03 43 nop nop(); 8f3c: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8f3e: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8f42: 1d 00 lcdDelay(LCDDELAY1MS); //wait > 100us 8f44: 3f 40 d0 07 mov #2000, r15 ;#0x07d0 8f48: b0 12 7c 8d call #0x8d7c P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8f4c: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8f50: 1d 00 nop(); 8f52: 03 43 nop nop(); 8f54: 03 43 nop nop(); 8f56: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8f58: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8f5c: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait a bit 8f5e: 3f 40 10 27 mov #10000, r15 ;#0x2710 8f62: b0 12 7c 8d call #0x8d7c P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8f66: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8f6a: 29 00 P2OUT |= LCD_D5; //set into nibble mode 8f6c: e2 d3 29 00 bis.b #2, &0x0029 ;r3 As==10 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8f70: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8f74: 1d 00 nop(); 8f76: 03 43 nop nop(); 8f78: 03 43 nop nop(); 8f7a: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8f7c: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8f80: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait a bit 8f82: 3f 40 10 27 mov #10000, r15 ;#0x2710 8f86: b0 12 7c 8d call #0x8d7c //LCDOUT &= LCD_DATA_OFF; //reset data lines P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8f8a: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8f8e: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8f90: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8f94: 29 00 } 8f96: 30 41 ret 00008f98 : Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8f98: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8f9c: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8f9e: 5e 42 18 00 mov.b &0x0018,r14 8fa2: 2e f2 and #4, r14 ;r2 As==10 8fa4: fc 23 jnz $-6 ;abs 0x8f9e P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8fa6: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8faa: 1b 00 IFG2 &= ~UCB0RXIFG; 8fac: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8fb0: 03 00 UCB0TXBUF = reg; 8fb2: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8fb6: 5f 42 03 00 mov.b &0x0003,r15 8fba: 2f f2 and #4, r15 ;r2 As==10 8fbc: fc 27 jz $-6 ;abs 0x8fb6 status = UCB0RXBUF; 8fbe: d2 42 6e 00 mov.b &0x006e,&0x020e 8fc2: 0e 02 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8fc4: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8fc8: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8fcc: 1b 00 } 8fce: 30 41 ret 00008fd0 : */ char CCXX_SPI_RDREG(char reg) { unsigned char rx=0; if(reg >= 0x30) 8fd0: 7f 90 30 00 cmp.b #48, r15 ;#0x0030 8fd4: 29 38 jl $+84 ;abs 0x9028 reg |= 0xC0; 8fd6: 7f d0 c0 ff bis.b #-64, r15 ;#0xffc0 else reg |= 0x80; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8fda: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8fde: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8fe0: 5e 42 18 00 mov.b &0x0018,r14 8fe4: 2e f2 and #4, r14 ;r2 As==10 8fe6: fc 23 jnz $-6 ;abs 0x8fe0 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8fe8: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8fec: 1b 00 IFG2 &= ~UCB0RXIFG; 8fee: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8ff2: 03 00 UCB0TXBUF = reg; 8ff4: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8ff8: 5f 42 03 00 mov.b &0x0003,r15 8ffc: 2f f2 and #4, r15 ;r2 As==10 8ffe: fc 27 jz $-6 ;abs 0x8ff8 status = UCB0RXBUF; 9000: d2 42 6e 00 mov.b &0x006e,&0x020e 9004: 0e 02 IFG2 &= ~UCB0RXIFG; 9006: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 900a: 03 00 UCB0TXBUF = 0; 900c: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 while (!(IFG2 & UCB0RXIFG)); 9010: 5f 42 03 00 mov.b &0x0003,r15 9014: 2f f2 and #4, r15 ;r2 As==10 9016: fc 27 jz $-6 ;abs 0x9010 rx = UCB0RXBUF; 9018: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 901c: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 9020: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 9024: 1b 00 return rx; } 9026: 30 41 ret { unsigned char rx=0; if(reg >= 0x30) reg |= 0xC0; else reg |= 0x80; 9028: 7f d0 80 ff bis.b #-128, r15 ;#0xff80 902c: d6 3f jmp $-82 ;abs 0x8fda 0000902e : { unsigned char dummy; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 902e: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 9032: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 9034: 5d 42 18 00 mov.b &0x0018,r13 9038: 2d f2 and #4, r13 ;r2 As==10 903a: fc 23 jnz $-6 ;abs 0x9034 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 903c: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 9040: 1b 00 IFG2 &= ~UCB0RXIFG; 9042: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 9046: 03 00 UCB0TXBUF = reg; 9048: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 904c: 5f 42 03 00 mov.b &0x0003,r15 9050: 2f f2 and #4, r15 ;r2 As==10 9052: fc 27 jz $-6 ;abs 0x904c status = UCB0RXBUF; 9054: d2 42 6e 00 mov.b &0x006e,&0x020e 9058: 0e 02 //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 905a: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 905e: 03 00 UCB0TXBUF = byte; 9060: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 9064: 5f 42 03 00 mov.b &0x0003,r15 9068: 2f f2 and #4, r15 ;r2 As==10 906a: fc 27 jz $-6 ;abs 0x9064 dummy = UCB0RXBUF; 906c: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 9070: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 9074: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 9078: 1b 00 } 907a: 30 41 ret 0000907c : { unsigned char dummy; unsigned int index; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 907c: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 9080: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 9082: 5c 42 18 00 mov.b &0x0018,r12 9086: 2c f2 and #4, r12 ;r2 As==10 9088: fc 23 jnz $-6 ;abs 0x9082 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 908a: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 908e: 1b 00 IFG2 &= ~UCB0RXIFG; 9090: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 9094: 03 00 UCB0TXBUF = reg; 9096: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 909a: 5f 42 03 00 mov.b &0x0003,r15 909e: 2f f2 and #4, r15 ;r2 As==10 90a0: fc 27 jz $-6 ;abs 0x909a status = UCB0RXBUF; 90a2: d2 42 6e 00 mov.b &0x006e,&0x020e 90a6: 0e 02 IFG2 &= ~UCB0RXIFG; 90a8: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 90ac: 03 00 UCB0TXBUF = length; 90ae: c2 4d 6f 00 mov.b r13, &0x006f while (!(IFG2 & UCB0RXIFG)); 90b2: 5f 42 03 00 mov.b &0x0003,r15 90b6: 2f f2 and #4, r15 ;r2 As==10 90b8: fc 27 jz $-6 ;abs 0x90b2 dummy = UCB0RXBUF; 90ba: 5f 42 6e 00 mov.b &0x006e,r15 for(index = 0; index < length; index++) 90be: 8d 11 sxt r13 90c0: 11 24 jz $+36 ;abs 0x90e4 90c2: 0c 43 clr r12 { IFG2 &= ~UCB0RXIFG; 90c4: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 90c8: 03 00 } /** Write a register from the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) 90ca: 0f 4e mov r14, r15 90cc: 0f 5c add r12, r15 dummy = UCB0RXBUF; for(index = 0; index < length; index++) { IFG2 &= ~UCB0RXIFG; UCB0TXBUF = buf[index]; 90ce: e2 4f 6f 00 mov.b @r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 90d2: 5f 42 03 00 mov.b &0x0003,r15 90d6: 2f f2 and #4, r15 ;r2 As==10 90d8: fc 27 jz $-6 ;abs 0x90d2 dummy = UCB0RXBUF; 90da: 5f 42 6e 00 mov.b &0x006e,r15 IFG2 &= ~UCB0RXIFG; UCB0TXBUF = length; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; for(index = 0; index < length; index++) 90de: 1c 53 inc r12 90e0: 0c 9d cmp r13, r12 90e2: f0 2b jnc $-30 ;abs 0x90c4 UCB0TXBUF = buf[index]; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; } P3OUT |= CSn; //pull CSn high, we're done with the transfer 90e4: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 90e8: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 90ec: 1b 00 } 90ee: 30 41 ret 000090f0 <__mulhi3>: 90f0: 0d 4f mov r15, r13 90f2: 0f 43 clr r15 90f4: 0e 93 tst r14 90f6: 07 24 jz $+16 ;abs 0x9106 90f8: 12 c3 clrc 90fa: 0d 10 rrc r13 90fc: 01 28 jnc $+4 ;abs 0x9100 90fe: 0f 5e add r14, r15 9100: 0e 5e rla r14 9102: 0d 93 tst r13 9104: f7 23 jnz $-16 ;abs 0x90f4 9106: 30 41 ret 00009108 <__udivhi3>: 9108: 7c 40 10 00 mov.b #16, r12 ;#0x0010 910c: 0d 4e mov r14, r13 910e: 0e 43 clr r14 9110: 0f 5f rla r15 9112: 0e 6e rlc r14 9114: 0e 9d cmp r13, r14 9116: 02 28 jnc $+6 ;abs 0x911c 9118: 0e 8d sub r13, r14 911a: 1f d3 bis #1, r15 ;r3 As==01 911c: 1c 83 dec r12 911e: f8 23 jnz $-14 ;abs 0x9110 9120: 30 41 ret 00009122 <__umodhi3>: 9122: b0 12 08 91 call #0x9108 9126: 0f 4e mov r14, r15 9128: 30 41 ret 0000912a <__divhi3>: 912a: 0d 43 clr r13 912c: 0f 93 tst r15 912e: 04 34 jge $+10 ;abs 0x9138 9130: 3d 40 03 00 mov #3, r13 ;#0x0003 9134: 3f e3 inv r15 9136: 1f 53 inc r15 9138: 0e 93 tst r14 913a: 03 34 jge $+8 ;abs 0x9142 913c: 5d e3 xor.b #1, r13 ;r3 As==01 913e: 3e e3 inv r14 9140: 1e 53 inc r14 9142: 0d 12 push r13 9144: b0 12 08 91 call #0x9108 9148: 3d 41 pop r13 914a: 6d b3 bit.b #2, r13 ;r3 As==10 914c: 02 24 jz $+6 ;abs 0x9152 914e: 3e e3 inv r14 9150: 1e 53 inc r14 9152: 5d b3 bit.b #1, r13 ;r3 As==01 9154: 02 24 jz $+6 ;abs 0x915a 9156: 3f e3 inv r15 9158: 1f 53 inc r15 915a: 30 41 ret 0000915c <__modhi3>: 915c: b0 12 2a 91 call #0x912a 9160: 0f 4e mov r14, r15 9162: 30 41 ret 00009164 <__udivsi3>: 9164: 0b 12 push r11 9166: 0a 12 push r10 9168: 09 12 push r9 916a: 79 40 20 00 mov.b #32, r9 ;#0x0020 916e: 0a 4c mov r12, r10 9170: 0b 4d mov r13, r11 9172: 0c 43 clr r12 9174: 0d 43 clr r13 9176: 0e 5e rla r14 9178: 0f 6f rlc r15 917a: 0c 6c rlc r12 917c: 0d 6d rlc r13 917e: 0d 9b cmp r11, r13 9180: 06 28 jnc $+14 ;abs 0x918e 9182: 02 20 jnz $+6 ;abs 0x9188 9184: 0c 9a cmp r10, r12 9186: 03 28 jnc $+8 ;abs 0x918e 9188: 0c 8a sub r10, r12 918a: 0d 7b subc r11, r13 918c: 1e d3 bis #1, r14 ;r3 As==01 918e: 19 83 dec r9 9190: f2 23 jnz $-26 ;abs 0x9176 9192: 39 41 pop r9 9194: 3a 41 pop r10 9196: 3b 41 pop r11 9198: 30 41 ret 0000919a <__umodsi3>: 919a: b0 12 64 91 call #0x9164 919e: 0e 4c mov r12, r14 91a0: 0f 4d mov r13, r15 91a2: 30 41 ret 000091a4 <__fixunssfsi>: 91a4: 0b 12 push r11 91a6: 0a 12 push r10 91a8: 0a 4e mov r14, r10 91aa: 0b 4f mov r15, r11 91ac: 0c 43 clr r12 91ae: 3d 40 00 4f mov #20224, r13 ;#0x4f00 91b2: b0 12 88 98 call #0x9888 91b6: 0f 93 tst r15 91b8: 07 34 jge $+16 ;abs 0x91c8 91ba: 0e 4a mov r10, r14 91bc: 0f 4b mov r11, r15 91be: b0 12 7e 99 call #0x997e 91c2: 3a 41 pop r10 91c4: 3b 41 pop r11 91c6: 30 41 ret 91c8: 0c 43 clr r12 91ca: 3d 40 00 4f mov #20224, r13 ;#0x4f00 91ce: 0e 4a mov r10, r14 91d0: 0f 4b mov r11, r15 91d2: b0 12 c4 94 call #0x94c4 91d6: b0 12 7e 99 call #0x997e 91da: 0e 53 add #0, r14 ;r3 As==00 91dc: 3f 60 00 80 addc #-32768,r15 ;#0x8000 91e0: 3a 41 pop r10 91e2: 3b 41 pop r11 91e4: 30 41 ret 000091e6 <_fpadd_parts>: 91e6: 0b 12 push r11 91e8: 0a 12 push r10 91ea: 09 12 push r9 91ec: 08 12 push r8 91ee: 07 12 push r7 91f0: 06 12 push r6 91f2: 05 12 push r5 91f4: 04 12 push r4 91f6: 31 50 fa ff add #-6, r1 ;#0xfffa 91fa: 08 4d mov r13, r8 91fc: 6b 4f mov.b @r15, r11 91fe: 6b 93 cmp.b #2, r11 ;r3 As==10 9200: 67 28 jnc $+208 ;abs 0x92d0 9202: 6c 4e mov.b @r14, r12 9204: 6c 93 cmp.b #2, r12 ;r3 As==10 9206: e9 28 jnc $+468 ;abs 0x93da 9208: 6b 92 cmp.b #4, r11 ;r2 As==10 920a: 02 20 jnz $+6 ;abs 0x9210 920c: 30 40 66 94 br #0x9466 9210: 6c 92 cmp.b #4, r12 ;r2 As==10 9212: e3 24 jz $+456 ;abs 0x93da 9214: 6c 93 cmp.b #2, r12 ;r3 As==10 9216: bb 24 jz $+376 ;abs 0x938e 9218: 6b 93 cmp.b #2, r11 ;r3 As==10 921a: df 24 jz $+448 ;abs 0x93da 921c: 91 4f 02 00 mov 2(r15), 0(r1) ;0x0002(r15), 0x0000(r1) 9220: 00 00 9222: 1b 4e 02 00 mov 2(r14), r11 ;0x0002(r14) 9226: 14 4f 04 00 mov 4(r15), r4 ;0x0004(r15) 922a: 15 4f 06 00 mov 6(r15), r5 ;0x0006(r15) 922e: 16 4e 04 00 mov 4(r14), r6 ;0x0004(r14) 9232: 17 4e 06 00 mov 6(r14), r7 ;0x0006(r14) 9236: 2c 41 mov @r1, r12 9238: 0c 8b sub r11, r12 923a: 09 4c mov r12, r9 923c: 0c 93 tst r12 923e: bf 38 jl $+384 ;abs 0x93be 9240: 39 90 20 00 cmp #32, r9 ;#0x0020 9244: 50 34 jge $+162 ;abs 0x92e6 9246: 1c 93 cmp #1, r12 ;r3 As==01 9248: d7 38 jl $+432 ;abs 0x93f8 924a: 81 46 02 00 mov r6, 2(r1) ;0x0002(r1) 924e: 81 47 04 00 mov r7, 4(r1) ;0x0004(r1) 9252: 4c 49 mov.b r9, r12 9254: 7c f0 1f 00 and.b #31, r12 ;#0x001f 9258: 0b 24 jz $+24 ;abs 0x9270 925a: 0a 46 mov r6, r10 925c: 0b 47 mov r7, r11 925e: 12 c3 clrc 9260: 0b 10 rrc r11 9262: 0a 10 rrc r10 9264: 7c 53 add.b #-1, r12 ;r3 As==11 9266: fb 23 jnz $-8 ;abs 0x925e 9268: 81 4a 02 00 mov r10, 2(r1) ;0x0002(r1) 926c: 81 4b 04 00 mov r11, 4(r1) ;0x0004(r1) 9270: 1c 43 mov #1, r12 ;r3 As==01 9272: 0d 43 clr r13 9274: 79 f0 1f 00 and.b #31, r9 ;#0x001f 9278: 04 24 jz $+10 ;abs 0x9282 927a: 0c 5c rla r12 927c: 0d 6d rlc r13 927e: 79 53 add.b #-1, r9 ;r3 As==11 9280: fc 23 jnz $-6 ;abs 0x927a 9282: 3c 53 add #-1, r12 ;r3 As==11 9284: 3d 63 addc #-1, r13 ;r3 As==11 9286: 0c f6 and r6, r12 9288: 0d f7 and r7, r13 928a: 1a 43 mov #1, r10 ;r3 As==01 928c: 0b 43 clr r11 928e: 0c 93 tst r12 9290: 02 20 jnz $+6 ;abs 0x9296 9292: 0d 93 tst r13 9294: e5 24 jz $+460 ;abs 0x9460 9296: 16 41 02 00 mov 2(r1), r6 ;0x0002(r1) 929a: 17 41 04 00 mov 4(r1), r7 ;0x0004(r1) 929e: 06 da bis r10, r6 92a0: 07 db bis r11, r7 92a2: 5f 4f 01 00 mov.b 1(r15), r15 ;0x0001(r15) 92a6: 5f 9e 01 00 cmp.b 1(r14), r15 ;0x0001(r14) 92aa: 28 20 jnz $+82 ;abs 0x92fc 92ac: c8 4f 01 00 mov.b r15, 1(r8) ;0x0001(r8) 92b0: a8 41 02 00 mov @r1, 2(r8) ;0x0002(r8) 92b4: 0e 46 mov r6, r14 92b6: 0f 47 mov r7, r15 92b8: 0e 54 add r4, r14 92ba: 0f 65 addc r5, r15 92bc: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 92c0: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 92c4: f8 40 03 00 mov.b #3, 0(r8) ;#0x0003, 0x0000(r8) 92c8: 00 00 92ca: 0f 93 tst r15 92cc: 4d 38 jl $+156 ;abs 0x9368 92ce: 0f 48 mov r8, r15 92d0: 31 50 06 00 add #6, r1 ;#0x0006 92d4: 34 41 pop r4 92d6: 35 41 pop r5 92d8: 36 41 pop r6 92da: 37 41 pop r7 92dc: 38 41 pop r8 92de: 39 41 pop r9 92e0: 3a 41 pop r10 92e2: 3b 41 pop r11 92e4: 30 41 ret 92e6: 2b 91 cmp @r1, r11 92e8: 67 38 jl $+208 ;abs 0x93b8 92ea: 81 4b 00 00 mov r11, 0(r1) ;0x0000(r1) 92ee: 04 43 clr r4 92f0: 05 43 clr r5 92f2: 5f 4f 01 00 mov.b 1(r15), r15 ;0x0001(r15) 92f6: 5f 9e 01 00 cmp.b 1(r14), r15 ;0x0001(r14) 92fa: d8 27 jz $-78 ;abs 0x92ac 92fc: 4f 93 tst.b r15 92fe: 68 24 jz $+210 ;abs 0x93d0 9300: 0e 46 mov r6, r14 9302: 0f 47 mov r7, r15 9304: 0e 84 sub r4, r14 9306: 0f 75 subc r5, r15 9308: 0f 93 tst r15 930a: 69 38 jl $+212 ;abs 0x93de 930c: c8 43 01 00 mov.b #0, 1(r8) ;r3 As==00, 0x0001(r8) 9310: a8 41 02 00 mov @r1, 2(r8) ;0x0002(r8) 9314: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 9318: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 931c: 0c 4e mov r14, r12 931e: 0d 4f mov r15, r13 9320: 3c 53 add #-1, r12 ;r3 As==11 9322: 3d 63 addc #-1, r13 ;r3 As==11 9324: 3d 90 ff 3f cmp #16383, r13 ;#0x3fff 9328: 05 28 jnc $+12 ;abs 0x9334 932a: 3d 90 00 40 cmp #16384, r13 ;#0x4000 932e: 17 2c jc $+48 ;abs 0x935e 9330: 3c 93 cmp #-1, r12 ;r3 As==11 9332: 15 2c jc $+44 ;abs 0x935e 9334: 1b 48 02 00 mov 2(r8), r11 ;0x0002(r8) 9338: 3b 53 add #-1, r11 ;r3 As==11 933a: 0e 5e rla r14 933c: 0f 6f rlc r15 933e: 0a 4b mov r11, r10 9340: 3b 53 add #-1, r11 ;r3 As==11 9342: 0c 4e mov r14, r12 9344: 0d 4f mov r15, r13 9346: 3c 53 add #-1, r12 ;r3 As==11 9348: 3d 63 addc #-1, r13 ;r3 As==11 934a: 3d 90 ff 3f cmp #16383, r13 ;#0x3fff 934e: f5 2b jnc $-20 ;abs 0x933a 9350: 3c 24 jz $+122 ;abs 0x93ca 9352: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 9356: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 935a: 88 4a 02 00 mov r10, 2(r8) ;0x0002(r8) 935e: f8 40 03 00 mov.b #3, 0(r8) ;#0x0003, 0x0000(r8) 9362: 00 00 9364: 0f 93 tst r15 9366: b3 37 jge $-152 ;abs 0x92ce 9368: 0c 4e mov r14, r12 936a: 0d 4f mov r15, r13 936c: 1c f3 and #1, r12 ;r3 As==01 936e: 0d f3 and #0, r13 ;r3 As==00 9370: 12 c3 clrc 9372: 0f 10 rrc r15 9374: 0e 10 rrc r14 9376: 0a 4c mov r12, r10 9378: 0b 4d mov r13, r11 937a: 0a de bis r14, r10 937c: 0b df bis r15, r11 937e: 88 4a 04 00 mov r10, 4(r8) ;0x0004(r8) 9382: 88 4b 06 00 mov r11, 6(r8) ;0x0006(r8) 9386: 98 53 02 00 inc 2(r8) ;0x0002(r8) 938a: 0f 48 mov r8, r15 938c: a1 3f jmp $-188 ;abs 0x92d0 938e: 6b 93 cmp.b #2, r11 ;r3 As==10 9390: 9f 23 jnz $-192 ;abs 0x92d0 9392: ad 4f 00 00 mov @r15, 0(r13) ;0x0000(r13) 9396: 9d 4f 02 00 mov 2(r15), 2(r13) ;0x0002(r15), 0x0002(r13) 939a: 02 00 939c: 9d 4f 04 00 mov 4(r15), 4(r13) ;0x0004(r15), 0x0004(r13) 93a0: 04 00 93a2: 9d 4f 06 00 mov 6(r15), 6(r13) ;0x0006(r15), 0x0006(r13) 93a6: 06 00 93a8: 5e 4e 01 00 mov.b 1(r14), r14 ;0x0001(r14) 93ac: 5e ff 01 00 and.b 1(r15), r14 ;0x0001(r15) 93b0: cd 4e 01 00 mov.b r14, 1(r13) ;0x0001(r13) 93b4: 0f 4d mov r13, r15 93b6: 8c 3f jmp $-230 ;abs 0x92d0 93b8: 06 43 clr r6 93ba: 07 43 clr r7 93bc: 9a 3f jmp $-202 ;abs 0x92f2 93be: 39 e3 inv r9 93c0: 19 53 inc r9 93c2: 39 90 20 00 cmp #32, r9 ;#0x0020 93c6: 8f 37 jge $-224 ;abs 0x92e6 93c8: 3e 3f jmp $-386 ;abs 0x9246 93ca: 3c 93 cmp #-1, r12 ;r3 As==11 93cc: b6 2b jnc $-146 ;abs 0x933a 93ce: c1 3f jmp $-124 ;abs 0x9352 93d0: 0e 44 mov r4, r14 93d2: 0f 45 mov r5, r15 93d4: 0e 86 sub r6, r14 93d6: 0f 77 subc r7, r15 93d8: 97 3f jmp $-208 ;abs 0x9308 93da: 0f 4e mov r14, r15 93dc: 79 3f jmp $-268 ;abs 0x92d0 93de: d8 43 01 00 mov.b #1, 1(r8) ;r3 As==01, 0x0001(r8) 93e2: a8 41 02 00 mov @r1, 2(r8) ;0x0002(r8) 93e6: 3e e3 inv r14 93e8: 3f e3 inv r15 93ea: 1e 53 inc r14 93ec: 0f 63 adc r15 93ee: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 93f2: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 93f6: 92 3f jmp $-218 ;abs 0x931c 93f8: 0c 93 tst r12 93fa: 7b 27 jz $-264 ;abs 0x92f2 93fc: 81 59 00 00 add r9, 0(r1) ;0x0000(r1) 9400: 81 44 02 00 mov r4, 2(r1) ;0x0002(r1) 9404: 81 45 04 00 mov r5, 4(r1) ;0x0004(r1) 9408: 4d 49 mov.b r9, r13 940a: 7d f0 1f 00 and.b #31, r13 ;#0x001f 940e: 0c 24 jz $+26 ;abs 0x9428 9410: 4b 4d mov.b r13, r11 9412: 0c 44 mov r4, r12 9414: 0d 45 mov r5, r13 9416: 12 c3 clrc 9418: 0d 10 rrc r13 941a: 0c 10 rrc r12 941c: 7b 53 add.b #-1, r11 ;r3 As==11 941e: fb 23 jnz $-8 ;abs 0x9416 9420: 81 4c 02 00 mov r12, 2(r1) ;0x0002(r1) 9424: 81 4d 04 00 mov r13, 4(r1) ;0x0004(r1) 9428: 1c 43 mov #1, r12 ;r3 As==01 942a: 0d 43 clr r13 942c: 79 f0 1f 00 and.b #31, r9 ;#0x001f 9430: 04 24 jz $+10 ;abs 0x943a 9432: 0c 5c rla r12 9434: 0d 6d rlc r13 9436: 79 53 add.b #-1, r9 ;r3 As==11 9438: fc 23 jnz $-6 ;abs 0x9432 943a: 3c 53 add #-1, r12 ;r3 As==11 943c: 3d 63 addc #-1, r13 ;r3 As==11 943e: 0c f4 and r4, r12 9440: 0d f5 and r5, r13 9442: 1a 43 mov #1, r10 ;r3 As==01 9444: 0b 43 clr r11 9446: 0c 93 tst r12 9448: 04 20 jnz $+10 ;abs 0x9452 944a: 0d 93 tst r13 944c: 02 20 jnz $+6 ;abs 0x9452 944e: 0a 43 clr r10 9450: 0b 43 clr r11 9452: 14 41 02 00 mov 2(r1), r4 ;0x0002(r1) 9456: 15 41 04 00 mov 4(r1), r5 ;0x0004(r1) 945a: 04 da bis r10, r4 945c: 05 db bis r11, r5 945e: 49 3f jmp $-364 ;abs 0x92f2 9460: 0a 43 clr r10 9462: 0b 43 clr r11 9464: 18 3f jmp $-462 ;abs 0x9296 9466: 6c 92 cmp.b #4, r12 ;r2 As==10 9468: 33 23 jnz $-408 ;abs 0x92d0 946a: df 9e 01 00 cmp.b 1(r14), 1(r15) ;0x0001(r14), 0x0001(r15) 946e: 01 00 9470: 2f 27 jz $-416 ;abs 0x92d0 9472: 3f 40 8e ab mov #-21618,r15 ;#0xab8e 9476: 2c 3f jmp $-422 ;abs 0x92d0 00009478 <__addsf3>: 9478: 31 50 e0 ff add #-32, r1 ;#0xffe0 947c: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 9480: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 9484: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 9488: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 948c: 0e 41 mov r1, r14 948e: 3e 50 18 00 add #24, r14 ;#0x0018 9492: 0f 41 mov r1, r15 9494: 2f 52 add #4, r15 ;r2 As==10 9496: b0 12 40 9d call #0x9d40 949a: 0e 41 mov r1, r14 949c: 3e 50 10 00 add #16, r14 ;#0x0010 94a0: 0f 41 mov r1, r15 94a2: b0 12 40 9d call #0x9d40 94a6: 0d 41 mov r1, r13 94a8: 3d 52 add #8, r13 ;r2 As==11 94aa: 0e 41 mov r1, r14 94ac: 3e 50 10 00 add #16, r14 ;#0x0010 94b0: 0f 41 mov r1, r15 94b2: 3f 50 18 00 add #24, r15 ;#0x0018 94b6: b0 12 e6 91 call #0x91e6 94ba: b0 12 62 9b call #0x9b62 94be: 31 50 20 00 add #32, r1 ;#0x0020 94c2: 30 41 ret 000094c4 <__subsf3>: 94c4: 31 50 e0 ff add #-32, r1 ;#0xffe0 94c8: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 94cc: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 94d0: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 94d4: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 94d8: 0e 41 mov r1, r14 94da: 3e 50 18 00 add #24, r14 ;#0x0018 94de: 0f 41 mov r1, r15 94e0: 2f 52 add #4, r15 ;r2 As==10 94e2: b0 12 40 9d call #0x9d40 94e6: 0e 41 mov r1, r14 94e8: 3e 50 10 00 add #16, r14 ;#0x0010 94ec: 0f 41 mov r1, r15 94ee: b0 12 40 9d call #0x9d40 94f2: d1 e3 11 00 xor.b #1, 17(r1) ;r3 As==01, 0x0011(r1) 94f6: 0d 41 mov r1, r13 94f8: 3d 52 add #8, r13 ;r2 As==11 94fa: 0e 41 mov r1, r14 94fc: 3e 50 10 00 add #16, r14 ;#0x0010 9500: 0f 41 mov r1, r15 9502: 3f 50 18 00 add #24, r15 ;#0x0018 9506: b0 12 e6 91 call #0x91e6 950a: b0 12 62 9b call #0x9b62 950e: 31 50 20 00 add #32, r1 ;#0x0020 9512: 30 41 ret 00009514 <__mulsf3>: 9514: 0b 12 push r11 9516: 0a 12 push r10 9518: 09 12 push r9 951a: 08 12 push r8 951c: 07 12 push r7 951e: 06 12 push r6 9520: 05 12 push r5 9522: 04 12 push r4 9524: 31 50 dc ff add #-36, r1 ;#0xffdc 9528: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 952c: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 9530: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 9534: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 9538: 0e 41 mov r1, r14 953a: 3e 50 18 00 add #24, r14 ;#0x0018 953e: 0f 41 mov r1, r15 9540: 2f 52 add #4, r15 ;r2 As==10 9542: b0 12 40 9d call #0x9d40 9546: 0e 41 mov r1, r14 9548: 3e 50 10 00 add #16, r14 ;#0x0010 954c: 0f 41 mov r1, r15 954e: b0 12 40 9d call #0x9d40 9552: 5f 41 18 00 mov.b 24(r1), r15 ;0x0018(r1) 9556: 6f 93 cmp.b #2, r15 ;r3 As==10 9558: b6 28 jnc $+366 ;abs 0x96c6 955a: 5e 41 10 00 mov.b 16(r1), r14 ;0x0010(r1) 955e: 6e 93 cmp.b #2, r14 ;r3 As==10 9560: d9 28 jnc $+436 ;abs 0x9714 9562: 6f 92 cmp.b #4, r15 ;r2 As==10 9564: ae 24 jz $+350 ;abs 0x96c2 9566: 6e 92 cmp.b #4, r14 ;r2 As==10 9568: e2 24 jz $+454 ;abs 0x972e 956a: 6f 93 cmp.b #2, r15 ;r3 As==10 956c: ac 24 jz $+346 ;abs 0x96c6 956e: 6e 93 cmp.b #2, r14 ;r3 As==10 9570: d1 24 jz $+420 ;abs 0x9714 9572: 14 41 1c 00 mov 28(r1), r4 ;0x001c(r1) 9576: 15 41 1e 00 mov 30(r1), r5 ;0x001e(r1) 957a: 18 41 14 00 mov 20(r1), r8 ;0x0014(r1) 957e: 19 41 16 00 mov 22(r1), r9 ;0x0016(r1) 9582: 3c 40 20 00 mov #32, r12 ;#0x0020 9586: 0e 43 clr r14 9588: 0f 43 clr r15 958a: 06 43 clr r6 958c: 07 43 clr r7 958e: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 9592: 81 43 22 00 mov #0, 34(r1) ;r3 As==00, 0x0022(r1) 9596: 0a 43 clr r10 9598: 0b 43 clr r11 959a: 81 4c 20 00 mov r12, 32(r1) ;0x0020(r1) 959e: 08 3c jmp $+18 ;abs 0x95b0 95a0: 08 58 rla r8 95a2: 09 69 rlc r9 95a4: 12 c3 clrc 95a6: 05 10 rrc r5 95a8: 04 10 rrc r4 95aa: b1 53 20 00 add #-1, 32(r1) ;r3 As==11, 0x0020(r1) 95ae: 19 24 jz $+52 ;abs 0x95e2 95b0: 14 b3 bit #1, r4 ;r3 As==01 95b2: 0d 24 jz $+28 ;abs 0x95ce 95b4: 0a 58 add r8, r10 95b6: 0b 69 addc r9, r11 95b8: 0e 56 add r6, r14 95ba: 0f 67 addc r7, r15 95bc: 1c 43 mov #1, r12 ;r3 As==01 95be: 0d 43 clr r13 95c0: 0b 99 cmp r9, r11 95c2: 03 28 jnc $+8 ;abs 0x95ca 95c4: 0b 24 jz $+24 ;abs 0x95dc 95c6: 0c 43 clr r12 95c8: 0d 43 clr r13 95ca: 0e 5c add r12, r14 95cc: 0f 6d addc r13, r15 95ce: 06 56 rla r6 95d0: 07 67 rlc r7 95d2: 09 93 tst r9 95d4: e5 37 jge $-52 ;abs 0x95a0 95d6: 16 d3 bis #1, r6 ;r3 As==01 95d8: 07 d3 bis #0, r7 ;r3 As==00 95da: e2 3f jmp $-58 ;abs 0x95a0 95dc: 0a 98 cmp r8, r10 95de: f5 2b jnc $-20 ;abs 0x95ca 95e0: f2 3f jmp $-26 ;abs 0x95c6 95e2: 81 4a 20 00 mov r10, 32(r1) ;0x0020(r1) 95e6: 81 4b 22 00 mov r11, 34(r1) ;0x0022(r1) 95ea: 0c 4f mov r15, r12 95ec: 1a 41 1a 00 mov 26(r1), r10 ;0x001a(r1) 95f0: 1a 51 12 00 add 18(r1), r10 ;0x0012(r1) 95f4: 06 4a mov r10, r6 95f6: 26 53 incd r6 95f8: 81 46 0a 00 mov r6, 10(r1) ;0x000a(r1) 95fc: 5d 43 mov.b #1, r13 ;r3 As==01 95fe: d1 91 11 00 cmp.b 17(r1), 25(r1) ;0x0011(r1), 0x0019(r1) 9602: 19 00 9604: 83 24 jz $+264 ;abs 0x970c 9606: c1 4d 09 00 mov.b r13, 9(r1) ;0x0009(r1) 960a: 0c 93 tst r12 960c: 3c 38 jl $+122 ;abs 0x9686 960e: 3f 90 00 40 cmp #16384, r15 ;#0x4000 9612: 18 2c jc $+50 ;abs 0x9644 9614: 1d 41 0a 00 mov 10(r1), r13 ;0x000a(r1) 9618: 3d 53 add #-1, r13 ;r3 As==11 961a: 1a 41 20 00 mov 32(r1), r10 ;0x0020(r1) 961e: 1b 41 22 00 mov 34(r1), r11 ;0x0022(r1) 9622: 0c 4d mov r13, r12 9624: 0e 5e rla r14 9626: 0f 6f rlc r15 9628: 0b 93 tst r11 962a: 2a 38 jl $+86 ;abs 0x9680 962c: 0a 5a rla r10 962e: 0b 6b rlc r11 9630: 3d 53 add #-1, r13 ;r3 As==11 9632: 3f 90 00 40 cmp #16384, r15 ;#0x4000 9636: f5 2b jnc $-20 ;abs 0x9622 9638: 81 4a 20 00 mov r10, 32(r1) ;0x0020(r1) 963c: 81 4b 22 00 mov r11, 34(r1) ;0x0022(r1) 9640: 81 4c 0a 00 mov r12, 10(r1) ;0x000a(r1) 9644: 0c 4e mov r14, r12 9646: 0d 4f mov r15, r13 9648: 3c f0 7f 00 and #127, r12 ;#0x007f 964c: 0d f3 and #0, r13 ;r3 As==00 964e: 3c 90 40 00 cmp #64, r12 ;#0x0040 9652: 44 24 jz $+138 ;abs 0x96dc 9654: 81 4e 0c 00 mov r14, 12(r1) ;0x000c(r1) 9658: 81 4f 0e 00 mov r15, 14(r1) ;0x000e(r1) 965c: f1 40 03 00 mov.b #3, 8(r1) ;#0x0003, 0x0008(r1) 9660: 08 00 9662: 0f 41 mov r1, r15 9664: 3f 52 add #8, r15 ;r2 As==11 9666: b0 12 62 9b call #0x9b62 966a: 31 50 24 00 add #36, r1 ;#0x0024 966e: 34 41 pop r4 9670: 35 41 pop r5 9672: 36 41 pop r6 9674: 37 41 pop r7 9676: 38 41 pop r8 9678: 39 41 pop r9 967a: 3a 41 pop r10 967c: 3b 41 pop r11 967e: 30 41 ret 9680: 1e d3 bis #1, r14 ;r3 As==01 9682: 0f d3 bis #0, r15 ;r3 As==00 9684: d3 3f jmp $-88 ;abs 0x962c 9686: 3a 50 03 00 add #3, r10 ;#0x0003 968a: 08 4a mov r10, r8 968c: 1e b3 bit #1, r14 ;r3 As==01 968e: 10 24 jz $+34 ;abs 0x96b0 9690: 1c 41 20 00 mov 32(r1), r12 ;0x0020(r1) 9694: 1d 41 22 00 mov 34(r1), r13 ;0x0022(r1) 9698: 12 c3 clrc 969a: 0d 10 rrc r13 969c: 0c 10 rrc r12 969e: 06 4c mov r12, r6 96a0: 07 4d mov r13, r7 96a2: 06 d3 bis #0, r6 ;r3 As==00 96a4: 37 d0 00 80 bis #-32768,r7 ;#0x8000 96a8: 81 46 20 00 mov r6, 32(r1) ;0x0020(r1) 96ac: 81 47 22 00 mov r7, 34(r1) ;0x0022(r1) 96b0: 12 c3 clrc 96b2: 0f 10 rrc r15 96b4: 0e 10 rrc r14 96b6: 1a 53 inc r10 96b8: 0f 93 tst r15 96ba: e7 3b jl $-48 ;abs 0x968a 96bc: 81 48 0a 00 mov r8, 10(r1) ;0x000a(r1) 96c0: a6 3f jmp $-178 ;abs 0x960e 96c2: 6e 93 cmp.b #2, r14 ;r3 As==10 96c4: 36 24 jz $+110 ;abs 0x9732 96c6: 5f 43 mov.b #1, r15 ;r3 As==01 96c8: d1 91 11 00 cmp.b 17(r1), 25(r1) ;0x0011(r1), 0x0019(r1) 96cc: 19 00 96ce: 20 24 jz $+66 ;abs 0x9710 96d0: c1 4f 19 00 mov.b r15, 25(r1) ;0x0019(r1) 96d4: 0f 41 mov r1, r15 96d6: 3f 50 18 00 add #24, r15 ;#0x0018 96da: c5 3f jmp $-116 ;abs 0x9666 96dc: 0d 93 tst r13 96de: ba 23 jnz $-138 ;abs 0x9654 96e0: 0c 4e mov r14, r12 96e2: 0d 4f mov r15, r13 96e4: 3c f0 80 00 and #128, r12 ;#0x0080 96e8: 0d f3 and #0, r13 ;r3 As==00 96ea: 0c 93 tst r12 96ec: b3 23 jnz $-152 ;abs 0x9654 96ee: 0d 93 tst r13 96f0: b1 23 jnz $-156 ;abs 0x9654 96f2: 81 93 20 00 tst 32(r1) ;0x0020(r1) 96f6: 03 20 jnz $+8 ;abs 0x96fe 96f8: 81 93 22 00 tst 34(r1) ;0x0022(r1) 96fc: ab 27 jz $-168 ;abs 0x9654 96fe: 3e 50 40 00 add #64, r14 ;#0x0040 9702: 0f 63 adc r15 9704: 3e f0 80 ff and #-128, r14 ;#0xff80 9708: 3f f3 and #-1, r15 ;r3 As==11 970a: a4 3f jmp $-182 ;abs 0x9654 970c: 4d 43 clr.b r13 970e: 7b 3f jmp $-264 ;abs 0x9606 9710: 4f 43 clr.b r15 9712: de 3f jmp $-66 ;abs 0x96d0 9714: 5f 43 mov.b #1, r15 ;r3 As==01 9716: d1 91 11 00 cmp.b 17(r1), 25(r1) ;0x0011(r1), 0x0019(r1) 971a: 19 00 971c: 06 24 jz $+14 ;abs 0x972a 971e: c1 4f 11 00 mov.b r15, 17(r1) ;0x0011(r1) 9722: 0f 41 mov r1, r15 9724: 3f 50 10 00 add #16, r15 ;#0x0010 9728: 9e 3f jmp $-194 ;abs 0x9666 972a: 4f 43 clr.b r15 972c: f8 3f jmp $-14 ;abs 0x971e 972e: 6f 93 cmp.b #2, r15 ;r3 As==10 9730: f1 23 jnz $-28 ;abs 0x9714 9732: 3f 40 8e ab mov #-21618,r15 ;#0xab8e 9736: 97 3f jmp $-208 ;abs 0x9666 00009738 <__divsf3>: 9738: 0b 12 push r11 973a: 0a 12 push r10 973c: 09 12 push r9 973e: 08 12 push r8 9740: 07 12 push r7 9742: 31 50 e8 ff add #-24, r1 ;#0xffe8 9746: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 974a: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 974e: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 9752: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 9756: 0e 41 mov r1, r14 9758: 3e 50 10 00 add #16, r14 ;#0x0010 975c: 0f 41 mov r1, r15 975e: 2f 52 add #4, r15 ;r2 As==10 9760: b0 12 40 9d call #0x9d40 9764: 0e 41 mov r1, r14 9766: 3e 52 add #8, r14 ;r2 As==11 9768: 0f 41 mov r1, r15 976a: b0 12 40 9d call #0x9d40 976e: 5f 41 10 00 mov.b 16(r1), r15 ;0x0010(r1) 9772: 6f 93 cmp.b #2, r15 ;r3 As==10 9774: 5d 28 jnc $+188 ;abs 0x9830 9776: 5e 41 08 00 mov.b 8(r1), r14 ;0x0008(r1) 977a: 6e 93 cmp.b #2, r14 ;r3 As==10 977c: 82 28 jnc $+262 ;abs 0x9882 977e: d1 e1 09 00 xor.b 9(r1), 17(r1) ;0x0009(r1), 0x0011(r1) 9782: 11 00 9784: 6f 92 cmp.b #4, r15 ;r2 As==10 9786: 58 24 jz $+178 ;abs 0x9838 9788: 6f 93 cmp.b #2, r15 ;r3 As==10 978a: 56 24 jz $+174 ;abs 0x9838 978c: 6e 92 cmp.b #4, r14 ;r2 As==10 978e: 6f 24 jz $+224 ;abs 0x986e 9790: 6e 93 cmp.b #2, r14 ;r3 As==10 9792: 4c 24 jz $+154 ;abs 0x982c 9794: 1d 41 12 00 mov 18(r1), r13 ;0x0012(r1) 9798: 1d 81 0a 00 sub 10(r1), r13 ;0x000a(r1) 979c: 81 4d 12 00 mov r13, 18(r1) ;0x0012(r1) 97a0: 1e 41 14 00 mov 20(r1), r14 ;0x0014(r1) 97a4: 1f 41 16 00 mov 22(r1), r15 ;0x0016(r1) 97a8: 18 41 0c 00 mov 12(r1), r8 ;0x000c(r1) 97ac: 19 41 0e 00 mov 14(r1), r9 ;0x000e(r1) 97b0: 0f 99 cmp r9, r15 97b2: 1e 2c jc $+62 ;abs 0x97f0 97b4: 0e 5e rla r14 97b6: 0f 6f rlc r15 97b8: 3d 53 add #-1, r13 ;r3 As==11 97ba: 81 4d 12 00 mov r13, 18(r1) ;0x0012(r1) 97be: 37 40 1f 00 mov #31, r7 ;#0x001f 97c2: 0c 43 clr r12 97c4: 3d 40 00 40 mov #16384, r13 ;#0x4000 97c8: 0a 43 clr r10 97ca: 0b 43 clr r11 97cc: 0b 3c jmp $+24 ;abs 0x97e4 97ce: 0a dc bis r12, r10 97d0: 0b dd bis r13, r11 97d2: 0e 88 sub r8, r14 97d4: 0f 79 subc r9, r15 97d6: 12 c3 clrc 97d8: 0d 10 rrc r13 97da: 0c 10 rrc r12 97dc: 0e 5e rla r14 97de: 0f 6f rlc r15 97e0: 37 53 add #-1, r7 ;r3 As==11 97e2: 0b 24 jz $+24 ;abs 0x97fa 97e4: 0f 99 cmp r9, r15 97e6: f7 2b jnc $-16 ;abs 0x97d6 97e8: f2 23 jnz $-26 ;abs 0x97ce 97ea: 0e 98 cmp r8, r14 97ec: f4 2b jnc $-22 ;abs 0x97d6 97ee: ef 3f jmp $-32 ;abs 0x97ce 97f0: 09 9f cmp r15, r9 97f2: e5 2b jnc $-52 ;abs 0x97be 97f4: 0e 98 cmp r8, r14 97f6: e3 2f jc $-56 ;abs 0x97be 97f8: dd 3f jmp $-68 ;abs 0x97b4 97fa: 0c 4a mov r10, r12 97fc: 0d 4b mov r11, r13 97fe: 3c f0 7f 00 and #127, r12 ;#0x007f 9802: 0d f3 and #0, r13 ;r3 As==00 9804: 3c 90 40 00 cmp #64, r12 ;#0x0040 9808: 1c 24 jz $+58 ;abs 0x9842 980a: 81 4a 14 00 mov r10, 20(r1) ;0x0014(r1) 980e: 81 4b 16 00 mov r11, 22(r1) ;0x0016(r1) 9812: 0f 41 mov r1, r15 9814: 3f 50 10 00 add #16, r15 ;#0x0010 9818: b0 12 62 9b call #0x9b62 981c: 31 50 18 00 add #24, r1 ;#0x0018 9820: 37 41 pop r7 9822: 38 41 pop r8 9824: 39 41 pop r9 9826: 3a 41 pop r10 9828: 3b 41 pop r11 982a: 30 41 ret 982c: e1 42 10 00 mov.b #4, 16(r1) ;r2 As==10, 0x0010(r1) 9830: 0f 41 mov r1, r15 9832: 3f 50 10 00 add #16, r15 ;#0x0010 9836: f0 3f jmp $-30 ;abs 0x9818 9838: 4f 9e cmp.b r14, r15 983a: fa 23 jnz $-10 ;abs 0x9830 983c: 3f 40 8e ab mov #-21618,r15 ;#0xab8e 9840: eb 3f jmp $-40 ;abs 0x9818 9842: 0d 93 tst r13 9844: e2 23 jnz $-58 ;abs 0x980a 9846: 0c 4a mov r10, r12 9848: 0d 4b mov r11, r13 984a: 3c f0 80 00 and #128, r12 ;#0x0080 984e: 0d f3 and #0, r13 ;r3 As==00 9850: 0c 93 tst r12 9852: db 23 jnz $-72 ;abs 0x980a 9854: 0d 93 tst r13 9856: d9 23 jnz $-76 ;abs 0x980a 9858: 0e 93 tst r14 985a: 02 20 jnz $+6 ;abs 0x9860 985c: 0f 93 tst r15 985e: d5 27 jz $-84 ;abs 0x980a 9860: 3a 50 40 00 add #64, r10 ;#0x0040 9864: 0b 63 adc r11 9866: 3a f0 80 ff and #-128, r10 ;#0xff80 986a: 3b f3 and #-1, r11 ;r3 As==11 986c: ce 3f jmp $-98 ;abs 0x980a 986e: 81 43 14 00 mov #0, 20(r1) ;r3 As==00, 0x0014(r1) 9872: 81 43 16 00 mov #0, 22(r1) ;r3 As==00, 0x0016(r1) 9876: 81 43 12 00 mov #0, 18(r1) ;r3 As==00, 0x0012(r1) 987a: 0f 41 mov r1, r15 987c: 3f 50 10 00 add #16, r15 ;#0x0010 9880: cb 3f jmp $-104 ;abs 0x9818 9882: 0f 41 mov r1, r15 9884: 3f 52 add #8, r15 ;r2 As==11 9886: c8 3f jmp $-110 ;abs 0x9818 00009888 <__gesf2>: 9888: 31 50 e8 ff add #-24, r1 ;#0xffe8 988c: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 9890: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 9894: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 9898: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 989c: 0e 41 mov r1, r14 989e: 3e 50 10 00 add #16, r14 ;#0x0010 98a2: 0f 41 mov r1, r15 98a4: 2f 52 add #4, r15 ;r2 As==10 98a6: b0 12 40 9d call #0x9d40 98aa: 0e 41 mov r1, r14 98ac: 3e 52 add #8, r14 ;r2 As==11 98ae: 0f 41 mov r1, r15 98b0: b0 12 40 9d call #0x9d40 98b4: e1 93 10 00 cmp.b #2, 16(r1) ;r3 As==10, 0x0010(r1) 98b8: 0d 28 jnc $+28 ;abs 0x98d4 98ba: e1 93 08 00 cmp.b #2, 8(r1) ;r3 As==10, 0x0008(r1) 98be: 0a 28 jnc $+22 ;abs 0x98d4 98c0: 0e 41 mov r1, r14 98c2: 3e 52 add #8, r14 ;r2 As==11 98c4: 0f 41 mov r1, r15 98c6: 3f 50 10 00 add #16, r15 ;#0x0010 98ca: b0 12 64 9e call #0x9e64 98ce: 31 50 18 00 add #24, r1 ;#0x0018 98d2: 30 41 ret 98d4: 3f 43 mov #-1, r15 ;r3 As==11 98d6: fb 3f jmp $-8 ;abs 0x98ce 000098d8 <__floatsisf>: 98d8: 0b 12 push r11 98da: 0a 12 push r10 98dc: 31 82 sub #8, r1 ;r2 As==11 98de: f1 40 03 00 mov.b #3, 0(r1) ;#0x0003, 0x0000(r1) 98e2: 00 00 98e4: 0d 4f mov r15, r13 98e6: 0d 5d rla r13 98e8: 0d 43 clr r13 98ea: 0d 6d rlc r13 98ec: 4c 4d mov.b r13, r12 98ee: c1 4d 01 00 mov.b r13, 1(r1) ;0x0001(r1) 98f2: 0e 93 tst r14 98f4: 0b 20 jnz $+24 ;abs 0x990c 98f6: 0f 93 tst r15 98f8: 09 20 jnz $+20 ;abs 0x990c 98fa: e1 43 00 00 mov.b #2, 0(r1) ;r3 As==10, 0x0000(r1) 98fe: 0f 41 mov r1, r15 9900: b0 12 62 9b call #0x9b62 9904: 31 52 add #8, r1 ;r2 As==11 9906: 3a 41 pop r10 9908: 3b 41 pop r11 990a: 30 41 ret 990c: b1 40 1e 00 mov #30, 2(r1) ;#0x001e, 0x0002(r1) 9910: 02 00 9912: 4c 93 tst.b r12 9914: 1b 20 jnz $+56 ;abs 0x994c 9916: 0a 4e mov r14, r10 9918: 0b 4f mov r15, r11 991a: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 991e: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 9922: 0e 4a mov r10, r14 9924: 0f 4b mov r11, r15 9926: b0 12 f0 9a call #0x9af0 992a: 3f 53 add #-1, r15 ;r3 As==11 992c: 1f 93 cmp #1, r15 ;r3 As==01 992e: e7 3b jl $-48 ;abs 0x98fe 9930: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 9934: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 9938: 4e 4f mov.b r15, r14 993a: 7e f0 1f 00 and.b #31, r14 ;#0x001f 993e: 0f 20 jnz $+32 ;abs 0x995e 9940: 3e 40 1e 00 mov #30, r14 ;#0x001e 9944: 0e 8f sub r15, r14 9946: 81 4e 02 00 mov r14, 2(r1) ;0x0002(r1) 994a: d9 3f jmp $-76 ;abs 0x98fe 994c: 0e 93 tst r14 994e: 10 24 jz $+34 ;abs 0x9970 9950: 0a 4e mov r14, r10 9952: 0b 4f mov r15, r11 9954: 3a e3 inv r10 9956: 3b e3 inv r11 9958: 1a 53 inc r10 995a: 0b 63 adc r11 995c: de 3f jmp $-66 ;abs 0x991a 995e: 91 51 04 00 rla 4(r1) ;0x0004(r1) 9962: 04 00 9964: 91 61 06 00 rlc 6(r1) ;0x0006(r1) 9968: 06 00 996a: 7e 53 add.b #-1, r14 ;r3 As==11 996c: f8 23 jnz $-14 ;abs 0x995e 996e: e8 3f jmp $-46 ;abs 0x9940 9970: 3f 90 00 80 cmp #-32768,r15 ;#0x8000 9974: ed 23 jnz $-36 ;abs 0x9950 9976: 0e 43 clr r14 9978: 3f 40 00 cf mov #-12544,r15 ;#0xcf00 997c: c3 3f jmp $-120 ;abs 0x9904 0000997e <__fixsfsi>: 997e: 31 50 f4 ff add #-12, r1 ;#0xfff4 9982: 81 4e 00 00 mov r14, 0(r1) ;0x0000(r1) 9986: 81 4f 02 00 mov r15, 2(r1) ;0x0002(r1) 998a: 0e 41 mov r1, r14 998c: 2e 52 add #4, r14 ;r2 As==10 998e: 0f 41 mov r1, r15 9990: b0 12 40 9d call #0x9d40 9994: 5f 41 04 00 mov.b 4(r1), r15 ;0x0004(r1) 9998: 6f 93 cmp.b #2, r15 ;r3 As==10 999a: 28 24 jz $+82 ;abs 0x99ec 999c: 27 28 jnc $+80 ;abs 0x99ec 999e: 6f 92 cmp.b #4, r15 ;r2 As==10 99a0: 07 24 jz $+16 ;abs 0x99b0 99a2: 1d 41 06 00 mov 6(r1), r13 ;0x0006(r1) 99a6: 0d 93 tst r13 99a8: 21 38 jl $+68 ;abs 0x99ec 99aa: 3d 90 1f 00 cmp #31, r13 ;#0x001f 99ae: 09 38 jl $+20 ;abs 0x99c2 99b0: c1 93 05 00 tst.b 5(r1) ;0x0005(r1) 99b4: 26 20 jnz $+78 ;abs 0x9a02 99b6: 3e 43 mov #-1, r14 ;r3 As==11 99b8: 3f 40 ff 7f mov #32767, r15 ;#0x7fff 99bc: 31 50 0c 00 add #12, r1 ;#0x000c 99c0: 30 41 ret 99c2: 1e 41 08 00 mov 8(r1), r14 ;0x0008(r1) 99c6: 1f 41 0a 00 mov 10(r1), r15 ;0x000a(r1) 99ca: 3c 40 1e 00 mov #30, r12 ;#0x001e 99ce: 4c 8d sub.b r13, r12 99d0: 4d 4c mov.b r12, r13 99d2: 7d f0 1f 00 and.b #31, r13 ;#0x001f 99d6: 0f 20 jnz $+32 ;abs 0x99f6 99d8: c1 93 05 00 tst.b 5(r1) ;0x0005(r1) 99dc: ef 27 jz $-32 ;abs 0x99bc 99de: 3e e3 inv r14 99e0: 3f e3 inv r15 99e2: 1e 53 inc r14 99e4: 0f 63 adc r15 99e6: 31 50 0c 00 add #12, r1 ;#0x000c 99ea: 30 41 ret 99ec: 0e 43 clr r14 99ee: 0f 43 clr r15 99f0: 31 50 0c 00 add #12, r1 ;#0x000c 99f4: 30 41 ret 99f6: 12 c3 clrc 99f8: 0f 10 rrc r15 99fa: 0e 10 rrc r14 99fc: 7d 53 add.b #-1, r13 ;r3 As==11 99fe: fb 23 jnz $-8 ;abs 0x99f6 9a00: eb 3f jmp $-40 ;abs 0x99d8 9a02: 0e 43 clr r14 9a04: 3f 40 00 80 mov #-32768,r15 ;#0x8000 9a08: 31 50 0c 00 add #12, r1 ;#0x000c 9a0c: 30 41 ret 00009a0e <__floatunsisf>: 9a0e: 0b 12 push r11 9a10: 0a 12 push r10 9a12: 09 12 push r9 9a14: 08 12 push r8 9a16: 31 82 sub #8, r1 ;r2 As==11 9a18: 0a 4e mov r14, r10 9a1a: 0b 4f mov r15, r11 9a1c: c1 43 01 00 mov.b #0, 1(r1) ;r3 As==00, 0x0001(r1) 9a20: 0e 93 tst r14 9a22: 0d 20 jnz $+28 ;abs 0x9a3e 9a24: 0b 93 tst r11 9a26: 0b 20 jnz $+24 ;abs 0x9a3e 9a28: e1 43 00 00 mov.b #2, 0(r1) ;r3 As==10, 0x0000(r1) 9a2c: 0f 41 mov r1, r15 9a2e: b0 12 62 9b call #0x9b62 9a32: 31 52 add #8, r1 ;r2 As==11 9a34: 38 41 pop r8 9a36: 39 41 pop r9 9a38: 3a 41 pop r10 9a3a: 3b 41 pop r11 9a3c: 30 41 ret 9a3e: f1 40 03 00 mov.b #3, 0(r1) ;#0x0003, 0x0000(r1) 9a42: 00 00 9a44: b1 40 1e 00 mov #30, 2(r1) ;#0x001e, 0x0002(r1) 9a48: 02 00 9a4a: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 9a4e: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 9a52: 0e 4a mov r10, r14 9a54: 0f 4b mov r11, r15 9a56: b0 12 f0 9a call #0x9af0 9a5a: 3f 53 add #-1, r15 ;r3 As==11 9a5c: 0f 93 tst r15 9a5e: 18 38 jl $+50 ;abs 0x9a90 9a60: e5 27 jz $-52 ;abs 0x9a2c 9a62: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 9a66: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 9a6a: 4e 4f mov.b r15, r14 9a6c: 7e f0 1f 00 and.b #31, r14 ;#0x001f 9a70: 06 20 jnz $+14 ;abs 0x9a7e 9a72: 3e 40 1e 00 mov #30, r14 ;#0x001e 9a76: 0e 8f sub r15, r14 9a78: 81 4e 02 00 mov r14, 2(r1) ;0x0002(r1) 9a7c: d7 3f jmp $-80 ;abs 0x9a2c 9a7e: 91 51 04 00 rla 4(r1) ;0x0004(r1) 9a82: 04 00 9a84: 91 61 06 00 rlc 6(r1) ;0x0006(r1) 9a88: 06 00 9a8a: 7e 53 add.b #-1, r14 ;r3 As==11 9a8c: f8 23 jnz $-14 ;abs 0x9a7e 9a8e: f1 3f jmp $-28 ;abs 0x9a72 9a90: 0e 4f mov r15, r14 9a92: 3e e3 inv r14 9a94: 1e 53 inc r14 9a96: 1c 43 mov #1, r12 ;r3 As==01 9a98: 0d 43 clr r13 9a9a: 48 4e mov.b r14, r8 9a9c: 78 f0 1f 00 and.b #31, r8 ;#0x001f 9aa0: 04 24 jz $+10 ;abs 0x9aaa 9aa2: 0c 5c rla r12 9aa4: 0d 6d rlc r13 9aa6: 78 53 add.b #-1, r8 ;r3 As==11 9aa8: fc 23 jnz $-6 ;abs 0x9aa2 9aaa: 3c 53 add #-1, r12 ;r3 As==11 9aac: 3d 63 addc #-1, r13 ;r3 As==11 9aae: 0c fa and r10, r12 9ab0: 0d fb and r11, r13 9ab2: 18 43 mov #1, r8 ;r3 As==01 9ab4: 09 43 clr r9 9ab6: 0c 93 tst r12 9ab8: 04 20 jnz $+10 ;abs 0x9ac2 9aba: 0d 93 tst r13 9abc: 02 20 jnz $+6 ;abs 0x9ac2 9abe: 08 43 clr r8 9ac0: 09 43 clr r9 9ac2: 7e f0 1f 00 and.b #31, r14 ;#0x001f 9ac6: 0e 20 jnz $+30 ;abs 0x9ae4 9ac8: 0d 48 mov r8, r13 9aca: 0e 49 mov r9, r14 9acc: 0d da bis r10, r13 9ace: 0e db bis r11, r14 9ad0: 81 4d 04 00 mov r13, 4(r1) ;0x0004(r1) 9ad4: 81 4e 06 00 mov r14, 6(r1) ;0x0006(r1) 9ad8: 3e 40 1e 00 mov #30, r14 ;#0x001e 9adc: 0e 8f sub r15, r14 9ade: 81 4e 02 00 mov r14, 2(r1) ;0x0002(r1) 9ae2: a4 3f jmp $-182 ;abs 0x9a2c 9ae4: 12 c3 clrc 9ae6: 0b 10 rrc r11 9ae8: 0a 10 rrc r10 9aea: 7e 53 add.b #-1, r14 ;r3 As==11 9aec: fb 23 jnz $-8 ;abs 0x9ae4 9aee: ec 3f jmp $-38 ;abs 0x9ac8 00009af0 <__clzsi2>: 9af0: 0b 12 push r11 9af2: 0a 12 push r10 9af4: 09 12 push r9 9af6: 1f 93 cmp #1, r15 ;r3 As==01 9af8: 17 2c jc $+48 ;abs 0x9b28 9afa: 3e 90 00 01 cmp #256, r14 ;#0x0100 9afe: 2c 28 jnc $+90 ;abs 0x9b58 9b00: 3a 40 18 00 mov #24, r10 ;#0x0018 9b04: 0b 43 clr r11 9b06: 39 42 mov #8, r9 ;r2 As==11 9b08: 0c 4e mov r14, r12 9b0a: 0d 4f mov r15, r13 9b0c: 4f 49 mov.b r9, r15 9b0e: 4f 93 tst.b r15 9b10: 17 20 jnz $+48 ;abs 0x9b40 9b12: 3c 50 96 ab add #-21610,r12 ;#0xab96 9b16: 6e 4c mov.b @r12, r14 9b18: 0f 43 clr r15 9b1a: 0a 8e sub r14, r10 9b1c: 0b 7f subc r15, r11 9b1e: 0f 4a mov r10, r15 9b20: 39 41 pop r9 9b22: 3a 41 pop r10 9b24: 3b 41 pop r11 9b26: 30 41 ret 9b28: 3f 90 00 01 cmp #256, r15 ;#0x0100 9b2c: 0f 28 jnc $+32 ;abs 0x9b4c 9b2e: 3a 42 mov #8, r10 ;r2 As==11 9b30: 0b 43 clr r11 9b32: 39 40 18 00 mov #24, r9 ;#0x0018 9b36: 0c 4e mov r14, r12 9b38: 0d 4f mov r15, r13 9b3a: 4f 49 mov.b r9, r15 9b3c: 4f 93 tst.b r15 9b3e: e9 27 jz $-44 ;abs 0x9b12 9b40: 12 c3 clrc 9b42: 0d 10 rrc r13 9b44: 0c 10 rrc r12 9b46: 7f 53 add.b #-1, r15 ;r3 As==11 9b48: fb 23 jnz $-8 ;abs 0x9b40 9b4a: e3 3f jmp $-56 ;abs 0x9b12 9b4c: 3a 40 10 00 mov #16, r10 ;#0x0010 9b50: 0b 43 clr r11 9b52: 39 40 10 00 mov #16, r9 ;#0x0010 9b56: ef 3f jmp $-32 ;abs 0x9b36 9b58: 3a 40 20 00 mov #32, r10 ;#0x0020 9b5c: 0b 43 clr r11 9b5e: 09 43 clr r9 9b60: ea 3f jmp $-42 ;abs 0x9b36 00009b62 <__pack_f>: 9b62: 0b 12 push r11 9b64: 0a 12 push r10 9b66: 09 12 push r9 9b68: 08 12 push r8 9b6a: 07 12 push r7 9b6c: 0d 4f mov r15, r13 9b6e: 1e 4f 04 00 mov 4(r15), r14 ;0x0004(r15) 9b72: 1f 4f 06 00 mov 6(r15), r15 ;0x0006(r15) 9b76: 5a 4d 01 00 mov.b 1(r13), r10 ;0x0001(r13) 9b7a: 6c 4d mov.b @r13, r12 9b7c: 6c 93 cmp.b #2, r12 ;r3 As==10 9b7e: 70 28 jnc $+226 ;abs 0x9c60 9b80: 6c 92 cmp.b #4, r12 ;r2 As==10 9b82: 6a 24 jz $+214 ;abs 0x9c58 9b84: 6c 93 cmp.b #2, r12 ;r3 As==10 9b86: 36 24 jz $+110 ;abs 0x9bf4 9b88: 0e 93 tst r14 9b8a: 32 24 jz $+102 ;abs 0x9bf0 9b8c: 1b 4d 02 00 mov 2(r13), r11 ;0x0002(r13) 9b90: 3b 90 82 ff cmp #-126, r11 ;#0xff82 9b94: 6d 38 jl $+220 ;abs 0x9c70 9b96: 3b 90 80 00 cmp #128, r11 ;#0x0080 9b9a: 5e 34 jge $+190 ;abs 0x9c58 9b9c: 0c 4e mov r14, r12 9b9e: 0d 4f mov r15, r13 9ba0: 3c f0 7f 00 and #127, r12 ;#0x007f 9ba4: 0d f3 and #0, r13 ;r3 As==00 9ba6: 3c 90 40 00 cmp #64, r12 ;#0x0040 9baa: 40 24 jz $+130 ;abs 0x9c2c 9bac: 3e 50 3f 00 add #63, r14 ;#0x003f 9bb0: 0f 63 adc r15 9bb2: 0f 93 tst r15 9bb4: 4a 38 jl $+150 ;abs 0x9c4a 9bb6: 0d 4b mov r11, r13 9bb8: 3d 50 7f 00 add #127, r13 ;#0x007f 9bbc: 12 c3 clrc 9bbe: 0f 10 rrc r15 9bc0: 0e 10 rrc r14 9bc2: 12 c3 clrc 9bc4: 0f 10 rrc r15 9bc6: 0e 10 rrc r14 9bc8: 12 c3 clrc 9bca: 0f 10 rrc r15 9bcc: 0e 10 rrc r14 9bce: 12 c3 clrc 9bd0: 0f 10 rrc r15 9bd2: 0e 10 rrc r14 9bd4: 12 c3 clrc 9bd6: 0f 10 rrc r15 9bd8: 0e 10 rrc r14 9bda: 12 c3 clrc 9bdc: 0f 10 rrc r15 9bde: 0e 10 rrc r14 9be0: 12 c3 clrc 9be2: 0f 10 rrc r15 9be4: 0e 10 rrc r14 9be6: 3e f3 and #-1, r14 ;r3 As==11 9be8: 3f f0 7f 00 and #127, r15 ;#0x007f 9bec: 4d 4d mov.b r13, r13 9bee: 05 3c jmp $+12 ;abs 0x9bfa 9bf0: 0f 93 tst r15 9bf2: cc 23 jnz $-102 ;abs 0x9b8c 9bf4: 4d 43 clr.b r13 9bf6: 0e 43 clr r14 9bf8: 0f 43 clr r15 9bfa: 4d 4d mov.b r13, r13 9bfc: 0d 5d rla r13 9bfe: 0d 5d rla r13 9c00: 0d 5d rla r13 9c02: 0d 5d rla r13 9c04: 0d 5d rla r13 9c06: 0d 5d rla r13 9c08: 0d 5d rla r13 9c0a: 0c 4f mov r15, r12 9c0c: 3c f0 7f 00 and #127, r12 ;#0x007f 9c10: 0c dd bis r13, r12 9c12: 4f 4a mov.b r10, r15 9c14: 0f 11 rra r15 9c16: 0f 43 clr r15 9c18: 0f 10 rrc r15 9c1a: 0d 4c mov r12, r13 9c1c: 0d df bis r15, r13 9c1e: 0f 4d mov r13, r15 9c20: 37 41 pop r7 9c22: 38 41 pop r8 9c24: 39 41 pop r9 9c26: 3a 41 pop r10 9c28: 3b 41 pop r11 9c2a: 30 41 ret 9c2c: 0d 93 tst r13 9c2e: be 23 jnz $-130 ;abs 0x9bac 9c30: 0c 4e mov r14, r12 9c32: 0d 4f mov r15, r13 9c34: 3c f0 80 00 and #128, r12 ;#0x0080 9c38: 0d f3 and #0, r13 ;r3 As==00 9c3a: 0c 93 tst r12 9c3c: 02 20 jnz $+6 ;abs 0x9c42 9c3e: 0d 93 tst r13 9c40: b8 27 jz $-142 ;abs 0x9bb2 9c42: 3e 50 40 00 add #64, r14 ;#0x0040 9c46: 0f 63 adc r15 9c48: b4 3f jmp $-150 ;abs 0x9bb2 9c4a: 12 c3 clrc 9c4c: 0f 10 rrc r15 9c4e: 0e 10 rrc r14 9c50: 0d 4b mov r11, r13 9c52: 3d 50 80 00 add #128, r13 ;#0x0080 9c56: b2 3f jmp $-154 ;abs 0x9bbc 9c58: 7d 43 mov.b #-1, r13 ;r3 As==11 9c5a: 0e 43 clr r14 9c5c: 0f 43 clr r15 9c5e: cd 3f jmp $-100 ;abs 0x9bfa 9c60: 0e d3 bis #0, r14 ;r3 As==00 9c62: 3f d0 10 00 bis #16, r15 ;#0x0010 9c66: 3e f3 and #-1, r14 ;r3 As==11 9c68: 3f f0 7f 00 and #127, r15 ;#0x007f 9c6c: 7d 43 mov.b #-1, r13 ;r3 As==11 9c6e: c5 3f jmp $-116 ;abs 0x9bfa 9c70: 37 40 82 ff mov #-126, r7 ;#0xff82 9c74: 07 8b sub r11, r7 9c76: 37 90 1a 00 cmp #26, r7 ;#0x001a 9c7a: 4f 34 jge $+160 ;abs 0x9d1a 9c7c: 0c 4e mov r14, r12 9c7e: 0d 4f mov r15, r13 9c80: 4b 47 mov.b r7, r11 9c82: 7b f0 1f 00 and.b #31, r11 ;#0x001f 9c86: 05 24 jz $+12 ;abs 0x9c92 9c88: 12 c3 clrc 9c8a: 0d 10 rrc r13 9c8c: 0c 10 rrc r12 9c8e: 7b 53 add.b #-1, r11 ;r3 As==11 9c90: fb 23 jnz $-8 ;abs 0x9c88 9c92: 18 43 mov #1, r8 ;r3 As==01 9c94: 09 43 clr r9 9c96: 77 f0 1f 00 and.b #31, r7 ;#0x001f 9c9a: 04 24 jz $+10 ;abs 0x9ca4 9c9c: 08 58 rla r8 9c9e: 09 69 rlc r9 9ca0: 77 53 add.b #-1, r7 ;r3 As==11 9ca2: fc 23 jnz $-6 ;abs 0x9c9c 9ca4: 38 53 add #-1, r8 ;r3 As==11 9ca6: 39 63 addc #-1, r9 ;r3 As==11 9ca8: 08 fe and r14, r8 9caa: 09 ff and r15, r9 9cac: 1e 43 mov #1, r14 ;r3 As==01 9cae: 0f 43 clr r15 9cb0: 08 93 tst r8 9cb2: 04 20 jnz $+10 ;abs 0x9cbc 9cb4: 09 93 tst r9 9cb6: 02 20 jnz $+6 ;abs 0x9cbc 9cb8: 0e 43 clr r14 9cba: 0f 43 clr r15 9cbc: 08 4e mov r14, r8 9cbe: 09 4f mov r15, r9 9cc0: 08 dc bis r12, r8 9cc2: 09 dd bis r13, r9 9cc4: 0e 48 mov r8, r14 9cc6: 0f 49 mov r9, r15 9cc8: 3e f0 7f 00 and #127, r14 ;#0x007f 9ccc: 0f f3 and #0, r15 ;r3 As==00 9cce: 3e 90 40 00 cmp #64, r14 ;#0x0040 9cd2: 26 24 jz $+78 ;abs 0x9d20 9cd4: 38 50 3f 00 add #63, r8 ;#0x003f 9cd8: 09 63 adc r9 9cda: 0e 48 mov r8, r14 9cdc: 0f 49 mov r9, r15 9cde: 12 c3 clrc 9ce0: 0f 10 rrc r15 9ce2: 0e 10 rrc r14 9ce4: 12 c3 clrc 9ce6: 0f 10 rrc r15 9ce8: 0e 10 rrc r14 9cea: 12 c3 clrc 9cec: 0f 10 rrc r15 9cee: 0e 10 rrc r14 9cf0: 12 c3 clrc 9cf2: 0f 10 rrc r15 9cf4: 0e 10 rrc r14 9cf6: 12 c3 clrc 9cf8: 0f 10 rrc r15 9cfa: 0e 10 rrc r14 9cfc: 12 c3 clrc 9cfe: 0f 10 rrc r15 9d00: 0e 10 rrc r14 9d02: 12 c3 clrc 9d04: 0f 10 rrc r15 9d06: 0e 10 rrc r14 9d08: 3e f3 and #-1, r14 ;r3 As==11 9d0a: 3f f0 7f 00 and #127, r15 ;#0x007f 9d0e: 5d 43 mov.b #1, r13 ;r3 As==01 9d10: 39 90 00 40 cmp #16384, r9 ;#0x4000 9d14: 72 2f jc $-282 ;abs 0x9bfa 9d16: 4d 43 clr.b r13 9d18: 70 3f jmp $-286 ;abs 0x9bfa 9d1a: 08 43 clr r8 9d1c: 09 43 clr r9 9d1e: da 3f jmp $-74 ;abs 0x9cd4 9d20: 0f 93 tst r15 9d22: d8 23 jnz $-78 ;abs 0x9cd4 9d24: 0e 48 mov r8, r14 9d26: 0f 49 mov r9, r15 9d28: 3e f0 80 00 and #128, r14 ;#0x0080 9d2c: 0f f3 and #0, r15 ;r3 As==00 9d2e: 0e 93 tst r14 9d30: 04 24 jz $+10 ;abs 0x9d3a 9d32: 38 50 40 00 add #64, r8 ;#0x0040 9d36: 09 63 adc r9 9d38: d0 3f jmp $-94 ;abs 0x9cda 9d3a: 0f 93 tst r15 9d3c: ce 27 jz $-98 ;abs 0x9cda 9d3e: f9 3f jmp $-12 ;abs 0x9d32 00009d40 <__unpack_f>: 9d40: 0b 12 push r11 9d42: 0a 12 push r10 9d44: 2a 4f mov @r15, r10 9d46: 5b 4f 02 00 mov.b 2(r15), r11 ;0x0002(r15) 9d4a: 3b f0 7f 00 and #127, r11 ;#0x007f 9d4e: 1d 4f 02 00 mov 2(r15), r13 ;0x0002(r15) 9d52: 12 c3 clrc 9d54: 0d 10 rrc r13 9d56: 12 c3 clrc 9d58: 0d 10 rrc r13 9d5a: 12 c3 clrc 9d5c: 0d 10 rrc r13 9d5e: 12 c3 clrc 9d60: 0d 10 rrc r13 9d62: 12 c3 clrc 9d64: 0d 10 rrc r13 9d66: 12 c3 clrc 9d68: 0d 10 rrc r13 9d6a: 12 c3 clrc 9d6c: 0d 10 rrc r13 9d6e: 4d 4d mov.b r13, r13 9d70: 5f 4f 03 00 mov.b 3(r15), r15 ;0x0003(r15) 9d74: 3f b0 80 00 bit #128, r15 ;#0x0080 9d78: 0f 43 clr r15 9d7a: 0f 6f rlc r15 9d7c: ce 4f 01 00 mov.b r15, 1(r14) ;0x0001(r14) 9d80: 0d 93 tst r13 9d82: 2d 20 jnz $+92 ;abs 0x9dde 9d84: 0a 93 tst r10 9d86: 51 24 jz $+164 ;abs 0x9e2a 9d88: be 40 82 ff mov #-126, 2(r14) ;#0xff82, 0x0002(r14) 9d8c: 02 00 9d8e: 0c 4a mov r10, r12 9d90: 0d 4b mov r11, r13 9d92: 0c 5c rla r12 9d94: 0d 6d rlc r13 9d96: 0c 5c rla r12 9d98: 0d 6d rlc r13 9d9a: 0c 5c rla r12 9d9c: 0d 6d rlc r13 9d9e: 0c 5c rla r12 9da0: 0d 6d rlc r13 9da2: 0c 5c rla r12 9da4: 0d 6d rlc r13 9da6: 0c 5c rla r12 9da8: 0d 6d rlc r13 9daa: 0c 5c rla r12 9dac: 0d 6d rlc r13 9dae: fe 40 03 00 mov.b #3, 0(r14) ;#0x0003, 0x0000(r14) 9db2: 00 00 9db4: 3d 90 00 40 cmp #16384, r13 ;#0x4000 9db8: 0b 2c jc $+24 ;abs 0x9dd0 9dba: 3f 40 81 ff mov #-127, r15 ;#0xff81 9dbe: 0c 5c rla r12 9dc0: 0d 6d rlc r13 9dc2: 0a 4f mov r15, r10 9dc4: 3f 53 add #-1, r15 ;r3 As==11 9dc6: 3d 90 00 40 cmp #16384, r13 ;#0x4000 9dca: f9 2b jnc $-12 ;abs 0x9dbe 9dcc: 8e 4a 02 00 mov r10, 2(r14) ;0x0002(r14) 9dd0: 8e 4c 04 00 mov r12, 4(r14) ;0x0004(r14) 9dd4: 8e 4d 06 00 mov r13, 6(r14) ;0x0006(r14) 9dd8: 3a 41 pop r10 9dda: 3b 41 pop r11 9ddc: 30 41 ret 9dde: 3d 90 ff 00 cmp #255, r13 ;#0x00ff 9de2: 2a 24 jz $+86 ;abs 0x9e38 9de4: 3d 50 81 ff add #-127, r13 ;#0xff81 9de8: 8e 4d 02 00 mov r13, 2(r14) ;0x0002(r14) 9dec: fe 40 03 00 mov.b #3, 0(r14) ;#0x0003, 0x0000(r14) 9df0: 00 00 9df2: 0c 4a mov r10, r12 9df4: 0d 4b mov r11, r13 9df6: 0c 5c rla r12 9df8: 0d 6d rlc r13 9dfa: 0c 5c rla r12 9dfc: 0d 6d rlc r13 9dfe: 0c 5c rla r12 9e00: 0d 6d rlc r13 9e02: 0c 5c rla r12 9e04: 0d 6d rlc r13 9e06: 0c 5c rla r12 9e08: 0d 6d rlc r13 9e0a: 0c 5c rla r12 9e0c: 0d 6d rlc r13 9e0e: 0c 5c rla r12 9e10: 0d 6d rlc r13 9e12: 0a 4c mov r12, r10 9e14: 0b 4d mov r13, r11 9e16: 0a d3 bis #0, r10 ;r3 As==00 9e18: 3b d0 00 40 bis #16384, r11 ;#0x4000 9e1c: 8e 4a 04 00 mov r10, 4(r14) ;0x0004(r14) 9e20: 8e 4b 06 00 mov r11, 6(r14) ;0x0006(r14) 9e24: 3a 41 pop r10 9e26: 3b 41 pop r11 9e28: 30 41 ret 9e2a: 0b 93 tst r11 9e2c: ad 23 jnz $-164 ;abs 0x9d88 9e2e: ee 43 00 00 mov.b #2, 0(r14) ;r3 As==10, 0x0000(r14) 9e32: 3a 41 pop r10 9e34: 3b 41 pop r11 9e36: 30 41 ret 9e38: 0a 93 tst r10 9e3a: 0c 24 jz $+26 ;abs 0x9e54 9e3c: 0c 4a mov r10, r12 9e3e: 0d 4b mov r11, r13 9e40: 0c f3 and #0, r12 ;r3 As==00 9e42: 3d f0 10 00 and #16, r13 ;#0x0010 9e46: 0c 93 tst r12 9e48: 02 20 jnz $+6 ;abs 0x9e4e 9e4a: 0d 93 tst r13 9e4c: 08 24 jz $+18 ;abs 0x9e5e 9e4e: de 43 00 00 mov.b #1, 0(r14) ;r3 As==01, 0x0000(r14) 9e52: e4 3f jmp $-54 ;abs 0x9e1c 9e54: 0b 93 tst r11 9e56: f2 23 jnz $-26 ;abs 0x9e3c 9e58: ee 42 00 00 mov.b #4, 0(r14) ;r2 As==10, 0x0000(r14) 9e5c: e3 3f jmp $-56 ;abs 0x9e24 9e5e: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) 9e62: dc 3f jmp $-70 ;abs 0x9e1c 00009e64 <__fpcmp_parts_f>: 9e64: 0b 12 push r11 9e66: 6d 4f mov.b @r15, r13 9e68: 6d 93 cmp.b #2, r13 ;r3 As==10 9e6a: 12 28 jnc $+38 ;abs 0x9e90 9e6c: 6c 4e mov.b @r14, r12 9e6e: 6c 93 cmp.b #2, r12 ;r3 As==10 9e70: 0f 28 jnc $+32 ;abs 0x9e90 9e72: 6d 92 cmp.b #4, r13 ;r2 As==10 9e74: 41 24 jz $+132 ;abs 0x9ef8 9e76: 6c 92 cmp.b #4, r12 ;r2 As==10 9e78: 11 24 jz $+36 ;abs 0x9e9c 9e7a: 6d 93 cmp.b #2, r13 ;r3 As==10 9e7c: 0d 24 jz $+28 ;abs 0x9e98 9e7e: 6c 93 cmp.b #2, r12 ;r3 As==10 9e80: 14 24 jz $+42 ;abs 0x9eaa 9e82: 5d 4f 01 00 mov.b 1(r15), r13 ;0x0001(r15) 9e86: 5d 9e 01 00 cmp.b 1(r14), r13 ;0x0001(r14) 9e8a: 14 24 jz $+42 ;abs 0x9eb4 9e8c: 4d 93 tst.b r13 9e8e: 09 20 jnz $+20 ;abs 0x9ea2 9e90: 1e 43 mov #1, r14 ;r3 As==01 9e92: 0f 4e mov r14, r15 9e94: 3b 41 pop r11 9e96: 30 41 ret 9e98: 6c 93 cmp.b #2, r12 ;r3 As==10 9e9a: 28 24 jz $+82 ;abs 0x9eec 9e9c: ce 93 01 00 tst.b 1(r14) ;0x0001(r14) 9ea0: f7 23 jnz $-16 ;abs 0x9e90 9ea2: 3e 43 mov #-1, r14 ;r3 As==11 9ea4: 0f 4e mov r14, r15 9ea6: 3b 41 pop r11 9ea8: 30 41 ret 9eaa: cf 93 01 00 tst.b 1(r15) ;0x0001(r15) 9eae: f0 27 jz $-30 ;abs 0x9e90 9eb0: 3e 43 mov #-1, r14 ;r3 As==11 9eb2: f8 3f jmp $-14 ;abs 0x9ea4 9eb4: 1b 4f 02 00 mov 2(r15), r11 ;0x0002(r15) 9eb8: 1c 4e 02 00 mov 2(r14), r12 ;0x0002(r14) 9ebc: 0c 9b cmp r11, r12 9ebe: e6 3b jl $-50 ;abs 0x9e8c 9ec0: 0b 9c cmp r12, r11 9ec2: 16 38 jl $+46 ;abs 0x9ef0 9ec4: 1b 4f 04 00 mov 4(r15), r11 ;0x0004(r15) 9ec8: 1f 4f 06 00 mov 6(r15), r15 ;0x0006(r15) 9ecc: 1c 4e 04 00 mov 4(r14), r12 ;0x0004(r14) 9ed0: 1e 4e 06 00 mov 6(r14), r14 ;0x0006(r14) 9ed4: 0e 9f cmp r15, r14 9ed6: da 2b jnc $-74 ;abs 0x9e8c 9ed8: 0f 9e cmp r14, r15 9eda: 02 28 jnc $+6 ;abs 0x9ee0 9edc: 0c 9b cmp r11, r12 9ede: d6 2b jnc $-82 ;abs 0x9e8c 9ee0: 0f 9e cmp r14, r15 9ee2: 06 28 jnc $+14 ;abs 0x9ef0 9ee4: 0e 9f cmp r15, r14 9ee6: 02 28 jnc $+6 ;abs 0x9eec 9ee8: 0b 9c cmp r12, r11 9eea: 02 28 jnc $+6 ;abs 0x9ef0 9eec: 0e 43 clr r14 9eee: d1 3f jmp $-92 ;abs 0x9e92 9ef0: 4d 93 tst.b r13 9ef2: ce 23 jnz $-98 ;abs 0x9e90 9ef4: 3e 43 mov #-1, r14 ;r3 As==11 9ef6: d6 3f jmp $-82 ;abs 0x9ea4 9ef8: 6c 92 cmp.b #4, r12 ;r2 As==10 9efa: d7 23 jnz $-80 ;abs 0x9eaa 9efc: 5e 4e 01 00 mov.b 1(r14), r14 ;0x0001(r14) 9f00: 5f 4f 01 00 mov.b 1(r15), r15 ;0x0001(r15) 9f04: 0e 8f sub r15, r14 9f06: c5 3f jmp $-116 ;abs 0x9e92 00009f08 : 9f08: 6d 4f mov.b @r15, r13 9f0a: 4d 9e cmp.b r14, r13 9f0c: 05 24 jz $+12 ;abs 0x9f18 9f0e: 4d 93 tst.b r13 9f10: 02 24 jz $+6 ;abs 0x9f16 9f12: 1f 53 inc r15 9f14: f9 3f jmp $-12 ;abs 0x9f08 9f16: 0f 43 clr r15 9f18: 30 41 ret 00009f1a : 9f1a: 0b 12 push r11 9f1c: 0d 93 tst r13 9f1e: 0a 24 jz $+22 ;abs 0x9f34 9f20: 7b 4f mov.b @r15+, r11 9f22: 7c 4e mov.b @r14+, r12 9f24: 4b 9c cmp.b r12, r11 9f26: 04 24 jz $+10 ;abs 0x9f30 9f28: 4f 4b mov.b r11, r15 9f2a: 4e 4c mov.b r12, r14 9f2c: 0f 8e sub r14, r15 9f2e: 03 3c jmp $+8 ;abs 0x9f36 9f30: 3d 53 add #-1, r13 ;r3 As==11 9f32: f4 3f jmp $-22 ;abs 0x9f1c 9f34: 0f 43 clr r15 9f36: 3b 41 pop r11 9f38: 30 41 ret 00009f3a : 9f3a: 0b 12 push r11 9f3c: 0a 12 push r10 9f3e: 09 12 push r9 9f40: 08 12 push r8 9f42: 3d 90 06 00 cmp #6, r13 ;#0x0006 9f46: 09 2c jc $+20 ;abs 0x9f5a 9f48: 0c 4f mov r15, r12 9f4a: 04 3c jmp $+10 ;abs 0x9f54 9f4c: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 9f50: 1c 53 inc r12 9f52: 3d 53 add #-1, r13 ;r3 As==11 9f54: 0d 93 tst r13 9f56: fa 23 jnz $-10 ;abs 0x9f4c 9f58: 20 3c jmp $+66 ;abs 0x9f9a 9f5a: 4e 4e mov.b r14, r14 9f5c: 4b 4e mov.b r14, r11 9f5e: 0b 93 tst r11 9f60: 03 24 jz $+8 ;abs 0x9f68 9f62: 0c 4b mov r11, r12 9f64: 8c 10 swpb r12 9f66: 0b dc bis r12, r11 9f68: 1f b3 bit #1, r15 ;r3 As==01 9f6a: 06 24 jz $+14 ;abs 0x9f78 9f6c: 3d 53 add #-1, r13 ;r3 As==11 9f6e: cf 4e 00 00 mov.b r14, 0(r15) ;0x0000(r15) 9f72: 09 4f mov r15, r9 9f74: 19 53 inc r9 9f76: 01 3c jmp $+4 ;abs 0x9f7a 9f78: 09 4f mov r15, r9 9f7a: 0c 4d mov r13, r12 9f7c: 12 c3 clrc 9f7e: 0c 10 rrc r12 9f80: 0a 49 mov r9, r10 9f82: 08 4c mov r12, r8 9f84: 8a 4b 00 00 mov r11, 0(r10) ;0x0000(r10) 9f88: 2a 53 incd r10 9f8a: 38 53 add #-1, r8 ;r3 As==11 9f8c: fb 23 jnz $-8 ;abs 0x9f84 9f8e: 0c 5c rla r12 9f90: 0c 59 add r9, r12 9f92: 1d f3 and #1, r13 ;r3 As==01 9f94: 02 24 jz $+6 ;abs 0x9f9a 9f96: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 9f9a: 38 41 pop r8 9f9c: 39 41 pop r9 9f9e: 3a 41 pop r10 9fa0: 3b 41 pop r11 9fa2: 30 41 ret 00009fa4 : 9fa4: 0b 12 push r11 9fa6: 0a 12 push r10 9fa8: 09 12 push r9 9faa: 08 12 push r8 9fac: 07 12 push r7 9fae: 0b 4f mov r15, r11 9fb0: 69 4e mov.b @r14, r9 9fb2: 49 93 tst.b r9 9fb4: 1b 24 jz $+56 ;abs 0x9fec 9fb6: 0a 4e mov r14, r10 9fb8: 1a 53 inc r10 9fba: 0d 4e mov r14, r13 9fbc: 1d 53 inc r13 9fbe: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 9fc2: fc 23 jnz $-6 ;abs 0x9fbc 9fc4: 07 4d mov r13, r7 9fc6: 07 8a sub r10, r7 9fc8: 01 3c jmp $+4 ;abs 0x9fcc 9fca: 0b 48 mov r8, r11 9fcc: 6f 4b mov.b @r11, r15 9fce: 4f 93 tst.b r15 9fd0: 0c 24 jz $+26 ;abs 0x9fea 9fd2: 08 4b mov r11, r8 9fd4: 18 53 inc r8 9fd6: 4f 99 cmp.b r9, r15 9fd8: f8 23 jnz $-14 ;abs 0x9fca 9fda: 0d 47 mov r7, r13 9fdc: 0e 4a mov r10, r14 9fde: 0f 48 mov r8, r15 9fe0: b0 12 76 a9 call #0xa976 9fe4: 0f 93 tst r15 9fe6: f1 23 jnz $-28 ;abs 0x9fca 9fe8: 01 3c jmp $+4 ;abs 0x9fec 9fea: 0b 43 clr r11 9fec: 0f 4b mov r11, r15 9fee: 37 41 pop r7 9ff0: 38 41 pop r8 9ff2: 39 41 pop r9 9ff4: 3a 41 pop r10 9ff6: 3b 41 pop r11 9ff8: 30 41 ret 00009ffa : 9ffa: 0b 12 push r11 9ffc: 0e 4f mov r15, r14 9ffe: 01 3c jmp $+4 ;abs 0xa002 a000: 1e 53 inc r14 a002: 6f 4e mov.b @r14, r15 a004: 7f 90 20 00 cmp.b #32, r15 ;#0x0020 a008: fb 27 jz $-8 ;abs 0xa000 a00a: 7f 90 09 00 cmp.b #9, r15 ;#0x0009 a00e: f8 27 jz $-14 ;abs 0xa000 a010: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a a014: f5 27 jz $-20 ;abs 0xa000 a016: 7f 90 0c 00 cmp.b #12, r15 ;#0x000c a01a: f2 27 jz $-26 ;abs 0xa000 a01c: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d a020: ef 27 jz $-32 ;abs 0xa000 a022: 7f 90 0b 00 cmp.b #11, r15 ;#0x000b a026: ec 27 jz $-38 ;abs 0xa000 a028: 7f 90 2d 00 cmp.b #45, r15 ;#0x002d a02c: 03 20 jnz $+8 ;abs 0xa034 a02e: 1e 53 inc r14 a030: 1b 43 mov #1, r11 ;r3 As==01 a032: 05 3c jmp $+12 ;abs 0xa03e a034: 7f 90 2b 00 cmp.b #43, r15 ;#0x002b a038: 01 20 jnz $+4 ;abs 0xa03c a03a: 1e 53 inc r14 a03c: 0b 43 clr r11 a03e: 6f 4e mov.b @r14, r15 a040: 8f 11 sxt r15 a042: 3f 50 d0 ff add #-48, r15 ;#0xffd0 a046: 3f 90 0a 00 cmp #10, r15 ;#0x000a a04a: 19 2c jc $+52 ;abs 0xa07e a04c: 0d 43 clr r13 a04e: 7c 4e mov.b @r14+, r12 a050: 8c 11 sxt r12 a052: 0f 4c mov r12, r15 a054: 3f 50 d0 ff add #-48, r15 ;#0xffd0 a058: 0f 5d add r13, r15 a05a: 6d 4e mov.b @r14, r13 a05c: 8d 11 sxt r13 a05e: 3d 50 d0 ff add #-48, r13 ;#0xffd0 a062: 3d 90 0a 00 cmp #10, r13 ;#0x000a a066: 06 2c jc $+14 ;abs 0xa074 a068: 0f 5f rla r15 a06a: 0d 4f mov r15, r13 a06c: 0d 5d rla r13 a06e: 0d 5d rla r13 a070: 0d 5f add r15, r13 a072: ed 3f jmp $-36 ;abs 0xa04e a074: 0b 93 tst r11 a076: 04 24 jz $+10 ;abs 0xa080 a078: 3f e3 inv r15 a07a: 1f 53 inc r15 a07c: 01 3c jmp $+4 ;abs 0xa080 a07e: 0f 43 clr r15 a080: 3b 41 pop r11 a082: 30 41 ret 0000a084 : a084: 1e 42 04 02 mov &0x0204,r14 a088: 1e 93 cmp #1, r14 ;r3 As==01 a08a: 0b 38 jl $+24 ;abs 0xa0a2 a08c: 1d 42 02 02 mov &0x0202,r13 a090: cd 4f 00 00 mov.b r15, 0(r13) ;0x0000(r13) a094: 1d 53 inc r13 a096: 82 4d 02 02 mov r13, &0x0202 a09a: 3e 53 add #-1, r14 ;r3 As==11 a09c: 82 4e 04 02 mov r14, &0x0204 a0a0: 30 41 ret a0a2: 3f 43 mov #-1, r15 ;r3 As==11 a0a4: 30 41 ret 0000a0a6 : a0a6: 0b 12 push r11 a0a8: 0a 12 push r10 a0aa: 21 83 decd r1 a0ac: 81 4e 00 00 mov r14, 0(r1) ;0x0000(r1) a0b0: 1a 42 02 02 mov &0x0202,r10 a0b4: 1b 42 04 02 mov &0x0204,r11 a0b8: 0d 4e mov r14, r13 a0ba: 0e 4f mov r15, r14 a0bc: 3f 40 84 a0 mov #-24444,r15 ;#0xa084 a0c0: b0 12 d8 a2 call #0xa2d8 a0c4: 0f 9b cmp r11, r15 a0c6: 05 38 jl $+12 ;abs 0xa0d2 a0c8: 0e 4a mov r10, r14 a0ca: 0e 5b add r11, r14 a0cc: ce 43 ff ff mov.b #0, -1(r14) ;r3 As==00, 0xffff(r14) a0d0: 04 3c jmp $+10 ;abs 0xa0da a0d2: 1e 42 02 02 mov &0x0202,r14 a0d6: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) a0da: 21 53 incd r1 a0dc: 3a 41 pop r10 a0de: 3b 41 pop r11 a0e0: 30 41 ret 0000a0e2 : a0e2: 92 41 02 00 mov 2(r1), &0x0202 ;0x0002(r1) a0e6: 02 02 a0e8: b2 40 ff 7f mov #32767, &0x0204 ;#0x7fff a0ec: 04 02 a0ee: 0e 41 mov r1, r14 a0f0: 3e 50 06 00 add #6, r14 ;#0x0006 a0f4: 1f 41 04 00 mov 4(r1), r15 ;0x0004(r1) a0f8: b0 12 a6 a0 call #0xa0a6 a0fc: 30 41 ret 0000a0fe : a0fe: 92 41 02 00 mov 2(r1), &0x0202 ;0x0002(r1) a102: 02 02 a104: 92 41 04 00 mov 4(r1), &0x0204 ;0x0004(r1) a108: 04 02 a10a: 0e 41 mov r1, r14 a10c: 3e 52 add #8, r14 ;r2 As==11 a10e: 1f 41 06 00 mov 6(r1), r15 ;0x0006(r1) a112: b0 12 a6 a0 call #0xa0a6 a116: 30 41 ret 0000a118 : a118: 0c 4e mov r14, r12 a11a: 82 4f 02 02 mov r15, &0x0202 a11e: b2 40 ff 7f mov #32767, &0x0204 ;#0x7fff a122: 04 02 a124: 0e 4d mov r13, r14 a126: 0f 4c mov r12, r15 a128: b0 12 a6 a0 call #0xa0a6 a12c: 30 41 ret 0000a12e : a12e: 82 4f 02 02 mov r15, &0x0202 a132: 82 4e 04 02 mov r14, &0x0204 a136: 0e 4c mov r12, r14 a138: 0f 4d mov r13, r15 a13a: b0 12 a6 a0 call #0xa0a6 a13e: 30 41 ret 0000a140 : a140: 0b 12 push r11 a142: 0a 12 push r10 a144: 09 12 push r9 a146: 08 12 push r8 a148: 07 12 push r7 a14a: 06 12 push r6 a14c: 05 12 push r5 a14e: 04 12 push r4 a150: 31 82 sub #8, r1 ;r2 As==11 a152: 08 4f mov r15, r8 a154: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) a158: 09 4d mov r13, r9 a15a: 1f 41 1a 00 mov 26(r1), r15 ;0x001a(r1) a15e: 1d 41 1c 00 mov 28(r1), r13 ;0x001c(r1) a162: 4c 4d mov.b r13, r12 a164: 04 4d mov r13, r4 a166: 84 10 swpb r4 a168: 45 44 mov.b r4, r5 a16a: 4e 4f mov.b r15, r14 a16c: 7e b0 40 00 bit.b #64, r14 ;#0x0040 a170: 11 24 jz $+36 ;abs 0xa194 a172: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) a176: 00 00 a178: 0e 4f mov r15, r14 a17a: 8e 10 swpb r14 a17c: 5e f3 and.b #1, r14 ;r3 As==01 a17e: 03 24 jz $+8 ;abs 0xa186 a180: 7e 40 58 00 mov.b #88, r14 ;#0x0058 a184: 02 3c jmp $+6 ;abs 0xa18a a186: 7e 40 78 00 mov.b #120, r14 ;#0x0078 a18a: c1 4e 01 00 mov.b r14, 1(r1) ;0x0001(r1) a18e: 0c 41 mov r1, r12 a190: 2c 53 incd r12 a192: 0f 3c jmp $+32 ;abs 0xa1b2 a194: 7e f0 20 00 and.b #32, r14 ;#0x0020 a198: 04 24 jz $+10 ;abs 0xa1a2 a19a: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) a19e: 00 00 a1a0: 04 3c jmp $+10 ;abs 0xa1aa a1a2: 4c 93 tst.b r12 a1a4: 05 24 jz $+12 ;abs 0xa1b0 a1a6: c1 4d 00 00 mov.b r13, 0(r1) ;0x0000(r1) a1aa: 0c 41 mov r1, r12 a1ac: 1c 53 inc r12 a1ae: 01 3c jmp $+4 ;abs 0xa1b2 a1b0: 0c 41 mov r1, r12 a1b2: 0a 4c mov r12, r10 a1b4: 8c 10 swpb r12 a1b6: 8c 11 sxt r12 a1b8: 8c 10 swpb r12 a1ba: 8c 11 sxt r12 a1bc: 0b 4c mov r12, r11 a1be: 06 41 mov r1, r6 a1c0: 0c 41 mov r1, r12 a1c2: 8c 10 swpb r12 a1c4: 8c 11 sxt r12 a1c6: 8c 10 swpb r12 a1c8: 8c 11 sxt r12 a1ca: 07 4c mov r12, r7 a1cc: 0a 86 sub r6, r10 a1ce: 0b 77 subc r7, r11 a1d0: 0e 4f mov r15, r14 a1d2: 8e 10 swpb r14 a1d4: c1 4e 02 00 mov.b r14, 2(r1) ;0x0002(r1) a1d8: 6e f2 and.b #4, r14 ;r2 As==10 a1da: 02 24 jz $+6 ;abs 0xa1e0 a1dc: 07 45 mov r5, r7 a1de: 01 3c jmp $+4 ;abs 0xa1e2 a1e0: 37 43 mov #-1, r7 ;r3 As==11 a1e2: 4f 4f mov.b r15, r15 a1e4: 7f b0 10 00 bit.b #16, r15 ;#0x0010 a1e8: 3c 20 jnz $+122 ;abs 0xa262 a1ea: 1d 41 04 00 mov 4(r1), r13 ;0x0004(r1) a1ee: 3d 53 add #-1, r13 ;r3 As==11 a1f0: 1d 53 inc r13 a1f2: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) a1f6: fc 23 jnz $-6 ;abs 0xa1f0 a1f8: 1d 81 04 00 sub 4(r1), r13 ;0x0004(r1) a1fc: 09 9a cmp r10, r9 a1fe: 02 28 jnc $+6 ;abs 0xa204 a200: 09 8a sub r10, r9 a202: 01 3c jmp $+4 ;abs 0xa206 a204: 09 43 clr r9 a206: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) a20a: 05 24 jz $+12 ;abs 0xa216 a20c: 09 95 cmp r5, r9 a20e: 02 28 jnc $+6 ;abs 0xa214 a210: 09 85 sub r5, r9 a212: 01 3c jmp $+4 ;abs 0xa216 a214: 09 43 clr r9 a216: 05 4d mov r13, r5 a218: 07 9d cmp r13, r7 a21a: 01 2c jc $+4 ;abs 0xa21e a21c: 05 47 mov r7, r5 a21e: 4f 93 tst.b r15 a220: 0d 38 jl $+28 ;abs 0xa23c a222: f1 40 20 00 mov.b #32, 6(r1) ;#0x0020, 0x0006(r1) a226: 06 00 a228: 06 43 clr r6 a22a: 0b 43 clr r11 a22c: 0e 3c jmp $+30 ;abs 0xa24a a22e: 0f 41 mov r1, r15 a230: 0f 56 add r6, r15 a232: 6f 4f mov.b @r15, r15 a234: 8f 11 sxt r15 a236: 16 53 inc r6 a238: 88 12 call r8 a23a: 01 3c jmp $+4 ;abs 0xa23e a23c: 06 43 clr r6 a23e: 06 9a cmp r10, r6 a240: f6 3b jl $-18 ;abs 0xa22e a242: 0b 4a mov r10, r11 a244: f1 40 30 00 mov.b #48, 6(r1) ;#0x0030, 0x0006(r1) a248: 06 00 a24a: 05 8b sub r11, r5 a24c: 05 3c jmp $+12 ;abs 0xa258 a24e: 5f 41 06 00 mov.b 6(r1), r15 ;0x0006(r1) a252: 8f 11 sxt r15 a254: 88 12 call r8 a256: 1b 53 inc r11 a258: 0f 45 mov r5, r15 a25a: 0f 5b add r11, r15 a25c: 0f 99 cmp r9, r15 a25e: f7 2b jnc $-16 ;abs 0xa24e a260: 0a 3c jmp $+22 ;abs 0xa276 a262: 06 43 clr r6 a264: 0b 43 clr r11 a266: 07 3c jmp $+16 ;abs 0xa276 a268: 1b 53 inc r11 a26a: 0f 41 mov r1, r15 a26c: 0f 56 add r6, r15 a26e: 6f 4f mov.b @r15, r15 a270: 8f 11 sxt r15 a272: 16 53 inc r6 a274: 88 12 call r8 a276: 06 9a cmp r10, r6 a278: f7 3b jl $-16 ;abs 0xa268 a27a: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) a27e: 02 24 jz $+6 ;abs 0xa284 a280: 4a 44 mov.b r4, r10 a282: 08 3c jmp $+18 ;abs 0xa294 a284: 1a 41 04 00 mov 4(r1), r10 ;0x0004(r1) a288: 0a 8b sub r11, r10 a28a: 0d 3c jmp $+28 ;abs 0xa2a6 a28c: 3f 40 30 00 mov #48, r15 ;#0x0030 a290: 88 12 call r8 a292: 7a 53 add.b #-1, r10 ;r3 As==11 a294: 4a 93 tst.b r10 a296: fa 23 jnz $-10 ;abs 0xa28c a298: 44 44 mov.b r4, r4 a29a: 0b 54 add r4, r11 a29c: f3 3f jmp $-24 ;abs 0xa284 a29e: 37 53 add #-1, r7 ;r3 As==11 a2a0: 8f 11 sxt r15 a2a2: 88 12 call r8 a2a4: 1b 53 inc r11 a2a6: 0f 4a mov r10, r15 a2a8: 0f 5b add r11, r15 a2aa: 6f 4f mov.b @r15, r15 a2ac: 4f 93 tst.b r15 a2ae: 07 24 jz $+16 ;abs 0xa2be a2b0: 07 93 tst r7 a2b2: f5 23 jnz $-20 ;abs 0xa29e a2b4: 04 3c jmp $+10 ;abs 0xa2be a2b6: 3f 40 20 00 mov #32, r15 ;#0x0020 a2ba: 88 12 call r8 a2bc: 1b 53 inc r11 a2be: 0b 99 cmp r9, r11 a2c0: fa 2b jnc $-10 ;abs 0xa2b6 a2c2: 0f 4b mov r11, r15 a2c4: 31 52 add #8, r1 ;r2 As==11 a2c6: 34 41 pop r4 a2c8: 35 41 pop r5 a2ca: 36 41 pop r6 a2cc: 37 41 pop r7 a2ce: 38 41 pop r8 a2d0: 39 41 pop r9 a2d2: 3a 41 pop r10 a2d4: 3b 41 pop r11 a2d6: 30 41 ret 0000a2d8 : a2d8: 0b 12 push r11 a2da: 0a 12 push r10 a2dc: 09 12 push r9 a2de: 08 12 push r8 a2e0: 07 12 push r7 a2e2: 06 12 push r6 a2e4: 05 12 push r5 a2e6: 04 12 push r4 a2e8: 31 50 b6 ff add #-74, r1 ;#0xffb6 a2ec: 81 4f 3a 00 mov r15, 58(r1) ;0x003a(r1) a2f0: 06 4e mov r14, r6 a2f2: 05 4d mov r13, r5 a2f4: 81 4e 3e 00 mov r14, 62(r1) ;0x003e(r1) a2f8: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) a2fc: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a300: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) a304: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) a308: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) a30c: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) a310: 07 43 clr r7 a312: 81 43 2c 00 mov #0, 44(r1) ;r3 As==00, 0x002c(r1) a316: 0e 41 mov r1, r14 a318: 3e 50 1c 00 add #28, r14 ;#0x001c a31c: 81 4e 1c 00 mov r14, 28(r1) ;0x001c(r1) a320: 30 40 52 a9 br #0xa952 a324: 0f 46 mov r6, r15 a326: 1f 53 inc r15 a328: 81 4f 40 00 mov r15, 64(r1) ;0x0040(r1) a32c: 07 93 tst r7 a32e: 1e 20 jnz $+62 ;abs 0xa36c a330: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 a334: 13 20 jnz $+40 ;abs 0xa35c a336: 81 43 00 00 mov #0, 0(r1) ;r3 As==00, 0x0000(r1) a33a: 81 43 02 00 mov #0, 2(r1) ;r3 As==00, 0x0002(r1) a33e: 81 46 3e 00 mov r6, 62(r1) ;0x003e(r1) a342: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) a346: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a34a: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) a34e: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) a352: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) a356: 30 40 48 a9 br #0xa948 a35a: 05 47 mov r7, r5 a35c: 8e 11 sxt r14 a35e: 0f 4e mov r14, r15 a360: 91 12 3c 00 call 60(r1) ;0x003c(r1) a364: 91 53 2c 00 inc 44(r1) ;0x002c(r1) a368: 30 40 2e a9 br #0xa92e a36c: 7e 90 63 00 cmp.b #99, r14 ;#0x0063 a370: c5 24 jz $+396 ;abs 0xa4fc a372: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 a376: 27 34 jge $+80 ;abs 0xa3c6 a378: 7e 90 30 00 cmp.b #48, r14 ;#0x0030 a37c: 94 24 jz $+298 ;abs 0xa4a6 a37e: 7e 90 31 00 cmp.b #49, r14 ;#0x0031 a382: 1a 34 jge $+54 ;abs 0xa3b8 a384: 7e 90 2a 00 cmp.b #42, r14 ;#0x002a a388: 77 24 jz $+240 ;abs 0xa478 a38a: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b a38e: 0a 34 jge $+22 ;abs 0xa3a4 a390: 7e 90 23 00 cmp.b #35, r14 ;#0x0023 a394: 42 24 jz $+134 ;abs 0xa41a a396: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 a39a: e0 27 jz $-62 ;abs 0xa35c a39c: 7e 90 20 00 cmp.b #32, r14 ;#0x0020 a3a0: 32 20 jnz $+102 ;abs 0xa406 a3a2: 56 3c jmp $+174 ;abs 0xa450 a3a4: 7e 90 2d 00 cmp.b #45, r14 ;#0x002d a3a8: 49 24 jz $+148 ;abs 0xa43c a3aa: 7e 90 2e 00 cmp.b #46, r14 ;#0x002e a3ae: 5b 24 jz $+184 ;abs 0xa466 a3b0: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b a3b4: 28 20 jnz $+82 ;abs 0xa406 a3b6: 47 3c jmp $+144 ;abs 0xa446 a3b8: 7e 90 3a 00 cmp.b #58, r14 ;#0x003a a3bc: 8c 38 jl $+282 ;abs 0xa4d6 a3be: 7e 90 58 00 cmp.b #88, r14 ;#0x0058 a3c2: 21 20 jnz $+68 ;abs 0xa406 a3c4: e9 3c jmp $+468 ;abs 0xa598 a3c6: 7e 90 6f 00 cmp.b #111, r14 ;#0x006f a3ca: 24 24 jz $+74 ;abs 0xa414 a3cc: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 a3d0: 0a 34 jge $+22 ;abs 0xa3e6 a3d2: 7e 90 69 00 cmp.b #105, r14 ;#0x0069 a3d6: e3 24 jz $+456 ;abs 0xa59e a3d8: 7e 90 6c 00 cmp.b #108, r14 ;#0x006c a3dc: 22 24 jz $+70 ;abs 0xa422 a3de: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 a3e2: 11 20 jnz $+36 ;abs 0xa406 a3e4: dc 3c jmp $+442 ;abs 0xa59e a3e6: 7e 90 73 00 cmp.b #115, r14 ;#0x0073 a3ea: 98 24 jz $+306 ;abs 0xa51c a3ec: 7e 90 74 00 cmp.b #116, r14 ;#0x0074 a3f0: 04 34 jge $+10 ;abs 0xa3fa a3f2: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 a3f6: 07 20 jnz $+16 ;abs 0xa406 a3f8: b8 3c jmp $+370 ;abs 0xa56a a3fa: 7e 90 75 00 cmp.b #117, r14 ;#0x0075 a3fe: d1 24 jz $+420 ;abs 0xa5a2 a400: 7e 90 78 00 cmp.b #120, r14 ;#0x0078 a404: d2 24 jz $+422 ;abs 0xa5aa a406: 19 41 3e 00 mov 62(r1), r9 ;0x003e(r1) a40a: 18 41 2c 00 mov 44(r1), r8 ;0x002c(r1) a40e: 08 89 sub r9, r8 a410: 30 40 1c a9 br #0xa91c a414: b1 42 28 00 mov #8, 40(r1) ;r2 As==11, 0x0028(r1) a418: cb 3c jmp $+408 ;abs 0xa5b0 a41a: f1 d2 00 00 bis.b #8, 0(r1) ;r2 As==11, 0x0000(r1) a41e: 30 40 4c a9 br #0xa94c a422: 69 41 mov.b @r1, r9 a424: 59 f3 and.b #1, r9 ;r3 As==01 a426: 6e 41 mov.b @r1, r14 a428: 04 24 jz $+10 ;abs 0xa432 a42a: 7e f0 fe ff and.b #-2, r14 ;#0xfffe a42e: 6e d3 bis.b #2, r14 ;r3 As==10 a430: 01 3c jmp $+4 ;abs 0xa434 a432: 5e d3 bis.b #1, r14 ;r3 As==01 a434: c1 4e 00 00 mov.b r14, 0(r1) ;0x0000(r1) a438: 30 40 4c a9 br #0xa94c a43c: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) a440: 00 00 a442: 30 40 4c a9 br #0xa94c a446: f1 40 2b 00 mov.b #43, 2(r1) ;#0x002b, 0x0002(r1) a44a: 02 00 a44c: 30 40 4c a9 br #0xa94c a450: f1 90 2b 00 cmp.b #43, 2(r1) ;#0x002b, 0x0002(r1) a454: 02 00 a456: 02 20 jnz $+6 ;abs 0xa45c a458: 30 40 4c a9 br #0xa94c a45c: f1 40 20 00 mov.b #32, 2(r1) ;#0x0020, 0x0002(r1) a460: 02 00 a462: 30 40 4c a9 br #0xa94c a466: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a46a: 02 24 jz $+6 ;abs 0xa470 a46c: 30 40 32 a9 br #0xa932 a470: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) a474: 30 40 4c a9 br #0xa94c a478: 0e 45 mov r5, r14 a47a: 2e 53 incd r14 a47c: 2a 45 mov @r5, r10 a47e: 0a 93 tst r10 a480: 03 38 jl $+8 ;abs 0xa488 a482: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) a486: 0d 3c jmp $+28 ;abs 0xa4a2 a488: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a48c: 02 24 jz $+6 ;abs 0xa492 a48e: 30 40 42 a9 br #0xa942 a492: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) a496: 00 00 a498: 3a e3 inv r10 a49a: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) a49e: 91 53 26 00 inc 38(r1) ;0x0026(r1) a4a2: 05 4e mov r14, r5 a4a4: 27 3c jmp $+80 ;abs 0xa4f4 a4a6: 81 93 26 00 tst 38(r1) ;0x0026(r1) a4aa: 15 20 jnz $+44 ;abs 0xa4d6 a4ac: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a4b0: 12 20 jnz $+38 ;abs 0xa4d6 a4b2: 69 41 mov.b @r1, r9 a4b4: 79 f0 10 00 and.b #16, r9 ;#0x0010 a4b8: 5e 43 mov.b #1, r14 ;r3 As==01 a4ba: 01 24 jz $+4 ;abs 0xa4be a4bc: 4e 43 clr.b r14 a4be: 4e 4e mov.b r14, r14 a4c0: 0e 11 rra r14 a4c2: 0e 43 clr r14 a4c4: 4e 10 rrc.b r14 a4c6: 6a 41 mov.b @r1, r10 a4c8: 7a f0 7f 00 and.b #127, r10 ;#0x007f a4cc: 4a de bis.b r14, r10 a4ce: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) a4d2: 30 40 4c a9 br #0xa94c a4d6: 1a 41 26 00 mov 38(r1), r10 ;0x0026(r1) a4da: 0a 5a rla r10 a4dc: 0c 4a mov r10, r12 a4de: 0c 5c rla r12 a4e0: 0c 5c rla r12 a4e2: 0a 5c add r12, r10 a4e4: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) a4e8: b1 50 d0 ff add #-48, 38(r1) ;#0xffd0, 0x0026(r1) a4ec: 26 00 a4ee: 8e 11 sxt r14 a4f0: 81 5e 26 00 add r14, 38(r1) ;0x0026(r1) a4f4: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) a4f8: 30 40 4c a9 br #0xa94c a4fc: 07 45 mov r5, r7 a4fe: 27 53 incd r7 a500: 6e 45 mov.b @r5, r14 a502: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a506: 03 20 jnz $+8 ;abs 0xa50e a508: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a50c: 26 27 jz $-434 ;abs 0xa35a a50e: c1 4e 04 00 mov.b r14, 4(r1) ;0x0004(r1) a512: c1 43 05 00 mov.b #0, 5(r1) ;r3 As==00, 0x0005(r1) a516: 0e 41 mov r1, r14 a518: 2e 52 add #4, r14 ;r2 As==10 a51a: 03 3c jmp $+8 ;abs 0xa522 a51c: 07 45 mov r5, r7 a51e: 27 53 incd r7 a520: 2e 45 mov @r5, r14 a522: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a526: 07 24 jz $+16 ;abs 0xa536 a528: e1 d2 01 00 bis.b #4, 1(r1) ;r2 As==10, 0x0001(r1) a52c: 1f 41 26 00 mov 38(r1), r15 ;0x0026(r1) a530: c1 4f 03 00 mov.b r15, 3(r1) ;0x0003(r1) a534: 06 3c jmp $+14 ;abs 0xa542 a536: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a53a: 03 24 jz $+8 ;abs 0xa542 a53c: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) a540: 30 00 a542: 0e 93 tst r14 a544: 02 20 jnz $+6 ;abs 0xa54a a546: 3e 40 96 ac mov #-21354,r14 ;#0xac96 a54a: 11 12 04 00 push 4(r1) ;0x0004(r1) a54e: 11 12 04 00 push 4(r1) ;0x0004(r1) a552: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) a556: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) a55a: b0 12 40 a1 call #0xa140 a55e: 21 52 add #4, r1 ;r2 As==10 a560: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) a564: 05 47 mov r7, r5 a566: 30 40 2e a9 br #0xa92e a56a: 07 45 mov r5, r7 a56c: 27 53 incd r7 a56e: 29 45 mov @r5, r9 a570: 81 49 1e 00 mov r9, 30(r1) ;0x001e(r1) a574: 5e 43 mov.b #1, r14 ;r3 As==01 a576: 09 93 tst r9 a578: 01 20 jnz $+4 ;abs 0xa57c a57a: 4e 43 clr.b r14 a57c: 4e 5e rla.b r14 a57e: 4e 5e rla.b r14 a580: 4e 5e rla.b r14 a582: 6a 41 mov.b @r1, r10 a584: 7a f0 f7 ff and.b #-9, r10 ;#0xfff7 a588: 4a de bis.b r14, r10 a58a: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) a58e: 05 47 mov r7, r5 a590: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) a594: 28 00 a596: 53 3c jmp $+168 ;abs 0xa63e a598: d1 d3 01 00 bis.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a59c: 06 3c jmp $+14 ;abs 0xa5aa a59e: e1 d2 00 00 bis.b #4, 0(r1) ;r2 As==10, 0x0000(r1) a5a2: b1 40 0a 00 mov #10, 40(r1) ;#0x000a, 0x0028(r1) a5a6: 28 00 a5a8: 03 3c jmp $+8 ;abs 0xa5b0 a5aa: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) a5ae: 28 00 a5b0: 6b 41 mov.b @r1, r11 a5b2: 6b b3 bit.b #2, r11 ;r3 As==10 a5b4: 24 24 jz $+74 ;abs 0xa5fe a5b6: 0c 45 mov r5, r12 a5b8: 3c 52 add #8, r12 ;r2 As==11 a5ba: 28 45 mov @r5, r8 a5bc: 17 45 02 00 mov 2(r5), r7 ;0x0002(r5) a5c0: 16 45 04 00 mov 4(r5), r6 ;0x0004(r5) a5c4: 1b 45 06 00 mov 6(r5), r11 ;0x0006(r5) a5c8: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) a5cc: 81 47 20 00 mov r7, 32(r1) ;0x0020(r1) a5d0: 81 46 22 00 mov r6, 34(r1) ;0x0022(r1) a5d4: 81 4b 24 00 mov r11, 36(r1) ;0x0024(r1) a5d8: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) a5dc: 08 93 tst r8 a5de: 06 20 jnz $+14 ;abs 0xa5ec a5e0: 07 93 tst r7 a5e2: 04 20 jnz $+10 ;abs 0xa5ec a5e4: 06 93 tst r6 a5e6: 02 20 jnz $+6 ;abs 0xa5ec a5e8: 0b 93 tst r11 a5ea: 02 24 jz $+6 ;abs 0xa5f0 a5ec: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a5f0: 0b 5b rla r11 a5f2: 0b 43 clr r11 a5f4: 0b 6b rlc r11 a5f6: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) a5fa: 05 4c mov r12, r5 a5fc: 20 3c jmp $+66 ;abs 0xa63e a5fe: 5b f3 and.b #1, r11 ;r3 As==01 a600: 07 45 mov r5, r7 a602: 0d 24 jz $+28 ;abs 0xa61e a604: 27 52 add #4, r7 ;r2 As==10 a606: 28 45 mov @r5, r8 a608: 1b 45 02 00 mov 2(r5), r11 ;0x0002(r5) a60c: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) a610: 81 4b 20 00 mov r11, 32(r1) ;0x0020(r1) a614: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) a618: 08 93 tst r8 a61a: 09 20 jnz $+20 ;abs 0xa62e a61c: 06 3c jmp $+14 ;abs 0xa62a a61e: 27 53 incd r7 a620: 2b 45 mov @r5, r11 a622: 81 4b 1e 00 mov r11, 30(r1) ;0x001e(r1) a626: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) a62a: 0b 93 tst r11 a62c: 02 24 jz $+6 ;abs 0xa632 a62e: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a632: 0b 5b rla r11 a634: 0b 43 clr r11 a636: 0b 6b rlc r11 a638: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) a63c: 05 47 mov r7, r5 a63e: f1 b2 00 00 bit.b #8, 0(r1) ;r2 As==11, 0x0000(r1) a642: 12 24 jz $+38 ;abs 0xa668 a644: c1 93 2b 00 tst.b 43(r1) ;0x002b(r1) a648: 0f 20 jnz $+32 ;abs 0xa668 a64a: 68 41 mov.b @r1, r8 a64c: b1 90 10 00 cmp #16, 40(r1) ;#0x0010, 0x0028(r1) a650: 28 00 a652: 03 20 jnz $+8 ;abs 0xa65a a654: 78 d0 40 00 bis.b #64, r8 ;#0x0040 a658: 05 3c jmp $+12 ;abs 0xa664 a65a: b1 92 28 00 cmp #8, 40(r1) ;r2 As==11, 0x0028(r1) a65e: 04 20 jnz $+10 ;abs 0xa668 a660: 78 d0 20 00 bis.b #32, r8 ;#0x0020 a664: c1 48 00 00 mov.b r8, 0(r1) ;0x0000(r1) a668: 68 41 mov.b @r1, r8 a66a: 68 b2 bit.b #4, r8 ;r2 As==10 a66c: 30 24 jz $+98 ;abs 0xa6ce a66e: c1 93 2f 00 tst.b 47(r1) ;0x002f(r1) a672: 2d 24 jz $+92 ;abs 0xa6ce a674: f1 40 2d 00 mov.b #45, 2(r1) ;#0x002d, 0x0002(r1) a678: 02 00 a67a: 68 b3 bit.b #2, r8 ;r3 As==10 a67c: 11 24 jz $+36 ;abs 0xa6a0 a67e: b1 e3 1e 00 xor #-1, 30(r1) ;r3 As==11, 0x001e(r1) a682: b1 e3 20 00 xor #-1, 32(r1) ;r3 As==11, 0x0020(r1) a686: b1 e3 22 00 xor #-1, 34(r1) ;r3 As==11, 0x0022(r1) a68a: b1 e3 24 00 xor #-1, 36(r1) ;r3 As==11, 0x0024(r1) a68e: 91 53 1e 00 inc 30(r1) ;0x001e(r1) a692: 81 63 20 00 adc 32(r1) ;0x0020(r1) a696: 81 63 22 00 adc 34(r1) ;0x0022(r1) a69a: 81 63 24 00 adc 36(r1) ;0x0024(r1) a69e: 17 3c jmp $+48 ;abs 0xa6ce a6a0: 58 b3 bit.b #1, r8 ;r3 As==01 a6a2: 0f 24 jz $+32 ;abs 0xa6c2 a6a4: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) a6a8: 1b 41 20 00 mov 32(r1), r11 ;0x0020(r1) a6ac: 3a e3 inv r10 a6ae: 3b e3 inv r11 a6b0: 0e 4a mov r10, r14 a6b2: 0f 4b mov r11, r15 a6b4: 1e 53 inc r14 a6b6: 0f 63 adc r15 a6b8: 81 4e 1e 00 mov r14, 30(r1) ;0x001e(r1) a6bc: 81 4f 20 00 mov r15, 32(r1) ;0x0020(r1) a6c0: 06 3c jmp $+14 ;abs 0xa6ce a6c2: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) a6c6: 3a e3 inv r10 a6c8: 1a 53 inc r10 a6ca: 81 4a 1e 00 mov r10, 30(r1) ;0x001e(r1) a6ce: c1 43 1b 00 mov.b #0, 27(r1) ;r3 As==00, 0x001b(r1) a6d2: 68 b3 bit.b #2, r8 ;r3 As==10 a6d4: 6a 24 jz $+214 ;abs 0xa7aa a6d6: 16 41 1e 00 mov 30(r1), r6 ;0x001e(r1) a6da: 91 41 20 00 mov 32(r1), 60(r1) ;0x0020(r1), 0x003c(r1) a6de: 3c 00 a6e0: 18 41 22 00 mov 34(r1), r8 ;0x0022(r1) a6e4: 14 41 24 00 mov 36(r1), r4 ;0x0024(r1) a6e8: 07 41 mov r1, r7 a6ea: 37 50 1a 00 add #26, r7 ;#0x001a a6ee: 09 46 mov r6, r9 a6f0: 91 41 28 00 mov 40(r1), 50(r1) ;0x0028(r1), 0x0032(r1) a6f4: 32 00 a6f6: 1b 41 28 00 mov 40(r1), r11 ;0x0028(r1) a6fa: 8b 10 swpb r11 a6fc: 8b 11 sxt r11 a6fe: 8b 10 swpb r11 a700: 8b 11 sxt r11 a702: 81 4b 34 00 mov r11, 52(r1) ;0x0034(r1) a706: 81 4b 36 00 mov r11, 54(r1) ;0x0036(r1) a70a: 81 4b 38 00 mov r11, 56(r1) ;0x0038(r1) a70e: 11 12 3a 00 push 58(r1) ;0x003a(r1) a712: 11 12 3a 00 push 58(r1) ;0x003a(r1) a716: 11 12 3a 00 push 58(r1) ;0x003a(r1) a71a: 11 12 3a 00 push 58(r1) ;0x003a(r1) a71e: 0c 49 mov r9, r12 a720: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) a724: 0e 48 mov r8, r14 a726: 0f 44 mov r4, r15 a728: b0 12 22 aa call #0xaa22 a72c: 31 52 add #8, r1 ;r2 As==11 a72e: 0b 4c mov r12, r11 a730: 3c 90 0a 00 cmp #10, r12 ;#0x000a a734: 05 34 jge $+12 ;abs 0xa740 a736: 7b 50 30 00 add.b #48, r11 ;#0x0030 a73a: c7 4b 00 00 mov.b r11, 0(r7) ;0x0000(r7) a73e: 0c 3c jmp $+26 ;abs 0xa758 a740: 4b 4c mov.b r12, r11 a742: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a746: 03 24 jz $+8 ;abs 0xa74e a748: 7a 40 37 00 mov.b #55, r10 ;#0x0037 a74c: 02 3c jmp $+6 ;abs 0xa752 a74e: 7a 40 57 00 mov.b #87, r10 ;#0x0057 a752: 4a 5b add.b r11, r10 a754: c7 4a 00 00 mov.b r10, 0(r7) ;0x0000(r7) a758: 06 47 mov r7, r6 a75a: 36 53 add #-1, r6 ;r3 As==11 a75c: 11 12 3a 00 push 58(r1) ;0x003a(r1) a760: 11 12 3a 00 push 58(r1) ;0x003a(r1) a764: 11 12 3a 00 push 58(r1) ;0x003a(r1) a768: 11 12 3a 00 push 58(r1) ;0x003a(r1) a76c: 0c 49 mov r9, r12 a76e: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) a772: 0e 48 mov r8, r14 a774: 0f 44 mov r4, r15 a776: b0 12 fc a9 call #0xa9fc a77a: 31 52 add #8, r1 ;r2 As==11 a77c: 09 4c mov r12, r9 a77e: 81 4d 3c 00 mov r13, 60(r1) ;0x003c(r1) a782: 08 4e mov r14, r8 a784: 04 4f mov r15, r4 a786: 37 53 add #-1, r7 ;r3 As==11 a788: 0c 93 tst r12 a78a: b2 23 jnz $-154 ;abs 0xa6f0 a78c: 0d 93 tst r13 a78e: b0 23 jnz $-158 ;abs 0xa6f0 a790: 0e 93 tst r14 a792: ae 23 jnz $-162 ;abs 0xa6f0 a794: 0f 93 tst r15 a796: ac 23 jnz $-166 ;abs 0xa6f0 a798: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) a79c: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) a7a0: 81 43 22 00 mov #0, 34(r1) ;r3 As==00, 0x0022(r1) a7a4: 81 43 24 00 mov #0, 36(r1) ;r3 As==00, 0x0024(r1) a7a8: 6c 3c jmp $+218 ;abs 0xa882 a7aa: 58 b3 bit.b #1, r8 ;r3 As==01 a7ac: 3e 24 jz $+126 ;abs 0xa82a a7ae: 14 41 1e 00 mov 30(r1), r4 ;0x001e(r1) a7b2: 17 41 20 00 mov 32(r1), r7 ;0x0020(r1) a7b6: 08 41 mov r1, r8 a7b8: 38 50 1a 00 add #26, r8 ;#0x001a a7bc: 19 41 28 00 mov 40(r1), r9 ;0x0028(r1) a7c0: 89 10 swpb r9 a7c2: 89 11 sxt r9 a7c4: 89 10 swpb r9 a7c6: 89 11 sxt r9 a7c8: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) a7cc: 0d 49 mov r9, r13 a7ce: 0e 44 mov r4, r14 a7d0: 0f 47 mov r7, r15 a7d2: b0 12 9a 91 call #0x919a a7d6: 0b 4e mov r14, r11 a7d8: 3e 90 0a 00 cmp #10, r14 ;#0x000a a7dc: 05 34 jge $+12 ;abs 0xa7e8 a7de: 7b 50 30 00 add.b #48, r11 ;#0x0030 a7e2: c8 4b 00 00 mov.b r11, 0(r8) ;0x0000(r8) a7e6: 0c 3c jmp $+26 ;abs 0xa800 a7e8: 4b 4e mov.b r14, r11 a7ea: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a7ee: 03 24 jz $+8 ;abs 0xa7f6 a7f0: 7a 40 37 00 mov.b #55, r10 ;#0x0037 a7f4: 02 3c jmp $+6 ;abs 0xa7fa a7f6: 7a 40 57 00 mov.b #87, r10 ;#0x0057 a7fa: 4a 5b add.b r11, r10 a7fc: c8 4a 00 00 mov.b r10, 0(r8) ;0x0000(r8) a800: 06 48 mov r8, r6 a802: 36 53 add #-1, r6 ;r3 As==11 a804: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) a808: 0d 49 mov r9, r13 a80a: 0e 44 mov r4, r14 a80c: 0f 47 mov r7, r15 a80e: b0 12 64 91 call #0x9164 a812: 04 4e mov r14, r4 a814: 07 4f mov r15, r7 a816: 38 53 add #-1, r8 ;r3 As==11 a818: 0e 93 tst r14 a81a: d0 23 jnz $-94 ;abs 0xa7bc a81c: 0f 93 tst r15 a81e: ce 23 jnz $-98 ;abs 0xa7bc a820: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) a824: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) a828: 2c 3c jmp $+90 ;abs 0xa882 a82a: 17 41 1e 00 mov 30(r1), r7 ;0x001e(r1) a82e: 08 41 mov r1, r8 a830: 38 50 1a 00 add #26, r8 ;#0x001a a834: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) a838: 0f 47 mov r7, r15 a83a: b0 12 22 91 call #0x9122 a83e: 0d 4f mov r15, r13 a840: 3f 90 0a 00 cmp #10, r15 ;#0x000a a844: 05 34 jge $+12 ;abs 0xa850 a846: 7d 50 30 00 add.b #48, r13 ;#0x0030 a84a: c8 4d 00 00 mov.b r13, 0(r8) ;0x0000(r8) a84e: 0c 3c jmp $+26 ;abs 0xa868 a850: 4d 4f mov.b r15, r13 a852: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a856: 03 24 jz $+8 ;abs 0xa85e a858: 7c 40 37 00 mov.b #55, r12 ;#0x0037 a85c: 02 3c jmp $+6 ;abs 0xa862 a85e: 7c 40 57 00 mov.b #87, r12 ;#0x0057 a862: 4c 5d add.b r13, r12 a864: c8 4c 00 00 mov.b r12, 0(r8) ;0x0000(r8) a868: 06 48 mov r8, r6 a86a: 36 53 add #-1, r6 ;r3 As==11 a86c: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) a870: 0f 47 mov r7, r15 a872: b0 12 08 91 call #0x9108 a876: 07 4f mov r15, r7 a878: 38 53 add #-1, r8 ;r3 As==11 a87a: 0f 93 tst r15 a87c: db 23 jnz $-72 ;abs 0xa834 a87e: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) a882: b1 90 0a 00 cmp #10, 40(r1) ;#0x000a, 0x0028(r1) a886: 28 00 a888: 02 24 jz $+6 ;abs 0xa88e a88a: c1 43 02 00 mov.b #0, 2(r1) ;r3 As==00, 0x0002(r1) a88e: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a892: 2a 24 jz $+86 ;abs 0xa8e8 a894: 0f 41 mov r1, r15 a896: 3f 50 1c 00 add #28, r15 ;#0x001c a89a: 81 4f 42 00 mov r15, 66(r1) ;0x0042(r1) a89e: 1a 41 1c 00 mov 28(r1), r10 ;0x001c(r1) a8a2: 8a 10 swpb r10 a8a4: 8a 11 sxt r10 a8a6: 8a 10 swpb r10 a8a8: 8a 11 sxt r10 a8aa: 81 4a 44 00 mov r10, 68(r1) ;0x0044(r1) a8ae: 81 46 46 00 mov r6, 70(r1) ;0x0046(r1) a8b2: 0a 46 mov r6, r10 a8b4: 8a 10 swpb r10 a8b6: 8a 11 sxt r10 a8b8: 8a 10 swpb r10 a8ba: 8a 11 sxt r10 a8bc: 81 4a 48 00 mov r10, 72(r1) ;0x0048(r1) a8c0: 1c 41 42 00 mov 66(r1), r12 ;0x0042(r1) a8c4: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) a8c8: 1c 81 46 00 sub 70(r1), r12 ;0x0046(r1) a8cc: 1d 71 48 00 subc 72(r1), r13 ;0x0048(r1) a8d0: 2c 83 decd r12 a8d2: 1c 91 26 00 cmp 38(r1), r12 ;0x0026(r1) a8d6: 0e 2c jc $+30 ;abs 0xa8f4 a8d8: e1 d3 01 00 bis.b #2, 1(r1) ;r3 As==10, 0x0001(r1) a8dc: 5e 41 26 00 mov.b 38(r1), r14 ;0x0026(r1) a8e0: 4e 8c sub.b r12, r14 a8e2: c1 4e 03 00 mov.b r14, 3(r1) ;0x0003(r1) a8e6: 06 3c jmp $+14 ;abs 0xa8f4 a8e8: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a8ec: 03 24 jz $+8 ;abs 0xa8f4 a8ee: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) a8f2: 30 00 a8f4: 11 12 04 00 push 4(r1) ;0x0004(r1) a8f8: 11 12 04 00 push 4(r1) ;0x0004(r1) a8fc: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) a900: 0e 46 mov r6, r14 a902: 1e 53 inc r14 a904: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) a908: b0 12 40 a1 call #0xa140 a90c: 21 52 add #4, r1 ;r2 As==10 a90e: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) a912: 0d 3c jmp $+28 ;abs 0xa92e a914: 7f 49 mov.b @r9+, r15 a916: 8f 11 sxt r15 a918: 91 12 3c 00 call 60(r1) ;0x003c(r1) a91c: 0e 49 mov r9, r14 a91e: 0e 58 add r8, r14 a920: 19 91 40 00 cmp 64(r1), r9 ;0x0040(r1) a924: f7 2b jnc $-16 ;abs 0xa914 a926: 81 49 3e 00 mov r9, 62(r1) ;0x003e(r1) a92a: 81 4e 2c 00 mov r14, 44(r1) ;0x002c(r1) a92e: 07 43 clr r7 a930: 0e 3c jmp $+30 ;abs 0xa94e a932: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) a936: 30 00 a938: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) a93c: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) a940: 03 3c jmp $+8 ;abs 0xa948 a942: 05 4e mov r14, r5 a944: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) a948: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) a94c: 17 43 mov #1, r7 ;r3 As==01 a94e: 16 41 40 00 mov 64(r1), r6 ;0x0040(r1) a952: 6e 46 mov.b @r6, r14 a954: 4e 93 tst.b r14 a956: 02 24 jz $+6 ;abs 0xa95c a958: 30 40 24 a3 br #0xa324 a95c: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) a960: 31 50 4a 00 add #74, r1 ;#0x004a a964: 34 41 pop r4 a966: 35 41 pop r5 a968: 36 41 pop r6 a96a: 37 41 pop r7 a96c: 38 41 pop r8 a96e: 39 41 pop r9 a970: 3a 41 pop r10 a972: 3b 41 pop r11 a974: 30 41 ret 0000a976 : a976: 0b 12 push r11 a978: 0d 93 tst r13 a97a: 0e 24 jz $+30 ;abs 0xa998 a97c: 6c 4f mov.b @r15, r12 a97e: 7b 4e mov.b @r14+, r11 a980: 4c 9b cmp.b r11, r12 a982: 05 24 jz $+12 ;abs 0xa98e a984: 4f 4c mov.b r12, r15 a986: 5e 4e ff ff mov.b -1(r14),r14 ;0xffff(r14) a98a: 0f 8e sub r14, r15 a98c: 06 3c jmp $+14 ;abs 0xa99a a98e: 1f 53 inc r15 a990: 4c 93 tst.b r12 a992: 02 24 jz $+6 ;abs 0xa998 a994: 3d 53 add #-1, r13 ;r3 As==11 a996: f0 3f jmp $-30 ;abs 0xa978 a998: 0f 43 clr r15 a99a: 3b 41 pop r11 a99c: 30 41 ret 0000a99e <__xabi_udivmod64>: a99e: 07 12 push r7 a9a0: 06 12 push r6 a9a2: 05 12 push r5 a9a4: 04 12 push r4 a9a6: 30 12 40 00 push #64 ;#0x0040 a9aa: 04 48 mov r8, r4 a9ac: 05 49 mov r9, r5 a9ae: 06 4a mov r10, r6 a9b0: 07 4b mov r11, r7 a9b2: 08 43 clr r8 a9b4: 09 43 clr r9 a9b6: 0a 43 clr r10 a9b8: 0b 43 clr r11 a9ba: 0c 5c rla r12 a9bc: 0d 6d rlc r13 a9be: 0e 6e rlc r14 a9c0: 0f 6f rlc r15 a9c2: 08 68 rlc r8 a9c4: 09 69 rlc r9 a9c6: 0a 6a rlc r10 a9c8: 0b 6b rlc r11 a9ca: 0b 97 cmp r7, r11 a9cc: 0e 28 jnc $+30 ;abs 0xa9ea a9ce: 08 20 jnz $+18 ;abs 0xa9e0 a9d0: 0a 96 cmp r6, r10 a9d2: 0b 28 jnc $+24 ;abs 0xa9ea a9d4: 05 20 jnz $+12 ;abs 0xa9e0 a9d6: 09 95 cmp r5, r9 a9d8: 08 28 jnc $+18 ;abs 0xa9ea a9da: 02 20 jnz $+6 ;abs 0xa9e0 a9dc: 08 94 cmp r4, r8 a9de: 05 28 jnc $+12 ;abs 0xa9ea a9e0: 08 84 sub r4, r8 a9e2: 09 75 subc r5, r9 a9e4: 0a 76 subc r6, r10 a9e6: 0b 77 subc r7, r11 a9e8: 1c d3 bis #1, r12 ;r3 As==01 a9ea: 91 83 00 00 dec 0(r1) ;0x0000(r1) a9ee: e5 23 jnz $-52 ;abs 0xa9ba a9f0: 21 53 incd r1 a9f2: 34 41 pop r4 a9f4: 35 41 pop r5 a9f6: 36 41 pop r6 a9f8: 37 41 pop r7 a9fa: 30 41 ret 0000a9fc <__udivdi3>: a9fc: 0b 12 push r11 a9fe: 0a 12 push r10 aa00: 09 12 push r9 aa02: 08 12 push r8 aa04: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) aa08: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) aa0c: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) aa10: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) aa14: b0 12 9e a9 call #0xa99e aa18: 38 41 pop r8 aa1a: 39 41 pop r9 aa1c: 3a 41 pop r10 aa1e: 3b 41 pop r11 aa20: 30 41 ret 0000aa22 <__umoddi3>: aa22: 0b 12 push r11 aa24: 0a 12 push r10 aa26: 09 12 push r9 aa28: 08 12 push r8 aa2a: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) aa2e: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) aa32: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) aa36: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) aa3a: b0 12 9e a9 call #0xa99e aa3e: 0c 48 mov r8, r12 aa40: 0d 49 mov r9, r13 aa42: 0e 4a mov r10, r14 aa44: 0f 4b mov r11, r15 aa46: 38 41 pop r8 aa48: 39 41 pop r9 aa4a: 3a 41 pop r10 aa4c: 3b 41 pop r11 aa4e: 30 41 ret 0000aa50 <__udivmoddi4>: aa50: 0b 12 push r11 aa52: 0a 12 push r10 aa54: 09 12 push r9 aa56: 08 12 push r8 aa58: 07 12 push r7 aa5a: 18 41 0c 00 mov 12(r1), r8 ;0x000c(r1) aa5e: 19 41 0e 00 mov 14(r1), r9 ;0x000e(r1) aa62: 1a 41 10 00 mov 16(r1), r10 ;0x0010(r1) aa66: 1b 41 12 00 mov 18(r1), r11 ;0x0012(r1) aa6a: b0 12 9e a9 call #0xa99e aa6e: 17 41 14 00 mov 20(r1), r7 ;0x0014(r1) aa72: 87 48 00 00 mov r8, 0(r7) ;0x0000(r7) aa76: 87 49 02 00 mov r9, 2(r7) ;0x0002(r7) aa7a: 87 4a 04 00 mov r10, 4(r7) ;0x0004(r7) aa7e: 87 4b 06 00 mov r11, 6(r7) ;0x0006(r7) aa82: 37 41 pop r7 aa84: 38 41 pop r8 aa86: 39 41 pop r9 aa88: 3a 41 pop r10 aa8a: 3b 41 pop r11 aa8c: 30 41 ret 0000aa8e <_unexpected_>: aa8e: 00 13 reti Disassembly of section .vectors: 0000ffe0 <__ivtbl_16>: ffe0: 22 88 22 88 22 88 26 88 22 88 4a 88 22 88 88 88 ".".".&.".J."... fff0: 58 88 22 88 22 88 22 88 22 88 22 88 22 88 00 80 X."."."."."."...