RZM.elf: file format elf32-msp430 SYMBOL TABLE: 00008000 l d .text 00000000 .text 0000a8f6 l d .rodata 00000000 .rodata 00000200 l d .bss 00000000 .bss 0000020e l d .noinit 00000000 .noinit 0000ffe0 l d .vectors 00000000 .vectors 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 00008c10 l .text 00000000 lcdloop 000086b6 l .text 00000000 __br_unexpected_ 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 fp-bit.c 0000904c l F .text 00000292 _fpadd_parts 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 fp-bit.c 00000000 l df *ABS* 00000000 libgcc2.c 00000000 l df *ABS* 00000000 strchr.c 00000000 l df *ABS* 00000000 memcmp.c 00000000 l df *ABS* 00000000 memset.c 00000000 l df *ABS* 00000000 strstr.c 00000000 l df *ABS* 00000000 atoi.c 00000000 l df *ABS* 00000000 sprintf.c 00009eea l F .text 00000022 append 00000202 l O .bss 00000002 available_ 00000200 l O .bss 00000002 destination_ 00009f0c l F .text 0000003c call_vuprintf 00000000 l df *ABS* 00000000 vuprintf.c 00009fa6 l F .text 00000198 print_field 00000000 l df *ABS* 00000000 strncmp.c 00008d24 g F .text 00000018 lcdBusy 00000057 g *ABS* 00000000 __BCSCTL1 00000174 g *ABS* 00000000 __TACCR1 00000000 g *ABS* 00000000 __data_size 000086b6 w .text 00000000 __isr_14 00000128 g *ABS* 00000000 __FCTL1 00008e36 g F .text 0000005e CCXX_SPI_RDREG 00000024 g *ABS* 00000000 __P1IES 0000004b g *ABS* 00000000 __ADC10AE1 00000069 g *ABS* 00000000 __UCB0CTL1 00009f7e g F .text 00000016 vsprintf 00008f90 g .text 00000000 __ext_divmod16 000086b6 w .text 00000000 __isr_4 00000002 g *ABS* 00000000 __IFG1 00000060 g *ABS* 00000000 __UCA0CTL0 00008876 g F .text 0000003a sample_adc_chan 0000959e g F .text 00000150 __divsf3 000088ee g F .text 00000020 init_UART_SPI 0000012e g *ABS* 00000000 __TAIV 00009f64 g F .text 0000001a snprintf 000097e4 g F .text 00000090 __fixsfsi 00000000 g .vectors 00000000 _efartext 00008f6e g F .text 00000000 __udivhi3 00000001 g *ABS* 00000000 __IE2 0000002b g *ABS* 00000000 __P2IFG 0000001a g *ABS* 00000000 __P3DIR 0000aafc g *ABS* 00000000 _etext 00000190 g *ABS* 00000000 __TBR 000010f8 g *ABS* 00000000 __CALDCO_16MHZ 0000932a g F .text 00000050 __subsf3 0000001d g *ABS* 00000000 __P4OUT 00008864 g F .text 00000012 sample_adc 0000000e g *ABS* 00000000 __bss_size 000010fd g *ABS* 00000000 __CALBC1_8MHZ 00008000 w .text 00000000 __watchdog_support 000086b0 w .text 00000000 __stop_progExec__ 0000002d g *ABS* 00000000 __P2IE 000087f0 g F .text 00000066 sys_init 00000192 g *ABS* 00000000 __TBCCR0 000086b6 w .text 00000000 __isr_11 00000186 g *ABS* 00000000 __TBCCTL2 00008fca g F .text 00000000 __udivsi3 00000025 g *ABS* 00000000 __P1IE 0000006b g *ABS* 00000000 __UCB0BR1 00008738 g F .text 0000008a tinit 00009f94 g F .text 00000012 vsnprintf 00000049 g *ABS* 00000000 __ADC10DTC1 00000066 g *ABS* 00000000 __UCA0RXBUF 00000061 g *ABS* 00000000 __UCA0CTL1 0000a8b6 g .text 00000000 __udivmoddi4 000086ba g F .text 00000024 P2_VEC 00008dfe g F .text 00000038 CCXX_SPI_STROBE 00008c9a g F .text 00000070 lcdInstr 00000182 g *ABS* 00000000 __TBCCTL0 0000006d g *ABS* 00000000 __UCB0STAT 000086de g .text 00000000 __isr_5 00000063 g *ABS* 00000000 __UCA0BR1 0000a888 g F .text 00000000 __umoddi3 0000aafc g *ABS* 00000000 __data_load_start 000086b6 g .text 00000000 __dtors_end 00000053 g *ABS* 00000000 __BCSCTL3 000001bc g *ABS* 00000000 __ADC10SA 00000166 g *ABS* 00000000 __TACCTL2 00008e94 g F .text 0000004e CCXX_SPI_WRREG 0000a862 g F .text 00000000 __udivdi3 00000065 g *ABS* 00000000 __UCA0STAT 000086b6 w .text 00000000 __isr_2 0000890e g F .text 0000019e CCXX_WRITE_SPI_RF_SETTINGS 00008f56 g .text 00000000 __mulhi3 00000160 g *ABS* 00000000 __TACTL 00008fc2 g F .text 00000000 __modhi3 0000012c g *ABS* 00000000 __FCTL3 00008c16 g F .text 00000084 lcdPutc 000086b6 w .text 00000000 __isr_10 0000002e g *ABS* 00000000 __P2SEL 00000180 g *ABS* 00000000 __TBCTL 000010f9 g *ABS* 00000000 __CALBC1_16MHZ 000000c3 g *ABS* 00000000 __OA1CTL1 00000023 g *ABS* 00000000 __P1IFG 000010fb g *ABS* 00000000 __CALBC1_12MHZ 00009ba6 g F .text 00000124 __unpack_f 00008ee2 g F .text 00000074 CCXX_SPI_BURST_WRREG 00000204 g O .bss 00000001 RSSI_DBM 0000004a g *ABS* 00000000 __ADC10AE0 0000011a g *ABS* 00000000 __UCB0I2CSA 00000172 g *ABS* 00000000 __TACCR0 00000056 g *ABS* 00000000 __DCOCTL 00000003 g *ABS* 00000000 __IFG2 0000020e g O .noinit 00000002 __wdt_clear_value 0000001b g *ABS* 00000000 __P3SEL 0000871c g .text 00000000 __isr_7 0000ffe0 g O .vectors 00000020 __ivtbl_16 0000006c g *ABS* 00000000 __UCB0I2CIE 0000006a g *ABS* 00000000 __UCB0BR0 00009000 g F .text 00000000 __umodsi3 00000028 g *ABS* 00000000 __P2IN 000099c8 g F .text 000001de __pack_f 00000118 g *ABS* 00000000 __UCB0I2COA 00000184 g *ABS* 00000000 __TBCCTL1 000001b4 g *ABS* 00000000 __ADC10MEM 00008f88 g F .text 00000000 __umodhi3 000086b6 w .text 00000000 __isr_0 00000205 g O .bss 00000001 RSSI 00000029 g *ABS* 00000000 __P2OUT 0000012a g *ABS* 00000000 __FCTL2 00009956 g F .text 00000072 __clzsi2 00000064 g *ABS* 00000000 __UCA0MCTL 00008028 w .text 00000000 __do_clear_bss 00008d3c g F .text 00000028 lcdInit 00000021 g *ABS* 00000000 __P1OUT 0000002c g *ABS* 00000000 __P2IES 00000026 g *ABS* 00000000 __P1SEL 00009e0a g F .text 00000056 strstr 000086ec g F .text 00000030 TA1_VEC 0000973e g F .text 000000a6 __floatsisf 000088ce g F .text 00000020 init_UART_232 0000a7dc g F .text 00000028 strncmp 00008fca g .text 00000000 __ext_udivmod32 00000027 g *ABS* 00000000 __P1REN 000000c0 g *ABS* 00000000 __OA0CTL0 0000a8f4 w .text 00000000 _unexpected_ 000086ec g .text 00000000 __isr_8 000086ba g .text 00000000 __isr_3 0000a13e g F .text 0000069e vuprintf 00009d80 g F .text 00000020 memcmp 00008856 g F .text 0000000e init_adc 000010fc g *ABS* 00000000 __CALDCO_8MHZ 00008f90 g F .text 00000000 __divhi3 00008f6e g .text 00000000 __ext_udivmod16 00008000 w .text 00000000 _reset_vector__ 000086b6 g .text 00000000 __ctors_start 0000a804 g .text 00000000 __xabi_udivmod64 000086b6 w .text 00000000 __isr_12 000010fa g *ABS* 00000000 __CALDCO_12MHZ 0000a9ec g O .rodata 00000008 __thenan_sf 00000018 g *ABS* 00000000 __P3IN 00008010 w .text 00000000 __do_copy_data 000086de g F .text 0000000e ADC_VEC 00000200 g .bss 00000000 __bss_start 00009da0 g F .text 0000006a memset 0000803e g F .text 00000672 main 00000176 g *ABS* 00000000 __TACCR2 000000c2 g *ABS* 00000000 __OA1CTL0 000086b6 w .text 00000000 __isr_13 00000170 g *ABS* 00000000 __TAR 0000001e g *ABS* 00000000 __P4DIR 00000206 g O .bss 00000002 seconds 00000162 g *ABS* 00000000 __TACCTL0 00010000 g .vectors 00000000 _vectors_end 0000937a g F .text 00000224 __mulsf3 0000002a g *ABS* 00000000 __P2DIR 000087c2 g F .text 0000002e delay 00000068 g *ABS* 00000000 __UCB0CTL0 00008bc4 g F .text 0000004c TX_STRING 0000002f g *ABS* 00000000 __P2REN 00009f48 g F .text 0000001c sprintf 0000a9f4 g O .rodata 00000100 __clz_tab 00000208 g O .bss 00000001 LQI 000096ee g F .text 00000050 __gesf2 0000871c g F .text 0000001c RX_VEC 0000006e g *ABS* 00000000 __UCB0RXBUF 000001b0 g *ABS* 00000000 __ADC10CTL0 000086b6 w .text 00000000 __isr_9 0000005e g *ABS* 00000000 __UCA0IRTCTL 00008ad6 g F .text 000000ee RX_STRING 000010fe g *ABS* 00000000 __CALDCO_1MHZ 00000067 g *ABS* 00000000 __UCA0TXBUF 00008d0a g F .text 0000001a lcdPuts 0000800c w .text 00000000 __init_stack 0000005d g *ABS* 00000000 __UCA0ABCTL 00000019 g *ABS* 00000000 __P3OUT 000000c1 g *ABS* 00000000 __OA0CTL1 00000209 g O .bss 00000001 PKTSTATUS 000086b6 g .text 00000000 __dtors_start 000086b6 w .text 00000000 __isr_6 000086b6 g .text 00000000 __ctors_end 00000062 g *ABS* 00000000 __UCA0BR0 00000600 g *ABS* 00000000 __stack 000086b6 w .text 00000000 __isr_1 00000200 g .rodata 00000000 _edata 00000210 g *ABS* 00000000 _end 00000194 g *ABS* 00000000 __TBCCR1 00000048 g *ABS* 00000000 __ADC10DTC0 0000011e g *ABS* 00000000 __TBIV 000001b2 g *ABS* 00000000 __ADC10CTL1 0000020a g O .bss 00000002 flags 00009874 g F .text 000000e2 __floatunsisf 00000058 g *ABS* 00000000 __BCSCTL2 000086b0 w .text 00000000 _endless_loop__ 0000001f g *ABS* 00000000 __P4SEL 00000196 g *ABS* 00000000 __TBCCR2 00009e60 g F .text 0000008a atoi 00000022 g *ABS* 00000000 __P1DIR 0000900a g F .text 00000042 __fixunssfsi 00009cca g F .text 000000a4 __fpcmp_parts_f 00008aac g F .text 0000002a RX_MODE 0000005f g *ABS* 00000000 __UCA0IRRCTL 00000010 g *ABS* 00000000 __P3REN 00000164 g *ABS* 00000000 __TACCTL1 00008d64 g F .text 0000009a lcdOn 0000006f g *ABS* 00000000 __UCB0TXBUF 000010ff g *ABS* 00000000 __CALBC1_1MHZ 00008010 w .text 00000000 __low_level_init 00009d6e g F .text 00000012 strchr 00000011 g *ABS* 00000000 __P4REN 00000200 g .rodata 00000000 __data_start 00000120 g *ABS* 00000000 __WDTCTL 00000000 g *ABS* 00000000 __IE1 00000020 g *ABS* 00000000 __P1IN 0000001c g *ABS* 00000000 __P4IN 0000020c g O .bss 00000001 status 0000020d g O .bss 00000001 rx_char 000092de g F .text 0000004c __addsf3 00008c10 g F .text 00000006 lcdDelay 000088b0 g F .text 0000001e TX232String Disassembly of section .text: 00008000 <__watchdog_support>: 8000: 55 42 20 01 mov.b &0x0120,r5 8004: 35 d0 08 5a bis #23048, r5 ;#0x5a08 8008: 82 45 0e 02 mov r5, &0x020e 0000800c <__init_stack>: 800c: 31 40 00 06 mov #1536, r1 ;#0x0600 00008010 <__do_copy_data>: 8010: 3f 40 00 00 mov #0, r15 ;#0x0000 8014: 0f 93 tst r15 8016: 08 24 jz $+18 ;abs 0x8028 8018: 92 42 0e 02 mov &0x020e,&0x0120 801c: 20 01 801e: 2f 83 decd r15 8020: 9f 4f fc aa mov -21764(r15),512(r15);0xaafc(r15), 0x0200(r15) 8024: 00 02 8026: f8 23 jnz $-14 ;abs 0x8018 00008028 <__do_clear_bss>: 8028: 3f 40 0e 00 mov #14, r15 ;#0x000e 802c: 0f 93 tst r15 802e: 07 24 jz $+16 ;abs 0x803e 8030: 92 42 0e 02 mov &0x020e,&0x0120 8034: 20 01 8036: 1f 83 dec r15 8038: cf 43 00 02 mov.b #0, 512(r15);r3 As==00, 0x0200(r15) 803c: f9 23 jnz $-12 ;abs 0x8030 0000803e
: /** Main function. */ int main(void) { 803e: 31 50 9a ff add #-102, r1 ;#0xff9a unsigned char rxbuf[64]; unsigned char loop, commacount=0, gps_speed=0; int degC, volt,t0=0,t1=0,scooter_temp=0; float vbat,ibat,batt_capacity=0; volatile long traw,vraw,batt_capacity_raw=0; 8042: 81 43 00 00 mov #0, 0(r1) ;r3 As==00, 0x0000(r1) 8046: 81 43 02 00 mov #0, 2(r1) ;r3 As==00, 0x0002(r1) int interval=5; //set report interval to every other interrupt (5hz) sys_init(); //initialize system parameters 804a: b0 12 f0 87 call #0x87f0 IE2 |= UCA0RXIE; } void init_UART_SPI() { UCB0CTL1 = UCSWRST; 804e: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 8052: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8056: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8058: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 805c: 68 00 UCB0BR0 = 2; 805e: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 8062: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 8066: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 806a: 69 00 /**init the ADC10 */ void init_adc() { //ADC10AE = ADC_0_IN | ADC_2_IN; ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 806c: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 8070: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8072: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8076: b2 01 //init_UART_232(); //uncommect to enable RS232 init_UART_SPI(); //get the UART into SPI mode such that we can talk to the radio init_adc(); //turn on the ADC P1OUT ^= LED_GRN; 8078: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 delay(0xFFFF); //lil bit O delay 807c: 3f 43 mov #-1, r15 ;r3 As==11 807e: b0 12 c2 87 call #0x87c2 P1OUT ^= LED_GRN; 8082: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 memset(rxbuf, '\0', 64); //clear the buffer 8086: 3d 40 40 00 mov #64, r13 ;#0x0040 808a: 0e 43 clr r14 808c: 0f 41 mov r1, r15 808e: 3f 52 add #8, r15 ;r2 As==11 8090: b0 12 a0 9d call #0x9da0 P3OUT &= ~CSn; //power on reset for radio, strobe CSn 8094: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8098: 19 00 delay(0xFF); 809a: 3f 40 ff 00 mov #255, r15 ;#0x00ff 809e: b0 12 c2 87 call #0x87c2 P3OUT |= CSn; 80a2: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 delay(0xFFFF); 80a6: 3f 43 mov #-1, r15 ;r3 As==11 80a8: b0 12 c2 87 call #0x87c2 CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 80ac: 7f 40 30 00 mov.b #48, r15 ;#0x0030 80b0: b0 12 fe 8d call #0x8dfe CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 80b4: b0 12 0e 89 call #0x890e CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 80b8: 7f 40 36 00 mov.b #54, r15 ;#0x0036 80bc: b0 12 fe 8d call #0x8dfe do{ i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 80c0: 7f 40 35 00 mov.b #53, r15 ;#0x0035 80c4: b0 12 36 8e call #0x8e36 }while(i != 1); //this loop won't finish if theres a problem with the chip 80c8: 5f 93 cmp.b #1, r15 ;r3 As==01 80ca: fa 23 jnz $-10 ;abs 0x80c0 //P1SEL |= bit4; P1OUT ^= LED_RED; 80cc: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 delay(0xFF); //lil bit O delay 80d0: 3f 40 ff 00 mov #255, r15 ;#0x00ff 80d4: b0 12 c2 87 call #0x87c2 P1OUT ^= LED_RED; 80d8: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 flags = 0; 80dc: 82 43 0a 02 mov #0, &0x020a ;r3 As==00 P2IFG = 0x00; 80e0: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { TACCTL0 = CCIE; // TACCR0 interrupt enabled 80e4: b2 40 10 00 mov #16, &0x0162 ;#0x0010 80e8: 62 01 TACTL = TASSEL_1; // ACLK, upmode 80ea: b2 40 00 01 mov #256, &0x0160 ;#0x0100 80ee: 60 01 TACTL &= ~TAIFG; //clear interrupt 80f0: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 80f4: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 80f6: b2 40 b0 04 mov #1200, &0x0172 ;#0x04b0 80fa: 72 01 //TACCR0 = 12000; // ~1 second TAR = 0; 80fc: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 8100: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8104: 60 01 P1OUT ^= LED_RED; flags = 0; P2IFG = 0x00; tinit(100); //start generating 10 interrupts every second seconds = 0; 8106: 82 43 06 02 mov #0, &0x0206 ;r3 As==00 TX_STRING("GND:RZM Startup", 15); 810a: 7e 40 0f 00 mov.b #15, r14 ;#0x000f 810e: 3f 40 f6 a8 mov #-22282,r15 ;#0xa8f6 8112: b0 12 c4 8b call #0x8bc4 P2IFG &= ~GDO0; //reset trashed interrupt state 8116: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 811a: 2b 00 // lcdDelay(LCDDELAY1MS); // P2OUT ^= (LCD_D7 | LCD_D6 | LCD_D5 | LCD_D4); //} eint(); //enable interrupts 811c: 32 d2 eint RX_MODE(); //put radio into listen mode. 811e: b0 12 ac 8a call #0x8aac P1OUT ^= LED_RED; 8122: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 lcdOn(); //reset sequence 8126: b0 12 64 8d call #0x8d64 lcdInit(); 812a: b0 12 3c 8d call #0x8d3c lcdInstr(LCD_LINE1); 812e: 7f 40 80 ff mov.b #-128, r15 ;#0xff80 8132: b0 12 9a 8c call #0x8c9a //lcdDelay(LCDDELAY1MS); //lcdDelay(LCDDELAY1MS); lcdPuts("Well hi there!"); 8136: 3f 40 06 a9 mov #-22266,r15 ;#0xa906 813a: b0 12 0a 8d call #0x8d0a lcdInstr(LCD_LINE2); 813e: 7f 40 c0 ff mov.b #-64, r15 ;#0xffc0 8142: b0 12 9a 8c call #0x8c9a lcdPuts("1-208-409-4954"); 8146: 3f 40 15 a9 mov #-22251,r15 ;#0xa915 814a: b0 12 0a 8d call #0x8d0a lcdBusy(5000); //display my information for 5 seconds 814e: 3f 40 88 13 mov #5000, r15 ;#0x1388 8152: b0 12 24 8d call #0x8d24 lcdInstr(LCD_CLEAR); 8156: 5f 43 mov.b #1, r15 ;r3 As==01 8158: b0 12 9a 8c call #0x8c9a P1OUT ^= LED_RED; 815c: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 int degC, volt,t0=0,t1=0,scooter_temp=0; float vbat,ibat,batt_capacity=0; volatile long traw,vraw,batt_capacity_raw=0; int interval=5; //set report interval to every other interrupt (5hz) 8160: b1 40 05 00 mov #5, 86(r1) ;#0x0005, 0x0056(r1) 8164: 56 00 { unsigned int batt_capacity_ipart=0,sample,length=0,i,batt_volts=0,vbat_ipart,batt_amps=0,ibat_ipart;; unsigned char rxbuf[64]; unsigned char loop, commacount=0, gps_speed=0; int degC, volt,t0=0,t1=0,scooter_temp=0; 8166: 81 43 5e 00 mov #0, 94(r1) ;r3 As==00, 0x005e(r1) 816a: 81 43 60 00 mov #0, 96(r1) ;r3 As==00, 0x0060(r1) */ int main(void) { unsigned int batt_capacity_ipart=0,sample,length=0,i,batt_volts=0,vbat_ipart,batt_amps=0,ibat_ipart;; unsigned char rxbuf[64]; unsigned char loop, commacount=0, gps_speed=0; 816e: c1 43 58 00 mov.b #0, 88(r1) ;r3 As==00, 0x0058(r1) /** Main function. */ int main(void) { unsigned int batt_capacity_ipart=0,sample,length=0,i,batt_volts=0,vbat_ipart,batt_amps=0,ibat_ipart;; 8172: 81 43 5c 00 mov #0, 92(r1) ;r3 As==00, 0x005c(r1) 8176: 81 43 5a 00 mov #0, 90(r1) ;r3 As==00, 0x005a(r1) //while(1); while (1) //main loop, never ends... { loop = 0; if(flags & RXCHAR_RDY) 817a: b2 b2 0a 02 bit #8, &0x020a ;r2 As==11 817e: 0d 24 jz $+28 ;abs 0x819a { dint(); 8180: 32 c2 dint 8182: 03 43 nop P1OUT |= LED_RED; 8184: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 loop = 1; flags &= ~RXCHAR_RDY; 8188: b2 f0 f7 ff and #-9, &0x020a ;#0xfff7 818c: 0a 02 //do stuff here P1OUT &= ~LED_RED; 818e: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 8192: 21 00 eint(); 8194: 32 d2 eint if(flags & RXCHAR_RDY) { dint(); P1OUT |= LED_RED; loop = 1; 8196: 5c 43 mov.b #1, r12 ;r3 As==01 8198: 01 3c jmp $+4 ;abs 0x819c //while(1); while (1) //main loop, never ends... { loop = 0; 819a: 4c 43 clr.b r12 flags &= ~RXCHAR_RDY; //do stuff here P1OUT &= ~LED_RED; eint(); } if(flags & CONTROLLER_RDY) //Someone is sending us something 819c: a2 b3 0a 02 bit #2, &0x020a ;r3 As==10 81a0: 02 20 jnz $+6 ;abs 0x81a6 81a2: 30 40 40 84 br #0x8440 { dint(); 81a6: 32 c2 dint 81a8: 03 43 nop loop = 1; P1OUT |= LED_RED; 81aa: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 flags &= ~CONTROLLER_RDY; 81ae: b2 f0 fd ff and #-3, &0x020a ;#0xfffd 81b2: 0a 02 memset(rxbuf, 0, 64); 81b4: 3d 40 40 00 mov #64, r13 ;#0x0040 81b8: 0e 43 clr r14 81ba: 0f 41 mov r1, r15 81bc: 3f 52 add #8, r15 ;r2 As==11 81be: b0 12 a0 9d call #0x9da0 length = RX_STRING(rxbuf, 64); 81c2: 7e 40 40 00 mov.b #64, r14 ;#0x0040 81c6: 0f 41 mov r1, r15 81c8: 3f 52 add #8, r15 ;r2 As==11 81ca: b0 12 d6 8a call #0x8ad6 81ce: 46 4f mov.b r15, r6 if(LQI & bit7) //CRC ok 81d0: 5a 42 08 02 mov.b &0x0208,r10 81d4: 4a 93 tst.b r10 81d6: 02 38 jl $+6 ;abs 0x81dc 81d8: 30 40 2c 84 br #0x842c { P1OUT |= LED_GRN; 81dc: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 81e0: 3d 40 03 00 mov #3, r13 ;#0x0003 81e4: 0e 41 mov r1, r14 81e6: 3e 52 add #8, r14 ;r2 As==11 81e8: 3f 40 24 a9 mov #-22236,r15 ;#0xa924 81ec: b0 12 80 9d call #0x9d80 81f0: 0f 93 tst r15 81f2: 8e 20 jnz $+286 ;abs 0x8310 { if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 81f4: 3e 40 28 a9 mov #-22232,r14 ;#0xa928 81f8: 0f 41 mov r1, r15 81fa: 3f 52 add #8, r15 ;r2 As==11 81fc: b0 12 0a 9e call #0x9e0a 8200: 0f 93 tst r15 8202: 2f 24 jz $+96 ;abs 0x8262 { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8204: 3e 40 3d 00 mov #61, r14 ;#0x003d 8208: 0f 41 mov r1, r15 820a: 3f 52 add #8, r15 ;r2 As==11 820c: b0 12 6e 9d call #0x9d6e 8210: 1f 53 inc r15 8212: b0 12 60 9e call #0x9e60 8216: 0a 4f mov r15, r10 if(length > 0) 8218: 0f 93 tst r15 821a: 0f 24 jz $+32 ;abs 0x823a { interval = length; length = sprintf(rxbuf,"\e[32mGND:RZM Interval is now %d\e[30m",interval); 821c: 0f 12 push r15 821e: 30 12 31 a9 push #-22223 ;#0xa931 8222: 3f 40 0c 00 mov #12, r15 ;#0x000c 8226: 0f 51 add r1, r15 8228: 0f 12 push r15 822a: b0 12 48 9f call #0x9f48 822e: 31 50 06 00 add #6, r1 ;#0x0006 8232: 0d 4f mov r15, r13 8234: 81 4a 56 00 mov r10, 86(r1) ;0x0056(r1) 8238: 0d 3c jmp $+28 ;abs 0x8254 } else length = sprintf(rxbuf,"\e[32mGND:RZM Reporting every %d seconds\e[30m",interval); 823a: 11 12 58 00 push 88(r1) ;0x0058(r1) 823e: 30 12 56 a9 push #-22186 ;#0xa956 8242: 3f 40 0c 00 mov #12, r15 ;#0x000c 8246: 0f 51 add r1, r15 8248: 0f 12 push r15 824a: b0 12 48 9f call #0x9f48 824e: 31 50 06 00 add #6, r1 ;#0x0006 8252: 0d 4f mov r15, r13 TX_STRING(rxbuf,length); 8254: 4e 4d mov.b r13, r14 8256: 0f 41 mov r1, r15 8258: 3f 52 add #8, r15 ;r2 As==11 825a: b0 12 c4 8b call #0x8bc4 825e: 30 40 2c 84 br #0x842c } else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 8262: 3e 40 83 a9 mov #-22141,r14 ;#0xa983 8266: 0f 41 mov r1, r15 8268: 3f 52 add #8, r15 ;r2 As==11 826a: b0 12 0a 9e call #0x9e0a 826e: 0f 93 tst r15 8270: 18 24 jz $+50 ;abs 0x82a2 { length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 8272: 4d 4a mov.b r10, r13 8274: 0d 12 push r13 8276: 5d 42 04 02 mov.b &0x0204,r13 827a: 8d 11 sxt r13 827c: 0d 12 push r13 827e: 30 12 24 a9 push #-22236 ;#0xa924 8282: 30 12 8a a9 push #-22134 ;#0xa98a 8286: 3f 40 10 00 mov #16, r15 ;#0x0010 828a: 0f 51 add r1, r15 828c: 0f 12 push r15 828e: b0 12 48 9f call #0x9f48 8292: 31 50 0a 00 add #10, r1 ;#0x000a TX_STRING(rxbuf,length); 8296: 4e 4f mov.b r15, r14 8298: 0f 41 mov r1, r15 829a: 3f 52 add #8, r15 ;r2 As==11 829c: b0 12 c4 8b call #0x8bc4 82a0: c5 3c jmp $+396 ;abs 0x842c } else if(strstr( rxbuf, "now" ) != NULL) //report now 82a2: 3e 40 a3 a9 mov #-22109,r14 ;#0xa9a3 82a6: 0f 41 mov r1, r15 82a8: 3f 52 add #8, r15 ;r2 As==11 82aa: b0 12 0a 9e call #0x9e0a 82ae: 0f 93 tst r15 82b0: 04 24 jz $+10 ;abs 0x82ba { flags |= GO_NOW | TIMER_UP; ///set event flags to trigger the reporting 82b2: b2 d0 05 00 bis #5, &0x020a ;#0x0005 82b6: 0a 02 82b8: b9 3c jmp $+372 ;abs 0x842c } else //command not recognized, give a pong to ack reception { length = sprintf(rxbuf,"\e[34mGND:RZM Pong!\e[30m"); 82ba: b1 40 1b 5b mov #23323, 8(r1) ;#0x5b1b, 0x0008(r1) 82be: 08 00 82c0: b1 40 33 34 mov #13363, 10(r1) ;#0x3433, 0x000a(r1) 82c4: 0a 00 82c6: b1 40 6d 47 mov #18285, 12(r1) ;#0x476d, 0x000c(r1) 82ca: 0c 00 82cc: b1 40 4e 44 mov #17486, 14(r1) ;#0x444e, 0x000e(r1) 82d0: 0e 00 82d2: b1 40 3a 52 mov #21050, 16(r1) ;#0x523a, 0x0010(r1) 82d6: 10 00 82d8: b1 40 5a 4d mov #19802, 18(r1) ;#0x4d5a, 0x0012(r1) 82dc: 12 00 82de: b1 40 20 50 mov #20512, 20(r1) ;#0x5020, 0x0014(r1) 82e2: 14 00 82e4: b1 40 6f 6e mov #28271, 22(r1) ;#0x6e6f, 0x0016(r1) 82e8: 16 00 82ea: b1 40 67 21 mov #8551, 24(r1) ;#0x2167, 0x0018(r1) 82ee: 18 00 82f0: b1 40 1b 5b mov #23323, 26(r1) ;#0x5b1b, 0x001a(r1) 82f4: 1a 00 82f6: b1 40 33 30 mov #12339, 28(r1) ;#0x3033, 0x001c(r1) 82fa: 1c 00 82fc: b1 40 6d 00 mov #109, 30(r1) ;#0x006d, 0x001e(r1) 8300: 1e 00 TX_STRING(rxbuf, length); 8302: 7e 40 17 00 mov.b #23, r14 ;#0x0017 8306: 0f 41 mov r1, r15 8308: 3f 52 add #8, r15 ;r2 As==11 830a: b0 12 c4 8b call #0x8bc4 830e: 8e 3c jmp $+286 ;abs 0x842c } } else if(!memcmp("GND:RZR",rxbuf,7)) //packet addressed to us 8310: 3d 40 07 00 mov #7, r13 ;#0x0007 8314: 0e 41 mov r1, r14 8316: 3e 52 add #8, r14 ;r2 As==11 8318: 3f 40 a7 a9 mov #-22105,r15 ;#0xa9a7 831c: b0 12 80 9d call #0x9d80 8320: 0f 93 tst r15 8322: 59 20 jnz $+180 ;abs 0x83d6 { //sample //GND:RZR S:22450 T:318 V:30 VB:834 IB:0 if(strstr( rxbuf, "S:" ) != NULL) 8324: 3e 40 af a9 mov #-22097,r14 ;#0xa9af 8328: 0f 41 mov r1, r15 832a: 3f 52 add #8, r15 ;r2 As==11 832c: b0 12 0a 9e call #0x9e0a 8330: 0f 93 tst r15 8332: 08 24 jz $+18 ;abs 0x8344 { t0 = t1; t1 = atoi(strstr(rxbuf,"S:")+2); 8334: 2f 53 incd r15 8336: b0 12 60 9e call #0x9e60 { //sample //GND:RZR S:22450 T:318 V:30 VB:834 IB:0 if(strstr( rxbuf, "S:" ) != NULL) { t0 = t1; 833a: 91 41 5e 00 mov 94(r1), 96(r1) ;0x005e(r1), 0x0060(r1) 833e: 60 00 t1 = atoi(strstr(rxbuf,"S:")+2); 8340: 81 4f 5e 00 mov r15, 94(r1) ;0x005e(r1) } if(strstr( rxbuf, "VB:" ) != NULL) 8344: 3e 40 b2 a9 mov #-22094,r14 ;#0xa9b2 8348: 0f 41 mov r1, r15 834a: 3f 52 add #8, r15 ;r2 As==11 834c: b0 12 0a 9e call #0x9e0a 8350: 0f 93 tst r15 8352: 06 24 jz $+14 ;abs 0x8360 { batt_volts = atoi(strstr(rxbuf,"VB:")+3); 8354: 3f 50 03 00 add #3, r15 ;#0x0003 8358: b0 12 60 9e call #0x9e60 835c: 81 4f 5a 00 mov r15, 90(r1) ;0x005a(r1) } if(strstr( rxbuf, "IB:" ) != NULL) 8360: 3e 40 b6 a9 mov #-22090,r14 ;#0xa9b6 8364: 0f 41 mov r1, r15 8366: 3f 52 add #8, r15 ;r2 As==11 8368: b0 12 0a 9e call #0x9e0a 836c: 0f 93 tst r15 836e: 21 24 jz $+68 ;abs 0x83b2 { batt_amps = atoi(strstr(rxbuf,"IB:")+3); 8370: 3f 50 03 00 add #3, r15 ;#0x0003 8374: b0 12 60 9e call #0x9e60 8378: 81 4f 5c 00 mov r15, 92(r1) ;0x005c(r1) if(t1-t0 < 20) //only add the current if the last packet was within 2 seconds. 837c: 1d 41 5e 00 mov 94(r1), r13 ;0x005e(r1) 8380: 1d 81 60 00 sub 96(r1), r13 ;0x0060(r1) 8384: 3d 90 14 00 cmp #20, r13 ;#0x0014 8388: 14 34 jge $+42 ;abs 0x83b2 batt_capacity_raw += batt_amps*(t1-t0); 838a: 2a 41 mov @r1, r10 838c: 1b 41 02 00 mov 2(r1), r11 ;0x0002(r1) 8390: 0e 4d mov r13, r14 8392: b0 12 56 8f call #0x8f56 8396: 81 4f 62 00 mov r15, 98(r1) ;0x0062(r1) 839a: 81 43 64 00 mov #0, 100(r1) ;r3 As==00, 0x0064(r1) 839e: 1c 41 62 00 mov 98(r1), r12 ;0x0062(r1) 83a2: 1d 41 64 00 mov 100(r1),r13 ;0x0064(r1) 83a6: 0c 5a add r10, r12 83a8: 0d 6b addc r11, r13 83aa: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 83ae: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) } if(strstr( rxbuf, "T:" ) != NULL) 83b2: 3e 40 ba a9 mov #-22086,r14 ;#0xa9ba 83b6: 0f 41 mov r1, r15 83b8: 3f 52 add #8, r15 ;r2 As==11 83ba: b0 12 0a 9e call #0x9e0a 83be: 0f 93 tst r15 83c0: 35 24 jz $+108 ;abs 0x842c { scooter_temp = atoi(strstr(rxbuf,"IB:")+2); 83c2: 3e 40 b6 a9 mov #-22090,r14 ;#0xa9b6 83c6: 0f 41 mov r1, r15 83c8: 3f 52 add #8, r15 ;r2 As==11 83ca: b0 12 0a 9e call #0x9e0a 83ce: 2f 53 incd r15 83d0: b0 12 60 9e call #0x9e60 83d4: 2b 3c jmp $+88 ;abs 0x842c //if(t1-t0 < 20) //only add the current if the last packet was within 2 seconds. // batt_capacity_raw += batt_amps/(t1-t0); } } else if(!memcmp("GND:GPS",rxbuf,7)) //packet addressed to us 83d6: 3d 40 07 00 mov #7, r13 ;#0x0007 83da: 0e 41 mov r1, r14 83dc: 3e 52 add #8, r14 ;r2 As==11 83de: 3f 40 bd a9 mov #-22083,r15 ;#0xa9bd 83e2: b0 12 80 9d call #0x9d80 83e6: 0f 93 tst r15 83e8: 21 20 jnz $+68 ;abs 0x842c dint(); loop = 1; P1OUT |= LED_RED; flags &= ~CONTROLLER_RDY; memset(rxbuf, 0, 64); length = RX_STRING(rxbuf, 64); 83ea: 86 11 sxt r6 } else if(!memcmp("GND:GPS",rxbuf,7)) //packet addressed to us { commacount = 0; gps_speed=1; for(i=0;i 0; degC-- ); // delay to allow reference to settle ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 847a: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 847e: b0 01 LPM3; 8480: 32 d0 d0 00 bis #208, r2 ;#0x00d0 traw = ADC10MEM; 8484: 91 42 b4 01 mov &0x01b4,72(r1) ;0x0048(r1) 8488: 48 00 848a: 81 43 4a 00 mov #0, 74(r1) ;r3 As==00, 0x004a(r1) 848e: 91 41 48 00 mov 72(r1), 4(r1) ;0x0048(r1), 0x0004(r1) 8492: 04 00 8494: 91 41 4a 00 mov 74(r1), 6(r1) ;0x004a(r1), 0x0006(r1) 8498: 06 00 ADC10CTL0 &= ~ENC; 849a: b2 f0 fd ff and #-3, &0x01b0 ;#0xfffd 849e: b0 01 ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 84a0: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 84a4: b0 01 //-16 allspice = -9.9 DMM ! AWECRAP! //6.1 //-22.7 = -16.3 //6 //Why is there a 6 degree difference? I swear! //Calibration is empty.. hmmm! degC = (((traw - 673) * 4230) / 1024); 84a6: 18 41 04 00 mov 4(r1), r8 ;0x0004(r1) 84aa: 19 41 06 00 mov 6(r1), r9 ;0x0006(r1) vbat = batt_volts * 0.03225404732254047322540473225405; 84ae: 1e 41 5a 00 mov 90(r1), r14 ;0x005a(r1) 84b2: 0f 43 clr r15 84b4: b0 12 74 98 call #0x9874 84b8: 3c 40 d2 1c mov #7378, r12 ;#0x1cd2 84bc: 3d 40 04 3d mov #15620, r13 ;#0x3d04 84c0: b0 12 7a 93 call #0x937a 84c4: 81 4e 52 00 mov r14, 82(r1) ;0x0052(r1) 84c8: 81 4f 54 00 mov r15, 84(r1) ;0x0054(r1) vbat_ipart = vbat; 84cc: b0 12 0a 90 call #0x900a 84d0: 81 4e 4c 00 mov r14, 76(r1) ;0x004c(r1) //3.95m = 2.5m*I //1.58 Amps //is 79 on the ADC //ibat = batt_amps * 0.03720930232558139534883720930233; ibat = batt_amps * 0.046629001883239171374764595103578; 84d4: 1e 41 5c 00 mov 92(r1), r14 ;0x005c(r1) 84d8: 0f 43 clr r15 84da: b0 12 74 98 call #0x9874 84de: 3c 40 0d fe mov #-499, r12 ;#0xfe0d 84e2: 3d 40 3e 3d mov #15678, r13 ;#0x3d3e 84e6: b0 12 7a 93 call #0x937a 84ea: 04 4e mov r14, r4 84ec: 05 4f mov r15, r5 ibat_ipart = ibat; 84ee: b0 12 0a 90 call #0x900a 84f2: 81 4e 4e 00 mov r14, 78(r1) ;0x004e(r1) batt_capacity = (batt_capacity_raw * 0.046629001883239171374764595103578)/(3600.0 * 10.0); //0.02 amps/adc 3600 seconds per hour, 10 centiseconds per second 84f6: 2c 41 mov @r1, r12 84f8: 1d 41 02 00 mov 2(r1), r13 ;0x0002(r1) 84fc: 0e 4c mov r12, r14 84fe: 0f 4d mov r13, r15 8500: b0 12 3e 97 call #0x973e 8504: 3c 40 0d fe mov #-499, r12 ;#0xfe0d 8508: 3d 40 3e 3d mov #15678, r13 ;#0x3d3e 850c: b0 12 7a 93 call #0x937a 8510: 3c 40 00 a0 mov #-24576,r12 ;#0xa000 8514: 3d 40 0c 47 mov #18188, r13 ;#0x470c 8518: b0 12 9e 95 call #0x959e 851c: 06 4e mov r14, r6 851e: 07 4f mov r15, r7 batt_capacity_ipart = batt_capacity; 8520: b0 12 0a 90 call #0x900a 8524: 81 4e 50 00 mov r14, 80(r1) ;0x0050(r1) degC += CAL_OFFSET_TEMP + 60; }*/ //length=sprintf(rxbuf, "GND:RZM %d.%d,%dmV", degC&0xFF,(degC>>8)&0xFF,volt); //send the temperature to the ground lcdInstr(LCD_CLEAR); 8528: 5f 43 mov.b #1, r15 ;r3 As==01 852a: b0 12 9a 8c call #0x8c9a length=snprintf(rxbuf, 17, "%dC %dmph %ld", degC/10,gps_speed,batt_capacity_raw); //send the temperature to the ground 852e: 2c 41 mov @r1, r12 8530: 1d 41 02 00 mov 2(r1), r13 ;0x0002(r1) 8534: 0d 12 push r13 8536: 0c 12 push r12 8538: 5d 41 5c 00 mov.b 92(r1), r13 ;0x005c(r1) 853c: 0d 12 push r13 //-16 allspice = -9.9 DMM ! AWECRAP! //6.1 //-22.7 = -16.3 //6 //Why is there a 6 degree difference? I swear! //Calibration is empty.. hmmm! degC = (((traw - 673) * 4230) / 1024); 853e: 0c 48 mov r8, r12 8540: 0d 49 mov r9, r13 8542: 0c 5c rla r12 8544: 0d 6d rlc r13 8546: 0c 5c rla r12 8548: 0d 6d rlc r13 854a: 0c 5c rla r12 854c: 0d 6d rlc r13 854e: 0c 5c rla r12 8550: 0d 6d rlc r13 8552: 0a 4c mov r12, r10 8554: 0b 4d mov r13, r11 8556: 0a 5a rla r10 8558: 0b 6b rlc r11 855a: 0a 5a rla r10 855c: 0b 6b rlc r11 855e: 0a 5a rla r10 8560: 0b 6b rlc r11 8562: 0a 5a rla r10 8564: 0b 6b rlc r11 8566: 0a 5a rla r10 8568: 0b 6b rlc r11 856a: 0c 5a add r10, r12 856c: 0d 6b addc r11, r13 856e: 0c 58 add r8, r12 8570: 0d 69 addc r9, r13 8572: 0c 5c rla r12 8574: 0d 6d rlc r13 8576: 0c 5c rla r12 8578: 0d 6d rlc r13 857a: 0c 88 sub r8, r12 857c: 0d 79 subc r9, r13 857e: 0c 5c rla r12 8580: 0d 6d rlc r13 8582: 0a 4c mov r12, r10 8584: 0b 4d mov r13, r11 8586: 3a 50 ba 8f add #-28742,r10 ;#0x8fba 858a: 3b 60 d4 ff addc #-44, r11 ;#0xffd4 858e: 0b 93 tst r11 8590: 06 34 jge $+14 ;abs 0x859e 8592: 0a 4c mov r12, r10 8594: 0b 4d mov r13, r11 8596: 3a 50 b9 93 add #-27719,r10 ;#0x93b9 859a: 3b 60 d4 ff addc #-44, r11 ;#0xffd4 859e: 0c 4a mov r10, r12 85a0: 0d 4b mov r11, r13 85a2: 0c 4a mov r10, r12 85a4: 8c 10 swpb r12 85a6: 8d 10 swpb r13 85a8: 4c ed xor.b r13, r12 85aa: 0c ed xor r13, r12 85ac: 8d 11 sxt r13 85ae: 0d 11 rra r13 85b0: 0c 10 rrc r12 85b2: 0d 11 rra r13 85b4: 0c 10 rrc r12 }*/ //length=sprintf(rxbuf, "GND:RZM %d.%d,%dmV", degC&0xFF,(degC>>8)&0xFF,volt); //send the temperature to the ground lcdInstr(LCD_CLEAR); length=snprintf(rxbuf, 17, "%dC %dmph %ld", degC/10,gps_speed,batt_capacity_raw); //send the temperature to the ground 85b6: 3e 40 0a 00 mov #10, r14 ;#0x000a 85ba: 0f 4c mov r12, r15 85bc: b0 12 90 8f call #0x8f90 85c0: 0f 12 push r15 85c2: 30 12 c5 a9 push #-22075 ;#0xa9c5 85c6: 30 12 11 00 push #17 ;#0x0011 85ca: 3f 40 14 00 mov #20, r15 ;#0x0014 85ce: 0f 51 add r1, r15 85d0: 0f 12 push r15 85d2: b0 12 64 9f call #0x9f64 85d6: 31 50 0e 00 add #14, r1 ;#0x000e lcdInstr(LCD_LINE1); 85da: 7f 40 80 ff mov.b #-128, r15 ;#0xff80 85de: b0 12 9a 8c call #0x8c9a lcdPuts(rxbuf); 85e2: 0f 41 mov r1, r15 85e4: 3f 52 add #8, r15 ;r2 As==11 85e6: b0 12 0a 8d call #0x8d0a length=snprintf(rxbuf, 17, "%d.%dV %02d.%dA %d.%02dC",vbat_ipart,(int)((vbat-vbat_ipart)*10),ibat_ipart,(int)((ibat-ibat_ipart)*10),batt_capacity_ipart,(int)((batt_capacity-batt_capacity_ipart)*100)); 85ea: 1e 41 50 00 mov 80(r1), r14 ;0x0050(r1) 85ee: 0f 43 clr r15 85f0: b0 12 74 98 call #0x9874 85f4: 0c 4e mov r14, r12 85f6: 0d 4f mov r15, r13 85f8: 0e 46 mov r6, r14 85fa: 0f 47 mov r7, r15 85fc: b0 12 2a 93 call #0x932a 8600: 0c 43 clr r12 8602: 3d 40 c8 42 mov #17096, r13 ;#0x42c8 8606: b0 12 7a 93 call #0x937a 860a: b0 12 e4 97 call #0x97e4 860e: 0e 12 push r14 8610: 11 12 54 00 push 84(r1) ;0x0054(r1) 8614: 1e 41 52 00 mov 82(r1), r14 ;0x0052(r1) 8618: 0f 43 clr r15 861a: b0 12 74 98 call #0x9874 861e: 0c 4e mov r14, r12 8620: 0d 4f mov r15, r13 8622: 0e 44 mov r4, r14 8624: 0f 45 mov r5, r15 8626: b0 12 2a 93 call #0x932a 862a: 0c 43 clr r12 862c: 3d 40 20 41 mov #16672, r13 ;#0x4120 8630: b0 12 7a 93 call #0x937a 8634: b0 12 e4 97 call #0x97e4 8638: 0e 12 push r14 863a: 11 12 56 00 push 86(r1) ;0x0056(r1) 863e: 1e 41 54 00 mov 84(r1), r14 ;0x0054(r1) 8642: 0f 43 clr r15 8644: b0 12 74 98 call #0x9874 8648: 0c 4e mov r14, r12 864a: 0d 4f mov r15, r13 864c: 1e 41 5a 00 mov 90(r1), r14 ;0x005a(r1) 8650: 1f 41 5c 00 mov 92(r1), r15 ;0x005c(r1) 8654: b0 12 2a 93 call #0x932a 8658: 0c 43 clr r12 865a: 3d 40 20 41 mov #16672, r13 ;#0x4120 865e: b0 12 7a 93 call #0x937a 8662: b0 12 e4 97 call #0x97e4 8666: 0e 12 push r14 8668: 11 12 58 00 push 88(r1) ;0x0058(r1) 866c: 30 12 d3 a9 push #-22061 ;#0xa9d3 8670: 30 12 11 00 push #17 ;#0x0011 8674: 3f 40 18 00 mov #24, r15 ;#0x0018 8678: 0f 51 add r1, r15 867a: 0f 12 push r15 867c: b0 12 64 9f call #0x9f64 8680: 31 50 12 00 add #18, r1 ;#0x0012 lcdInstr(LCD_LINE2); 8684: 7f 40 c0 ff mov.b #-64, r15 ;#0xffc0 8688: b0 12 9a 8c call #0x8c9a lcdPuts(rxbuf); 868c: 0f 41 mov r1, r15 868e: 3f 52 add #8, r15 ;r2 As==11 8690: b0 12 0a 8d call #0x8d0a //TX_STRING(rxbuf,length); //P2IFG &= ~GDO0; //clear our soiled GDO0 register //RX_MODE(); P1OUT &= ~LED_RED; 8694: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 8698: 21 00 eint(); 869a: 32 d2 eint 869c: 30 40 7a 81 br #0x817a } } if(loop == 0) 86a0: 4c 93 tst.b r12 86a2: 02 24 jz $+6 ;abs 0x86a8 86a4: 30 40 7a 81 br #0x817a LPM3; //when we wake up it'll be because of an event 86a8: 32 d0 d0 00 bis #208, r2 ;#0x00d0 86ac: 30 40 7a 81 br #0x817a 000086b0 <__stop_progExec__>: 86b0: 32 d0 f0 00 bis #240, r2 ;#0x00f0 86b4: fd 3f jmp $-4 ;abs 0x86b0 000086b6 <__ctors_end>: 86b6: 30 40 f4 a8 br #0xa8f4 000086ba : This interrupt is caused by external pin events on handshake lines */ // Port 2 interripts : the allspice controller is talking to us interrupt (PORT2_VECTOR) P2_VEC(void) { 86ba: 0f 12 push r15 dint(); //no nesting! 86bc: 32 c2 dint 86be: 03 43 nop if((P2IFG & GDO0) == GDO0) 86c0: 5f 42 2b 00 mov.b &0x002b,r15 86c4: 3f f0 40 00 and #64, r15 ;#0x0040 86c8: 05 24 jz $+12 ;abs 0x86d4 { flags |= CONTROLLER_RDY; 86ca: a2 d3 0a 02 bis #2, &0x020a ;r3 As==10 LPM3_EXIT; 86ce: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 86d2: 02 00 //We need to grab that byte! } P2IFG=0x00; 86d4: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 eint(); 86d8: 32 d2 eint } 86da: 3f 41 pop r15 86dc: 00 13 reti 000086de : */ // Port 2 interripts : the allspice controller is talking to us interrupt (ADC10_VECTOR) ADC_VEC(void) { dint(); //no nesting! 86de: 32 c2 dint 86e0: 03 43 nop LPM3_EXIT; 86e2: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 86e6: 00 00 eint(); 86e8: 32 d2 eint } 86ea: 00 13 reti 000086ec : /** This is called once every overflow */ interrupt (TIMERA1_VECTOR) TA1_VEC(void) { 86ec: 0f 12 push r15 dint(); //no nesting! 86ee: 32 c2 dint 86f0: 03 43 nop if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 86f2: 1f 42 2e 01 mov &0x012e,r15 86f6: 3f 90 0a 00 cmp #10, r15 ;#0x000a 86fa: 03 24 jz $+8 ;abs 0x8702 flags |= TIMER_UP; seconds++; TACTL &= ~TAIFG; //clear the flag LPM3_EXIT; } eint(); 86fc: 32 d2 eint } 86fe: 3f 41 pop r15 8700: 00 13 reti dint(); //no nesting! if(TAIV == 0x0A) //reading this bit will clear the interrupt flags { //P1OUT ^= LED_RED; flags |= TIMER_UP; 8702: 92 d3 0a 02 bis #1, &0x020a ;r3 As==01 seconds++; 8706: 92 53 06 02 inc &0x0206 TACTL &= ~TAIFG; //clear the flag 870a: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 870e: 60 01 LPM3_EXIT; 8710: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8714: 02 00 } eint(); 8716: 32 d2 eint } 8718: 3f 41 pop r15 871a: 00 13 reti 0000871c : /** This is called once for every RS232 character that comes in */ interrupt (USCIAB0RX_VECTOR) RX_VEC(void) { 871c: 0f 12 push r15 dint(); //no nesting! 871e: 32 c2 dint 8720: 03 43 nop rx_char = UCA0RXBUF; 8722: d2 42 66 00 mov.b &0x0066,&0x020d 8726: 0d 02 flags |= RXCHAR_RDY; 8728: b2 d2 0a 02 bis #8, &0x020a ;r2 As==11 LPM3_EXIT; 872c: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8730: 02 00 eint(); 8732: 32 d2 eint } 8734: 3f 41 pop r15 8736: 00 13 reti 00008738 : /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { 8738: 0b 12 push r11 873a: 0a 12 push r10 TACCTL0 = CCIE; // TACCR0 interrupt enabled 873c: b2 40 10 00 mov #16, &0x0162 ;#0x0010 8740: 62 01 TACTL = TASSEL_1; // ACLK, upmode 8742: b2 40 00 01 mov #256, &0x0160 ;#0x0100 8746: 60 01 TACTL &= ~TAIFG; //clear interrupt 8748: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 874c: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 874e: 0c 43 clr r12 8750: 0e 4f mov r15, r14 8752: 0f 4c mov r12, r15 8754: 0e 5e rla r14 8756: 0f 6f rlc r15 8758: 0e 5e rla r14 875a: 0f 6f rlc r15 875c: 0e 5e rla r14 875e: 0f 6f rlc r15 8760: 0e 5e rla r14 8762: 0f 6f rlc r15 8764: 0e 5e rla r14 8766: 0f 6f rlc r15 8768: 0c 4e mov r14, r12 876a: 0d 4f mov r15, r13 876c: 0c 5c rla r12 876e: 0d 6d rlc r13 8770: 0c 5c rla r12 8772: 0d 6d rlc r13 8774: 0e 5c add r12, r14 8776: 0f 6d addc r13, r15 8778: 0c 4e mov r14, r12 877a: 0d 4f mov r15, r13 877c: 0c 5c rla r12 877e: 0d 6d rlc r13 8780: 0c 5c rla r12 8782: 0d 6d rlc r13 8784: 0a 4e mov r14, r10 8786: 0b 4f mov r15, r11 8788: 0a 5c add r12, r10 878a: 0b 6d addc r13, r11 878c: 0e 4a mov r10, r14 878e: 0f 4b mov r11, r15 8790: 0e 5e rla r14 8792: 0f 6f rlc r15 8794: 0e 5e rla r14 8796: 0f 6f rlc r15 8798: 0e 5e rla r14 879a: 0f 6f rlc r15 879c: 0e 5e rla r14 879e: 0f 6f rlc r15 87a0: 3c 40 e8 03 mov #1000, r12 ;#0x03e8 87a4: 0d 43 clr r13 87a6: 0e 8a sub r10, r14 87a8: 0f 7b subc r11, r15 87aa: b0 12 ca 8f call #0x8fca 87ae: 82 4e 72 01 mov r14, &0x0172 //TACCR0 = 12000; // ~1 second TAR = 0; 87b2: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 87b6: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 87ba: 60 01 } 87bc: 3a 41 pop r10 87be: 3b 41 pop r11 87c0: 30 41 ret 000087c2 : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 87f0: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 87f4: 20 01 P1OUT = P1OUT_INIT; //Init output data of port1 87f6: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 P2OUT = P2OUT_INIT; //Init output data of port2 87fa: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 P3OUT = P3OUT_INIT; 87fe: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 P4OUT = P4OUT_INIT; 8802: c2 43 1d 00 mov.b #0, &0x001d ;r3 As==00 P1SEL = P1SEL_INIT; //Select port or module -function on port1 8806: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 P2SEL = P2SEL_INIT; //Select port or module -function on port2 880a: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 P3SEL = P3SEL_INIT; 880e: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 8812: 1b 00 P4SEL = P4SEL_INIT; 8814: c2 43 1f 00 mov.b #0, &0x001f ;r3 As==00 P1DIR = P1DIR_INIT; //Init port direction register of port1 8818: f2 40 fb ff mov.b #-5, &0x0022 ;#0xfffb 881c: 22 00 P2DIR = P2DIR_INIT; //Init port direction register of port2 881e: f2 40 3f 00 mov.b #63, &0x002a ;#0x003f 8822: 2a 00 P3DIR = P3DIR_INIT; 8824: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 8828: 1a 00 P4DIR = P4DIR_INIT; 882a: f2 43 1e 00 mov.b #-1, &0x001e ;r3 As==11 P1IES = P1IES_INIT; //init port interrupts 882e: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 P2IES = P2IES_INIT; 8832: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 8836: 2c 00 P1IE = P1IE_INIT; 8838: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 P2IE = P2IE_INIT; 883c: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 8840: 2d 00 BCSCTL1 = CALBC1_12MHZ; // Set DCO 8842: d2 42 fb 10 mov.b &0x10fb,&0x0057 8846: 57 00 DCOCTL = CALDCO_12MHZ; 8848: d2 42 fa 10 mov.b &0x10fa,&0x0056 884c: 56 00 BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 884e: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 8852: 53 00 } 8854: 30 41 ret 00008856 : /**init the ADC10 */ void init_adc() { //ADC10AE = ADC_0_IN | ADC_2_IN; ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 8856: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 885a: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 885c: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8860: b2 01 } 8862: 30 41 ret 00008864 : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 8864: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8868: b0 01 while(ADC10CTL1 & ADC10BUSY); 886a: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 886e: fd 23 jnz $-4 ;abs 0x886a return ADC10MEM; 8870: 1f 42 b4 01 mov &0x01b4,r15 } 8874: 30 41 ret 00008876 : int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel 8876: b2 f0 fd ff and #-3, &0x01b0 ;#0xfffd 887a: b0 01 if(chan == INCH_TEMP) ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor 887c: 1e 42 b0 01 mov &0x01b0,r14 } int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel if(chan == INCH_TEMP) 8880: 3f 90 00 a0 cmp #-24576,r15 ;#0xa000 8884: 10 24 jz $+34 ;abs 0x88a6 ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor else ADC10CTL0 &= ~SREF_VREF_AVSS; //set the ref to VCC for the external sensors 8886: 3e f0 ff df and #-8193, r14 ;#0xdfff 888a: 82 4e b0 01 mov r14, &0x01b0 ADC10CTL1 = ADC10SSEL_ACLK | chan; //ACLK sourced, A2 input 888e: 3f d2 bis #8, r15 ;r2 As==11 8890: 82 4f b2 01 mov r15, &0x01b2 ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 8894: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8898: b0 01 while(ADC10CTL1 & ADC10BUSY); 889a: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 889e: fd 23 jnz $-4 ;abs 0x889a return ADC10MEM; 88a0: 1f 42 b4 01 mov &0x01b4,r15 } 88a4: 30 41 ret int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel if(chan == INCH_TEMP) ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor 88a6: 3e d0 00 20 bis #8192, r14 ;#0x2000 88aa: 82 4e b0 01 mov r14, &0x01b0 88ae: ef 3f jmp $-32 ;abs 0x888e 000088b0 : } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 88b0: 1e 93 cmp #1, r14 ;r3 As==01 88b2: 0c 38 jl $+26 ;abs 0x88cc 88b4: 0c 43 clr r12 ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start while(ADC10CTL1 & ADC10BUSY); return ADC10MEM; } void TX232String( char* string, int length ) 88b6: 0d 4f mov r15, r13 88b8: 0d 5c add r12, r13 { int pointer; for( pointer = 0; pointer < length; pointer++) { volatile int i; UCA0TXBUF = string[pointer]; 88ba: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 88be: 5d 42 03 00 mov.b &0x0003,r13 88c2: 2d f3 and #2, r13 ;r3 As==10 88c4: fc 27 jz $-6 ;abs 0x88be } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 88c6: 1c 53 inc r12 88c8: 0c 9e cmp r14, r12 88ca: f5 23 jnz $-20 ;abs 0x88b6 88cc: 30 41 ret 000088ce : } } void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 88ce: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 88d2: 61 00 //UCA0BR1 = 0x3; //UCA0BR0 = 0x82; // 9600 from 16Mhz //UCA0BR1 = 0x6; UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 88d4: f2 40 e2 ff mov.b #-30, &0x0062 ;#0xffe2 88d8: 62 00 88da: e2 42 63 00 mov.b #4, &0x0063 ;r2 As==10 UCA0MCTL = UCBRS_2; 88de: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 88e2: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe 88e6: 61 00 IE2 |= UCA0RXIE; 88e8: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 } 88ec: 30 41 ret 000088ee : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 88ee: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 88f2: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 88f6: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 88f8: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 88fc: 68 00 UCB0BR0 = 2; 88fe: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 8902: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 8906: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 890a: 69 00 } 890c: 30 41 ret 0000890e : void CCXX_WRITE_SPI_RF_SETTINGS() { // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 890e: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8912: 4f 43 clr.b r15 8914: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 8918: 7e 40 06 00 mov.b #6, r14 ;#0x0006 891c: 6f 43 mov.b #2, r15 ;r3 As==10 891e: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 8922: 7e 40 3c 00 mov.b #60, r14 ;#0x003c 8926: 7f 40 06 00 mov.b #6, r15 ;#0x0006 892a: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 892e: 6e 42 mov.b #4, r14 ;r2 As==10 8930: 7f 40 07 00 mov.b #7, r15 ;#0x0007 8934: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 8938: 7e 40 05 00 mov.b #5, r14 ;#0x0005 893c: 7f 42 mov.b #8, r15 ;r2 As==11 893e: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 8942: 5e 43 mov.b #1, r14 ;r3 As==01 8944: 7f 40 09 00 mov.b #9, r15 ;#0x0009 8948: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 894c: 7e 40 9a ff mov.b #-102, r14 ;#0xff9a 8950: 7f 40 0a 00 mov.b #10, r15 ;#0x000a 8954: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 8958: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 895c: 7f 40 0b 00 mov.b #11, r15 ;#0x000b 8960: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 8964: 4e 43 clr.b r14 8966: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 896a: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 896e: 7e 40 5c 00 mov.b #92, r14 ;#0x005c 8972: 7f 40 0d 00 mov.b #13, r15 ;#0x000d 8976: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 897a: 7e 40 4f 00 mov.b #79, r14 ;#0x004f 897e: 7f 40 0e 00 mov.b #14, r15 ;#0x000e 8982: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 8986: 7e 40 c0 ff mov.b #-64, r14 ;#0xffc0 898a: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 898e: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 8992: 7e 40 2d 00 mov.b #45, r14 ;#0x002d 8996: 7f 40 10 00 mov.b #16, r15 ;#0x0010 899a: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 899e: 7e 40 3b 00 mov.b #59, r14 ;#0x003b 89a2: 7f 40 11 00 mov.b #17, r15 ;#0x0011 89a6: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 89aa: 7e 40 73 00 mov.b #115, r14 ;#0x0073 89ae: 7f 40 12 00 mov.b #18, r15 ;#0x0012 89b2: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 89b6: 7e 40 23 00 mov.b #35, r14 ;#0x0023 89ba: 7f 40 13 00 mov.b #19, r15 ;#0x0013 89be: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 89c2: 7e 40 b9 ff mov.b #-71, r14 ;#0xffb9 89c6: 7f 40 14 00 mov.b #20, r15 ;#0x0014 89ca: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 89ce: 5e 43 mov.b #1, r14 ;r3 As==01 89d0: 7f 40 15 00 mov.b #21, r15 ;#0x0015 89d4: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 89d8: 7e 40 33 00 mov.b #51, r14 ;#0x0033 89dc: 7f 40 17 00 mov.b #23, r15 ;#0x0017 89e0: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 89e4: 7e 40 18 00 mov.b #24, r14 ;#0x0018 89e8: 7f 40 18 00 mov.b #24, r15 ;#0x0018 89ec: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 89f0: 7e 40 1d 00 mov.b #29, r14 ;#0x001d 89f4: 7f 40 19 00 mov.b #25, r15 ;#0x0019 89f8: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 89fc: 7e 40 1c 00 mov.b #28, r14 ;#0x001c 8a00: 7f 40 1a 00 mov.b #26, r15 ;#0x001a 8a04: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 8a08: 7e 40 c7 ff mov.b #-57, r14 ;#0xffc7 8a0c: 7f 40 1b 00 mov.b #27, r15 ;#0x001b 8a10: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 8a14: 4e 43 clr.b r14 8a16: 7f 40 1c 00 mov.b #28, r15 ;#0x001c 8a1a: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 8a1e: 7e 40 b0 ff mov.b #-80, r14 ;#0xffb0 8a22: 7f 40 1d 00 mov.b #29, r15 ;#0x001d 8a26: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 8a2a: 7e 40 b6 ff mov.b #-74, r14 ;#0xffb6 8a2e: 7f 40 21 00 mov.b #33, r15 ;#0x0021 8a32: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 8a36: 7e 40 10 00 mov.b #16, r14 ;#0x0010 8a3a: 7f 40 22 00 mov.b #34, r15 ;#0x0022 8a3e: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 8a42: 7e 40 ea ff mov.b #-22, r14 ;#0xffea 8a46: 7f 40 23 00 mov.b #35, r15 ;#0x0023 8a4a: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 8a4e: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 8a52: 7f 40 24 00 mov.b #36, r15 ;#0x0024 8a56: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 8a5a: 4e 43 clr.b r14 8a5c: 7f 40 25 00 mov.b #37, r15 ;#0x0025 8a60: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 8a64: 7e 40 11 00 mov.b #17, r14 ;#0x0011 8a68: 7f 40 26 00 mov.b #38, r15 ;#0x0026 8a6c: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 8a70: 7e 40 59 00 mov.b #89, r14 ;#0x0059 8a74: 7f 40 29 00 mov.b #41, r15 ;#0x0029 8a78: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 8a7c: 7e 40 88 ff mov.b #-120, r14 ;#0xff88 8a80: 7f 40 2c 00 mov.b #44, r15 ;#0x002c 8a84: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 8a88: 7e 40 31 00 mov.b #49, r14 ;#0x0031 8a8c: 7f 40 2d 00 mov.b #45, r15 ;#0x002d 8a90: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 8a94: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8a98: 7f 40 2e 00 mov.b #46, r15 ;#0x002e 8a9c: b0 12 94 8e call #0x8e94 CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 8aa0: 7e 43 mov.b #-1, r14 ;r3 As==11 8aa2: 7f 40 3e 00 mov.b #62, r15 ;#0x003e 8aa6: b0 12 94 8e call #0x8e94 } 8aaa: 30 41 ret 00008aac : Interrupt driven! yay! */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); 8aac: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8ab0: b0 12 fe 8d call #0x8dfe while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8ab4: f2 90 0f 00 cmp.b #15, &0x020c ;#0x000f 8ab8: 0c 02 8aba: 08 24 jz $+18 ;abs 0x8acc CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8abc: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8ac0: b0 12 fe 8d call #0x8dfe */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8ac4: f2 90 0f 00 cmp.b #15, &0x020c ;#0x000f 8ac8: 0c 02 8aca: f8 23 jnz $-14 ;abs 0x8abc CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 8acc: 7f 40 34 00 mov.b #52, r15 ;#0x0034 8ad0: b0 12 fe 8d call #0x8dfe } 8ad4: 30 41 ret 00008ad6 : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 8ad6: 0b 12 push r11 8ad8: 0a 12 push r10 8ada: 09 12 push r9 8adc: 08 12 push r8 8ade: 07 12 push r7 8ae0: 06 12 push r6 8ae2: 07 4f mov r15, r7 8ae4: 48 4e mov.b r14, r8 //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 8ae6: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8aea: b0 12 36 8e call #0x8e36 8aee: 49 4f mov.b r15, r9 real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 8af0: 7f 40 3b 00 mov.b #59, r15 ;#0x003b 8af4: b0 12 36 8e call #0x8e36 8af8: 46 4f mov.b r15, r6 for(i=0; i < length && i < pkt_length; i++) 8afa: 48 93 tst.b r8 8afc: 59 24 jz $+180 ;abs 0x8bb0 8afe: 49 93 tst.b r9 8b00: 5b 24 jz $+184 ;abs 0x8bb8 8b02: 0a 47 mov r7, r10 8b04: 4b 43 clr.b r11 8b06: 03 3c jmp $+8 ;abs 0x8b0e 8b08: 1a 53 inc r10 8b0a: 49 9b cmp.b r11, r9 8b0c: 41 24 jz $+132 ;abs 0x8b90 { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 8b0e: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8b12: b0 12 36 8e call #0x8e36 8b16: ca 4f 00 00 mov.b r15, 0(r10) ;0x0000(r10) //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8b1a: 5b 53 inc.b r11 8b1c: 4b 98 cmp.b r8, r11 8b1e: f4 23 jnz $-22 ;abs 0x8b08 8b20: 4e 4b mov.b r11, r14 8b22: 4a 49 mov.b r9, r10 { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte //GPSbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 8b24: 0e 57 add r7, r14 8b26: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 8b2a: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8b2e: b0 12 36 8e call #0x8e36 8b32: c2 4f 05 02 mov.b r15, &0x0205 LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 8b36: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8b3a: b0 12 36 8e call #0x8e36 8b3e: c2 4f 08 02 mov.b r15, &0x0208 PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 8b42: 7f 40 38 00 mov.b #56, r15 ;#0x0038 8b46: b0 12 36 8e call #0x8e36 8b4a: c2 4f 09 02 mov.b r15, &0x0209 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 8b4e: 4e 46 mov.b r6, r14 8b50: 2a 53 incd r10 8b52: 0e 9a cmp r10, r14 8b54: 03 24 jz $+8 ;abs 0x8b5c LQI &= ~bit7; //force it to be INVALID! 8b56: f2 f0 7f 00 and.b #127, &0x0208 ;#0x007f 8b5a: 08 02 if (RSSI >= 128) 8b5c: 5e 42 05 02 mov.b &0x0205,r14 8b60: 4e 93 tst.b r14 8b62: 1a 38 jl $+54 ;abs 0x8b98 RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; 8b64: 12 c3 clrc 8b66: 4e 10 rrc.b r14 8b68: 7e 50 b8 ff add.b #-72, r14 ;#0xffb8 8b6c: c2 4e 04 02 mov.b r14, &0x0204 CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 8b70: 7f 40 3a 00 mov.b #58, r15 ;#0x003a 8b74: b0 12 fe 8d call #0x8dfe CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 8b78: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8b7c: b0 12 fe 8d call #0x8dfe return i; //i = real length } 8b80: 4f 4b mov.b r11, r15 8b82: 36 41 pop r6 8b84: 37 41 pop r7 8b86: 38 41 pop r8 8b88: 39 41 pop r9 8b8a: 3a 41 pop r10 8b8c: 3b 41 pop r11 8b8e: 30 41 ret //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8b90: 4a 49 mov.b r9, r10 8b92: 0e 4a mov r10, r14 8b94: 4b 49 mov.b r9, r11 8b96: c6 3f jmp $-114 ;abs 0x8b24 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8b98: 4e 4e mov.b r14, r14 8b9a: 0f 4e mov r14, r15 8b9c: 3f 50 00 ff add #-256, r15 ;#0xff00 8ba0: 0f 93 tst r15 8ba2: 0e 38 jl $+30 ;abs 0x8bc0 8ba4: 0f 11 rra r15 8ba6: 7f 50 b8 ff add.b #-72, r15 ;#0xffb8 8baa: c2 4f 04 02 mov.b r15, &0x0204 8bae: e0 3f jmp $-62 ;abs 0x8b70 //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8bb0: 4b 43 clr.b r11 8bb2: 0e 43 clr r14 8bb4: 4a 49 mov.b r9, r10 8bb6: b6 3f jmp $-146 ;abs 0x8b24 8bb8: 4b 43 clr.b r11 8bba: 0e 43 clr r14 8bbc: 0a 43 clr r10 8bbe: b2 3f jmp $-154 ;abs 0x8b24 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8bc0: 1f 53 inc r15 8bc2: f0 3f jmp $-30 ;abs 0x8ba4 00008bc4 : /** Transmit a string of bytes. */ void TX_STRING(unsigned char *txstring, unsigned char length) { 8bc4: 0b 12 push r11 8bc6: 0a 12 push r10 8bc8: 0b 4f mov r15, r11 8bca: 4a 4e mov.b r14, r10 unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8bcc: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8bd0: b0 12 fe 8d call #0x8dfe }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 8bd4: 5f 42 0c 02 mov.b &0x020c,r15 8bd8: 3f b0 70 00 bit #112, r15 ;#0x0070 8bdc: f7 23 jnz $-16 ;abs 0x8bcc { if(i < length) CCXX_SPI_WRREG(CCxxx0_TXFIFO, txstring[i]);//Write data to FIFO }*/ CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8bde: 4d 4a mov.b r10, r13 8be0: 0e 4b mov r11, r14 8be2: 7f 40 7f 00 mov.b #127, r15 ;#0x007f 8be6: b0 12 e2 8e call #0x8ee2 CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8bea: 7f 40 35 00 mov.b #53, r15 ;#0x0035 8bee: b0 12 fe 8d call #0x8dfe do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8bf2: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8bf6: b0 12 fe 8d call #0x8dfe if(status == 31) //fast RX mode yay 8bfa: 5f 42 0c 02 mov.b &0x020c,r15 8bfe: 7f 90 1f 00 cmp.b #31, r15 ;#0x001f 8c02: 03 24 jz $+8 ;abs 0x8c0a break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 8c04: 3f b0 70 00 bit #112, r15 ;#0x0070 8c08: f4 23 jnz $-22 ;abs 0x8bf2 } 8c0a: 3a 41 pop r10 8c0c: 3b 41 pop r11 8c0e: 30 41 ret 00008c10 : //first arg comes in register R15 //the loop uses 3 cycles per round //the eight cycles come from the call overhead and ret // //delay_time = (1/MCLK)*(8+(3*n)) asm("lcdloop: dec %0\n jnz lcdloop\n ret" :: "r" (n)); 8c10: 1f 83 dec r15 8c12: fe 23 jnz $-2 ;abs 0x8c10 8c14: 30 41 ret 00008c16 : lcdDelay(LCDDELAY1MS*5); //wait until instr is finished } void lcdPutc( char c ) { P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8c16: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8c1a: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8c1c: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8c20: 29 00 P4OUT |= LCD_RS; 8c22: f2 d2 1d 00 bis.b #8, &0x001d ;r2 As==11 P2OUT |= (c >> 4) & 0x0F;//output upper nibble 8c26: 5d 42 29 00 mov.b &0x0029,r13 8c2a: 4e 4f mov.b r15, r14 8c2c: 12 c3 clrc 8c2e: 4e 10 rrc.b r14 8c30: 12 c3 clrc 8c32: 4e 10 rrc.b r14 8c34: 12 c3 clrc 8c36: 4e 10 rrc.b r14 8c38: 12 c3 clrc 8c3a: 4e 10 rrc.b r14 8c3c: 4e dd bis.b r13, r14 8c3e: c2 4e 29 00 mov.b r14, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8c42: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8c46: 1d 00 nop(); 8c48: 03 43 nop nop(); 8c4a: 03 43 nop nop(); 8c4c: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8c4e: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8c52: 1d 00 P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8c54: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8c58: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8c5a: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8c5e: 29 00 P4OUT |= LCD_RS; 8c60: f2 d2 1d 00 bis.b #8, &0x001d ;r2 As==11 P2OUT |= (c & 0x0F); //and then the lower nibble 8c64: 5e 42 29 00 mov.b &0x0029,r14 8c68: 7f f0 0f 00 and.b #15, r15 ;#0x000f 8c6c: 4f de bis.b r14, r15 8c6e: c2 4f 29 00 mov.b r15, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8c72: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8c76: 1d 00 nop(); 8c78: 03 43 nop nop(); 8c7a: 03 43 nop nop(); 8c7c: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8c7e: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8c82: 1d 00 lcdDelay(LCDDELAY1MS); //wait until instr is finished 8c84: 3f 40 d0 07 mov #2000, r15 ;#0x07d0 8c88: b0 12 10 8c call #0x8c10 P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8c8c: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8c90: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8c92: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8c96: 29 00 } 8c98: 30 41 ret 00008c9a : P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); } void lcdInstr( char cmd ) { P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8c9a: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8c9e: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8ca0: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8ca4: 29 00 P2OUT |= (cmd >> 4) & 0x0F; //output upper nibble 8ca6: 5d 42 29 00 mov.b &0x0029,r13 8caa: 4e 4f mov.b r15, r14 8cac: 12 c3 clrc 8cae: 4e 10 rrc.b r14 8cb0: 12 c3 clrc 8cb2: 4e 10 rrc.b r14 8cb4: 12 c3 clrc 8cb6: 4e 10 rrc.b r14 8cb8: 12 c3 clrc 8cba: 4e 10 rrc.b r14 8cbc: 4e dd bis.b r13, r14 8cbe: c2 4e 29 00 mov.b r14, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8cc2: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8cc6: 1d 00 nop(); 8cc8: 03 43 nop nop(); 8cca: 03 43 nop nop(); 8ccc: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8cce: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8cd2: 1d 00 P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8cd4: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8cd8: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8cda: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8cde: 29 00 P2OUT |= (cmd & 0x0F);//and then the lower nibble 8ce0: 5e 42 29 00 mov.b &0x0029,r14 8ce4: 7f f0 0f 00 and.b #15, r15 ;#0x000f 8ce8: 4f de bis.b r14, r15 8cea: c2 4f 29 00 mov.b r15, &0x0029 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8cee: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8cf2: 1d 00 nop(); 8cf4: 03 43 nop nop(); 8cf6: 03 43 nop nop(); 8cf8: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8cfa: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8cfe: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait until instr is finished 8d00: 3f 40 10 27 mov #10000, r15 ;#0x2710 8d04: b0 12 10 8c call #0x8c10 } 8d08: 30 41 ret 00008d0a : //delay_time = (1/MCLK)*(8+(3*n)) asm("lcdloop: dec %0\n jnz lcdloop\n ret" :: "r" (n)); } void lcdPuts( char * str ) { 8d0a: 0b 12 push r11 8d0c: 0b 4f mov r15, r11 while (*str != 0) { 8d0e: 6f 4f mov.b @r15, r15 8d10: 4f 93 tst.b r15 8d12: 06 24 jz $+14 ;abs 0x8d20 lcdPutc(*str++); //write char and increment pointer 8d14: 1b 53 inc r11 8d16: b0 12 16 8c call #0x8c16 asm("lcdloop: dec %0\n jnz lcdloop\n ret" :: "r" (n)); } void lcdPuts( char * str ) { while (*str != 0) { 8d1a: 6f 4b mov.b @r11, r15 8d1c: 4f 93 tst.b r15 8d1e: fa 23 jnz $-10 ;abs 0x8d14 lcdPutc(*str++); //write char and increment pointer } } 8d20: 3b 41 pop r11 8d22: 30 41 ret 00008d24 : /** Wait until LCD signals that it is ready */ void lcdBusy(unsigned int time) { 8d24: 0b 12 push r11 unsigned int time2=time; while(time2 > 0) 8d26: 0f 93 tst r15 8d28: 07 24 jz $+16 ;abs 0x8d38 8d2a: 0b 4f mov r15, r11 { lcdDelay(LCDDELAY1MS); 8d2c: 3f 40 d0 07 mov #2000, r15 ;#0x07d0 8d30: b0 12 10 8c call #0x8c10 time2--; 8d34: 3b 53 add #-1, r11 ;r3 As==11 Wait until LCD signals that it is ready */ void lcdBusy(unsigned int time) { unsigned int time2=time; while(time2 > 0) 8d36: fa 23 jnz $-10 ;abs 0x8d2c { lcdDelay(LCDDELAY1MS); time2--; } } 8d38: 3b 41 pop r11 8d3a: 30 41 ret 00008d3c : } void lcdInit( void ) { // set the 2-line display mode lcdInstr(LCD_FUNCTIONSET | LCD_2LINES); 8d3c: 7f 40 28 00 mov.b #40, r15 ;#0x0028 8d40: b0 12 9a 8c call #0x8c9a //lcdInstr(LCD_DISP_CTRL); //display off lcdInstr(LCD_CLEAR); 8d44: 5f 43 mov.b #1, r15 ;r3 As==01 8d46: b0 12 9a 8c call #0x8c9a lcdBusy(10); 8d4a: 3f 40 0a 00 mov #10, r15 ;#0x000a 8d4e: b0 12 24 8d call #0x8d24 //lcdInstr(LCD_ENTRYMODE | LCD_INC); lcdInstr(LCD_CURSORON); 8d52: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 8d56: b0 12 9a 8c call #0x8c9a //lcdInstr(LCD_DISP_CTRL); lcdInstr(LCD_CURSOROFF); //hide cursor 8d5a: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 8d5e: b0 12 9a 8c call #0x8c9a //lcdInstr(LCD_CLEAR); //clear display } 8d62: 30 41 ret 00008d64 : /** Turn on the LCD and initialize it to 4 bit interface. */ void lcdOn( void ) { P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); //reset pins 8d64: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8d68: 29 00 P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8d6a: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8d6e: 1d 00 lcdBusy(100); //wait more than 30ms 8d70: 3f 40 64 00 mov #100, r15 ;#0x0064 8d74: b0 12 24 8d call #0x8d24 //send the reset sequece (3 times the same pattern) //P4OUT |= LCD_RS; //set 8 bit interface P2OUT |= LCD_D4 | LCD_D5; 8d78: f2 d0 03 00 bis.b #3, &0x0029 ;#0x0003 8d7c: 29 00 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8d7e: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8d82: 1d 00 nop(); 8d84: 03 43 nop nop(); 8d86: 03 43 nop nop(); 8d88: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8d8a: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8d8e: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait > 4.1 8d90: 3f 40 10 27 mov #10000, r15 ;#0x2710 8d94: b0 12 10 8c call #0x8c10 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8d98: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8d9c: 1d 00 nop(); 8d9e: 03 43 nop nop(); 8da0: 03 43 nop nop(); 8da2: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8da4: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8da8: 1d 00 lcdDelay(LCDDELAY1MS); //wait > 100us 8daa: 3f 40 d0 07 mov #2000, r15 ;#0x07d0 8dae: b0 12 10 8c call #0x8c10 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8db2: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8db6: 1d 00 nop(); 8db8: 03 43 nop nop(); 8dba: 03 43 nop nop(); 8dbc: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8dbe: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8dc2: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait a bit 8dc4: 3f 40 10 27 mov #10000, r15 ;#0x2710 8dc8: b0 12 10 8c call #0x8c10 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8dcc: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8dd0: 29 00 P2OUT |= LCD_D5; //set into nibble mode 8dd2: e2 d3 29 00 bis.b #2, &0x0029 ;r3 As==10 P4OUT |= LCD_E; //toggle LCD_E, the enable pin 8dd6: f2 d0 10 00 bis.b #16, &0x001d ;#0x0010 8dda: 1d 00 nop(); 8ddc: 03 43 nop nop(); 8dde: 03 43 nop nop(); 8de0: 03 43 nop P4OUT &= ~LCD_E; //back to inactive position 8de2: f2 f0 ef ff and.b #-17, &0x001d ;#0xffef 8de6: 1d 00 lcdDelay(LCDDELAY1MS*5); //wait a bit 8de8: 3f 40 10 27 mov #10000, r15 ;#0x2710 8dec: b0 12 10 8c call #0x8c10 //LCDOUT &= LCD_DATA_OFF; //reset data lines P4OUT &= ~(LCD_E | LCD_RW | LCD_RS); 8df0: f2 f0 c7 ff and.b #-57, &0x001d ;#0xffc7 8df4: 1d 00 P2OUT &= ~(LCD_D4 | LCD_D5 | LCD_D6 | LCD_D7); 8df6: f2 f0 f0 ff and.b #-16, &0x0029 ;#0xfff0 8dfa: 29 00 } 8dfc: 30 41 ret 00008dfe : Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8dfe: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8e02: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e04: 5e 42 18 00 mov.b &0x0018,r14 8e08: 2e f2 and #4, r14 ;r2 As==10 8e0a: fc 23 jnz $-6 ;abs 0x8e04 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8e0c: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8e10: 1b 00 IFG2 &= ~UCB0RXIFG; 8e12: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8e16: 03 00 UCB0TXBUF = reg; 8e18: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8e1c: 5f 42 03 00 mov.b &0x0003,r15 8e20: 2f f2 and #4, r15 ;r2 As==10 8e22: fc 27 jz $-6 ;abs 0x8e1c status = UCB0RXBUF; 8e24: d2 42 6e 00 mov.b &0x006e,&0x020c 8e28: 0c 02 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8e2a: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8e2e: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8e32: 1b 00 } 8e34: 30 41 ret 00008e36 : */ char CCXX_SPI_RDREG(char reg) { unsigned char rx=0; if(reg >= 0x30) 8e36: 7f 90 30 00 cmp.b #48, r15 ;#0x0030 8e3a: 29 38 jl $+84 ;abs 0x8e8e reg |= 0xC0; 8e3c: 7f d0 c0 ff bis.b #-64, r15 ;#0xffc0 else reg |= 0x80; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8e40: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8e44: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e46: 5e 42 18 00 mov.b &0x0018,r14 8e4a: 2e f2 and #4, r14 ;r2 As==10 8e4c: fc 23 jnz $-6 ;abs 0x8e46 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8e4e: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8e52: 1b 00 IFG2 &= ~UCB0RXIFG; 8e54: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8e58: 03 00 UCB0TXBUF = reg; 8e5a: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8e5e: 5f 42 03 00 mov.b &0x0003,r15 8e62: 2f f2 and #4, r15 ;r2 As==10 8e64: fc 27 jz $-6 ;abs 0x8e5e status = UCB0RXBUF; 8e66: d2 42 6e 00 mov.b &0x006e,&0x020c 8e6a: 0c 02 IFG2 &= ~UCB0RXIFG; 8e6c: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8e70: 03 00 UCB0TXBUF = 0; 8e72: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 while (!(IFG2 & UCB0RXIFG)); 8e76: 5f 42 03 00 mov.b &0x0003,r15 8e7a: 2f f2 and #4, r15 ;r2 As==10 8e7c: fc 27 jz $-6 ;abs 0x8e76 rx = UCB0RXBUF; 8e7e: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8e82: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8e86: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8e8a: 1b 00 return rx; } 8e8c: 30 41 ret { unsigned char rx=0; if(reg >= 0x30) reg |= 0xC0; else reg |= 0x80; 8e8e: 7f d0 80 ff bis.b #-128, r15 ;#0xff80 8e92: d6 3f jmp $-82 ;abs 0x8e40 00008e94 : { unsigned char dummy; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8e94: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8e98: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e9a: 5d 42 18 00 mov.b &0x0018,r13 8e9e: 2d f2 and #4, r13 ;r2 As==10 8ea0: fc 23 jnz $-6 ;abs 0x8e9a P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8ea2: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8ea6: 1b 00 IFG2 &= ~UCB0RXIFG; 8ea8: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8eac: 03 00 UCB0TXBUF = reg; 8eae: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8eb2: 5f 42 03 00 mov.b &0x0003,r15 8eb6: 2f f2 and #4, r15 ;r2 As==10 8eb8: fc 27 jz $-6 ;abs 0x8eb2 status = UCB0RXBUF; 8eba: d2 42 6e 00 mov.b &0x006e,&0x020c 8ebe: 0c 02 //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8ec0: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8ec4: 03 00 UCB0TXBUF = byte; 8ec6: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 8eca: 5f 42 03 00 mov.b &0x0003,r15 8ece: 2f f2 and #4, r15 ;r2 As==10 8ed0: fc 27 jz $-6 ;abs 0x8eca dummy = UCB0RXBUF; 8ed2: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8ed6: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8eda: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8ede: 1b 00 } 8ee0: 30 41 ret 00008ee2 : { unsigned char dummy; unsigned int index; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8ee2: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8ee6: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8ee8: 5c 42 18 00 mov.b &0x0018,r12 8eec: 2c f2 and #4, r12 ;r2 As==10 8eee: fc 23 jnz $-6 ;abs 0x8ee8 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8ef0: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8ef4: 1b 00 IFG2 &= ~UCB0RXIFG; 8ef6: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8efa: 03 00 UCB0TXBUF = reg; 8efc: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8f00: 5f 42 03 00 mov.b &0x0003,r15 8f04: 2f f2 and #4, r15 ;r2 As==10 8f06: fc 27 jz $-6 ;abs 0x8f00 status = UCB0RXBUF; 8f08: d2 42 6e 00 mov.b &0x006e,&0x020c 8f0c: 0c 02 IFG2 &= ~UCB0RXIFG; 8f0e: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8f12: 03 00 UCB0TXBUF = length; 8f14: c2 4d 6f 00 mov.b r13, &0x006f while (!(IFG2 & UCB0RXIFG)); 8f18: 5f 42 03 00 mov.b &0x0003,r15 8f1c: 2f f2 and #4, r15 ;r2 As==10 8f1e: fc 27 jz $-6 ;abs 0x8f18 dummy = UCB0RXBUF; 8f20: 5f 42 6e 00 mov.b &0x006e,r15 for(index = 0; index < length; index++) 8f24: 8d 11 sxt r13 8f26: 11 24 jz $+36 ;abs 0x8f4a 8f28: 0c 43 clr r12 { IFG2 &= ~UCB0RXIFG; 8f2a: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8f2e: 03 00 } /** Write a register from the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) 8f30: 0f 4e mov r14, r15 8f32: 0f 5c add r12, r15 dummy = UCB0RXBUF; for(index = 0; index < length; index++) { IFG2 &= ~UCB0RXIFG; UCB0TXBUF = buf[index]; 8f34: e2 4f 6f 00 mov.b @r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8f38: 5f 42 03 00 mov.b &0x0003,r15 8f3c: 2f f2 and #4, r15 ;r2 As==10 8f3e: fc 27 jz $-6 ;abs 0x8f38 dummy = UCB0RXBUF; 8f40: 5f 42 6e 00 mov.b &0x006e,r15 IFG2 &= ~UCB0RXIFG; UCB0TXBUF = length; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; for(index = 0; index < length; index++) 8f44: 1c 53 inc r12 8f46: 0c 9d cmp r13, r12 8f48: f0 2b jnc $-30 ;abs 0x8f2a UCB0TXBUF = buf[index]; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; } P3OUT |= CSn; //pull CSn high, we're done with the transfer 8f4a: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8f4e: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8f52: 1b 00 } 8f54: 30 41 ret 00008f56 <__mulhi3>: 8f56: 0d 4f mov r15, r13 8f58: 0f 43 clr r15 8f5a: 0e 93 tst r14 8f5c: 07 24 jz $+16 ;abs 0x8f6c 8f5e: 12 c3 clrc 8f60: 0d 10 rrc r13 8f62: 01 28 jnc $+4 ;abs 0x8f66 8f64: 0f 5e add r14, r15 8f66: 0e 5e rla r14 8f68: 0d 93 tst r13 8f6a: f7 23 jnz $-16 ;abs 0x8f5a 8f6c: 30 41 ret 00008f6e <__udivhi3>: 8f6e: 7c 40 10 00 mov.b #16, r12 ;#0x0010 8f72: 0d 4e mov r14, r13 8f74: 0e 43 clr r14 8f76: 0f 5f rla r15 8f78: 0e 6e rlc r14 8f7a: 0e 9d cmp r13, r14 8f7c: 02 28 jnc $+6 ;abs 0x8f82 8f7e: 0e 8d sub r13, r14 8f80: 1f d3 bis #1, r15 ;r3 As==01 8f82: 1c 83 dec r12 8f84: f8 23 jnz $-14 ;abs 0x8f76 8f86: 30 41 ret 00008f88 <__umodhi3>: 8f88: b0 12 6e 8f call #0x8f6e 8f8c: 0f 4e mov r14, r15 8f8e: 30 41 ret 00008f90 <__divhi3>: 8f90: 0d 43 clr r13 8f92: 0f 93 tst r15 8f94: 04 34 jge $+10 ;abs 0x8f9e 8f96: 3d 40 03 00 mov #3, r13 ;#0x0003 8f9a: 3f e3 inv r15 8f9c: 1f 53 inc r15 8f9e: 0e 93 tst r14 8fa0: 03 34 jge $+8 ;abs 0x8fa8 8fa2: 5d e3 xor.b #1, r13 ;r3 As==01 8fa4: 3e e3 inv r14 8fa6: 1e 53 inc r14 8fa8: 0d 12 push r13 8faa: b0 12 6e 8f call #0x8f6e 8fae: 3d 41 pop r13 8fb0: 6d b3 bit.b #2, r13 ;r3 As==10 8fb2: 02 24 jz $+6 ;abs 0x8fb8 8fb4: 3e e3 inv r14 8fb6: 1e 53 inc r14 8fb8: 5d b3 bit.b #1, r13 ;r3 As==01 8fba: 02 24 jz $+6 ;abs 0x8fc0 8fbc: 3f e3 inv r15 8fbe: 1f 53 inc r15 8fc0: 30 41 ret 00008fc2 <__modhi3>: 8fc2: b0 12 90 8f call #0x8f90 8fc6: 0f 4e mov r14, r15 8fc8: 30 41 ret 00008fca <__udivsi3>: 8fca: 0b 12 push r11 8fcc: 0a 12 push r10 8fce: 09 12 push r9 8fd0: 79 40 20 00 mov.b #32, r9 ;#0x0020 8fd4: 0a 4c mov r12, r10 8fd6: 0b 4d mov r13, r11 8fd8: 0c 43 clr r12 8fda: 0d 43 clr r13 8fdc: 0e 5e rla r14 8fde: 0f 6f rlc r15 8fe0: 0c 6c rlc r12 8fe2: 0d 6d rlc r13 8fe4: 0d 9b cmp r11, r13 8fe6: 06 28 jnc $+14 ;abs 0x8ff4 8fe8: 02 20 jnz $+6 ;abs 0x8fee 8fea: 0c 9a cmp r10, r12 8fec: 03 28 jnc $+8 ;abs 0x8ff4 8fee: 0c 8a sub r10, r12 8ff0: 0d 7b subc r11, r13 8ff2: 1e d3 bis #1, r14 ;r3 As==01 8ff4: 19 83 dec r9 8ff6: f2 23 jnz $-26 ;abs 0x8fdc 8ff8: 39 41 pop r9 8ffa: 3a 41 pop r10 8ffc: 3b 41 pop r11 8ffe: 30 41 ret 00009000 <__umodsi3>: 9000: b0 12 ca 8f call #0x8fca 9004: 0e 4c mov r12, r14 9006: 0f 4d mov r13, r15 9008: 30 41 ret 0000900a <__fixunssfsi>: 900a: 0b 12 push r11 900c: 0a 12 push r10 900e: 0a 4e mov r14, r10 9010: 0b 4f mov r15, r11 9012: 0c 43 clr r12 9014: 3d 40 00 4f mov #20224, r13 ;#0x4f00 9018: b0 12 ee 96 call #0x96ee 901c: 0f 93 tst r15 901e: 07 34 jge $+16 ;abs 0x902e 9020: 0e 4a mov r10, r14 9022: 0f 4b mov r11, r15 9024: b0 12 e4 97 call #0x97e4 9028: 3a 41 pop r10 902a: 3b 41 pop r11 902c: 30 41 ret 902e: 0c 43 clr r12 9030: 3d 40 00 4f mov #20224, r13 ;#0x4f00 9034: 0e 4a mov r10, r14 9036: 0f 4b mov r11, r15 9038: b0 12 2a 93 call #0x932a 903c: b0 12 e4 97 call #0x97e4 9040: 0e 53 add #0, r14 ;r3 As==00 9042: 3f 60 00 80 addc #-32768,r15 ;#0x8000 9046: 3a 41 pop r10 9048: 3b 41 pop r11 904a: 30 41 ret 0000904c <_fpadd_parts>: 904c: 0b 12 push r11 904e: 0a 12 push r10 9050: 09 12 push r9 9052: 08 12 push r8 9054: 07 12 push r7 9056: 06 12 push r6 9058: 05 12 push r5 905a: 04 12 push r4 905c: 31 50 fa ff add #-6, r1 ;#0xfffa 9060: 08 4d mov r13, r8 9062: 6b 4f mov.b @r15, r11 9064: 6b 93 cmp.b #2, r11 ;r3 As==10 9066: 67 28 jnc $+208 ;abs 0x9136 9068: 6c 4e mov.b @r14, r12 906a: 6c 93 cmp.b #2, r12 ;r3 As==10 906c: e9 28 jnc $+468 ;abs 0x9240 906e: 6b 92 cmp.b #4, r11 ;r2 As==10 9070: 02 20 jnz $+6 ;abs 0x9076 9072: 30 40 cc 92 br #0x92cc 9076: 6c 92 cmp.b #4, r12 ;r2 As==10 9078: e3 24 jz $+456 ;abs 0x9240 907a: 6c 93 cmp.b #2, r12 ;r3 As==10 907c: bb 24 jz $+376 ;abs 0x91f4 907e: 6b 93 cmp.b #2, r11 ;r3 As==10 9080: df 24 jz $+448 ;abs 0x9240 9082: 91 4f 02 00 mov 2(r15), 0(r1) ;0x0002(r15), 0x0000(r1) 9086: 00 00 9088: 1b 4e 02 00 mov 2(r14), r11 ;0x0002(r14) 908c: 14 4f 04 00 mov 4(r15), r4 ;0x0004(r15) 9090: 15 4f 06 00 mov 6(r15), r5 ;0x0006(r15) 9094: 16 4e 04 00 mov 4(r14), r6 ;0x0004(r14) 9098: 17 4e 06 00 mov 6(r14), r7 ;0x0006(r14) 909c: 2c 41 mov @r1, r12 909e: 0c 8b sub r11, r12 90a0: 09 4c mov r12, r9 90a2: 0c 93 tst r12 90a4: bf 38 jl $+384 ;abs 0x9224 90a6: 39 90 20 00 cmp #32, r9 ;#0x0020 90aa: 50 34 jge $+162 ;abs 0x914c 90ac: 1c 93 cmp #1, r12 ;r3 As==01 90ae: d7 38 jl $+432 ;abs 0x925e 90b0: 81 46 02 00 mov r6, 2(r1) ;0x0002(r1) 90b4: 81 47 04 00 mov r7, 4(r1) ;0x0004(r1) 90b8: 4c 49 mov.b r9, r12 90ba: 7c f0 1f 00 and.b #31, r12 ;#0x001f 90be: 0b 24 jz $+24 ;abs 0x90d6 90c0: 0a 46 mov r6, r10 90c2: 0b 47 mov r7, r11 90c4: 12 c3 clrc 90c6: 0b 10 rrc r11 90c8: 0a 10 rrc r10 90ca: 7c 53 add.b #-1, r12 ;r3 As==11 90cc: fb 23 jnz $-8 ;abs 0x90c4 90ce: 81 4a 02 00 mov r10, 2(r1) ;0x0002(r1) 90d2: 81 4b 04 00 mov r11, 4(r1) ;0x0004(r1) 90d6: 1c 43 mov #1, r12 ;r3 As==01 90d8: 0d 43 clr r13 90da: 79 f0 1f 00 and.b #31, r9 ;#0x001f 90de: 04 24 jz $+10 ;abs 0x90e8 90e0: 0c 5c rla r12 90e2: 0d 6d rlc r13 90e4: 79 53 add.b #-1, r9 ;r3 As==11 90e6: fc 23 jnz $-6 ;abs 0x90e0 90e8: 3c 53 add #-1, r12 ;r3 As==11 90ea: 3d 63 addc #-1, r13 ;r3 As==11 90ec: 0c f6 and r6, r12 90ee: 0d f7 and r7, r13 90f0: 1a 43 mov #1, r10 ;r3 As==01 90f2: 0b 43 clr r11 90f4: 0c 93 tst r12 90f6: 02 20 jnz $+6 ;abs 0x90fc 90f8: 0d 93 tst r13 90fa: e5 24 jz $+460 ;abs 0x92c6 90fc: 16 41 02 00 mov 2(r1), r6 ;0x0002(r1) 9100: 17 41 04 00 mov 4(r1), r7 ;0x0004(r1) 9104: 06 da bis r10, r6 9106: 07 db bis r11, r7 9108: 5f 4f 01 00 mov.b 1(r15), r15 ;0x0001(r15) 910c: 5f 9e 01 00 cmp.b 1(r14), r15 ;0x0001(r14) 9110: 28 20 jnz $+82 ;abs 0x9162 9112: c8 4f 01 00 mov.b r15, 1(r8) ;0x0001(r8) 9116: a8 41 02 00 mov @r1, 2(r8) ;0x0002(r8) 911a: 0e 46 mov r6, r14 911c: 0f 47 mov r7, r15 911e: 0e 54 add r4, r14 9120: 0f 65 addc r5, r15 9122: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 9126: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 912a: f8 40 03 00 mov.b #3, 0(r8) ;#0x0003, 0x0000(r8) 912e: 00 00 9130: 0f 93 tst r15 9132: 4d 38 jl $+156 ;abs 0x91ce 9134: 0f 48 mov r8, r15 9136: 31 50 06 00 add #6, r1 ;#0x0006 913a: 34 41 pop r4 913c: 35 41 pop r5 913e: 36 41 pop r6 9140: 37 41 pop r7 9142: 38 41 pop r8 9144: 39 41 pop r9 9146: 3a 41 pop r10 9148: 3b 41 pop r11 914a: 30 41 ret 914c: 2b 91 cmp @r1, r11 914e: 67 38 jl $+208 ;abs 0x921e 9150: 81 4b 00 00 mov r11, 0(r1) ;0x0000(r1) 9154: 04 43 clr r4 9156: 05 43 clr r5 9158: 5f 4f 01 00 mov.b 1(r15), r15 ;0x0001(r15) 915c: 5f 9e 01 00 cmp.b 1(r14), r15 ;0x0001(r14) 9160: d8 27 jz $-78 ;abs 0x9112 9162: 4f 93 tst.b r15 9164: 68 24 jz $+210 ;abs 0x9236 9166: 0e 46 mov r6, r14 9168: 0f 47 mov r7, r15 916a: 0e 84 sub r4, r14 916c: 0f 75 subc r5, r15 916e: 0f 93 tst r15 9170: 69 38 jl $+212 ;abs 0x9244 9172: c8 43 01 00 mov.b #0, 1(r8) ;r3 As==00, 0x0001(r8) 9176: a8 41 02 00 mov @r1, 2(r8) ;0x0002(r8) 917a: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 917e: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 9182: 0c 4e mov r14, r12 9184: 0d 4f mov r15, r13 9186: 3c 53 add #-1, r12 ;r3 As==11 9188: 3d 63 addc #-1, r13 ;r3 As==11 918a: 3d 90 ff 3f cmp #16383, r13 ;#0x3fff 918e: 05 28 jnc $+12 ;abs 0x919a 9190: 3d 90 00 40 cmp #16384, r13 ;#0x4000 9194: 17 2c jc $+48 ;abs 0x91c4 9196: 3c 93 cmp #-1, r12 ;r3 As==11 9198: 15 2c jc $+44 ;abs 0x91c4 919a: 1b 48 02 00 mov 2(r8), r11 ;0x0002(r8) 919e: 3b 53 add #-1, r11 ;r3 As==11 91a0: 0e 5e rla r14 91a2: 0f 6f rlc r15 91a4: 0a 4b mov r11, r10 91a6: 3b 53 add #-1, r11 ;r3 As==11 91a8: 0c 4e mov r14, r12 91aa: 0d 4f mov r15, r13 91ac: 3c 53 add #-1, r12 ;r3 As==11 91ae: 3d 63 addc #-1, r13 ;r3 As==11 91b0: 3d 90 ff 3f cmp #16383, r13 ;#0x3fff 91b4: f5 2b jnc $-20 ;abs 0x91a0 91b6: 3c 24 jz $+122 ;abs 0x9230 91b8: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 91bc: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 91c0: 88 4a 02 00 mov r10, 2(r8) ;0x0002(r8) 91c4: f8 40 03 00 mov.b #3, 0(r8) ;#0x0003, 0x0000(r8) 91c8: 00 00 91ca: 0f 93 tst r15 91cc: b3 37 jge $-152 ;abs 0x9134 91ce: 0c 4e mov r14, r12 91d0: 0d 4f mov r15, r13 91d2: 1c f3 and #1, r12 ;r3 As==01 91d4: 0d f3 and #0, r13 ;r3 As==00 91d6: 12 c3 clrc 91d8: 0f 10 rrc r15 91da: 0e 10 rrc r14 91dc: 0a 4c mov r12, r10 91de: 0b 4d mov r13, r11 91e0: 0a de bis r14, r10 91e2: 0b df bis r15, r11 91e4: 88 4a 04 00 mov r10, 4(r8) ;0x0004(r8) 91e8: 88 4b 06 00 mov r11, 6(r8) ;0x0006(r8) 91ec: 98 53 02 00 inc 2(r8) ;0x0002(r8) 91f0: 0f 48 mov r8, r15 91f2: a1 3f jmp $-188 ;abs 0x9136 91f4: 6b 93 cmp.b #2, r11 ;r3 As==10 91f6: 9f 23 jnz $-192 ;abs 0x9136 91f8: ad 4f 00 00 mov @r15, 0(r13) ;0x0000(r13) 91fc: 9d 4f 02 00 mov 2(r15), 2(r13) ;0x0002(r15), 0x0002(r13) 9200: 02 00 9202: 9d 4f 04 00 mov 4(r15), 4(r13) ;0x0004(r15), 0x0004(r13) 9206: 04 00 9208: 9d 4f 06 00 mov 6(r15), 6(r13) ;0x0006(r15), 0x0006(r13) 920c: 06 00 920e: 5e 4e 01 00 mov.b 1(r14), r14 ;0x0001(r14) 9212: 5e ff 01 00 and.b 1(r15), r14 ;0x0001(r15) 9216: cd 4e 01 00 mov.b r14, 1(r13) ;0x0001(r13) 921a: 0f 4d mov r13, r15 921c: 8c 3f jmp $-230 ;abs 0x9136 921e: 06 43 clr r6 9220: 07 43 clr r7 9222: 9a 3f jmp $-202 ;abs 0x9158 9224: 39 e3 inv r9 9226: 19 53 inc r9 9228: 39 90 20 00 cmp #32, r9 ;#0x0020 922c: 8f 37 jge $-224 ;abs 0x914c 922e: 3e 3f jmp $-386 ;abs 0x90ac 9230: 3c 93 cmp #-1, r12 ;r3 As==11 9232: b6 2b jnc $-146 ;abs 0x91a0 9234: c1 3f jmp $-124 ;abs 0x91b8 9236: 0e 44 mov r4, r14 9238: 0f 45 mov r5, r15 923a: 0e 86 sub r6, r14 923c: 0f 77 subc r7, r15 923e: 97 3f jmp $-208 ;abs 0x916e 9240: 0f 4e mov r14, r15 9242: 79 3f jmp $-268 ;abs 0x9136 9244: d8 43 01 00 mov.b #1, 1(r8) ;r3 As==01, 0x0001(r8) 9248: a8 41 02 00 mov @r1, 2(r8) ;0x0002(r8) 924c: 3e e3 inv r14 924e: 3f e3 inv r15 9250: 1e 53 inc r14 9252: 0f 63 adc r15 9254: 88 4e 04 00 mov r14, 4(r8) ;0x0004(r8) 9258: 88 4f 06 00 mov r15, 6(r8) ;0x0006(r8) 925c: 92 3f jmp $-218 ;abs 0x9182 925e: 0c 93 tst r12 9260: 7b 27 jz $-264 ;abs 0x9158 9262: 81 59 00 00 add r9, 0(r1) ;0x0000(r1) 9266: 81 44 02 00 mov r4, 2(r1) ;0x0002(r1) 926a: 81 45 04 00 mov r5, 4(r1) ;0x0004(r1) 926e: 4d 49 mov.b r9, r13 9270: 7d f0 1f 00 and.b #31, r13 ;#0x001f 9274: 0c 24 jz $+26 ;abs 0x928e 9276: 4b 4d mov.b r13, r11 9278: 0c 44 mov r4, r12 927a: 0d 45 mov r5, r13 927c: 12 c3 clrc 927e: 0d 10 rrc r13 9280: 0c 10 rrc r12 9282: 7b 53 add.b #-1, r11 ;r3 As==11 9284: fb 23 jnz $-8 ;abs 0x927c 9286: 81 4c 02 00 mov r12, 2(r1) ;0x0002(r1) 928a: 81 4d 04 00 mov r13, 4(r1) ;0x0004(r1) 928e: 1c 43 mov #1, r12 ;r3 As==01 9290: 0d 43 clr r13 9292: 79 f0 1f 00 and.b #31, r9 ;#0x001f 9296: 04 24 jz $+10 ;abs 0x92a0 9298: 0c 5c rla r12 929a: 0d 6d rlc r13 929c: 79 53 add.b #-1, r9 ;r3 As==11 929e: fc 23 jnz $-6 ;abs 0x9298 92a0: 3c 53 add #-1, r12 ;r3 As==11 92a2: 3d 63 addc #-1, r13 ;r3 As==11 92a4: 0c f4 and r4, r12 92a6: 0d f5 and r5, r13 92a8: 1a 43 mov #1, r10 ;r3 As==01 92aa: 0b 43 clr r11 92ac: 0c 93 tst r12 92ae: 04 20 jnz $+10 ;abs 0x92b8 92b0: 0d 93 tst r13 92b2: 02 20 jnz $+6 ;abs 0x92b8 92b4: 0a 43 clr r10 92b6: 0b 43 clr r11 92b8: 14 41 02 00 mov 2(r1), r4 ;0x0002(r1) 92bc: 15 41 04 00 mov 4(r1), r5 ;0x0004(r1) 92c0: 04 da bis r10, r4 92c2: 05 db bis r11, r5 92c4: 49 3f jmp $-364 ;abs 0x9158 92c6: 0a 43 clr r10 92c8: 0b 43 clr r11 92ca: 18 3f jmp $-462 ;abs 0x90fc 92cc: 6c 92 cmp.b #4, r12 ;r2 As==10 92ce: 33 23 jnz $-408 ;abs 0x9136 92d0: df 9e 01 00 cmp.b 1(r14), 1(r15) ;0x0001(r14), 0x0001(r15) 92d4: 01 00 92d6: 2f 27 jz $-416 ;abs 0x9136 92d8: 3f 40 ec a9 mov #-22036,r15 ;#0xa9ec 92dc: 2c 3f jmp $-422 ;abs 0x9136 000092de <__addsf3>: 92de: 31 50 e0 ff add #-32, r1 ;#0xffe0 92e2: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 92e6: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 92ea: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 92ee: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 92f2: 0e 41 mov r1, r14 92f4: 3e 50 18 00 add #24, r14 ;#0x0018 92f8: 0f 41 mov r1, r15 92fa: 2f 52 add #4, r15 ;r2 As==10 92fc: b0 12 a6 9b call #0x9ba6 9300: 0e 41 mov r1, r14 9302: 3e 50 10 00 add #16, r14 ;#0x0010 9306: 0f 41 mov r1, r15 9308: b0 12 a6 9b call #0x9ba6 930c: 0d 41 mov r1, r13 930e: 3d 52 add #8, r13 ;r2 As==11 9310: 0e 41 mov r1, r14 9312: 3e 50 10 00 add #16, r14 ;#0x0010 9316: 0f 41 mov r1, r15 9318: 3f 50 18 00 add #24, r15 ;#0x0018 931c: b0 12 4c 90 call #0x904c 9320: b0 12 c8 99 call #0x99c8 9324: 31 50 20 00 add #32, r1 ;#0x0020 9328: 30 41 ret 0000932a <__subsf3>: 932a: 31 50 e0 ff add #-32, r1 ;#0xffe0 932e: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 9332: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 9336: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 933a: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 933e: 0e 41 mov r1, r14 9340: 3e 50 18 00 add #24, r14 ;#0x0018 9344: 0f 41 mov r1, r15 9346: 2f 52 add #4, r15 ;r2 As==10 9348: b0 12 a6 9b call #0x9ba6 934c: 0e 41 mov r1, r14 934e: 3e 50 10 00 add #16, r14 ;#0x0010 9352: 0f 41 mov r1, r15 9354: b0 12 a6 9b call #0x9ba6 9358: d1 e3 11 00 xor.b #1, 17(r1) ;r3 As==01, 0x0011(r1) 935c: 0d 41 mov r1, r13 935e: 3d 52 add #8, r13 ;r2 As==11 9360: 0e 41 mov r1, r14 9362: 3e 50 10 00 add #16, r14 ;#0x0010 9366: 0f 41 mov r1, r15 9368: 3f 50 18 00 add #24, r15 ;#0x0018 936c: b0 12 4c 90 call #0x904c 9370: b0 12 c8 99 call #0x99c8 9374: 31 50 20 00 add #32, r1 ;#0x0020 9378: 30 41 ret 0000937a <__mulsf3>: 937a: 0b 12 push r11 937c: 0a 12 push r10 937e: 09 12 push r9 9380: 08 12 push r8 9382: 07 12 push r7 9384: 06 12 push r6 9386: 05 12 push r5 9388: 04 12 push r4 938a: 31 50 dc ff add #-36, r1 ;#0xffdc 938e: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 9392: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 9396: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 939a: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 939e: 0e 41 mov r1, r14 93a0: 3e 50 18 00 add #24, r14 ;#0x0018 93a4: 0f 41 mov r1, r15 93a6: 2f 52 add #4, r15 ;r2 As==10 93a8: b0 12 a6 9b call #0x9ba6 93ac: 0e 41 mov r1, r14 93ae: 3e 50 10 00 add #16, r14 ;#0x0010 93b2: 0f 41 mov r1, r15 93b4: b0 12 a6 9b call #0x9ba6 93b8: 5f 41 18 00 mov.b 24(r1), r15 ;0x0018(r1) 93bc: 6f 93 cmp.b #2, r15 ;r3 As==10 93be: b6 28 jnc $+366 ;abs 0x952c 93c0: 5e 41 10 00 mov.b 16(r1), r14 ;0x0010(r1) 93c4: 6e 93 cmp.b #2, r14 ;r3 As==10 93c6: d9 28 jnc $+436 ;abs 0x957a 93c8: 6f 92 cmp.b #4, r15 ;r2 As==10 93ca: ae 24 jz $+350 ;abs 0x9528 93cc: 6e 92 cmp.b #4, r14 ;r2 As==10 93ce: e2 24 jz $+454 ;abs 0x9594 93d0: 6f 93 cmp.b #2, r15 ;r3 As==10 93d2: ac 24 jz $+346 ;abs 0x952c 93d4: 6e 93 cmp.b #2, r14 ;r3 As==10 93d6: d1 24 jz $+420 ;abs 0x957a 93d8: 14 41 1c 00 mov 28(r1), r4 ;0x001c(r1) 93dc: 15 41 1e 00 mov 30(r1), r5 ;0x001e(r1) 93e0: 18 41 14 00 mov 20(r1), r8 ;0x0014(r1) 93e4: 19 41 16 00 mov 22(r1), r9 ;0x0016(r1) 93e8: 3c 40 20 00 mov #32, r12 ;#0x0020 93ec: 0e 43 clr r14 93ee: 0f 43 clr r15 93f0: 06 43 clr r6 93f2: 07 43 clr r7 93f4: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 93f8: 81 43 22 00 mov #0, 34(r1) ;r3 As==00, 0x0022(r1) 93fc: 0a 43 clr r10 93fe: 0b 43 clr r11 9400: 81 4c 20 00 mov r12, 32(r1) ;0x0020(r1) 9404: 08 3c jmp $+18 ;abs 0x9416 9406: 08 58 rla r8 9408: 09 69 rlc r9 940a: 12 c3 clrc 940c: 05 10 rrc r5 940e: 04 10 rrc r4 9410: b1 53 20 00 add #-1, 32(r1) ;r3 As==11, 0x0020(r1) 9414: 19 24 jz $+52 ;abs 0x9448 9416: 14 b3 bit #1, r4 ;r3 As==01 9418: 0d 24 jz $+28 ;abs 0x9434 941a: 0a 58 add r8, r10 941c: 0b 69 addc r9, r11 941e: 0e 56 add r6, r14 9420: 0f 67 addc r7, r15 9422: 1c 43 mov #1, r12 ;r3 As==01 9424: 0d 43 clr r13 9426: 0b 99 cmp r9, r11 9428: 03 28 jnc $+8 ;abs 0x9430 942a: 0b 24 jz $+24 ;abs 0x9442 942c: 0c 43 clr r12 942e: 0d 43 clr r13 9430: 0e 5c add r12, r14 9432: 0f 6d addc r13, r15 9434: 06 56 rla r6 9436: 07 67 rlc r7 9438: 09 93 tst r9 943a: e5 37 jge $-52 ;abs 0x9406 943c: 16 d3 bis #1, r6 ;r3 As==01 943e: 07 d3 bis #0, r7 ;r3 As==00 9440: e2 3f jmp $-58 ;abs 0x9406 9442: 0a 98 cmp r8, r10 9444: f5 2b jnc $-20 ;abs 0x9430 9446: f2 3f jmp $-26 ;abs 0x942c 9448: 81 4a 20 00 mov r10, 32(r1) ;0x0020(r1) 944c: 81 4b 22 00 mov r11, 34(r1) ;0x0022(r1) 9450: 0c 4f mov r15, r12 9452: 1a 41 1a 00 mov 26(r1), r10 ;0x001a(r1) 9456: 1a 51 12 00 add 18(r1), r10 ;0x0012(r1) 945a: 06 4a mov r10, r6 945c: 26 53 incd r6 945e: 81 46 0a 00 mov r6, 10(r1) ;0x000a(r1) 9462: 5d 43 mov.b #1, r13 ;r3 As==01 9464: d1 91 11 00 cmp.b 17(r1), 25(r1) ;0x0011(r1), 0x0019(r1) 9468: 19 00 946a: 83 24 jz $+264 ;abs 0x9572 946c: c1 4d 09 00 mov.b r13, 9(r1) ;0x0009(r1) 9470: 0c 93 tst r12 9472: 3c 38 jl $+122 ;abs 0x94ec 9474: 3f 90 00 40 cmp #16384, r15 ;#0x4000 9478: 18 2c jc $+50 ;abs 0x94aa 947a: 1d 41 0a 00 mov 10(r1), r13 ;0x000a(r1) 947e: 3d 53 add #-1, r13 ;r3 As==11 9480: 1a 41 20 00 mov 32(r1), r10 ;0x0020(r1) 9484: 1b 41 22 00 mov 34(r1), r11 ;0x0022(r1) 9488: 0c 4d mov r13, r12 948a: 0e 5e rla r14 948c: 0f 6f rlc r15 948e: 0b 93 tst r11 9490: 2a 38 jl $+86 ;abs 0x94e6 9492: 0a 5a rla r10 9494: 0b 6b rlc r11 9496: 3d 53 add #-1, r13 ;r3 As==11 9498: 3f 90 00 40 cmp #16384, r15 ;#0x4000 949c: f5 2b jnc $-20 ;abs 0x9488 949e: 81 4a 20 00 mov r10, 32(r1) ;0x0020(r1) 94a2: 81 4b 22 00 mov r11, 34(r1) ;0x0022(r1) 94a6: 81 4c 0a 00 mov r12, 10(r1) ;0x000a(r1) 94aa: 0c 4e mov r14, r12 94ac: 0d 4f mov r15, r13 94ae: 3c f0 7f 00 and #127, r12 ;#0x007f 94b2: 0d f3 and #0, r13 ;r3 As==00 94b4: 3c 90 40 00 cmp #64, r12 ;#0x0040 94b8: 44 24 jz $+138 ;abs 0x9542 94ba: 81 4e 0c 00 mov r14, 12(r1) ;0x000c(r1) 94be: 81 4f 0e 00 mov r15, 14(r1) ;0x000e(r1) 94c2: f1 40 03 00 mov.b #3, 8(r1) ;#0x0003, 0x0008(r1) 94c6: 08 00 94c8: 0f 41 mov r1, r15 94ca: 3f 52 add #8, r15 ;r2 As==11 94cc: b0 12 c8 99 call #0x99c8 94d0: 31 50 24 00 add #36, r1 ;#0x0024 94d4: 34 41 pop r4 94d6: 35 41 pop r5 94d8: 36 41 pop r6 94da: 37 41 pop r7 94dc: 38 41 pop r8 94de: 39 41 pop r9 94e0: 3a 41 pop r10 94e2: 3b 41 pop r11 94e4: 30 41 ret 94e6: 1e d3 bis #1, r14 ;r3 As==01 94e8: 0f d3 bis #0, r15 ;r3 As==00 94ea: d3 3f jmp $-88 ;abs 0x9492 94ec: 3a 50 03 00 add #3, r10 ;#0x0003 94f0: 08 4a mov r10, r8 94f2: 1e b3 bit #1, r14 ;r3 As==01 94f4: 10 24 jz $+34 ;abs 0x9516 94f6: 1c 41 20 00 mov 32(r1), r12 ;0x0020(r1) 94fa: 1d 41 22 00 mov 34(r1), r13 ;0x0022(r1) 94fe: 12 c3 clrc 9500: 0d 10 rrc r13 9502: 0c 10 rrc r12 9504: 06 4c mov r12, r6 9506: 07 4d mov r13, r7 9508: 06 d3 bis #0, r6 ;r3 As==00 950a: 37 d0 00 80 bis #-32768,r7 ;#0x8000 950e: 81 46 20 00 mov r6, 32(r1) ;0x0020(r1) 9512: 81 47 22 00 mov r7, 34(r1) ;0x0022(r1) 9516: 12 c3 clrc 9518: 0f 10 rrc r15 951a: 0e 10 rrc r14 951c: 1a 53 inc r10 951e: 0f 93 tst r15 9520: e7 3b jl $-48 ;abs 0x94f0 9522: 81 48 0a 00 mov r8, 10(r1) ;0x000a(r1) 9526: a6 3f jmp $-178 ;abs 0x9474 9528: 6e 93 cmp.b #2, r14 ;r3 As==10 952a: 36 24 jz $+110 ;abs 0x9598 952c: 5f 43 mov.b #1, r15 ;r3 As==01 952e: d1 91 11 00 cmp.b 17(r1), 25(r1) ;0x0011(r1), 0x0019(r1) 9532: 19 00 9534: 20 24 jz $+66 ;abs 0x9576 9536: c1 4f 19 00 mov.b r15, 25(r1) ;0x0019(r1) 953a: 0f 41 mov r1, r15 953c: 3f 50 18 00 add #24, r15 ;#0x0018 9540: c5 3f jmp $-116 ;abs 0x94cc 9542: 0d 93 tst r13 9544: ba 23 jnz $-138 ;abs 0x94ba 9546: 0c 4e mov r14, r12 9548: 0d 4f mov r15, r13 954a: 3c f0 80 00 and #128, r12 ;#0x0080 954e: 0d f3 and #0, r13 ;r3 As==00 9550: 0c 93 tst r12 9552: b3 23 jnz $-152 ;abs 0x94ba 9554: 0d 93 tst r13 9556: b1 23 jnz $-156 ;abs 0x94ba 9558: 81 93 20 00 tst 32(r1) ;0x0020(r1) 955c: 03 20 jnz $+8 ;abs 0x9564 955e: 81 93 22 00 tst 34(r1) ;0x0022(r1) 9562: ab 27 jz $-168 ;abs 0x94ba 9564: 3e 50 40 00 add #64, r14 ;#0x0040 9568: 0f 63 adc r15 956a: 3e f0 80 ff and #-128, r14 ;#0xff80 956e: 3f f3 and #-1, r15 ;r3 As==11 9570: a4 3f jmp $-182 ;abs 0x94ba 9572: 4d 43 clr.b r13 9574: 7b 3f jmp $-264 ;abs 0x946c 9576: 4f 43 clr.b r15 9578: de 3f jmp $-66 ;abs 0x9536 957a: 5f 43 mov.b #1, r15 ;r3 As==01 957c: d1 91 11 00 cmp.b 17(r1), 25(r1) ;0x0011(r1), 0x0019(r1) 9580: 19 00 9582: 06 24 jz $+14 ;abs 0x9590 9584: c1 4f 11 00 mov.b r15, 17(r1) ;0x0011(r1) 9588: 0f 41 mov r1, r15 958a: 3f 50 10 00 add #16, r15 ;#0x0010 958e: 9e 3f jmp $-194 ;abs 0x94cc 9590: 4f 43 clr.b r15 9592: f8 3f jmp $-14 ;abs 0x9584 9594: 6f 93 cmp.b #2, r15 ;r3 As==10 9596: f1 23 jnz $-28 ;abs 0x957a 9598: 3f 40 ec a9 mov #-22036,r15 ;#0xa9ec 959c: 97 3f jmp $-208 ;abs 0x94cc 0000959e <__divsf3>: 959e: 0b 12 push r11 95a0: 0a 12 push r10 95a2: 09 12 push r9 95a4: 08 12 push r8 95a6: 07 12 push r7 95a8: 31 50 e8 ff add #-24, r1 ;#0xffe8 95ac: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 95b0: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 95b4: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 95b8: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 95bc: 0e 41 mov r1, r14 95be: 3e 50 10 00 add #16, r14 ;#0x0010 95c2: 0f 41 mov r1, r15 95c4: 2f 52 add #4, r15 ;r2 As==10 95c6: b0 12 a6 9b call #0x9ba6 95ca: 0e 41 mov r1, r14 95cc: 3e 52 add #8, r14 ;r2 As==11 95ce: 0f 41 mov r1, r15 95d0: b0 12 a6 9b call #0x9ba6 95d4: 5f 41 10 00 mov.b 16(r1), r15 ;0x0010(r1) 95d8: 6f 93 cmp.b #2, r15 ;r3 As==10 95da: 5d 28 jnc $+188 ;abs 0x9696 95dc: 5e 41 08 00 mov.b 8(r1), r14 ;0x0008(r1) 95e0: 6e 93 cmp.b #2, r14 ;r3 As==10 95e2: 82 28 jnc $+262 ;abs 0x96e8 95e4: d1 e1 09 00 xor.b 9(r1), 17(r1) ;0x0009(r1), 0x0011(r1) 95e8: 11 00 95ea: 6f 92 cmp.b #4, r15 ;r2 As==10 95ec: 58 24 jz $+178 ;abs 0x969e 95ee: 6f 93 cmp.b #2, r15 ;r3 As==10 95f0: 56 24 jz $+174 ;abs 0x969e 95f2: 6e 92 cmp.b #4, r14 ;r2 As==10 95f4: 6f 24 jz $+224 ;abs 0x96d4 95f6: 6e 93 cmp.b #2, r14 ;r3 As==10 95f8: 4c 24 jz $+154 ;abs 0x9692 95fa: 1d 41 12 00 mov 18(r1), r13 ;0x0012(r1) 95fe: 1d 81 0a 00 sub 10(r1), r13 ;0x000a(r1) 9602: 81 4d 12 00 mov r13, 18(r1) ;0x0012(r1) 9606: 1e 41 14 00 mov 20(r1), r14 ;0x0014(r1) 960a: 1f 41 16 00 mov 22(r1), r15 ;0x0016(r1) 960e: 18 41 0c 00 mov 12(r1), r8 ;0x000c(r1) 9612: 19 41 0e 00 mov 14(r1), r9 ;0x000e(r1) 9616: 0f 99 cmp r9, r15 9618: 1e 2c jc $+62 ;abs 0x9656 961a: 0e 5e rla r14 961c: 0f 6f rlc r15 961e: 3d 53 add #-1, r13 ;r3 As==11 9620: 81 4d 12 00 mov r13, 18(r1) ;0x0012(r1) 9624: 37 40 1f 00 mov #31, r7 ;#0x001f 9628: 0c 43 clr r12 962a: 3d 40 00 40 mov #16384, r13 ;#0x4000 962e: 0a 43 clr r10 9630: 0b 43 clr r11 9632: 0b 3c jmp $+24 ;abs 0x964a 9634: 0a dc bis r12, r10 9636: 0b dd bis r13, r11 9638: 0e 88 sub r8, r14 963a: 0f 79 subc r9, r15 963c: 12 c3 clrc 963e: 0d 10 rrc r13 9640: 0c 10 rrc r12 9642: 0e 5e rla r14 9644: 0f 6f rlc r15 9646: 37 53 add #-1, r7 ;r3 As==11 9648: 0b 24 jz $+24 ;abs 0x9660 964a: 0f 99 cmp r9, r15 964c: f7 2b jnc $-16 ;abs 0x963c 964e: f2 23 jnz $-26 ;abs 0x9634 9650: 0e 98 cmp r8, r14 9652: f4 2b jnc $-22 ;abs 0x963c 9654: ef 3f jmp $-32 ;abs 0x9634 9656: 09 9f cmp r15, r9 9658: e5 2b jnc $-52 ;abs 0x9624 965a: 0e 98 cmp r8, r14 965c: e3 2f jc $-56 ;abs 0x9624 965e: dd 3f jmp $-68 ;abs 0x961a 9660: 0c 4a mov r10, r12 9662: 0d 4b mov r11, r13 9664: 3c f0 7f 00 and #127, r12 ;#0x007f 9668: 0d f3 and #0, r13 ;r3 As==00 966a: 3c 90 40 00 cmp #64, r12 ;#0x0040 966e: 1c 24 jz $+58 ;abs 0x96a8 9670: 81 4a 14 00 mov r10, 20(r1) ;0x0014(r1) 9674: 81 4b 16 00 mov r11, 22(r1) ;0x0016(r1) 9678: 0f 41 mov r1, r15 967a: 3f 50 10 00 add #16, r15 ;#0x0010 967e: b0 12 c8 99 call #0x99c8 9682: 31 50 18 00 add #24, r1 ;#0x0018 9686: 37 41 pop r7 9688: 38 41 pop r8 968a: 39 41 pop r9 968c: 3a 41 pop r10 968e: 3b 41 pop r11 9690: 30 41 ret 9692: e1 42 10 00 mov.b #4, 16(r1) ;r2 As==10, 0x0010(r1) 9696: 0f 41 mov r1, r15 9698: 3f 50 10 00 add #16, r15 ;#0x0010 969c: f0 3f jmp $-30 ;abs 0x967e 969e: 4f 9e cmp.b r14, r15 96a0: fa 23 jnz $-10 ;abs 0x9696 96a2: 3f 40 ec a9 mov #-22036,r15 ;#0xa9ec 96a6: eb 3f jmp $-40 ;abs 0x967e 96a8: 0d 93 tst r13 96aa: e2 23 jnz $-58 ;abs 0x9670 96ac: 0c 4a mov r10, r12 96ae: 0d 4b mov r11, r13 96b0: 3c f0 80 00 and #128, r12 ;#0x0080 96b4: 0d f3 and #0, r13 ;r3 As==00 96b6: 0c 93 tst r12 96b8: db 23 jnz $-72 ;abs 0x9670 96ba: 0d 93 tst r13 96bc: d9 23 jnz $-76 ;abs 0x9670 96be: 0e 93 tst r14 96c0: 02 20 jnz $+6 ;abs 0x96c6 96c2: 0f 93 tst r15 96c4: d5 27 jz $-84 ;abs 0x9670 96c6: 3a 50 40 00 add #64, r10 ;#0x0040 96ca: 0b 63 adc r11 96cc: 3a f0 80 ff and #-128, r10 ;#0xff80 96d0: 3b f3 and #-1, r11 ;r3 As==11 96d2: ce 3f jmp $-98 ;abs 0x9670 96d4: 81 43 14 00 mov #0, 20(r1) ;r3 As==00, 0x0014(r1) 96d8: 81 43 16 00 mov #0, 22(r1) ;r3 As==00, 0x0016(r1) 96dc: 81 43 12 00 mov #0, 18(r1) ;r3 As==00, 0x0012(r1) 96e0: 0f 41 mov r1, r15 96e2: 3f 50 10 00 add #16, r15 ;#0x0010 96e6: cb 3f jmp $-104 ;abs 0x967e 96e8: 0f 41 mov r1, r15 96ea: 3f 52 add #8, r15 ;r2 As==11 96ec: c8 3f jmp $-110 ;abs 0x967e 000096ee <__gesf2>: 96ee: 31 50 e8 ff add #-24, r1 ;#0xffe8 96f2: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 96f6: 81 4f 06 00 mov r15, 6(r1) ;0x0006(r1) 96fa: 81 4c 00 00 mov r12, 0(r1) ;0x0000(r1) 96fe: 81 4d 02 00 mov r13, 2(r1) ;0x0002(r1) 9702: 0e 41 mov r1, r14 9704: 3e 50 10 00 add #16, r14 ;#0x0010 9708: 0f 41 mov r1, r15 970a: 2f 52 add #4, r15 ;r2 As==10 970c: b0 12 a6 9b call #0x9ba6 9710: 0e 41 mov r1, r14 9712: 3e 52 add #8, r14 ;r2 As==11 9714: 0f 41 mov r1, r15 9716: b0 12 a6 9b call #0x9ba6 971a: e1 93 10 00 cmp.b #2, 16(r1) ;r3 As==10, 0x0010(r1) 971e: 0d 28 jnc $+28 ;abs 0x973a 9720: e1 93 08 00 cmp.b #2, 8(r1) ;r3 As==10, 0x0008(r1) 9724: 0a 28 jnc $+22 ;abs 0x973a 9726: 0e 41 mov r1, r14 9728: 3e 52 add #8, r14 ;r2 As==11 972a: 0f 41 mov r1, r15 972c: 3f 50 10 00 add #16, r15 ;#0x0010 9730: b0 12 ca 9c call #0x9cca 9734: 31 50 18 00 add #24, r1 ;#0x0018 9738: 30 41 ret 973a: 3f 43 mov #-1, r15 ;r3 As==11 973c: fb 3f jmp $-8 ;abs 0x9734 0000973e <__floatsisf>: 973e: 0b 12 push r11 9740: 0a 12 push r10 9742: 31 82 sub #8, r1 ;r2 As==11 9744: f1 40 03 00 mov.b #3, 0(r1) ;#0x0003, 0x0000(r1) 9748: 00 00 974a: 0d 4f mov r15, r13 974c: 0d 5d rla r13 974e: 0d 43 clr r13 9750: 0d 6d rlc r13 9752: 4c 4d mov.b r13, r12 9754: c1 4d 01 00 mov.b r13, 1(r1) ;0x0001(r1) 9758: 0e 93 tst r14 975a: 0b 20 jnz $+24 ;abs 0x9772 975c: 0f 93 tst r15 975e: 09 20 jnz $+20 ;abs 0x9772 9760: e1 43 00 00 mov.b #2, 0(r1) ;r3 As==10, 0x0000(r1) 9764: 0f 41 mov r1, r15 9766: b0 12 c8 99 call #0x99c8 976a: 31 52 add #8, r1 ;r2 As==11 976c: 3a 41 pop r10 976e: 3b 41 pop r11 9770: 30 41 ret 9772: b1 40 1e 00 mov #30, 2(r1) ;#0x001e, 0x0002(r1) 9776: 02 00 9778: 4c 93 tst.b r12 977a: 1b 20 jnz $+56 ;abs 0x97b2 977c: 0a 4e mov r14, r10 977e: 0b 4f mov r15, r11 9780: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 9784: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 9788: 0e 4a mov r10, r14 978a: 0f 4b mov r11, r15 978c: b0 12 56 99 call #0x9956 9790: 3f 53 add #-1, r15 ;r3 As==11 9792: 1f 93 cmp #1, r15 ;r3 As==01 9794: e7 3b jl $-48 ;abs 0x9764 9796: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 979a: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 979e: 4e 4f mov.b r15, r14 97a0: 7e f0 1f 00 and.b #31, r14 ;#0x001f 97a4: 0f 20 jnz $+32 ;abs 0x97c4 97a6: 3e 40 1e 00 mov #30, r14 ;#0x001e 97aa: 0e 8f sub r15, r14 97ac: 81 4e 02 00 mov r14, 2(r1) ;0x0002(r1) 97b0: d9 3f jmp $-76 ;abs 0x9764 97b2: 0e 93 tst r14 97b4: 10 24 jz $+34 ;abs 0x97d6 97b6: 0a 4e mov r14, r10 97b8: 0b 4f mov r15, r11 97ba: 3a e3 inv r10 97bc: 3b e3 inv r11 97be: 1a 53 inc r10 97c0: 0b 63 adc r11 97c2: de 3f jmp $-66 ;abs 0x9780 97c4: 91 51 04 00 rla 4(r1) ;0x0004(r1) 97c8: 04 00 97ca: 91 61 06 00 rlc 6(r1) ;0x0006(r1) 97ce: 06 00 97d0: 7e 53 add.b #-1, r14 ;r3 As==11 97d2: f8 23 jnz $-14 ;abs 0x97c4 97d4: e8 3f jmp $-46 ;abs 0x97a6 97d6: 3f 90 00 80 cmp #-32768,r15 ;#0x8000 97da: ed 23 jnz $-36 ;abs 0x97b6 97dc: 0e 43 clr r14 97de: 3f 40 00 cf mov #-12544,r15 ;#0xcf00 97e2: c3 3f jmp $-120 ;abs 0x976a 000097e4 <__fixsfsi>: 97e4: 31 50 f4 ff add #-12, r1 ;#0xfff4 97e8: 81 4e 00 00 mov r14, 0(r1) ;0x0000(r1) 97ec: 81 4f 02 00 mov r15, 2(r1) ;0x0002(r1) 97f0: 0e 41 mov r1, r14 97f2: 2e 52 add #4, r14 ;r2 As==10 97f4: 0f 41 mov r1, r15 97f6: b0 12 a6 9b call #0x9ba6 97fa: 5f 41 04 00 mov.b 4(r1), r15 ;0x0004(r1) 97fe: 6f 93 cmp.b #2, r15 ;r3 As==10 9800: 28 24 jz $+82 ;abs 0x9852 9802: 27 28 jnc $+80 ;abs 0x9852 9804: 6f 92 cmp.b #4, r15 ;r2 As==10 9806: 07 24 jz $+16 ;abs 0x9816 9808: 1d 41 06 00 mov 6(r1), r13 ;0x0006(r1) 980c: 0d 93 tst r13 980e: 21 38 jl $+68 ;abs 0x9852 9810: 3d 90 1f 00 cmp #31, r13 ;#0x001f 9814: 09 38 jl $+20 ;abs 0x9828 9816: c1 93 05 00 tst.b 5(r1) ;0x0005(r1) 981a: 26 20 jnz $+78 ;abs 0x9868 981c: 3e 43 mov #-1, r14 ;r3 As==11 981e: 3f 40 ff 7f mov #32767, r15 ;#0x7fff 9822: 31 50 0c 00 add #12, r1 ;#0x000c 9826: 30 41 ret 9828: 1e 41 08 00 mov 8(r1), r14 ;0x0008(r1) 982c: 1f 41 0a 00 mov 10(r1), r15 ;0x000a(r1) 9830: 3c 40 1e 00 mov #30, r12 ;#0x001e 9834: 4c 8d sub.b r13, r12 9836: 4d 4c mov.b r12, r13 9838: 7d f0 1f 00 and.b #31, r13 ;#0x001f 983c: 0f 20 jnz $+32 ;abs 0x985c 983e: c1 93 05 00 tst.b 5(r1) ;0x0005(r1) 9842: ef 27 jz $-32 ;abs 0x9822 9844: 3e e3 inv r14 9846: 3f e3 inv r15 9848: 1e 53 inc r14 984a: 0f 63 adc r15 984c: 31 50 0c 00 add #12, r1 ;#0x000c 9850: 30 41 ret 9852: 0e 43 clr r14 9854: 0f 43 clr r15 9856: 31 50 0c 00 add #12, r1 ;#0x000c 985a: 30 41 ret 985c: 12 c3 clrc 985e: 0f 10 rrc r15 9860: 0e 10 rrc r14 9862: 7d 53 add.b #-1, r13 ;r3 As==11 9864: fb 23 jnz $-8 ;abs 0x985c 9866: eb 3f jmp $-40 ;abs 0x983e 9868: 0e 43 clr r14 986a: 3f 40 00 80 mov #-32768,r15 ;#0x8000 986e: 31 50 0c 00 add #12, r1 ;#0x000c 9872: 30 41 ret 00009874 <__floatunsisf>: 9874: 0b 12 push r11 9876: 0a 12 push r10 9878: 09 12 push r9 987a: 08 12 push r8 987c: 31 82 sub #8, r1 ;r2 As==11 987e: 0a 4e mov r14, r10 9880: 0b 4f mov r15, r11 9882: c1 43 01 00 mov.b #0, 1(r1) ;r3 As==00, 0x0001(r1) 9886: 0e 93 tst r14 9888: 0d 20 jnz $+28 ;abs 0x98a4 988a: 0b 93 tst r11 988c: 0b 20 jnz $+24 ;abs 0x98a4 988e: e1 43 00 00 mov.b #2, 0(r1) ;r3 As==10, 0x0000(r1) 9892: 0f 41 mov r1, r15 9894: b0 12 c8 99 call #0x99c8 9898: 31 52 add #8, r1 ;r2 As==11 989a: 38 41 pop r8 989c: 39 41 pop r9 989e: 3a 41 pop r10 98a0: 3b 41 pop r11 98a2: 30 41 ret 98a4: f1 40 03 00 mov.b #3, 0(r1) ;#0x0003, 0x0000(r1) 98a8: 00 00 98aa: b1 40 1e 00 mov #30, 2(r1) ;#0x001e, 0x0002(r1) 98ae: 02 00 98b0: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 98b4: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 98b8: 0e 4a mov r10, r14 98ba: 0f 4b mov r11, r15 98bc: b0 12 56 99 call #0x9956 98c0: 3f 53 add #-1, r15 ;r3 As==11 98c2: 0f 93 tst r15 98c4: 18 38 jl $+50 ;abs 0x98f6 98c6: e5 27 jz $-52 ;abs 0x9892 98c8: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 98cc: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) 98d0: 4e 4f mov.b r15, r14 98d2: 7e f0 1f 00 and.b #31, r14 ;#0x001f 98d6: 06 20 jnz $+14 ;abs 0x98e4 98d8: 3e 40 1e 00 mov #30, r14 ;#0x001e 98dc: 0e 8f sub r15, r14 98de: 81 4e 02 00 mov r14, 2(r1) ;0x0002(r1) 98e2: d7 3f jmp $-80 ;abs 0x9892 98e4: 91 51 04 00 rla 4(r1) ;0x0004(r1) 98e8: 04 00 98ea: 91 61 06 00 rlc 6(r1) ;0x0006(r1) 98ee: 06 00 98f0: 7e 53 add.b #-1, r14 ;r3 As==11 98f2: f8 23 jnz $-14 ;abs 0x98e4 98f4: f1 3f jmp $-28 ;abs 0x98d8 98f6: 0e 4f mov r15, r14 98f8: 3e e3 inv r14 98fa: 1e 53 inc r14 98fc: 1c 43 mov #1, r12 ;r3 As==01 98fe: 0d 43 clr r13 9900: 48 4e mov.b r14, r8 9902: 78 f0 1f 00 and.b #31, r8 ;#0x001f 9906: 04 24 jz $+10 ;abs 0x9910 9908: 0c 5c rla r12 990a: 0d 6d rlc r13 990c: 78 53 add.b #-1, r8 ;r3 As==11 990e: fc 23 jnz $-6 ;abs 0x9908 9910: 3c 53 add #-1, r12 ;r3 As==11 9912: 3d 63 addc #-1, r13 ;r3 As==11 9914: 0c fa and r10, r12 9916: 0d fb and r11, r13 9918: 18 43 mov #1, r8 ;r3 As==01 991a: 09 43 clr r9 991c: 0c 93 tst r12 991e: 04 20 jnz $+10 ;abs 0x9928 9920: 0d 93 tst r13 9922: 02 20 jnz $+6 ;abs 0x9928 9924: 08 43 clr r8 9926: 09 43 clr r9 9928: 7e f0 1f 00 and.b #31, r14 ;#0x001f 992c: 0e 20 jnz $+30 ;abs 0x994a 992e: 0d 48 mov r8, r13 9930: 0e 49 mov r9, r14 9932: 0d da bis r10, r13 9934: 0e db bis r11, r14 9936: 81 4d 04 00 mov r13, 4(r1) ;0x0004(r1) 993a: 81 4e 06 00 mov r14, 6(r1) ;0x0006(r1) 993e: 3e 40 1e 00 mov #30, r14 ;#0x001e 9942: 0e 8f sub r15, r14 9944: 81 4e 02 00 mov r14, 2(r1) ;0x0002(r1) 9948: a4 3f jmp $-182 ;abs 0x9892 994a: 12 c3 clrc 994c: 0b 10 rrc r11 994e: 0a 10 rrc r10 9950: 7e 53 add.b #-1, r14 ;r3 As==11 9952: fb 23 jnz $-8 ;abs 0x994a 9954: ec 3f jmp $-38 ;abs 0x992e 00009956 <__clzsi2>: 9956: 0b 12 push r11 9958: 0a 12 push r10 995a: 09 12 push r9 995c: 1f 93 cmp #1, r15 ;r3 As==01 995e: 17 2c jc $+48 ;abs 0x998e 9960: 3e 90 00 01 cmp #256, r14 ;#0x0100 9964: 2c 28 jnc $+90 ;abs 0x99be 9966: 3a 40 18 00 mov #24, r10 ;#0x0018 996a: 0b 43 clr r11 996c: 39 42 mov #8, r9 ;r2 As==11 996e: 0c 4e mov r14, r12 9970: 0d 4f mov r15, r13 9972: 4f 49 mov.b r9, r15 9974: 4f 93 tst.b r15 9976: 17 20 jnz $+48 ;abs 0x99a6 9978: 3c 50 f4 a9 add #-22028,r12 ;#0xa9f4 997c: 6e 4c mov.b @r12, r14 997e: 0f 43 clr r15 9980: 0a 8e sub r14, r10 9982: 0b 7f subc r15, r11 9984: 0f 4a mov r10, r15 9986: 39 41 pop r9 9988: 3a 41 pop r10 998a: 3b 41 pop r11 998c: 30 41 ret 998e: 3f 90 00 01 cmp #256, r15 ;#0x0100 9992: 0f 28 jnc $+32 ;abs 0x99b2 9994: 3a 42 mov #8, r10 ;r2 As==11 9996: 0b 43 clr r11 9998: 39 40 18 00 mov #24, r9 ;#0x0018 999c: 0c 4e mov r14, r12 999e: 0d 4f mov r15, r13 99a0: 4f 49 mov.b r9, r15 99a2: 4f 93 tst.b r15 99a4: e9 27 jz $-44 ;abs 0x9978 99a6: 12 c3 clrc 99a8: 0d 10 rrc r13 99aa: 0c 10 rrc r12 99ac: 7f 53 add.b #-1, r15 ;r3 As==11 99ae: fb 23 jnz $-8 ;abs 0x99a6 99b0: e3 3f jmp $-56 ;abs 0x9978 99b2: 3a 40 10 00 mov #16, r10 ;#0x0010 99b6: 0b 43 clr r11 99b8: 39 40 10 00 mov #16, r9 ;#0x0010 99bc: ef 3f jmp $-32 ;abs 0x999c 99be: 3a 40 20 00 mov #32, r10 ;#0x0020 99c2: 0b 43 clr r11 99c4: 09 43 clr r9 99c6: ea 3f jmp $-42 ;abs 0x999c 000099c8 <__pack_f>: 99c8: 0b 12 push r11 99ca: 0a 12 push r10 99cc: 09 12 push r9 99ce: 08 12 push r8 99d0: 07 12 push r7 99d2: 0d 4f mov r15, r13 99d4: 1e 4f 04 00 mov 4(r15), r14 ;0x0004(r15) 99d8: 1f 4f 06 00 mov 6(r15), r15 ;0x0006(r15) 99dc: 5a 4d 01 00 mov.b 1(r13), r10 ;0x0001(r13) 99e0: 6c 4d mov.b @r13, r12 99e2: 6c 93 cmp.b #2, r12 ;r3 As==10 99e4: 70 28 jnc $+226 ;abs 0x9ac6 99e6: 6c 92 cmp.b #4, r12 ;r2 As==10 99e8: 6a 24 jz $+214 ;abs 0x9abe 99ea: 6c 93 cmp.b #2, r12 ;r3 As==10 99ec: 36 24 jz $+110 ;abs 0x9a5a 99ee: 0e 93 tst r14 99f0: 32 24 jz $+102 ;abs 0x9a56 99f2: 1b 4d 02 00 mov 2(r13), r11 ;0x0002(r13) 99f6: 3b 90 82 ff cmp #-126, r11 ;#0xff82 99fa: 6d 38 jl $+220 ;abs 0x9ad6 99fc: 3b 90 80 00 cmp #128, r11 ;#0x0080 9a00: 5e 34 jge $+190 ;abs 0x9abe 9a02: 0c 4e mov r14, r12 9a04: 0d 4f mov r15, r13 9a06: 3c f0 7f 00 and #127, r12 ;#0x007f 9a0a: 0d f3 and #0, r13 ;r3 As==00 9a0c: 3c 90 40 00 cmp #64, r12 ;#0x0040 9a10: 40 24 jz $+130 ;abs 0x9a92 9a12: 3e 50 3f 00 add #63, r14 ;#0x003f 9a16: 0f 63 adc r15 9a18: 0f 93 tst r15 9a1a: 4a 38 jl $+150 ;abs 0x9ab0 9a1c: 0d 4b mov r11, r13 9a1e: 3d 50 7f 00 add #127, r13 ;#0x007f 9a22: 12 c3 clrc 9a24: 0f 10 rrc r15 9a26: 0e 10 rrc r14 9a28: 12 c3 clrc 9a2a: 0f 10 rrc r15 9a2c: 0e 10 rrc r14 9a2e: 12 c3 clrc 9a30: 0f 10 rrc r15 9a32: 0e 10 rrc r14 9a34: 12 c3 clrc 9a36: 0f 10 rrc r15 9a38: 0e 10 rrc r14 9a3a: 12 c3 clrc 9a3c: 0f 10 rrc r15 9a3e: 0e 10 rrc r14 9a40: 12 c3 clrc 9a42: 0f 10 rrc r15 9a44: 0e 10 rrc r14 9a46: 12 c3 clrc 9a48: 0f 10 rrc r15 9a4a: 0e 10 rrc r14 9a4c: 3e f3 and #-1, r14 ;r3 As==11 9a4e: 3f f0 7f 00 and #127, r15 ;#0x007f 9a52: 4d 4d mov.b r13, r13 9a54: 05 3c jmp $+12 ;abs 0x9a60 9a56: 0f 93 tst r15 9a58: cc 23 jnz $-102 ;abs 0x99f2 9a5a: 4d 43 clr.b r13 9a5c: 0e 43 clr r14 9a5e: 0f 43 clr r15 9a60: 4d 4d mov.b r13, r13 9a62: 0d 5d rla r13 9a64: 0d 5d rla r13 9a66: 0d 5d rla r13 9a68: 0d 5d rla r13 9a6a: 0d 5d rla r13 9a6c: 0d 5d rla r13 9a6e: 0d 5d rla r13 9a70: 0c 4f mov r15, r12 9a72: 3c f0 7f 00 and #127, r12 ;#0x007f 9a76: 0c dd bis r13, r12 9a78: 4f 4a mov.b r10, r15 9a7a: 0f 11 rra r15 9a7c: 0f 43 clr r15 9a7e: 0f 10 rrc r15 9a80: 0d 4c mov r12, r13 9a82: 0d df bis r15, r13 9a84: 0f 4d mov r13, r15 9a86: 37 41 pop r7 9a88: 38 41 pop r8 9a8a: 39 41 pop r9 9a8c: 3a 41 pop r10 9a8e: 3b 41 pop r11 9a90: 30 41 ret 9a92: 0d 93 tst r13 9a94: be 23 jnz $-130 ;abs 0x9a12 9a96: 0c 4e mov r14, r12 9a98: 0d 4f mov r15, r13 9a9a: 3c f0 80 00 and #128, r12 ;#0x0080 9a9e: 0d f3 and #0, r13 ;r3 As==00 9aa0: 0c 93 tst r12 9aa2: 02 20 jnz $+6 ;abs 0x9aa8 9aa4: 0d 93 tst r13 9aa6: b8 27 jz $-142 ;abs 0x9a18 9aa8: 3e 50 40 00 add #64, r14 ;#0x0040 9aac: 0f 63 adc r15 9aae: b4 3f jmp $-150 ;abs 0x9a18 9ab0: 12 c3 clrc 9ab2: 0f 10 rrc r15 9ab4: 0e 10 rrc r14 9ab6: 0d 4b mov r11, r13 9ab8: 3d 50 80 00 add #128, r13 ;#0x0080 9abc: b2 3f jmp $-154 ;abs 0x9a22 9abe: 7d 43 mov.b #-1, r13 ;r3 As==11 9ac0: 0e 43 clr r14 9ac2: 0f 43 clr r15 9ac4: cd 3f jmp $-100 ;abs 0x9a60 9ac6: 0e d3 bis #0, r14 ;r3 As==00 9ac8: 3f d0 10 00 bis #16, r15 ;#0x0010 9acc: 3e f3 and #-1, r14 ;r3 As==11 9ace: 3f f0 7f 00 and #127, r15 ;#0x007f 9ad2: 7d 43 mov.b #-1, r13 ;r3 As==11 9ad4: c5 3f jmp $-116 ;abs 0x9a60 9ad6: 37 40 82 ff mov #-126, r7 ;#0xff82 9ada: 07 8b sub r11, r7 9adc: 37 90 1a 00 cmp #26, r7 ;#0x001a 9ae0: 4f 34 jge $+160 ;abs 0x9b80 9ae2: 0c 4e mov r14, r12 9ae4: 0d 4f mov r15, r13 9ae6: 4b 47 mov.b r7, r11 9ae8: 7b f0 1f 00 and.b #31, r11 ;#0x001f 9aec: 05 24 jz $+12 ;abs 0x9af8 9aee: 12 c3 clrc 9af0: 0d 10 rrc r13 9af2: 0c 10 rrc r12 9af4: 7b 53 add.b #-1, r11 ;r3 As==11 9af6: fb 23 jnz $-8 ;abs 0x9aee 9af8: 18 43 mov #1, r8 ;r3 As==01 9afa: 09 43 clr r9 9afc: 77 f0 1f 00 and.b #31, r7 ;#0x001f 9b00: 04 24 jz $+10 ;abs 0x9b0a 9b02: 08 58 rla r8 9b04: 09 69 rlc r9 9b06: 77 53 add.b #-1, r7 ;r3 As==11 9b08: fc 23 jnz $-6 ;abs 0x9b02 9b0a: 38 53 add #-1, r8 ;r3 As==11 9b0c: 39 63 addc #-1, r9 ;r3 As==11 9b0e: 08 fe and r14, r8 9b10: 09 ff and r15, r9 9b12: 1e 43 mov #1, r14 ;r3 As==01 9b14: 0f 43 clr r15 9b16: 08 93 tst r8 9b18: 04 20 jnz $+10 ;abs 0x9b22 9b1a: 09 93 tst r9 9b1c: 02 20 jnz $+6 ;abs 0x9b22 9b1e: 0e 43 clr r14 9b20: 0f 43 clr r15 9b22: 08 4e mov r14, r8 9b24: 09 4f mov r15, r9 9b26: 08 dc bis r12, r8 9b28: 09 dd bis r13, r9 9b2a: 0e 48 mov r8, r14 9b2c: 0f 49 mov r9, r15 9b2e: 3e f0 7f 00 and #127, r14 ;#0x007f 9b32: 0f f3 and #0, r15 ;r3 As==00 9b34: 3e 90 40 00 cmp #64, r14 ;#0x0040 9b38: 26 24 jz $+78 ;abs 0x9b86 9b3a: 38 50 3f 00 add #63, r8 ;#0x003f 9b3e: 09 63 adc r9 9b40: 0e 48 mov r8, r14 9b42: 0f 49 mov r9, r15 9b44: 12 c3 clrc 9b46: 0f 10 rrc r15 9b48: 0e 10 rrc r14 9b4a: 12 c3 clrc 9b4c: 0f 10 rrc r15 9b4e: 0e 10 rrc r14 9b50: 12 c3 clrc 9b52: 0f 10 rrc r15 9b54: 0e 10 rrc r14 9b56: 12 c3 clrc 9b58: 0f 10 rrc r15 9b5a: 0e 10 rrc r14 9b5c: 12 c3 clrc 9b5e: 0f 10 rrc r15 9b60: 0e 10 rrc r14 9b62: 12 c3 clrc 9b64: 0f 10 rrc r15 9b66: 0e 10 rrc r14 9b68: 12 c3 clrc 9b6a: 0f 10 rrc r15 9b6c: 0e 10 rrc r14 9b6e: 3e f3 and #-1, r14 ;r3 As==11 9b70: 3f f0 7f 00 and #127, r15 ;#0x007f 9b74: 5d 43 mov.b #1, r13 ;r3 As==01 9b76: 39 90 00 40 cmp #16384, r9 ;#0x4000 9b7a: 72 2f jc $-282 ;abs 0x9a60 9b7c: 4d 43 clr.b r13 9b7e: 70 3f jmp $-286 ;abs 0x9a60 9b80: 08 43 clr r8 9b82: 09 43 clr r9 9b84: da 3f jmp $-74 ;abs 0x9b3a 9b86: 0f 93 tst r15 9b88: d8 23 jnz $-78 ;abs 0x9b3a 9b8a: 0e 48 mov r8, r14 9b8c: 0f 49 mov r9, r15 9b8e: 3e f0 80 00 and #128, r14 ;#0x0080 9b92: 0f f3 and #0, r15 ;r3 As==00 9b94: 0e 93 tst r14 9b96: 04 24 jz $+10 ;abs 0x9ba0 9b98: 38 50 40 00 add #64, r8 ;#0x0040 9b9c: 09 63 adc r9 9b9e: d0 3f jmp $-94 ;abs 0x9b40 9ba0: 0f 93 tst r15 9ba2: ce 27 jz $-98 ;abs 0x9b40 9ba4: f9 3f jmp $-12 ;abs 0x9b98 00009ba6 <__unpack_f>: 9ba6: 0b 12 push r11 9ba8: 0a 12 push r10 9baa: 2a 4f mov @r15, r10 9bac: 5b 4f 02 00 mov.b 2(r15), r11 ;0x0002(r15) 9bb0: 3b f0 7f 00 and #127, r11 ;#0x007f 9bb4: 1d 4f 02 00 mov 2(r15), r13 ;0x0002(r15) 9bb8: 12 c3 clrc 9bba: 0d 10 rrc r13 9bbc: 12 c3 clrc 9bbe: 0d 10 rrc r13 9bc0: 12 c3 clrc 9bc2: 0d 10 rrc r13 9bc4: 12 c3 clrc 9bc6: 0d 10 rrc r13 9bc8: 12 c3 clrc 9bca: 0d 10 rrc r13 9bcc: 12 c3 clrc 9bce: 0d 10 rrc r13 9bd0: 12 c3 clrc 9bd2: 0d 10 rrc r13 9bd4: 4d 4d mov.b r13, r13 9bd6: 5f 4f 03 00 mov.b 3(r15), r15 ;0x0003(r15) 9bda: 3f b0 80 00 bit #128, r15 ;#0x0080 9bde: 0f 43 clr r15 9be0: 0f 6f rlc r15 9be2: ce 4f 01 00 mov.b r15, 1(r14) ;0x0001(r14) 9be6: 0d 93 tst r13 9be8: 2d 20 jnz $+92 ;abs 0x9c44 9bea: 0a 93 tst r10 9bec: 51 24 jz $+164 ;abs 0x9c90 9bee: be 40 82 ff mov #-126, 2(r14) ;#0xff82, 0x0002(r14) 9bf2: 02 00 9bf4: 0c 4a mov r10, r12 9bf6: 0d 4b mov r11, r13 9bf8: 0c 5c rla r12 9bfa: 0d 6d rlc r13 9bfc: 0c 5c rla r12 9bfe: 0d 6d rlc r13 9c00: 0c 5c rla r12 9c02: 0d 6d rlc r13 9c04: 0c 5c rla r12 9c06: 0d 6d rlc r13 9c08: 0c 5c rla r12 9c0a: 0d 6d rlc r13 9c0c: 0c 5c rla r12 9c0e: 0d 6d rlc r13 9c10: 0c 5c rla r12 9c12: 0d 6d rlc r13 9c14: fe 40 03 00 mov.b #3, 0(r14) ;#0x0003, 0x0000(r14) 9c18: 00 00 9c1a: 3d 90 00 40 cmp #16384, r13 ;#0x4000 9c1e: 0b 2c jc $+24 ;abs 0x9c36 9c20: 3f 40 81 ff mov #-127, r15 ;#0xff81 9c24: 0c 5c rla r12 9c26: 0d 6d rlc r13 9c28: 0a 4f mov r15, r10 9c2a: 3f 53 add #-1, r15 ;r3 As==11 9c2c: 3d 90 00 40 cmp #16384, r13 ;#0x4000 9c30: f9 2b jnc $-12 ;abs 0x9c24 9c32: 8e 4a 02 00 mov r10, 2(r14) ;0x0002(r14) 9c36: 8e 4c 04 00 mov r12, 4(r14) ;0x0004(r14) 9c3a: 8e 4d 06 00 mov r13, 6(r14) ;0x0006(r14) 9c3e: 3a 41 pop r10 9c40: 3b 41 pop r11 9c42: 30 41 ret 9c44: 3d 90 ff 00 cmp #255, r13 ;#0x00ff 9c48: 2a 24 jz $+86 ;abs 0x9c9e 9c4a: 3d 50 81 ff add #-127, r13 ;#0xff81 9c4e: 8e 4d 02 00 mov r13, 2(r14) ;0x0002(r14) 9c52: fe 40 03 00 mov.b #3, 0(r14) ;#0x0003, 0x0000(r14) 9c56: 00 00 9c58: 0c 4a mov r10, r12 9c5a: 0d 4b mov r11, r13 9c5c: 0c 5c rla r12 9c5e: 0d 6d rlc r13 9c60: 0c 5c rla r12 9c62: 0d 6d rlc r13 9c64: 0c 5c rla r12 9c66: 0d 6d rlc r13 9c68: 0c 5c rla r12 9c6a: 0d 6d rlc r13 9c6c: 0c 5c rla r12 9c6e: 0d 6d rlc r13 9c70: 0c 5c rla r12 9c72: 0d 6d rlc r13 9c74: 0c 5c rla r12 9c76: 0d 6d rlc r13 9c78: 0a 4c mov r12, r10 9c7a: 0b 4d mov r13, r11 9c7c: 0a d3 bis #0, r10 ;r3 As==00 9c7e: 3b d0 00 40 bis #16384, r11 ;#0x4000 9c82: 8e 4a 04 00 mov r10, 4(r14) ;0x0004(r14) 9c86: 8e 4b 06 00 mov r11, 6(r14) ;0x0006(r14) 9c8a: 3a 41 pop r10 9c8c: 3b 41 pop r11 9c8e: 30 41 ret 9c90: 0b 93 tst r11 9c92: ad 23 jnz $-164 ;abs 0x9bee 9c94: ee 43 00 00 mov.b #2, 0(r14) ;r3 As==10, 0x0000(r14) 9c98: 3a 41 pop r10 9c9a: 3b 41 pop r11 9c9c: 30 41 ret 9c9e: 0a 93 tst r10 9ca0: 0c 24 jz $+26 ;abs 0x9cba 9ca2: 0c 4a mov r10, r12 9ca4: 0d 4b mov r11, r13 9ca6: 0c f3 and #0, r12 ;r3 As==00 9ca8: 3d f0 10 00 and #16, r13 ;#0x0010 9cac: 0c 93 tst r12 9cae: 02 20 jnz $+6 ;abs 0x9cb4 9cb0: 0d 93 tst r13 9cb2: 08 24 jz $+18 ;abs 0x9cc4 9cb4: de 43 00 00 mov.b #1, 0(r14) ;r3 As==01, 0x0000(r14) 9cb8: e4 3f jmp $-54 ;abs 0x9c82 9cba: 0b 93 tst r11 9cbc: f2 23 jnz $-26 ;abs 0x9ca2 9cbe: ee 42 00 00 mov.b #4, 0(r14) ;r2 As==10, 0x0000(r14) 9cc2: e3 3f jmp $-56 ;abs 0x9c8a 9cc4: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) 9cc8: dc 3f jmp $-70 ;abs 0x9c82 00009cca <__fpcmp_parts_f>: 9cca: 0b 12 push r11 9ccc: 6d 4f mov.b @r15, r13 9cce: 6d 93 cmp.b #2, r13 ;r3 As==10 9cd0: 12 28 jnc $+38 ;abs 0x9cf6 9cd2: 6c 4e mov.b @r14, r12 9cd4: 6c 93 cmp.b #2, r12 ;r3 As==10 9cd6: 0f 28 jnc $+32 ;abs 0x9cf6 9cd8: 6d 92 cmp.b #4, r13 ;r2 As==10 9cda: 41 24 jz $+132 ;abs 0x9d5e 9cdc: 6c 92 cmp.b #4, r12 ;r2 As==10 9cde: 11 24 jz $+36 ;abs 0x9d02 9ce0: 6d 93 cmp.b #2, r13 ;r3 As==10 9ce2: 0d 24 jz $+28 ;abs 0x9cfe 9ce4: 6c 93 cmp.b #2, r12 ;r3 As==10 9ce6: 14 24 jz $+42 ;abs 0x9d10 9ce8: 5d 4f 01 00 mov.b 1(r15), r13 ;0x0001(r15) 9cec: 5d 9e 01 00 cmp.b 1(r14), r13 ;0x0001(r14) 9cf0: 14 24 jz $+42 ;abs 0x9d1a 9cf2: 4d 93 tst.b r13 9cf4: 09 20 jnz $+20 ;abs 0x9d08 9cf6: 1e 43 mov #1, r14 ;r3 As==01 9cf8: 0f 4e mov r14, r15 9cfa: 3b 41 pop r11 9cfc: 30 41 ret 9cfe: 6c 93 cmp.b #2, r12 ;r3 As==10 9d00: 28 24 jz $+82 ;abs 0x9d52 9d02: ce 93 01 00 tst.b 1(r14) ;0x0001(r14) 9d06: f7 23 jnz $-16 ;abs 0x9cf6 9d08: 3e 43 mov #-1, r14 ;r3 As==11 9d0a: 0f 4e mov r14, r15 9d0c: 3b 41 pop r11 9d0e: 30 41 ret 9d10: cf 93 01 00 tst.b 1(r15) ;0x0001(r15) 9d14: f0 27 jz $-30 ;abs 0x9cf6 9d16: 3e 43 mov #-1, r14 ;r3 As==11 9d18: f8 3f jmp $-14 ;abs 0x9d0a 9d1a: 1b 4f 02 00 mov 2(r15), r11 ;0x0002(r15) 9d1e: 1c 4e 02 00 mov 2(r14), r12 ;0x0002(r14) 9d22: 0c 9b cmp r11, r12 9d24: e6 3b jl $-50 ;abs 0x9cf2 9d26: 0b 9c cmp r12, r11 9d28: 16 38 jl $+46 ;abs 0x9d56 9d2a: 1b 4f 04 00 mov 4(r15), r11 ;0x0004(r15) 9d2e: 1f 4f 06 00 mov 6(r15), r15 ;0x0006(r15) 9d32: 1c 4e 04 00 mov 4(r14), r12 ;0x0004(r14) 9d36: 1e 4e 06 00 mov 6(r14), r14 ;0x0006(r14) 9d3a: 0e 9f cmp r15, r14 9d3c: da 2b jnc $-74 ;abs 0x9cf2 9d3e: 0f 9e cmp r14, r15 9d40: 02 28 jnc $+6 ;abs 0x9d46 9d42: 0c 9b cmp r11, r12 9d44: d6 2b jnc $-82 ;abs 0x9cf2 9d46: 0f 9e cmp r14, r15 9d48: 06 28 jnc $+14 ;abs 0x9d56 9d4a: 0e 9f cmp r15, r14 9d4c: 02 28 jnc $+6 ;abs 0x9d52 9d4e: 0b 9c cmp r12, r11 9d50: 02 28 jnc $+6 ;abs 0x9d56 9d52: 0e 43 clr r14 9d54: d1 3f jmp $-92 ;abs 0x9cf8 9d56: 4d 93 tst.b r13 9d58: ce 23 jnz $-98 ;abs 0x9cf6 9d5a: 3e 43 mov #-1, r14 ;r3 As==11 9d5c: d6 3f jmp $-82 ;abs 0x9d0a 9d5e: 6c 92 cmp.b #4, r12 ;r2 As==10 9d60: d7 23 jnz $-80 ;abs 0x9d10 9d62: 5e 4e 01 00 mov.b 1(r14), r14 ;0x0001(r14) 9d66: 5f 4f 01 00 mov.b 1(r15), r15 ;0x0001(r15) 9d6a: 0e 8f sub r15, r14 9d6c: c5 3f jmp $-116 ;abs 0x9cf8 00009d6e : 9d6e: 6d 4f mov.b @r15, r13 9d70: 4d 9e cmp.b r14, r13 9d72: 05 24 jz $+12 ;abs 0x9d7e 9d74: 4d 93 tst.b r13 9d76: 02 24 jz $+6 ;abs 0x9d7c 9d78: 1f 53 inc r15 9d7a: f9 3f jmp $-12 ;abs 0x9d6e 9d7c: 0f 43 clr r15 9d7e: 30 41 ret 00009d80 : 9d80: 0b 12 push r11 9d82: 0d 93 tst r13 9d84: 0a 24 jz $+22 ;abs 0x9d9a 9d86: 7b 4f mov.b @r15+, r11 9d88: 7c 4e mov.b @r14+, r12 9d8a: 4b 9c cmp.b r12, r11 9d8c: 04 24 jz $+10 ;abs 0x9d96 9d8e: 4f 4b mov.b r11, r15 9d90: 4e 4c mov.b r12, r14 9d92: 0f 8e sub r14, r15 9d94: 03 3c jmp $+8 ;abs 0x9d9c 9d96: 3d 53 add #-1, r13 ;r3 As==11 9d98: f4 3f jmp $-22 ;abs 0x9d82 9d9a: 0f 43 clr r15 9d9c: 3b 41 pop r11 9d9e: 30 41 ret 00009da0 : 9da0: 0b 12 push r11 9da2: 0a 12 push r10 9da4: 09 12 push r9 9da6: 08 12 push r8 9da8: 3d 90 06 00 cmp #6, r13 ;#0x0006 9dac: 09 2c jc $+20 ;abs 0x9dc0 9dae: 0c 4f mov r15, r12 9db0: 04 3c jmp $+10 ;abs 0x9dba 9db2: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 9db6: 1c 53 inc r12 9db8: 3d 53 add #-1, r13 ;r3 As==11 9dba: 0d 93 tst r13 9dbc: fa 23 jnz $-10 ;abs 0x9db2 9dbe: 20 3c jmp $+66 ;abs 0x9e00 9dc0: 4e 4e mov.b r14, r14 9dc2: 4b 4e mov.b r14, r11 9dc4: 0b 93 tst r11 9dc6: 03 24 jz $+8 ;abs 0x9dce 9dc8: 0c 4b mov r11, r12 9dca: 8c 10 swpb r12 9dcc: 0b dc bis r12, r11 9dce: 1f b3 bit #1, r15 ;r3 As==01 9dd0: 06 24 jz $+14 ;abs 0x9dde 9dd2: 3d 53 add #-1, r13 ;r3 As==11 9dd4: cf 4e 00 00 mov.b r14, 0(r15) ;0x0000(r15) 9dd8: 09 4f mov r15, r9 9dda: 19 53 inc r9 9ddc: 01 3c jmp $+4 ;abs 0x9de0 9dde: 09 4f mov r15, r9 9de0: 0c 4d mov r13, r12 9de2: 12 c3 clrc 9de4: 0c 10 rrc r12 9de6: 0a 49 mov r9, r10 9de8: 08 4c mov r12, r8 9dea: 8a 4b 00 00 mov r11, 0(r10) ;0x0000(r10) 9dee: 2a 53 incd r10 9df0: 38 53 add #-1, r8 ;r3 As==11 9df2: fb 23 jnz $-8 ;abs 0x9dea 9df4: 0c 5c rla r12 9df6: 0c 59 add r9, r12 9df8: 1d f3 and #1, r13 ;r3 As==01 9dfa: 02 24 jz $+6 ;abs 0x9e00 9dfc: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 9e00: 38 41 pop r8 9e02: 39 41 pop r9 9e04: 3a 41 pop r10 9e06: 3b 41 pop r11 9e08: 30 41 ret 00009e0a : 9e0a: 0b 12 push r11 9e0c: 0a 12 push r10 9e0e: 09 12 push r9 9e10: 08 12 push r8 9e12: 07 12 push r7 9e14: 0b 4f mov r15, r11 9e16: 69 4e mov.b @r14, r9 9e18: 49 93 tst.b r9 9e1a: 1b 24 jz $+56 ;abs 0x9e52 9e1c: 0a 4e mov r14, r10 9e1e: 1a 53 inc r10 9e20: 0d 4e mov r14, r13 9e22: 1d 53 inc r13 9e24: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 9e28: fc 23 jnz $-6 ;abs 0x9e22 9e2a: 07 4d mov r13, r7 9e2c: 07 8a sub r10, r7 9e2e: 01 3c jmp $+4 ;abs 0x9e32 9e30: 0b 48 mov r8, r11 9e32: 6f 4b mov.b @r11, r15 9e34: 4f 93 tst.b r15 9e36: 0c 24 jz $+26 ;abs 0x9e50 9e38: 08 4b mov r11, r8 9e3a: 18 53 inc r8 9e3c: 4f 99 cmp.b r9, r15 9e3e: f8 23 jnz $-14 ;abs 0x9e30 9e40: 0d 47 mov r7, r13 9e42: 0e 4a mov r10, r14 9e44: 0f 48 mov r8, r15 9e46: b0 12 dc a7 call #0xa7dc 9e4a: 0f 93 tst r15 9e4c: f1 23 jnz $-28 ;abs 0x9e30 9e4e: 01 3c jmp $+4 ;abs 0x9e52 9e50: 0b 43 clr r11 9e52: 0f 4b mov r11, r15 9e54: 37 41 pop r7 9e56: 38 41 pop r8 9e58: 39 41 pop r9 9e5a: 3a 41 pop r10 9e5c: 3b 41 pop r11 9e5e: 30 41 ret 00009e60 : 9e60: 0b 12 push r11 9e62: 0e 4f mov r15, r14 9e64: 01 3c jmp $+4 ;abs 0x9e68 9e66: 1e 53 inc r14 9e68: 6f 4e mov.b @r14, r15 9e6a: 7f 90 20 00 cmp.b #32, r15 ;#0x0020 9e6e: fb 27 jz $-8 ;abs 0x9e66 9e70: 7f 90 09 00 cmp.b #9, r15 ;#0x0009 9e74: f8 27 jz $-14 ;abs 0x9e66 9e76: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 9e7a: f5 27 jz $-20 ;abs 0x9e66 9e7c: 7f 90 0c 00 cmp.b #12, r15 ;#0x000c 9e80: f2 27 jz $-26 ;abs 0x9e66 9e82: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d 9e86: ef 27 jz $-32 ;abs 0x9e66 9e88: 7f 90 0b 00 cmp.b #11, r15 ;#0x000b 9e8c: ec 27 jz $-38 ;abs 0x9e66 9e8e: 7f 90 2d 00 cmp.b #45, r15 ;#0x002d 9e92: 03 20 jnz $+8 ;abs 0x9e9a 9e94: 1e 53 inc r14 9e96: 1b 43 mov #1, r11 ;r3 As==01 9e98: 05 3c jmp $+12 ;abs 0x9ea4 9e9a: 7f 90 2b 00 cmp.b #43, r15 ;#0x002b 9e9e: 01 20 jnz $+4 ;abs 0x9ea2 9ea0: 1e 53 inc r14 9ea2: 0b 43 clr r11 9ea4: 6f 4e mov.b @r14, r15 9ea6: 8f 11 sxt r15 9ea8: 3f 50 d0 ff add #-48, r15 ;#0xffd0 9eac: 3f 90 0a 00 cmp #10, r15 ;#0x000a 9eb0: 19 2c jc $+52 ;abs 0x9ee4 9eb2: 0d 43 clr r13 9eb4: 7c 4e mov.b @r14+, r12 9eb6: 8c 11 sxt r12 9eb8: 0f 4c mov r12, r15 9eba: 3f 50 d0 ff add #-48, r15 ;#0xffd0 9ebe: 0f 5d add r13, r15 9ec0: 6d 4e mov.b @r14, r13 9ec2: 8d 11 sxt r13 9ec4: 3d 50 d0 ff add #-48, r13 ;#0xffd0 9ec8: 3d 90 0a 00 cmp #10, r13 ;#0x000a 9ecc: 06 2c jc $+14 ;abs 0x9eda 9ece: 0f 5f rla r15 9ed0: 0d 4f mov r15, r13 9ed2: 0d 5d rla r13 9ed4: 0d 5d rla r13 9ed6: 0d 5f add r15, r13 9ed8: ed 3f jmp $-36 ;abs 0x9eb4 9eda: 0b 93 tst r11 9edc: 04 24 jz $+10 ;abs 0x9ee6 9ede: 3f e3 inv r15 9ee0: 1f 53 inc r15 9ee2: 01 3c jmp $+4 ;abs 0x9ee6 9ee4: 0f 43 clr r15 9ee6: 3b 41 pop r11 9ee8: 30 41 ret 00009eea : 9eea: 1e 42 02 02 mov &0x0202,r14 9eee: 1e 93 cmp #1, r14 ;r3 As==01 9ef0: 0b 38 jl $+24 ;abs 0x9f08 9ef2: 1d 42 00 02 mov &0x0200,r13 9ef6: cd 4f 00 00 mov.b r15, 0(r13) ;0x0000(r13) 9efa: 1d 53 inc r13 9efc: 82 4d 00 02 mov r13, &0x0200 9f00: 3e 53 add #-1, r14 ;r3 As==11 9f02: 82 4e 02 02 mov r14, &0x0202 9f06: 30 41 ret 9f08: 3f 43 mov #-1, r15 ;r3 As==11 9f0a: 30 41 ret 00009f0c : 9f0c: 0b 12 push r11 9f0e: 0a 12 push r10 9f10: 21 83 decd r1 9f12: 81 4e 00 00 mov r14, 0(r1) ;0x0000(r1) 9f16: 1a 42 00 02 mov &0x0200,r10 9f1a: 1b 42 02 02 mov &0x0202,r11 9f1e: 0d 4e mov r14, r13 9f20: 0e 4f mov r15, r14 9f22: 3f 40 ea 9e mov #-24854,r15 ;#0x9eea 9f26: b0 12 3e a1 call #0xa13e 9f2a: 0f 9b cmp r11, r15 9f2c: 05 38 jl $+12 ;abs 0x9f38 9f2e: 0e 4a mov r10, r14 9f30: 0e 5b add r11, r14 9f32: ce 43 ff ff mov.b #0, -1(r14) ;r3 As==00, 0xffff(r14) 9f36: 04 3c jmp $+10 ;abs 0x9f40 9f38: 1e 42 00 02 mov &0x0200,r14 9f3c: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) 9f40: 21 53 incd r1 9f42: 3a 41 pop r10 9f44: 3b 41 pop r11 9f46: 30 41 ret 00009f48 : 9f48: 92 41 02 00 mov 2(r1), &0x0200 ;0x0002(r1) 9f4c: 00 02 9f4e: b2 40 ff 7f mov #32767, &0x0202 ;#0x7fff 9f52: 02 02 9f54: 0e 41 mov r1, r14 9f56: 3e 50 06 00 add #6, r14 ;#0x0006 9f5a: 1f 41 04 00 mov 4(r1), r15 ;0x0004(r1) 9f5e: b0 12 0c 9f call #0x9f0c 9f62: 30 41 ret 00009f64 : 9f64: 92 41 02 00 mov 2(r1), &0x0200 ;0x0002(r1) 9f68: 00 02 9f6a: 92 41 04 00 mov 4(r1), &0x0202 ;0x0004(r1) 9f6e: 02 02 9f70: 0e 41 mov r1, r14 9f72: 3e 52 add #8, r14 ;r2 As==11 9f74: 1f 41 06 00 mov 6(r1), r15 ;0x0006(r1) 9f78: b0 12 0c 9f call #0x9f0c 9f7c: 30 41 ret 00009f7e : 9f7e: 0c 4e mov r14, r12 9f80: 82 4f 00 02 mov r15, &0x0200 9f84: b2 40 ff 7f mov #32767, &0x0202 ;#0x7fff 9f88: 02 02 9f8a: 0e 4d mov r13, r14 9f8c: 0f 4c mov r12, r15 9f8e: b0 12 0c 9f call #0x9f0c 9f92: 30 41 ret 00009f94 : 9f94: 82 4f 00 02 mov r15, &0x0200 9f98: 82 4e 02 02 mov r14, &0x0202 9f9c: 0e 4c mov r12, r14 9f9e: 0f 4d mov r13, r15 9fa0: b0 12 0c 9f call #0x9f0c 9fa4: 30 41 ret 00009fa6 : 9fa6: 0b 12 push r11 9fa8: 0a 12 push r10 9faa: 09 12 push r9 9fac: 08 12 push r8 9fae: 07 12 push r7 9fb0: 06 12 push r6 9fb2: 05 12 push r5 9fb4: 04 12 push r4 9fb6: 31 82 sub #8, r1 ;r2 As==11 9fb8: 08 4f mov r15, r8 9fba: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 9fbe: 09 4d mov r13, r9 9fc0: 1f 41 1a 00 mov 26(r1), r15 ;0x001a(r1) 9fc4: 1d 41 1c 00 mov 28(r1), r13 ;0x001c(r1) 9fc8: 4c 4d mov.b r13, r12 9fca: 04 4d mov r13, r4 9fcc: 84 10 swpb r4 9fce: 45 44 mov.b r4, r5 9fd0: 4e 4f mov.b r15, r14 9fd2: 7e b0 40 00 bit.b #64, r14 ;#0x0040 9fd6: 11 24 jz $+36 ;abs 0x9ffa 9fd8: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) 9fdc: 00 00 9fde: 0e 4f mov r15, r14 9fe0: 8e 10 swpb r14 9fe2: 5e f3 and.b #1, r14 ;r3 As==01 9fe4: 03 24 jz $+8 ;abs 0x9fec 9fe6: 7e 40 58 00 mov.b #88, r14 ;#0x0058 9fea: 02 3c jmp $+6 ;abs 0x9ff0 9fec: 7e 40 78 00 mov.b #120, r14 ;#0x0078 9ff0: c1 4e 01 00 mov.b r14, 1(r1) ;0x0001(r1) 9ff4: 0c 41 mov r1, r12 9ff6: 2c 53 incd r12 9ff8: 0f 3c jmp $+32 ;abs 0xa018 9ffa: 7e f0 20 00 and.b #32, r14 ;#0x0020 9ffe: 04 24 jz $+10 ;abs 0xa008 a000: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) a004: 00 00 a006: 04 3c jmp $+10 ;abs 0xa010 a008: 4c 93 tst.b r12 a00a: 05 24 jz $+12 ;abs 0xa016 a00c: c1 4d 00 00 mov.b r13, 0(r1) ;0x0000(r1) a010: 0c 41 mov r1, r12 a012: 1c 53 inc r12 a014: 01 3c jmp $+4 ;abs 0xa018 a016: 0c 41 mov r1, r12 a018: 0a 4c mov r12, r10 a01a: 8c 10 swpb r12 a01c: 8c 11 sxt r12 a01e: 8c 10 swpb r12 a020: 8c 11 sxt r12 a022: 0b 4c mov r12, r11 a024: 06 41 mov r1, r6 a026: 0c 41 mov r1, r12 a028: 8c 10 swpb r12 a02a: 8c 11 sxt r12 a02c: 8c 10 swpb r12 a02e: 8c 11 sxt r12 a030: 07 4c mov r12, r7 a032: 0a 86 sub r6, r10 a034: 0b 77 subc r7, r11 a036: 0e 4f mov r15, r14 a038: 8e 10 swpb r14 a03a: c1 4e 02 00 mov.b r14, 2(r1) ;0x0002(r1) a03e: 6e f2 and.b #4, r14 ;r2 As==10 a040: 02 24 jz $+6 ;abs 0xa046 a042: 07 45 mov r5, r7 a044: 01 3c jmp $+4 ;abs 0xa048 a046: 37 43 mov #-1, r7 ;r3 As==11 a048: 4f 4f mov.b r15, r15 a04a: 7f b0 10 00 bit.b #16, r15 ;#0x0010 a04e: 3c 20 jnz $+122 ;abs 0xa0c8 a050: 1d 41 04 00 mov 4(r1), r13 ;0x0004(r1) a054: 3d 53 add #-1, r13 ;r3 As==11 a056: 1d 53 inc r13 a058: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) a05c: fc 23 jnz $-6 ;abs 0xa056 a05e: 1d 81 04 00 sub 4(r1), r13 ;0x0004(r1) a062: 09 9a cmp r10, r9 a064: 02 28 jnc $+6 ;abs 0xa06a a066: 09 8a sub r10, r9 a068: 01 3c jmp $+4 ;abs 0xa06c a06a: 09 43 clr r9 a06c: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) a070: 05 24 jz $+12 ;abs 0xa07c a072: 09 95 cmp r5, r9 a074: 02 28 jnc $+6 ;abs 0xa07a a076: 09 85 sub r5, r9 a078: 01 3c jmp $+4 ;abs 0xa07c a07a: 09 43 clr r9 a07c: 05 4d mov r13, r5 a07e: 07 9d cmp r13, r7 a080: 01 2c jc $+4 ;abs 0xa084 a082: 05 47 mov r7, r5 a084: 4f 93 tst.b r15 a086: 0d 38 jl $+28 ;abs 0xa0a2 a088: f1 40 20 00 mov.b #32, 6(r1) ;#0x0020, 0x0006(r1) a08c: 06 00 a08e: 06 43 clr r6 a090: 0b 43 clr r11 a092: 0e 3c jmp $+30 ;abs 0xa0b0 a094: 0f 41 mov r1, r15 a096: 0f 56 add r6, r15 a098: 6f 4f mov.b @r15, r15 a09a: 8f 11 sxt r15 a09c: 16 53 inc r6 a09e: 88 12 call r8 a0a0: 01 3c jmp $+4 ;abs 0xa0a4 a0a2: 06 43 clr r6 a0a4: 06 9a cmp r10, r6 a0a6: f6 3b jl $-18 ;abs 0xa094 a0a8: 0b 4a mov r10, r11 a0aa: f1 40 30 00 mov.b #48, 6(r1) ;#0x0030, 0x0006(r1) a0ae: 06 00 a0b0: 05 8b sub r11, r5 a0b2: 05 3c jmp $+12 ;abs 0xa0be a0b4: 5f 41 06 00 mov.b 6(r1), r15 ;0x0006(r1) a0b8: 8f 11 sxt r15 a0ba: 88 12 call r8 a0bc: 1b 53 inc r11 a0be: 0f 45 mov r5, r15 a0c0: 0f 5b add r11, r15 a0c2: 0f 99 cmp r9, r15 a0c4: f7 2b jnc $-16 ;abs 0xa0b4 a0c6: 0a 3c jmp $+22 ;abs 0xa0dc a0c8: 06 43 clr r6 a0ca: 0b 43 clr r11 a0cc: 07 3c jmp $+16 ;abs 0xa0dc a0ce: 1b 53 inc r11 a0d0: 0f 41 mov r1, r15 a0d2: 0f 56 add r6, r15 a0d4: 6f 4f mov.b @r15, r15 a0d6: 8f 11 sxt r15 a0d8: 16 53 inc r6 a0da: 88 12 call r8 a0dc: 06 9a cmp r10, r6 a0de: f7 3b jl $-16 ;abs 0xa0ce a0e0: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) a0e4: 02 24 jz $+6 ;abs 0xa0ea a0e6: 4a 44 mov.b r4, r10 a0e8: 08 3c jmp $+18 ;abs 0xa0fa a0ea: 1a 41 04 00 mov 4(r1), r10 ;0x0004(r1) a0ee: 0a 8b sub r11, r10 a0f0: 0d 3c jmp $+28 ;abs 0xa10c a0f2: 3f 40 30 00 mov #48, r15 ;#0x0030 a0f6: 88 12 call r8 a0f8: 7a 53 add.b #-1, r10 ;r3 As==11 a0fa: 4a 93 tst.b r10 a0fc: fa 23 jnz $-10 ;abs 0xa0f2 a0fe: 44 44 mov.b r4, r4 a100: 0b 54 add r4, r11 a102: f3 3f jmp $-24 ;abs 0xa0ea a104: 37 53 add #-1, r7 ;r3 As==11 a106: 8f 11 sxt r15 a108: 88 12 call r8 a10a: 1b 53 inc r11 a10c: 0f 4a mov r10, r15 a10e: 0f 5b add r11, r15 a110: 6f 4f mov.b @r15, r15 a112: 4f 93 tst.b r15 a114: 07 24 jz $+16 ;abs 0xa124 a116: 07 93 tst r7 a118: f5 23 jnz $-20 ;abs 0xa104 a11a: 04 3c jmp $+10 ;abs 0xa124 a11c: 3f 40 20 00 mov #32, r15 ;#0x0020 a120: 88 12 call r8 a122: 1b 53 inc r11 a124: 0b 99 cmp r9, r11 a126: fa 2b jnc $-10 ;abs 0xa11c a128: 0f 4b mov r11, r15 a12a: 31 52 add #8, r1 ;r2 As==11 a12c: 34 41 pop r4 a12e: 35 41 pop r5 a130: 36 41 pop r6 a132: 37 41 pop r7 a134: 38 41 pop r8 a136: 39 41 pop r9 a138: 3a 41 pop r10 a13a: 3b 41 pop r11 a13c: 30 41 ret 0000a13e : a13e: 0b 12 push r11 a140: 0a 12 push r10 a142: 09 12 push r9 a144: 08 12 push r8 a146: 07 12 push r7 a148: 06 12 push r6 a14a: 05 12 push r5 a14c: 04 12 push r4 a14e: 31 50 b6 ff add #-74, r1 ;#0xffb6 a152: 81 4f 3a 00 mov r15, 58(r1) ;0x003a(r1) a156: 06 4e mov r14, r6 a158: 05 4d mov r13, r5 a15a: 81 4e 3e 00 mov r14, 62(r1) ;0x003e(r1) a15e: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) a162: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a166: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) a16a: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) a16e: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) a172: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) a176: 07 43 clr r7 a178: 81 43 2c 00 mov #0, 44(r1) ;r3 As==00, 0x002c(r1) a17c: 0e 41 mov r1, r14 a17e: 3e 50 1c 00 add #28, r14 ;#0x001c a182: 81 4e 1c 00 mov r14, 28(r1) ;0x001c(r1) a186: 30 40 b8 a7 br #0xa7b8 a18a: 0f 46 mov r6, r15 a18c: 1f 53 inc r15 a18e: 81 4f 40 00 mov r15, 64(r1) ;0x0040(r1) a192: 07 93 tst r7 a194: 1e 20 jnz $+62 ;abs 0xa1d2 a196: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 a19a: 13 20 jnz $+40 ;abs 0xa1c2 a19c: 81 43 00 00 mov #0, 0(r1) ;r3 As==00, 0x0000(r1) a1a0: 81 43 02 00 mov #0, 2(r1) ;r3 As==00, 0x0002(r1) a1a4: 81 46 3e 00 mov r6, 62(r1) ;0x003e(r1) a1a8: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) a1ac: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a1b0: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) a1b4: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) a1b8: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) a1bc: 30 40 ae a7 br #0xa7ae a1c0: 05 47 mov r7, r5 a1c2: 8e 11 sxt r14 a1c4: 0f 4e mov r14, r15 a1c6: 91 12 3c 00 call 60(r1) ;0x003c(r1) a1ca: 91 53 2c 00 inc 44(r1) ;0x002c(r1) a1ce: 30 40 94 a7 br #0xa794 a1d2: 7e 90 63 00 cmp.b #99, r14 ;#0x0063 a1d6: c5 24 jz $+396 ;abs 0xa362 a1d8: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 a1dc: 27 34 jge $+80 ;abs 0xa22c a1de: 7e 90 30 00 cmp.b #48, r14 ;#0x0030 a1e2: 94 24 jz $+298 ;abs 0xa30c a1e4: 7e 90 31 00 cmp.b #49, r14 ;#0x0031 a1e8: 1a 34 jge $+54 ;abs 0xa21e a1ea: 7e 90 2a 00 cmp.b #42, r14 ;#0x002a a1ee: 77 24 jz $+240 ;abs 0xa2de a1f0: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b a1f4: 0a 34 jge $+22 ;abs 0xa20a a1f6: 7e 90 23 00 cmp.b #35, r14 ;#0x0023 a1fa: 42 24 jz $+134 ;abs 0xa280 a1fc: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 a200: e0 27 jz $-62 ;abs 0xa1c2 a202: 7e 90 20 00 cmp.b #32, r14 ;#0x0020 a206: 32 20 jnz $+102 ;abs 0xa26c a208: 56 3c jmp $+174 ;abs 0xa2b6 a20a: 7e 90 2d 00 cmp.b #45, r14 ;#0x002d a20e: 49 24 jz $+148 ;abs 0xa2a2 a210: 7e 90 2e 00 cmp.b #46, r14 ;#0x002e a214: 5b 24 jz $+184 ;abs 0xa2cc a216: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b a21a: 28 20 jnz $+82 ;abs 0xa26c a21c: 47 3c jmp $+144 ;abs 0xa2ac a21e: 7e 90 3a 00 cmp.b #58, r14 ;#0x003a a222: 8c 38 jl $+282 ;abs 0xa33c a224: 7e 90 58 00 cmp.b #88, r14 ;#0x0058 a228: 21 20 jnz $+68 ;abs 0xa26c a22a: e9 3c jmp $+468 ;abs 0xa3fe a22c: 7e 90 6f 00 cmp.b #111, r14 ;#0x006f a230: 24 24 jz $+74 ;abs 0xa27a a232: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 a236: 0a 34 jge $+22 ;abs 0xa24c a238: 7e 90 69 00 cmp.b #105, r14 ;#0x0069 a23c: e3 24 jz $+456 ;abs 0xa404 a23e: 7e 90 6c 00 cmp.b #108, r14 ;#0x006c a242: 22 24 jz $+70 ;abs 0xa288 a244: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 a248: 11 20 jnz $+36 ;abs 0xa26c a24a: dc 3c jmp $+442 ;abs 0xa404 a24c: 7e 90 73 00 cmp.b #115, r14 ;#0x0073 a250: 98 24 jz $+306 ;abs 0xa382 a252: 7e 90 74 00 cmp.b #116, r14 ;#0x0074 a256: 04 34 jge $+10 ;abs 0xa260 a258: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 a25c: 07 20 jnz $+16 ;abs 0xa26c a25e: b8 3c jmp $+370 ;abs 0xa3d0 a260: 7e 90 75 00 cmp.b #117, r14 ;#0x0075 a264: d1 24 jz $+420 ;abs 0xa408 a266: 7e 90 78 00 cmp.b #120, r14 ;#0x0078 a26a: d2 24 jz $+422 ;abs 0xa410 a26c: 19 41 3e 00 mov 62(r1), r9 ;0x003e(r1) a270: 18 41 2c 00 mov 44(r1), r8 ;0x002c(r1) a274: 08 89 sub r9, r8 a276: 30 40 82 a7 br #0xa782 a27a: b1 42 28 00 mov #8, 40(r1) ;r2 As==11, 0x0028(r1) a27e: cb 3c jmp $+408 ;abs 0xa416 a280: f1 d2 00 00 bis.b #8, 0(r1) ;r2 As==11, 0x0000(r1) a284: 30 40 b2 a7 br #0xa7b2 a288: 69 41 mov.b @r1, r9 a28a: 59 f3 and.b #1, r9 ;r3 As==01 a28c: 6e 41 mov.b @r1, r14 a28e: 04 24 jz $+10 ;abs 0xa298 a290: 7e f0 fe ff and.b #-2, r14 ;#0xfffe a294: 6e d3 bis.b #2, r14 ;r3 As==10 a296: 01 3c jmp $+4 ;abs 0xa29a a298: 5e d3 bis.b #1, r14 ;r3 As==01 a29a: c1 4e 00 00 mov.b r14, 0(r1) ;0x0000(r1) a29e: 30 40 b2 a7 br #0xa7b2 a2a2: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) a2a6: 00 00 a2a8: 30 40 b2 a7 br #0xa7b2 a2ac: f1 40 2b 00 mov.b #43, 2(r1) ;#0x002b, 0x0002(r1) a2b0: 02 00 a2b2: 30 40 b2 a7 br #0xa7b2 a2b6: f1 90 2b 00 cmp.b #43, 2(r1) ;#0x002b, 0x0002(r1) a2ba: 02 00 a2bc: 02 20 jnz $+6 ;abs 0xa2c2 a2be: 30 40 b2 a7 br #0xa7b2 a2c2: f1 40 20 00 mov.b #32, 2(r1) ;#0x0020, 0x0002(r1) a2c6: 02 00 a2c8: 30 40 b2 a7 br #0xa7b2 a2cc: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a2d0: 02 24 jz $+6 ;abs 0xa2d6 a2d2: 30 40 98 a7 br #0xa798 a2d6: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) a2da: 30 40 b2 a7 br #0xa7b2 a2de: 0e 45 mov r5, r14 a2e0: 2e 53 incd r14 a2e2: 2a 45 mov @r5, r10 a2e4: 0a 93 tst r10 a2e6: 03 38 jl $+8 ;abs 0xa2ee a2e8: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) a2ec: 0d 3c jmp $+28 ;abs 0xa308 a2ee: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a2f2: 02 24 jz $+6 ;abs 0xa2f8 a2f4: 30 40 a8 a7 br #0xa7a8 a2f8: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) a2fc: 00 00 a2fe: 3a e3 inv r10 a300: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) a304: 91 53 26 00 inc 38(r1) ;0x0026(r1) a308: 05 4e mov r14, r5 a30a: 27 3c jmp $+80 ;abs 0xa35a a30c: 81 93 26 00 tst 38(r1) ;0x0026(r1) a310: 15 20 jnz $+44 ;abs 0xa33c a312: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a316: 12 20 jnz $+38 ;abs 0xa33c a318: 69 41 mov.b @r1, r9 a31a: 79 f0 10 00 and.b #16, r9 ;#0x0010 a31e: 5e 43 mov.b #1, r14 ;r3 As==01 a320: 01 24 jz $+4 ;abs 0xa324 a322: 4e 43 clr.b r14 a324: 4e 4e mov.b r14, r14 a326: 0e 11 rra r14 a328: 0e 43 clr r14 a32a: 4e 10 rrc.b r14 a32c: 6a 41 mov.b @r1, r10 a32e: 7a f0 7f 00 and.b #127, r10 ;#0x007f a332: 4a de bis.b r14, r10 a334: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) a338: 30 40 b2 a7 br #0xa7b2 a33c: 1a 41 26 00 mov 38(r1), r10 ;0x0026(r1) a340: 0a 5a rla r10 a342: 0c 4a mov r10, r12 a344: 0c 5c rla r12 a346: 0c 5c rla r12 a348: 0a 5c add r12, r10 a34a: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) a34e: b1 50 d0 ff add #-48, 38(r1) ;#0xffd0, 0x0026(r1) a352: 26 00 a354: 8e 11 sxt r14 a356: 81 5e 26 00 add r14, 38(r1) ;0x0026(r1) a35a: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) a35e: 30 40 b2 a7 br #0xa7b2 a362: 07 45 mov r5, r7 a364: 27 53 incd r7 a366: 6e 45 mov.b @r5, r14 a368: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a36c: 03 20 jnz $+8 ;abs 0xa374 a36e: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a372: 26 27 jz $-434 ;abs 0xa1c0 a374: c1 4e 04 00 mov.b r14, 4(r1) ;0x0004(r1) a378: c1 43 05 00 mov.b #0, 5(r1) ;r3 As==00, 0x0005(r1) a37c: 0e 41 mov r1, r14 a37e: 2e 52 add #4, r14 ;r2 As==10 a380: 03 3c jmp $+8 ;abs 0xa388 a382: 07 45 mov r5, r7 a384: 27 53 incd r7 a386: 2e 45 mov @r5, r14 a388: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a38c: 07 24 jz $+16 ;abs 0xa39c a38e: e1 d2 01 00 bis.b #4, 1(r1) ;r2 As==10, 0x0001(r1) a392: 1f 41 26 00 mov 38(r1), r15 ;0x0026(r1) a396: c1 4f 03 00 mov.b r15, 3(r1) ;0x0003(r1) a39a: 06 3c jmp $+14 ;abs 0xa3a8 a39c: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a3a0: 03 24 jz $+8 ;abs 0xa3a8 a3a2: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) a3a6: 30 00 a3a8: 0e 93 tst r14 a3aa: 02 20 jnz $+6 ;abs 0xa3b0 a3ac: 3e 40 f4 aa mov #-21772,r14 ;#0xaaf4 a3b0: 11 12 04 00 push 4(r1) ;0x0004(r1) a3b4: 11 12 04 00 push 4(r1) ;0x0004(r1) a3b8: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) a3bc: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) a3c0: b0 12 a6 9f call #0x9fa6 a3c4: 21 52 add #4, r1 ;r2 As==10 a3c6: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) a3ca: 05 47 mov r7, r5 a3cc: 30 40 94 a7 br #0xa794 a3d0: 07 45 mov r5, r7 a3d2: 27 53 incd r7 a3d4: 29 45 mov @r5, r9 a3d6: 81 49 1e 00 mov r9, 30(r1) ;0x001e(r1) a3da: 5e 43 mov.b #1, r14 ;r3 As==01 a3dc: 09 93 tst r9 a3de: 01 20 jnz $+4 ;abs 0xa3e2 a3e0: 4e 43 clr.b r14 a3e2: 4e 5e rla.b r14 a3e4: 4e 5e rla.b r14 a3e6: 4e 5e rla.b r14 a3e8: 6a 41 mov.b @r1, r10 a3ea: 7a f0 f7 ff and.b #-9, r10 ;#0xfff7 a3ee: 4a de bis.b r14, r10 a3f0: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) a3f4: 05 47 mov r7, r5 a3f6: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) a3fa: 28 00 a3fc: 53 3c jmp $+168 ;abs 0xa4a4 a3fe: d1 d3 01 00 bis.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a402: 06 3c jmp $+14 ;abs 0xa410 a404: e1 d2 00 00 bis.b #4, 0(r1) ;r2 As==10, 0x0000(r1) a408: b1 40 0a 00 mov #10, 40(r1) ;#0x000a, 0x0028(r1) a40c: 28 00 a40e: 03 3c jmp $+8 ;abs 0xa416 a410: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) a414: 28 00 a416: 6b 41 mov.b @r1, r11 a418: 6b b3 bit.b #2, r11 ;r3 As==10 a41a: 24 24 jz $+74 ;abs 0xa464 a41c: 0c 45 mov r5, r12 a41e: 3c 52 add #8, r12 ;r2 As==11 a420: 28 45 mov @r5, r8 a422: 17 45 02 00 mov 2(r5), r7 ;0x0002(r5) a426: 16 45 04 00 mov 4(r5), r6 ;0x0004(r5) a42a: 1b 45 06 00 mov 6(r5), r11 ;0x0006(r5) a42e: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) a432: 81 47 20 00 mov r7, 32(r1) ;0x0020(r1) a436: 81 46 22 00 mov r6, 34(r1) ;0x0022(r1) a43a: 81 4b 24 00 mov r11, 36(r1) ;0x0024(r1) a43e: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) a442: 08 93 tst r8 a444: 06 20 jnz $+14 ;abs 0xa452 a446: 07 93 tst r7 a448: 04 20 jnz $+10 ;abs 0xa452 a44a: 06 93 tst r6 a44c: 02 20 jnz $+6 ;abs 0xa452 a44e: 0b 93 tst r11 a450: 02 24 jz $+6 ;abs 0xa456 a452: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a456: 0b 5b rla r11 a458: 0b 43 clr r11 a45a: 0b 6b rlc r11 a45c: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) a460: 05 4c mov r12, r5 a462: 20 3c jmp $+66 ;abs 0xa4a4 a464: 5b f3 and.b #1, r11 ;r3 As==01 a466: 07 45 mov r5, r7 a468: 0d 24 jz $+28 ;abs 0xa484 a46a: 27 52 add #4, r7 ;r2 As==10 a46c: 28 45 mov @r5, r8 a46e: 1b 45 02 00 mov 2(r5), r11 ;0x0002(r5) a472: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) a476: 81 4b 20 00 mov r11, 32(r1) ;0x0020(r1) a47a: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) a47e: 08 93 tst r8 a480: 09 20 jnz $+20 ;abs 0xa494 a482: 06 3c jmp $+14 ;abs 0xa490 a484: 27 53 incd r7 a486: 2b 45 mov @r5, r11 a488: 81 4b 1e 00 mov r11, 30(r1) ;0x001e(r1) a48c: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) a490: 0b 93 tst r11 a492: 02 24 jz $+6 ;abs 0xa498 a494: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) a498: 0b 5b rla r11 a49a: 0b 43 clr r11 a49c: 0b 6b rlc r11 a49e: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) a4a2: 05 47 mov r7, r5 a4a4: f1 b2 00 00 bit.b #8, 0(r1) ;r2 As==11, 0x0000(r1) a4a8: 12 24 jz $+38 ;abs 0xa4ce a4aa: c1 93 2b 00 tst.b 43(r1) ;0x002b(r1) a4ae: 0f 20 jnz $+32 ;abs 0xa4ce a4b0: 68 41 mov.b @r1, r8 a4b2: b1 90 10 00 cmp #16, 40(r1) ;#0x0010, 0x0028(r1) a4b6: 28 00 a4b8: 03 20 jnz $+8 ;abs 0xa4c0 a4ba: 78 d0 40 00 bis.b #64, r8 ;#0x0040 a4be: 05 3c jmp $+12 ;abs 0xa4ca a4c0: b1 92 28 00 cmp #8, 40(r1) ;r2 As==11, 0x0028(r1) a4c4: 04 20 jnz $+10 ;abs 0xa4ce a4c6: 78 d0 20 00 bis.b #32, r8 ;#0x0020 a4ca: c1 48 00 00 mov.b r8, 0(r1) ;0x0000(r1) a4ce: 68 41 mov.b @r1, r8 a4d0: 68 b2 bit.b #4, r8 ;r2 As==10 a4d2: 30 24 jz $+98 ;abs 0xa534 a4d4: c1 93 2f 00 tst.b 47(r1) ;0x002f(r1) a4d8: 2d 24 jz $+92 ;abs 0xa534 a4da: f1 40 2d 00 mov.b #45, 2(r1) ;#0x002d, 0x0002(r1) a4de: 02 00 a4e0: 68 b3 bit.b #2, r8 ;r3 As==10 a4e2: 11 24 jz $+36 ;abs 0xa506 a4e4: b1 e3 1e 00 xor #-1, 30(r1) ;r3 As==11, 0x001e(r1) a4e8: b1 e3 20 00 xor #-1, 32(r1) ;r3 As==11, 0x0020(r1) a4ec: b1 e3 22 00 xor #-1, 34(r1) ;r3 As==11, 0x0022(r1) a4f0: b1 e3 24 00 xor #-1, 36(r1) ;r3 As==11, 0x0024(r1) a4f4: 91 53 1e 00 inc 30(r1) ;0x001e(r1) a4f8: 81 63 20 00 adc 32(r1) ;0x0020(r1) a4fc: 81 63 22 00 adc 34(r1) ;0x0022(r1) a500: 81 63 24 00 adc 36(r1) ;0x0024(r1) a504: 17 3c jmp $+48 ;abs 0xa534 a506: 58 b3 bit.b #1, r8 ;r3 As==01 a508: 0f 24 jz $+32 ;abs 0xa528 a50a: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) a50e: 1b 41 20 00 mov 32(r1), r11 ;0x0020(r1) a512: 3a e3 inv r10 a514: 3b e3 inv r11 a516: 0e 4a mov r10, r14 a518: 0f 4b mov r11, r15 a51a: 1e 53 inc r14 a51c: 0f 63 adc r15 a51e: 81 4e 1e 00 mov r14, 30(r1) ;0x001e(r1) a522: 81 4f 20 00 mov r15, 32(r1) ;0x0020(r1) a526: 06 3c jmp $+14 ;abs 0xa534 a528: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) a52c: 3a e3 inv r10 a52e: 1a 53 inc r10 a530: 81 4a 1e 00 mov r10, 30(r1) ;0x001e(r1) a534: c1 43 1b 00 mov.b #0, 27(r1) ;r3 As==00, 0x001b(r1) a538: 68 b3 bit.b #2, r8 ;r3 As==10 a53a: 6a 24 jz $+214 ;abs 0xa610 a53c: 16 41 1e 00 mov 30(r1), r6 ;0x001e(r1) a540: 91 41 20 00 mov 32(r1), 60(r1) ;0x0020(r1), 0x003c(r1) a544: 3c 00 a546: 18 41 22 00 mov 34(r1), r8 ;0x0022(r1) a54a: 14 41 24 00 mov 36(r1), r4 ;0x0024(r1) a54e: 07 41 mov r1, r7 a550: 37 50 1a 00 add #26, r7 ;#0x001a a554: 09 46 mov r6, r9 a556: 91 41 28 00 mov 40(r1), 50(r1) ;0x0028(r1), 0x0032(r1) a55a: 32 00 a55c: 1b 41 28 00 mov 40(r1), r11 ;0x0028(r1) a560: 8b 10 swpb r11 a562: 8b 11 sxt r11 a564: 8b 10 swpb r11 a566: 8b 11 sxt r11 a568: 81 4b 34 00 mov r11, 52(r1) ;0x0034(r1) a56c: 81 4b 36 00 mov r11, 54(r1) ;0x0036(r1) a570: 81 4b 38 00 mov r11, 56(r1) ;0x0038(r1) a574: 11 12 3a 00 push 58(r1) ;0x003a(r1) a578: 11 12 3a 00 push 58(r1) ;0x003a(r1) a57c: 11 12 3a 00 push 58(r1) ;0x003a(r1) a580: 11 12 3a 00 push 58(r1) ;0x003a(r1) a584: 0c 49 mov r9, r12 a586: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) a58a: 0e 48 mov r8, r14 a58c: 0f 44 mov r4, r15 a58e: b0 12 88 a8 call #0xa888 a592: 31 52 add #8, r1 ;r2 As==11 a594: 0b 4c mov r12, r11 a596: 3c 90 0a 00 cmp #10, r12 ;#0x000a a59a: 05 34 jge $+12 ;abs 0xa5a6 a59c: 7b 50 30 00 add.b #48, r11 ;#0x0030 a5a0: c7 4b 00 00 mov.b r11, 0(r7) ;0x0000(r7) a5a4: 0c 3c jmp $+26 ;abs 0xa5be a5a6: 4b 4c mov.b r12, r11 a5a8: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a5ac: 03 24 jz $+8 ;abs 0xa5b4 a5ae: 7a 40 37 00 mov.b #55, r10 ;#0x0037 a5b2: 02 3c jmp $+6 ;abs 0xa5b8 a5b4: 7a 40 57 00 mov.b #87, r10 ;#0x0057 a5b8: 4a 5b add.b r11, r10 a5ba: c7 4a 00 00 mov.b r10, 0(r7) ;0x0000(r7) a5be: 06 47 mov r7, r6 a5c0: 36 53 add #-1, r6 ;r3 As==11 a5c2: 11 12 3a 00 push 58(r1) ;0x003a(r1) a5c6: 11 12 3a 00 push 58(r1) ;0x003a(r1) a5ca: 11 12 3a 00 push 58(r1) ;0x003a(r1) a5ce: 11 12 3a 00 push 58(r1) ;0x003a(r1) a5d2: 0c 49 mov r9, r12 a5d4: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) a5d8: 0e 48 mov r8, r14 a5da: 0f 44 mov r4, r15 a5dc: b0 12 62 a8 call #0xa862 a5e0: 31 52 add #8, r1 ;r2 As==11 a5e2: 09 4c mov r12, r9 a5e4: 81 4d 3c 00 mov r13, 60(r1) ;0x003c(r1) a5e8: 08 4e mov r14, r8 a5ea: 04 4f mov r15, r4 a5ec: 37 53 add #-1, r7 ;r3 As==11 a5ee: 0c 93 tst r12 a5f0: b2 23 jnz $-154 ;abs 0xa556 a5f2: 0d 93 tst r13 a5f4: b0 23 jnz $-158 ;abs 0xa556 a5f6: 0e 93 tst r14 a5f8: ae 23 jnz $-162 ;abs 0xa556 a5fa: 0f 93 tst r15 a5fc: ac 23 jnz $-166 ;abs 0xa556 a5fe: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) a602: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) a606: 81 43 22 00 mov #0, 34(r1) ;r3 As==00, 0x0022(r1) a60a: 81 43 24 00 mov #0, 36(r1) ;r3 As==00, 0x0024(r1) a60e: 6c 3c jmp $+218 ;abs 0xa6e8 a610: 58 b3 bit.b #1, r8 ;r3 As==01 a612: 3e 24 jz $+126 ;abs 0xa690 a614: 14 41 1e 00 mov 30(r1), r4 ;0x001e(r1) a618: 17 41 20 00 mov 32(r1), r7 ;0x0020(r1) a61c: 08 41 mov r1, r8 a61e: 38 50 1a 00 add #26, r8 ;#0x001a a622: 19 41 28 00 mov 40(r1), r9 ;0x0028(r1) a626: 89 10 swpb r9 a628: 89 11 sxt r9 a62a: 89 10 swpb r9 a62c: 89 11 sxt r9 a62e: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) a632: 0d 49 mov r9, r13 a634: 0e 44 mov r4, r14 a636: 0f 47 mov r7, r15 a638: b0 12 00 90 call #0x9000 a63c: 0b 4e mov r14, r11 a63e: 3e 90 0a 00 cmp #10, r14 ;#0x000a a642: 05 34 jge $+12 ;abs 0xa64e a644: 7b 50 30 00 add.b #48, r11 ;#0x0030 a648: c8 4b 00 00 mov.b r11, 0(r8) ;0x0000(r8) a64c: 0c 3c jmp $+26 ;abs 0xa666 a64e: 4b 4e mov.b r14, r11 a650: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a654: 03 24 jz $+8 ;abs 0xa65c a656: 7a 40 37 00 mov.b #55, r10 ;#0x0037 a65a: 02 3c jmp $+6 ;abs 0xa660 a65c: 7a 40 57 00 mov.b #87, r10 ;#0x0057 a660: 4a 5b add.b r11, r10 a662: c8 4a 00 00 mov.b r10, 0(r8) ;0x0000(r8) a666: 06 48 mov r8, r6 a668: 36 53 add #-1, r6 ;r3 As==11 a66a: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) a66e: 0d 49 mov r9, r13 a670: 0e 44 mov r4, r14 a672: 0f 47 mov r7, r15 a674: b0 12 ca 8f call #0x8fca a678: 04 4e mov r14, r4 a67a: 07 4f mov r15, r7 a67c: 38 53 add #-1, r8 ;r3 As==11 a67e: 0e 93 tst r14 a680: d0 23 jnz $-94 ;abs 0xa622 a682: 0f 93 tst r15 a684: ce 23 jnz $-98 ;abs 0xa622 a686: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) a68a: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) a68e: 2c 3c jmp $+90 ;abs 0xa6e8 a690: 17 41 1e 00 mov 30(r1), r7 ;0x001e(r1) a694: 08 41 mov r1, r8 a696: 38 50 1a 00 add #26, r8 ;#0x001a a69a: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) a69e: 0f 47 mov r7, r15 a6a0: b0 12 88 8f call #0x8f88 a6a4: 0d 4f mov r15, r13 a6a6: 3f 90 0a 00 cmp #10, r15 ;#0x000a a6aa: 05 34 jge $+12 ;abs 0xa6b6 a6ac: 7d 50 30 00 add.b #48, r13 ;#0x0030 a6b0: c8 4d 00 00 mov.b r13, 0(r8) ;0x0000(r8) a6b4: 0c 3c jmp $+26 ;abs 0xa6ce a6b6: 4d 4f mov.b r15, r13 a6b8: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) a6bc: 03 24 jz $+8 ;abs 0xa6c4 a6be: 7c 40 37 00 mov.b #55, r12 ;#0x0037 a6c2: 02 3c jmp $+6 ;abs 0xa6c8 a6c4: 7c 40 57 00 mov.b #87, r12 ;#0x0057 a6c8: 4c 5d add.b r13, r12 a6ca: c8 4c 00 00 mov.b r12, 0(r8) ;0x0000(r8) a6ce: 06 48 mov r8, r6 a6d0: 36 53 add #-1, r6 ;r3 As==11 a6d2: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) a6d6: 0f 47 mov r7, r15 a6d8: b0 12 6e 8f call #0x8f6e a6dc: 07 4f mov r15, r7 a6de: 38 53 add #-1, r8 ;r3 As==11 a6e0: 0f 93 tst r15 a6e2: db 23 jnz $-72 ;abs 0xa69a a6e4: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) a6e8: b1 90 0a 00 cmp #10, 40(r1) ;#0x000a, 0x0028(r1) a6ec: 28 00 a6ee: 02 24 jz $+6 ;abs 0xa6f4 a6f0: c1 43 02 00 mov.b #0, 2(r1) ;r3 As==00, 0x0002(r1) a6f4: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) a6f8: 2a 24 jz $+86 ;abs 0xa74e a6fa: 0f 41 mov r1, r15 a6fc: 3f 50 1c 00 add #28, r15 ;#0x001c a700: 81 4f 42 00 mov r15, 66(r1) ;0x0042(r1) a704: 1a 41 1c 00 mov 28(r1), r10 ;0x001c(r1) a708: 8a 10 swpb r10 a70a: 8a 11 sxt r10 a70c: 8a 10 swpb r10 a70e: 8a 11 sxt r10 a710: 81 4a 44 00 mov r10, 68(r1) ;0x0044(r1) a714: 81 46 46 00 mov r6, 70(r1) ;0x0046(r1) a718: 0a 46 mov r6, r10 a71a: 8a 10 swpb r10 a71c: 8a 11 sxt r10 a71e: 8a 10 swpb r10 a720: 8a 11 sxt r10 a722: 81 4a 48 00 mov r10, 72(r1) ;0x0048(r1) a726: 1c 41 42 00 mov 66(r1), r12 ;0x0042(r1) a72a: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) a72e: 1c 81 46 00 sub 70(r1), r12 ;0x0046(r1) a732: 1d 71 48 00 subc 72(r1), r13 ;0x0048(r1) a736: 2c 83 decd r12 a738: 1c 91 26 00 cmp 38(r1), r12 ;0x0026(r1) a73c: 0e 2c jc $+30 ;abs 0xa75a a73e: e1 d3 01 00 bis.b #2, 1(r1) ;r3 As==10, 0x0001(r1) a742: 5e 41 26 00 mov.b 38(r1), r14 ;0x0026(r1) a746: 4e 8c sub.b r12, r14 a748: c1 4e 03 00 mov.b r14, 3(r1) ;0x0003(r1) a74c: 06 3c jmp $+14 ;abs 0xa75a a74e: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) a752: 03 24 jz $+8 ;abs 0xa75a a754: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) a758: 30 00 a75a: 11 12 04 00 push 4(r1) ;0x0004(r1) a75e: 11 12 04 00 push 4(r1) ;0x0004(r1) a762: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) a766: 0e 46 mov r6, r14 a768: 1e 53 inc r14 a76a: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) a76e: b0 12 a6 9f call #0x9fa6 a772: 21 52 add #4, r1 ;r2 As==10 a774: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) a778: 0d 3c jmp $+28 ;abs 0xa794 a77a: 7f 49 mov.b @r9+, r15 a77c: 8f 11 sxt r15 a77e: 91 12 3c 00 call 60(r1) ;0x003c(r1) a782: 0e 49 mov r9, r14 a784: 0e 58 add r8, r14 a786: 19 91 40 00 cmp 64(r1), r9 ;0x0040(r1) a78a: f7 2b jnc $-16 ;abs 0xa77a a78c: 81 49 3e 00 mov r9, 62(r1) ;0x003e(r1) a790: 81 4e 2c 00 mov r14, 44(r1) ;0x002c(r1) a794: 07 43 clr r7 a796: 0e 3c jmp $+30 ;abs 0xa7b4 a798: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) a79c: 30 00 a79e: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) a7a2: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) a7a6: 03 3c jmp $+8 ;abs 0xa7ae a7a8: 05 4e mov r14, r5 a7aa: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) a7ae: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) a7b2: 17 43 mov #1, r7 ;r3 As==01 a7b4: 16 41 40 00 mov 64(r1), r6 ;0x0040(r1) a7b8: 6e 46 mov.b @r6, r14 a7ba: 4e 93 tst.b r14 a7bc: 02 24 jz $+6 ;abs 0xa7c2 a7be: 30 40 8a a1 br #0xa18a a7c2: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) a7c6: 31 50 4a 00 add #74, r1 ;#0x004a a7ca: 34 41 pop r4 a7cc: 35 41 pop r5 a7ce: 36 41 pop r6 a7d0: 37 41 pop r7 a7d2: 38 41 pop r8 a7d4: 39 41 pop r9 a7d6: 3a 41 pop r10 a7d8: 3b 41 pop r11 a7da: 30 41 ret 0000a7dc : a7dc: 0b 12 push r11 a7de: 0d 93 tst r13 a7e0: 0e 24 jz $+30 ;abs 0xa7fe a7e2: 6c 4f mov.b @r15, r12 a7e4: 7b 4e mov.b @r14+, r11 a7e6: 4c 9b cmp.b r11, r12 a7e8: 05 24 jz $+12 ;abs 0xa7f4 a7ea: 4f 4c mov.b r12, r15 a7ec: 5e 4e ff ff mov.b -1(r14),r14 ;0xffff(r14) a7f0: 0f 8e sub r14, r15 a7f2: 06 3c jmp $+14 ;abs 0xa800 a7f4: 1f 53 inc r15 a7f6: 4c 93 tst.b r12 a7f8: 02 24 jz $+6 ;abs 0xa7fe a7fa: 3d 53 add #-1, r13 ;r3 As==11 a7fc: f0 3f jmp $-30 ;abs 0xa7de a7fe: 0f 43 clr r15 a800: 3b 41 pop r11 a802: 30 41 ret 0000a804 <__xabi_udivmod64>: a804: 07 12 push r7 a806: 06 12 push r6 a808: 05 12 push r5 a80a: 04 12 push r4 a80c: 30 12 40 00 push #64 ;#0x0040 a810: 04 48 mov r8, r4 a812: 05 49 mov r9, r5 a814: 06 4a mov r10, r6 a816: 07 4b mov r11, r7 a818: 08 43 clr r8 a81a: 09 43 clr r9 a81c: 0a 43 clr r10 a81e: 0b 43 clr r11 a820: 0c 5c rla r12 a822: 0d 6d rlc r13 a824: 0e 6e rlc r14 a826: 0f 6f rlc r15 a828: 08 68 rlc r8 a82a: 09 69 rlc r9 a82c: 0a 6a rlc r10 a82e: 0b 6b rlc r11 a830: 0b 97 cmp r7, r11 a832: 0e 28 jnc $+30 ;abs 0xa850 a834: 08 20 jnz $+18 ;abs 0xa846 a836: 0a 96 cmp r6, r10 a838: 0b 28 jnc $+24 ;abs 0xa850 a83a: 05 20 jnz $+12 ;abs 0xa846 a83c: 09 95 cmp r5, r9 a83e: 08 28 jnc $+18 ;abs 0xa850 a840: 02 20 jnz $+6 ;abs 0xa846 a842: 08 94 cmp r4, r8 a844: 05 28 jnc $+12 ;abs 0xa850 a846: 08 84 sub r4, r8 a848: 09 75 subc r5, r9 a84a: 0a 76 subc r6, r10 a84c: 0b 77 subc r7, r11 a84e: 1c d3 bis #1, r12 ;r3 As==01 a850: 91 83 00 00 dec 0(r1) ;0x0000(r1) a854: e5 23 jnz $-52 ;abs 0xa820 a856: 21 53 incd r1 a858: 34 41 pop r4 a85a: 35 41 pop r5 a85c: 36 41 pop r6 a85e: 37 41 pop r7 a860: 30 41 ret 0000a862 <__udivdi3>: a862: 0b 12 push r11 a864: 0a 12 push r10 a866: 09 12 push r9 a868: 08 12 push r8 a86a: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) a86e: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) a872: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) a876: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) a87a: b0 12 04 a8 call #0xa804 a87e: 38 41 pop r8 a880: 39 41 pop r9 a882: 3a 41 pop r10 a884: 3b 41 pop r11 a886: 30 41 ret 0000a888 <__umoddi3>: a888: 0b 12 push r11 a88a: 0a 12 push r10 a88c: 09 12 push r9 a88e: 08 12 push r8 a890: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) a894: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) a898: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) a89c: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) a8a0: b0 12 04 a8 call #0xa804 a8a4: 0c 48 mov r8, r12 a8a6: 0d 49 mov r9, r13 a8a8: 0e 4a mov r10, r14 a8aa: 0f 4b mov r11, r15 a8ac: 38 41 pop r8 a8ae: 39 41 pop r9 a8b0: 3a 41 pop r10 a8b2: 3b 41 pop r11 a8b4: 30 41 ret 0000a8b6 <__udivmoddi4>: a8b6: 0b 12 push r11 a8b8: 0a 12 push r10 a8ba: 09 12 push r9 a8bc: 08 12 push r8 a8be: 07 12 push r7 a8c0: 18 41 0c 00 mov 12(r1), r8 ;0x000c(r1) a8c4: 19 41 0e 00 mov 14(r1), r9 ;0x000e(r1) a8c8: 1a 41 10 00 mov 16(r1), r10 ;0x0010(r1) a8cc: 1b 41 12 00 mov 18(r1), r11 ;0x0012(r1) a8d0: b0 12 04 a8 call #0xa804 a8d4: 17 41 14 00 mov 20(r1), r7 ;0x0014(r1) a8d8: 87 48 00 00 mov r8, 0(r7) ;0x0000(r7) a8dc: 87 49 02 00 mov r9, 2(r7) ;0x0002(r7) a8e0: 87 4a 04 00 mov r10, 4(r7) ;0x0004(r7) a8e4: 87 4b 06 00 mov r11, 6(r7) ;0x0006(r7) a8e8: 37 41 pop r7 a8ea: 38 41 pop r8 a8ec: 39 41 pop r9 a8ee: 3a 41 pop r10 a8f0: 3b 41 pop r11 a8f2: 30 41 ret 0000a8f4 <_unexpected_>: a8f4: 00 13 reti Disassembly of section .vectors: 0000ffe0 <__ivtbl_16>: ffe0: b6 86 b6 86 b6 86 ba 86 b6 86 de 86 b6 86 1c 87 ................ fff0: ec 86 b6 86 b6 86 b6 86 b6 86 b6 86 b6 86 00 80 ................