rf_mon.elf: file format elf32-msp430 SYMBOL TABLE: 0000ffe6 l d __interrupt_vector_4 00000000 __interrupt_vector_4 0000ffea l d __interrupt_vector_6 00000000 __interrupt_vector_6 0000ffee l d __interrupt_vector_8 00000000 __interrupt_vector_8 0000fff0 l d __interrupt_vector_9 00000000 __interrupt_vector_9 0000fffe l d __reset_vector 00000000 __reset_vector 00008000 l d .rodata 00000000 .rodata 0000824c l d .rodata2 00000000 .rodata2 000082bc l d .text 00000000 .text 00000200 l d .data 00000000 .data 000002ca l d .bss 00000000 .bss 000002dc l d .noinit 00000000 .noinit 000002dc l d .heap 00000000 .heap 00000000 l d .MSP430.attributes 00000000 .MSP430.attributes 00000000 l d .comment 00000000 .comment 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 00000000 l df *ABS* 00000000 c:/msp430-gcc/bin/../lib/gcc/msp430-elf/9.2.0/../../../../msp430-elf/lib/430/crt0.o 0000fffe l __reset_vector 00000000 __msp430_resetvec_hook 00000000 l df *ABS* 00000000 lib_a-impure.o 00000204 l O .data 00000078 impure_data 00000000 l df *ABS* 00000000 lib_a-nano-svfprintf.o 00000000 l df *ABS* 00000000 lib_a-nano-vfprintf_i.o 00000000 l df *ABS* 00000000 sbrk.c 0000027c l O .data 00000002 heap.1412 00000000 l df *ABS* 00000000 crt_bss.o 00000000 l df *ABS* 00000000 crt_movedata.o 00000000 l df *ABS* 00000000 crt_main.o 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 lib2divHI.o 00000000 l df *ABS* 00000000 lib2divSI.o 00000000 l df *ABS* 00000000 slli.o 00000000 l df *ABS* 00000000 srli.o 00000000 l df *ABS* 00000000 lib_a-atoi.o 00000000 l df *ABS* 00000000 lib_a-memcmp.o 00000000 l df *ABS* 00000000 lib_a-memcpy.o 00000000 l df *ABS* 00000000 lib_a-memset.o 00000000 l df *ABS* 00000000 lib_a-snprintf.o 00000000 l df *ABS* 00000000 lib_a-sprintf.o 00000000 l df *ABS* 00000000 lib_a-strchr.o 00000000 l df *ABS* 00000000 lib_a-strstr.o 00000000 l df *ABS* 00000000 lib_a-strtol.o 00000000 l df *ABS* 00000000 lib_a-memchr.o 00000000 l df *ABS* 00000000 lib_a-memmove.o 00000000 l df *ABS* 00000000 lib_a-nano-freer.o 00000000 l df *ABS* 00000000 lib_a-nano-mallocr.o 00000000 l df *ABS* 00000000 lib_a-nano-reallocr.o 00000000 l df *ABS* 00000000 lib_a-sbrkr.o 00000000 l df *ABS* 00000000 lib_a-nano-msizer.o 00000000 l df *ABS* 00000000 write.c 00000000 l df *ABS* 00000000 cio.o 00000000 l df *ABS* 00000000 lib2_mul_none.o 00000000 l df *ABS* 00000000 lib_a-abort.o 00000000 l df *ABS* 00000000 lib_a-signal.o 00000000 l df *ABS* 00000000 lib_a-signalr.o 00000000 l df *ABS* 00000000 srai.o 00000000 l df *ABS* 00000000 ciosyscalls.o 00000000 l df *ABS* 00000000 exit.c 00000000 l df *ABS* 00000000 lib_a-errno.o 00009dc4 g F .text 00000014 _malloc_usable_size_r 00009e8a g F .text 0000004e __mspabi_mpyl 00000001 g *ABS* 00000000 IE2 00000061 g *ABS* 00000000 UCA0CTL1 00000022 g *ABS* 00000000 P1DIR 00000067 g *ABS* 00000000 UCA0TXBUF 00000064 g *ABS* 00000000 UCA0MCTL 00008df4 g F .text 00000062 CCXX_SPI_RDREG 00009f4e g F .text 00000024 _kill_r 00000053 g *ABS* 00000000 BCSCTL3 00000025 g *ABS* 00000000 P1IE 000084c2 g F .text 0000001e init_UART_SPI 00009b2e g F .text 0000004e memmove 00009078 g F .text 0000006e snprintf 00008f06 g F .text 00000040 .hidden udivmodhi4 00009f98 g F .text 00000006 __errno 0000027e g .data 00000000 __CIOBUF__ 00009e86 g .text 00000000 C$$IO$$ 000001b4 g *ABS* 00000000 ADC10MEM 000002da g O .bss 00000002 errno 00008ff0 g .text 00000000 .hidden __mspabi_func_epilog_6 0000847a g F .text 00000012 sample_adc 00009f82 w F .text 00000006 getpid 00000024 g *ABS* 00000000 P1IES 0000904a g F .text 0000001e memcpy 00008fe0 g F .text 0000000e .hidden __mspabi_remul 000010fb g *ABS* 00000000 CALBC1_12MHZ 00009440 g F .text 00000290 _svfprintf_r 000083fa g F .text 0000006e sys_init 0000012e g *ABS* 00000000 TAIV 0000002a g *ABS* 00000000 P2DIR 00000120 g *ABS* 00000000 WDTCTL 00009ee4 g F .text 00000064 _raise_r 00008354 g F .text 00000078 tinit 000082bc g F .text 00000004 __crt0_start 00009f72 g F .text 00000006 _getpid_r 000002e0 g .heap 00000000 __HeapLimit 000002e0 g .heap 00000000 __heap_end__ 000082c0 g F .text 0000000e __crt0_init_bss 00009da2 g F .text 00000022 _sbrk_r 000082e8 g F .text 0000001e P2_VEC 00000012 g *ABS* 00000000 __bsssize 00008dc0 g F .text 00000034 CCXX_SPI_STROBE 00008ffa g .text 00000000 .hidden __mspabi_func_epilog_1 00009002 g .text 00000000 .hidden __mspabi_slli 00009e86 g .text 00000000 _libgloss_cio_hook 00008ff6 g .text 00000000 .hidden __mspabi_func_epilog_3 00009d4a g F .text 0000005e _realloc_r 0000006e g *ABS* 00000000 UCB0RXBUF 00008e56 g F .text 0000004a CCXX_SPI_WRREG 0000900e g .text 00000000 .hidden __mspabi_srli 00009ed6 g F .text 0000000e abort 00009dd8 g F .text 00000032 _sbrk 0000004a g *ABS* 00000000 ADC10AE0 000001b2 g *ABS* 00000000 ADC10CTL1 000084e0 g F .text 0000015c CCXX_WRITE_SPI_RF_SETTINGS 00000063 g *ABS* 00000000 UCA0BR1 00009346 g F .text 00000010 strtol 00000172 g *ABS* 00000000 TACCR0 00008ea0 g F .text 00000066 CCXX_SPI_BURST_WRREG 000002ca g O .bss 00000001 RSSI_DBM 00000019 g *ABS* 00000000 P3OUT 0000001b g *ABS* 00000000 P3SEL 00009e0a g F .text 0000007e write 0000002e g *ABS* 00000000 P2SEL 00009f88 w F .text 0000000e kill 0000006b g *ABS* 00000000 UCB0BR1 00009078 g F .text 0000006e sniprintf 000002dc g .noinit 00000000 end 00009356 g F .text 000000f0 __ssputs_r 000002ce g O .bss 00000001 RSSI 00008f42 g F .text 00000008 .hidden __mspabi_remu 00000026 g *ABS* 00000000 P1SEL 0000002d g *ABS* 00000000 P2IE 00009b12 g F .text 0000001e memchr 00009b76 g F .text 000000f6 _free_r 00000062 g *ABS* 00000000 UCA0BR0 00008f4a g F .text 00000090 .hidden udivmodsi4 000082bc g .text 00000000 _start 0000913e g F .text 00000042 strstr 00008306 g F .text 00000028 TA1_VEC 00000056 g *ABS* 00000000 DCOCTL 000084a4 g F .text 0000001e init_UART_232 0000002c g *ABS* 00000000 P2IES 00009f7c g .text 00000000 .hidden __mspabi_srai 00008fd2 g F .text 0000000e .hidden __mspabi_divul 000010fa g *ABS* 00000000 CALDCO_12MHZ 000000ca g *ABS* 00000000 __romdatacopysize 00000066 g *ABS* 00000000 UCA0RXBUF 00009020 g F .text 0000002e memcmp 00008468 g F .text 00000012 init_adc 00000003 g *ABS* 00000000 IFG2 00000029 g *ABS* 00000000 P2OUT 00009dd8 w F .text 00000032 sbrk 00008346 g F .text 0000000e ADC_VEC 00000000 w *ABS* 00000000 __rom_highdatacopysize 00009066 g F .text 00000014 memset 00000069 g *ABS* 00000000 UCB0CTL1 00008798 g F .text 0000063e main 00000018 g *ABS* 00000000 P3IN 00000160 g *ABS* 00000000 TACTL 0000027e g .data 00000000 _CIOBUF_ 0000917c g F .text 000001de _strtol_r 00009c62 g F .text 000000f2 _malloc_r 000002dc g .heap 00000000 __heap_start__ 000002d0 g O .bss 00000002 seconds 00000000 w *ABS* 00000000 __high_bsssize 00000000 w *ABS* 00000000 __rom_highdatastart 0000006f g *ABS* 00000000 UCB0TXBUF 000083cc g F .text 0000002e delay 00008748 g F .text 00000050 TX_STRING 00009f9e g *ABS* 00000000 __romdatastart 000090e2 g F .text 00000040 sprintf 000002cd g O .bss 00000001 LQI 0000832e g F .text 00000018 RX_VEC 000096bc g F .text 0000011c _printf_common 00000202 g O .data 00000002 _impure_ptr 0000001a g *ABS* 00000000 P3DIR 0000866c g F .text 000000dc RX_STRING 00009440 g F .text 00000290 _svfiprintf_r 000001b0 g *ABS* 00000000 ADC10CTL0 00000021 g *ABS* 00000000 P1OUT 00000000 w *ABS* 00000000 __high_datastart 00000000 w *ABS* 00000000 __upper_data_init 000002ca g .bss 00000000 __bssstart 00008ff2 g .text 00000000 .hidden __mspabi_func_epilog_5 000002cc g O .bss 00000001 PKTSTATUS 00000600 g .MSP430.attributes 00000000 __stack 000002ca g .data 00000000 _edata 000002dc g .heap 00000000 _end 00009f96 w F .text 00000004 exit 00000057 g *ABS* 00000000 BCSCTL1 000002d2 g O .bss 00000002 flags 00000000 w *ABS* 00000000 __high_bssstart 00000200 g O .data 00000002 __ctype_ptr__ 000090e2 g F .text 00000040 siprintf 00009014 g F .text 0000000c atoi 000080fc g O .rodata 00000101 _ctype_ 000082e2 g F .text 00000006 __crt0_call_main 00000170 g *ABS* 00000000 TAR 0000863c g F .text 00000030 RX_MODE 00009f96 w F .text 00000004 _exit 00008fd2 g F .text 0000000e __mspabi_divlu 000097d0 g F .text 00000340 _printf_i 0000006a g *ABS* 00000000 UCB0BR0 000002d6 g O .bss 00000002 __malloc_sbrk_start 00000068 g *ABS* 00000000 UCB0CTL0 00009122 g F .text 0000001e strchr 00000200 g .data 00000000 __datastart 000002d8 g O .bss 00000002 __malloc_free_list 000082ce g F .text 00000014 __crt0_movedata 00008ff8 g .text 00000000 .hidden __mspabi_func_epilog_2 000002d4 g O .bss 00000001 status 000002cb g O .bss 00000001 rx_char 00008fee g .text 00000000 .hidden __mspabi_func_epilog_7 00008ff4 g .text 00000000 .hidden __mspabi_func_epilog_4 0000848c g F .text 00000018 TX232String 0000002b g *ABS* 00000000 P2IFG 00009f42 g F .text 0000000c raise Disassembly of section __interrupt_vector_4: 0000ffe6 <__interrupt_vector_4>: ffe6: e8 82 interrupt service routine at 0x82e8 Disassembly of section __interrupt_vector_6: 0000ffea <__interrupt_vector_6>: ffea: 46 83 interrupt service routine at 0x8346 Disassembly of section __interrupt_vector_8: 0000ffee <__interrupt_vector_8>: ffee: 2e 83 interrupt service routine at 0x832e Disassembly of section __interrupt_vector_9: 0000fff0 <__interrupt_vector_9>: fff0: 06 83 interrupt service routine at 0x8306 Disassembly of section .text: 000082bc <__crt0_start>: 82bc: 31 40 00 06 mov #1536, r1 ;#0x0600 000082c0 <__crt0_init_bss>: 82c0: 3c 40 ca 02 mov #714, r12 ;#0x02ca 000082c4 <.Loc.76.1>: 82c4: 0d 43 clr r13 ; 000082c6 <.Loc.77.1>: 82c6: 3e 40 12 00 mov #18, r14 ;#0x0012 000082ca <.Loc.81.1>: 82ca: b0 12 66 90 call #-28570 ;#0x9066 000082ce <__crt0_movedata>: 82ce: 3c 40 00 02 mov #512, r12 ;#0x0200 000082d2 <.Loc.116.1>: 82d2: 3d 40 9e 9f mov #-24674,r13 ;#0x9f9e 000082d6 <.Loc.119.1>: 82d6: 0d 9c cmp r12, r13 ; 000082d8 <.Loc.120.1>: 82d8: 04 24 jz $+10 ;abs 0x82e2 000082da <.Loc.122.1>: 82da: 3e 40 ca 00 mov #202, r14 ;#0x00ca 000082de <.Loc.124.1>: 82de: b0 12 2e 9b call #-25810 ;#0x9b2e 000082e2 <__crt0_call_main>: 82e2: 0c 43 clr r12 ; 000082e4 <.Loc.254.1>: 82e4: b0 12 98 87 call #-30824 ;#0x8798 000082e8 : // Port 2 interripts : the allspice controller is talking to us //interrupt (PORT2_VECTOR) P2_VEC(void) void __interrupt_vec(PORT2_VECTOR) P2_VEC(void) { _disable_interrupts(); //no nesting! 82e8: 32 c2 dint 82ea: 03 43 nop 000082ec <.Loc.54.1>: if((P2IFG & GDO0) == GDO0) 82ec: f2 b0 40 00 bit.b #64, &0x002b ;#0x0040 82f0: 2b 00 82f2: 05 24 jz $+12 ;abs 0x82fe 000082f4 <.Loc.56.1>: { flags |= CONTROLLER_RDY; 82f4: a2 d3 d2 02 bis #2, &0x02d2 ;r3 As==10 000082f8 <.Loc.57.1>: LPM3_EXIT; 82f8: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 82fc: 00 00 000082fe <.L2>: //We need to grab that byte! } P2IFG=0x00; 82fe: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 00008302 <.Loc.61.1>: _enable_interrupts(); 8302: 32 d2 eint 00008304 <.Loc.62.1>: } 8304: 00 13 reti 00008306 : /** This is called once every overflow */ //interrupt (TIMERA1_VECTOR) TA1_VEC(void) void __interrupt_vec(TIMERA1_VECTOR) TA1_VEC(void) { 8306: 0c 12 push r12 ; 00008308 <.LCFI0>: _disable_interrupts(); //no nesting! 8308: 32 c2 dint 830a: 03 43 nop 0000830c <.Loc.72.1>: if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 830c: 1c 42 2e 01 mov &0x012e,r12 ;0x012e 00008310 <.Loc.72.1>: 8310: 3c 90 0a 00 cmp #10, r12 ;#0x000a 8314: 09 20 jnz $+20 ;abs 0x8328 00008316 <.Loc.74.1>: { flags |= TIMER_UP; 8316: 92 d3 d2 02 bis #1, &0x02d2 ;r3 As==01 0000831a <.Loc.75.1>: seconds++; 831a: 92 53 d0 02 inc &0x02d0 ; 0000831e <.Loc.76.1>: TACTL &= ~TAIFG; //clear the flag 831e: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008322 <.Loc.77.1>: LPM3_EXIT; 8322: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0 8326: 02 00 00008328 <.L8>: } _enable_interrupts(); 8328: 32 d2 eint 0000832a <.Loc.80.1>: } 832a: 3c 41 pop r12 ; 0000832c <.LCFI1>: 832c: 00 13 reti 0000832e : This is called once for every RS232 character that comes in */ //interrupt (USCIAB0RX_VECTOR) RX_VEC(void) void __interrupt_vec(USCIAB0RX_VECTOR) RX_VEC(void) { _disable_interrupts(); //no nesting! 832e: 32 c2 dint 8330: 03 43 nop 00008332 <.Loc.90.1>: //P1OUT^=LED_GRN; rx_char = UCA0RXBUF; 8332: d2 42 66 00 mov.b &0x0066,&0x02cb ;0x0066 8336: cb 02 00008338 <.Loc.91.1>: flags |= RXCHAR_RDY; 8338: b2 d2 d2 02 bis #8, &0x02d2 ;r2 As==11 0000833c <.Loc.92.1>: LPM3_EXIT; 833c: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 8340: 00 00 00008342 <.Loc.93.1>: _enable_interrupts(); 8342: 32 d2 eint 00008344 <.Loc.94.1>: } 8344: 00 13 reti 00008346 : // Port 2 interripts : the allspice controller is talking to us //interrupt (ADC10_VECTOR) ADC_VEC(void) void __interrupt_vec(ADC10_VECTOR) ADC_VEC(void) { _disable_interrupts(); //no nesting! 8346: 32 c2 dint 8348: 03 43 nop 0000834a <.Loc.105.1>: LPM3_EXIT; 834a: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 834e: 00 00 00008350 <.Loc.106.1>: _enable_interrupts(); 8350: 32 d2 eint 00008352 <.Loc.107.1>: } 8352: 00 13 reti 00008354 : TAR = 0; TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! }*/ void tinit(unsigned int milliseconds) { 8354: 0a 12 push r10 ; 00008356 <.LCFI2>: TACTL = TASSEL_1; // ACLK, upmode 8356: b2 40 00 01 mov #256, &0x0160 ;#0x0100 835a: 60 01 0000835c <.Loc.127.1>: TACTL &= ~TAIFG; //clear interrupt 835c: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008360 <.Loc.128.1>: TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8360: 0e 4c mov r12, r14 ; 8362: 0f 43 clr r15 ; 8364: 0c 4e mov r14, r12 ; 00008366 <.LVL1>: 8366: 0c 5e add r14, r12 ; 8368: 0d 4f mov r15, r13 ; 836a: 0d 6f addc r15, r13 ; 836c: 0a 4c mov r12, r10 ; 836e: 0a 5e add r14, r10 ; 8370: 0b 4d mov r13, r11 ; 8372: 0b 6f addc r15, r11 ; 8374: 0a 5a rla r10 ; 8376: 0b 6b rlc r11 ; 8378: 0a 5a rla r10 ; 837a: 0b 6b rlc r11 ; 837c: 0a 5a rla r10 ; 837e: 0b 6b rlc r11 ; 8380: 0a 5a rla r10 ; 8382: 0b 6b rlc r11 ; 8384: 0c 4a mov r10, r12 ; 8386: 0d 4b mov r11, r13 ; 8388: 0c 8e sub r14, r12 ; 838a: 0d 7f subc r15, r13 ; 838c: 0c 5c rla r12 ; 838e: 0d 6d rlc r13 ; 8390: 0c 5c rla r12 ; 8392: 0d 6d rlc r13 ; 8394: 0c 5c rla r12 ; 8396: 0d 6d rlc r13 ; 8398: 0c 8e sub r14, r12 ; 839a: 0d 7f subc r15, r13 ; 0000839c <.Loc.128.1>: 839c: 3e 40 e8 03 mov #1000, r14 ;#0x03e8 000083a0 <.LVL2>: 83a0: 4f 43 clr.b r15 ; 83a2: 0c 5c rla r12 ; 83a4: 0d 6d rlc r13 ; 83a6: 0c 5c rla r12 ; 83a8: 0d 6d rlc r13 ; 83aa: 0c 5c rla r12 ; 83ac: 0d 6d rlc r13 ; 83ae: 0c 5c rla r12 ; 83b0: 0d 6d rlc r13 ; 83b2: 0c 5c rla r12 ; 83b4: 0d 6d rlc r13 ; 83b6: b0 12 d2 8f call #-28718 ;#0x8fd2 000083ba <.Loc.128.1>: 83ba: 82 4c 72 01 mov r12, &0x0172 ; 000083be <.Loc.130.1>: //TACCR0 = 12000; // ~1 second TAR = 0; 83be: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 000083c2 <.Loc.131.1>: TACTL |= MC_UPTO_CCR0 | TAIE; //overflow interrupt enabled, start counting! 83c2: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 83c6: 60 01 000083c8 <.Loc.132.1>: } 83c8: 3a 41 pop r10 ; 000083ca <.LCFI3>: 83ca: 30 41 ret 000083cc : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: 83d0: 4d 43 clr.b r13 ; 000083d2 <.L14>: { __nop(); 83d2: 03 43 nop 000083d4 <.Loc.143.1>: __nop(); 83d4: 03 43 nop 000083d6 <.Loc.144.1>: __nop(); 83d6: 03 43 nop 000083d8 <.Loc.145.1>: __nop(); 83d8: 03 43 nop 000083da <.Loc.146.1>: __nop(); 83da: 03 43 nop 000083dc <.Loc.147.1>: __nop(); 83dc: 03 43 nop 000083de <.Loc.148.1>: __nop(); 83de: 03 43 nop 000083e0 <.Loc.149.1>: __nop(); 83e0: 03 43 nop 000083e2 <.Loc.150.1>: __nop(); 83e2: 03 43 nop 000083e4 <.Loc.151.1>: __nop(); 83e4: 03 43 nop 000083e6 <.Loc.152.1>: __nop(); 83e6: 03 43 nop 000083e8 <.Loc.153.1>: __nop(); 83e8: 03 43 nop 000083ea <.Loc.154.1>: __nop(); 83ea: 03 43 nop 000083ec <.Loc.155.1>: __nop(); 83ec: 03 43 nop 000083ee <.Loc.156.1>: __nop(); 83ee: 03 43 nop 000083f0 <.Loc.157.1>: __nop(); 83f0: 03 43 nop 000083f2 <.Loc.140.1>: for (i = 0; i: 83f4: 0d 9c cmp r12, r13 ; 83f6: ed 23 jnz $-36 ;abs 0x83d2 000083f8 <.L12>: } } 83f8: 30 41 ret 000083fa : Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 83fa: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 83fe: 20 01 00008400 <.Loc.168.1>: WDTCTL = WDT_ARST_1000; //Select ACLK as source 8400: b2 40 0c 5a mov #23052, &0x0120 ;#0x5a0c 8404: 20 01 00008406 <.Loc.169.1>: WDOG(); //Feed the dog 8406: 1c 42 20 01 mov &0x0120,r12 ;0x0120 840a: 7c f0 ff 00 and.b #255, r12 ;#0x00ff 840e: 3c 50 08 5a add #23048, r12 ;#0x5a08 8412: 82 4c 20 01 mov r12, &0x0120 ; 00008416 <.Loc.171.1>: P1OUT = P1OUT_INIT; //Init output data of port1 8416: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 0000841a <.Loc.172.1>: P2OUT = P2OUT_INIT; //Init output data of port2 841a: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 0000841e <.Loc.173.1>: P3OUT = P3OUT_INIT; 841e: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 00008422 <.Loc.175.1>: P1SEL = P1SEL_INIT; //Select port or module -function on port1 8422: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 00008426 <.Loc.176.1>: P2SEL = P2SEL_INIT; //Select port or module -function on port2 8426: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 0000842a <.Loc.177.1>: P3SEL = P3SEL_INIT; 842a: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 842e: 1b 00 00008430 <.Loc.179.1>: P1DIR = P1DIR_INIT; //Init port direction register of port1 8430: f2 43 22 00 mov.b #-1, &0x0022 ;r3 As==11 00008434 <.Loc.180.1>: P2DIR = P2DIR_INIT; //Init port direction register of port2 8434: f2 40 3f 00 mov.b #63, &0x002a ;#0x003f 8438: 2a 00 0000843a <.Loc.181.1>: P3DIR = P3DIR_INIT; 843a: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 843e: 1a 00 00008440 <.Loc.183.1>: P1IES = P1IES_INIT; //init port interrupts 8440: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 00008444 <.Loc.184.1>: P2IES = P2IES_INIT; 8444: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 8448: 2c 00 0000844a <.Loc.186.1>: P1IE = P1IE_INIT; 844a: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 0000844e <.Loc.187.1>: P2IE = P2IE_INIT; 844e: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 8452: 2d 00 00008454 <.Loc.192.1>: //BCSCTL1 = CALBC1_16MHZ; // Set DCO //DCOCTL = CALDCO_16MHZ; BCSCTL1 = CALBC1_12MHZ; // Set DCO 8454: d2 42 fb 10 mov.b &0x10fb,&0x0057 ;0x10fb 8458: 57 00 0000845a <.Loc.193.1>: DCOCTL = CALDCO_12MHZ; 845a: d2 42 fa 10 mov.b &0x10fa,&0x0056 ;0x10fa 845e: 56 00 00008460 <.Loc.195.1>: BCSCTL3 = LFXT1S_2; //use the VLOCLK ultra low oscilator for wakeup intervals, not very accurate/ 8460: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 8464: 53 00 00008466 <.Loc.196.1>: } 8466: 30 41 ret 00008468 : /**init the ADC10 */ void init_adc() { ADC10AE0 = ADC_IN; 8468: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 0000846c <.Loc.204.1>: ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 846c: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 8470: b0 01 00008472 <.Loc.205.1>: ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8472: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8476: b2 01 00008478 <.Loc.206.1>: } 8478: 30 41 ret 0000847a : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 847a: b2 d0 03 00 bis #3, &0x01b0 ; 847e: b0 01 00008480 <.L22>: while(ADC10CTL1 & ADC10BUSY); 8480: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 8484: fd 23 jnz $-4 ;abs 0x8480 00008486 <.Loc.214.1>: return ADC10MEM; } 8486: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 848a: 30 41 ret 0000848c : void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 848c: 4e 43 clr.b r14 ; 848e: 0e 9d cmp r13, r14 ; 8490: 08 34 jge $+18 ;abs 0x84a2 8492: 0d 5c add r12, r13 ; 00008494 <.L27>: { volatile int i; UCA0TXBUF = string[pointer]; 8494: f2 4c 67 00 mov.b @r12+, &0x0067 ; 00008498 <.L26>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8498: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 849c: fd 27 jz $-4 ;abs 0x8498 0000849e <.LBE28>: for( pointer = 0; pointer < length; pointer++) 849e: 0c 9d cmp r13, r12 ; 84a0: f9 23 jnz $-12 ;abs 0x8494 000084a2 <.L24>: } } 84a2: 30 41 ret 000084a4 : void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 84a4: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 84a8: 61 00 000084aa <.Loc.234.1>: //UCA0BR0 = 0x82; // 9600 from 16Mhz //UCA0BR1 = 0x6; UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 84aa: f2 40 e2 ff mov.b #-30, &0x0062 ;#0xffe2 84ae: 62 00 000084b0 <.Loc.234.1>: 84b0: e2 42 63 00 mov.b #4, &0x0063 ;r2 As==10 000084b4 <.Loc.238.1>: //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 84b4: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 000084b8 <.Loc.239.1>: UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 84b8: d2 c3 61 00 bic.b #1, &0x0061 ;r3 As==01 000084bc <.Loc.240.1>: IE2 |= UCA0RXIE; 84bc: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 000084c0 <.Loc.241.1>: } 84c0: 30 41 ret 000084c2 : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 84c2: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 000084c6 <.Loc.246.1>: UCB0CTL1 = UCSWRST | UCSSEL1; 84c6: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 84ca: 69 00 000084cc <.Loc.247.1>: UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 84cc: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 84d0: 68 00 000084d2 <.Loc.248.1>: UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 84d2: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 000084d6 <.Loc.249.1>: UCB0BR1 = 0; 84d6: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 000084da <.Loc.250.1>: UCB0CTL1 &= ~UCSWRST; 84da: d2 c3 69 00 bic.b #1, &0x0069 ;r3 As==01 000084de <.Loc.252.1>: } 84de: 30 41 ret 000084e0 : void CCXX_WRITE_SPI_RF_SETTINGS() { 84e0: 0a 12 push r10 ; 000084e2 <.LCFI4>: // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 84e2: 3a 40 56 8e mov #-29098,r10 ;#0x8e56 84e6: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 84ea: 4c 43 clr.b r12 ; 84ec: 8a 12 call r10 ; 000084ee <.LVL15>: CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 84ee: 7d 40 06 00 mov.b #6, r13 ; 84f2: 6c 43 mov.b #2, r12 ;r3 As==10 84f4: 8a 12 call r10 ; 000084f6 <.LVL16>: CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 84f6: 7d 40 3c 00 mov.b #60, r13 ;#0x003c 84fa: 7c 40 06 00 mov.b #6, r12 ; 84fe: 8a 12 call r10 ; 00008500 <.LVL17>: CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 8500: 6d 42 mov.b #4, r13 ;r2 As==10 8502: 7c 40 07 00 mov.b #7, r12 ; 8506: 8a 12 call r10 ; 00008508 <.LVL18>: CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 8508: 7d 40 05 00 mov.b #5, r13 ; 850c: 7c 42 mov.b #8, r12 ;r2 As==11 850e: 8a 12 call r10 ; 00008510 <.LVL19>: CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 8510: 5d 43 mov.b #1, r13 ;r3 As==01 8512: 7c 40 09 00 mov.b #9, r12 ; 8516: 8a 12 call r10 ; 00008518 <.LVL20>: CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 8518: 7d 40 9a ff mov.b #-102, r13 ;#0xff9a 851c: 7c 40 0a 00 mov.b #10, r12 ;#0x000a 8520: 8a 12 call r10 ; 00008522 <.LVL21>: CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 8522: 7d 40 0a 00 mov.b #10, r13 ;#0x000a 8526: 7c 40 0b 00 mov.b #11, r12 ;#0x000b 852a: 8a 12 call r10 ; 0000852c <.LVL22>: CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 852c: 4d 43 clr.b r13 ; 852e: 7c 40 0c 00 mov.b #12, r12 ;#0x000c 8532: 8a 12 call r10 ; 00008534 <.LVL23>: CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 8534: 7d 40 5c 00 mov.b #92, r13 ;#0x005c 8538: 7c 40 0d 00 mov.b #13, r12 ;#0x000d 853c: 8a 12 call r10 ; 0000853e <.LVL24>: CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 853e: 7d 40 4f 00 mov.b #79, r13 ;#0x004f 8542: 7c 40 0e 00 mov.b #14, r12 ;#0x000e 8546: 8a 12 call r10 ; 00008548 <.LVL25>: CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 8548: 7d 40 c0 ff mov.b #-64, r13 ;#0xffc0 854c: 7c 40 0f 00 mov.b #15, r12 ;#0x000f 8550: 8a 12 call r10 ; 00008552 <.LVL26>: CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 8552: 7d 40 2d 00 mov.b #45, r13 ;#0x002d 8556: 7c 40 10 00 mov.b #16, r12 ;#0x0010 855a: 8a 12 call r10 ; 0000855c <.LVL27>: CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 855c: 7d 40 3b 00 mov.b #59, r13 ;#0x003b 8560: 7c 40 11 00 mov.b #17, r12 ;#0x0011 8564: 8a 12 call r10 ; 00008566 <.LVL28>: CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 8566: 7d 40 73 00 mov.b #115, r13 ;#0x0073 856a: 7c 40 12 00 mov.b #18, r12 ;#0x0012 856e: 8a 12 call r10 ; 00008570 <.LVL29>: CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 8570: 7d 40 23 00 mov.b #35, r13 ;#0x0023 8574: 7c 40 13 00 mov.b #19, r12 ;#0x0013 8578: 8a 12 call r10 ; 0000857a <.LVL30>: CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 857a: 7d 40 b9 ff mov.b #-71, r13 ;#0xffb9 857e: 7c 40 14 00 mov.b #20, r12 ;#0x0014 8582: 8a 12 call r10 ; 00008584 <.LVL31>: CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 8584: 5d 43 mov.b #1, r13 ;r3 As==01 8586: 7c 40 15 00 mov.b #21, r12 ;#0x0015 858a: 8a 12 call r10 ; 0000858c <.LVL32>: CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 858c: 7d 40 33 00 mov.b #51, r13 ;#0x0033 8590: 7c 40 17 00 mov.b #23, r12 ;#0x0017 8594: 8a 12 call r10 ; 00008596 <.LVL33>: CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 8596: 7d 40 18 00 mov.b #24, r13 ;#0x0018 859a: 4c 4d mov.b r13, r12 ; 859c: 8a 12 call r10 ; 0000859e <.LVL34>: CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 859e: 7d 40 1d 00 mov.b #29, r13 ;#0x001d 85a2: 7c 40 19 00 mov.b #25, r12 ;#0x0019 85a6: 8a 12 call r10 ; 000085a8 <.LVL35>: CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 85a8: 7d 40 1c 00 mov.b #28, r13 ;#0x001c 85ac: 7c 40 1a 00 mov.b #26, r12 ;#0x001a 85b0: 8a 12 call r10 ; 000085b2 <.LVL36>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 85b2: 7d 40 c7 ff mov.b #-57, r13 ;#0xffc7 85b6: 7c 40 1b 00 mov.b #27, r12 ;#0x001b 85ba: 8a 12 call r10 ; 000085bc <.LVL37>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 85bc: 4d 43 clr.b r13 ; 85be: 7c 40 1c 00 mov.b #28, r12 ;#0x001c 85c2: 8a 12 call r10 ; 000085c4 <.LVL38>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 85c4: 7d 40 b0 ff mov.b #-80, r13 ;#0xffb0 85c8: 7c 40 1d 00 mov.b #29, r12 ;#0x001d 85cc: 8a 12 call r10 ; 000085ce <.LVL39>: CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 85ce: 7d 40 b6 ff mov.b #-74, r13 ;#0xffb6 85d2: 7c 40 21 00 mov.b #33, r12 ;#0x0021 85d6: 8a 12 call r10 ; 000085d8 <.LVL40>: CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 85d8: 7d 40 10 00 mov.b #16, r13 ;#0x0010 85dc: 7c 40 22 00 mov.b #34, r12 ;#0x0022 85e0: 8a 12 call r10 ; 000085e2 <.LVL41>: CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 85e2: 7d 40 ea ff mov.b #-22, r13 ;#0xffea 85e6: 7c 40 23 00 mov.b #35, r12 ;#0x0023 85ea: 8a 12 call r10 ; 000085ec <.LVL42>: CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 85ec: 7d 40 0a 00 mov.b #10, r13 ;#0x000a 85f0: 7c 40 24 00 mov.b #36, r12 ;#0x0024 85f4: 8a 12 call r10 ; 000085f6 <.LVL43>: CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 85f6: 4d 43 clr.b r13 ; 85f8: 7c 40 25 00 mov.b #37, r12 ;#0x0025 85fc: 8a 12 call r10 ; 000085fe <.LVL44>: CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 85fe: 7d 40 11 00 mov.b #17, r13 ;#0x0011 8602: 7c 40 26 00 mov.b #38, r12 ;#0x0026 8606: 8a 12 call r10 ; 00008608 <.LVL45>: CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 8608: 7d 40 59 00 mov.b #89, r13 ;#0x0059 860c: 7c 40 29 00 mov.b #41, r12 ;#0x0029 8610: 8a 12 call r10 ; 00008612 <.LVL46>: CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 8612: 7d 40 88 ff mov.b #-120, r13 ;#0xff88 8616: 7c 40 2c 00 mov.b #44, r12 ;#0x002c 861a: 8a 12 call r10 ; 0000861c <.LVL47>: CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 861c: 7d 40 31 00 mov.b #49, r13 ;#0x0031 8620: 7c 40 2d 00 mov.b #45, r12 ;#0x002d 8624: 8a 12 call r10 ; 00008626 <.LVL48>: CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 8626: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 862a: 7c 40 2e 00 mov.b #46, r12 ;#0x002e 862e: 8a 12 call r10 ; 00008630 <.LVL49>: CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 8630: 7d 43 mov.b #-1, r13 ;r3 As==11 8632: 7c 40 3e 00 mov.b #62, r12 ;#0x003e 8636: 8a 12 call r10 ; 00008638 <.LVL50>: } 8638: 3a 41 pop r10 ; 0000863a <.LCFI5>: 863a: 30 41 ret 0000863c : No timeout Interrupt driven! yay! */ void RX_MODE() { 863c: 0a 12 push r10 ; 0000863e <.LCFI6>: 863e: 09 12 push r9 ; 00008640 <.LCFI7>: CCXX_SPI_STROBE(CCxxx0_SIDLE); 8640: 3a 40 c0 8d mov #-29248,r10 ;#0x8dc0 8644: 7c 40 36 00 mov.b #54, r12 ;#0x0036 8648: 8a 12 call r10 ; 0000864a <.LVL51>: while(status!=15) //(15)31 for return to TX on complete, see MCSM1 864a: f2 90 0f 00 cmp.b #15, &0x02d4 ;#0x000f 864e: d4 02 8650: 08 24 jz $+18 ;abs 0x8662 00008652 <.Loc.591.1>: CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8652: 79 40 3d 00 mov.b #61, r9 ;#0x003d 00008656 <.L36>: 8656: 4c 49 mov.b r9, r12 ; 8658: 8a 12 call r10 ; 0000865a <.LVL52>: while(status!=15) //(15)31 for return to TX on complete, see MCSM1 865a: f2 90 0f 00 cmp.b #15, &0x02d4 ;#0x000f 865e: d4 02 8660: fa 23 jnz $-10 ;abs 0x8656 00008662 <.L35>: CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 8662: 7c 40 34 00 mov.b #52, r12 ;#0x0034 8666: 8a 12 call r10 ; 00008668 <.LVL53>: } 8668: 30 40 f8 8f br #0x8ff8 ; 0000866c : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 866c: 0a 12 push r10 ; 0000866e <.LCFI9>: 866e: 09 12 push r9 ; 00008670 <.LCFI10>: 8670: 08 12 push r8 ; 00008672 <.LCFI11>: 8672: 07 12 push r7 ; 00008674 <.LCFI12>: 8674: 06 12 push r6 ; 00008676 <.LCFI13>: 8676: 05 12 push r5 ; 00008678 <.LCFI14>: 8678: 04 12 push r4 ; 0000867a <.LCFI15>: 867a: 21 82 sub #4, r1 ;r2 As==10 0000867c <.LCFI16>: 867c: 04 4c mov r12, r4 ; 867e: 48 4d mov.b r13, r8 ; 00008680 <.LVL55>: //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 8680: 39 40 f4 8d mov #-29196,r9 ;#0x8df4 8684: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 00008688 <.LVL56>: 8688: 89 12 call r9 ; 0000868a <.LVL57>: 868a: 3c f0 ff 00 and #255, r12 ;#0x00ff 868e: 81 4c 00 00 mov r12, 0(r1) ; 00008692 <.LVL58>: real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 8692: 7c 40 3b 00 mov.b #59, r12 ;#0x003b 00008696 <.LVL59>: 8696: 89 12 call r9 ; 00008698 <.LVL60>: 8698: 3c f0 ff 00 and #255, r12 ;#0x00ff 869c: 81 4c 02 00 mov r12, 2(r1) ; 000086a0 <.LVL61>: for(i=0; i < length && i < pkt_length; i++) 86a0: 08 93 cmp #0, r8 ;r3 As==00 86a2: 4e 24 jz $+158 ;abs 0x8740 000086a4 <.Loc.613.1>: 86a4: 81 93 00 00 cmp #0, 0(r1) ;r3 As==00 86a8: 4d 24 jz $+156 ;abs 0x8744 86aa: 05 44 mov r4, r5 ; 000086ac <.Loc.613.1>: 86ac: 4a 43 clr.b r10 ; 000086ae <.Loc.615.1>: { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 86ae: 77 40 bf ff mov.b #-65, r7 ;#0xffbf 000086b2 <.Loc.613.1>: for(i=0; i < length && i < pkt_length; i++) 86b2: 2c 41 mov @r1, r12 ; 000086b4 <.LVL62>: 86b4: 46 4c mov.b r12, r6 ; 86b6: 02 3c jmp $+6 ;abs 0x86bc 000086b8 <.L47>: 86b8: 46 9d cmp.b r13, r6 ; 86ba: 0b 24 jz $+24 ;abs 0x86d2 000086bc <.L40>: rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 86bc: 4c 47 mov.b r7, r12 ; 86be: 89 12 call r9 ; 000086c0 <.LVL65>: 86c0: c5 4c 00 00 mov.b r12, 0(r5) ; 86c4: 15 53 inc r5 ; 000086c6 <.Loc.613.1>: for(i=0; i < length && i < pkt_length; i++) 86c6: 4d 4a mov.b r10, r13 ; 86c8: 5d 53 inc.b r13 ; 86ca: 4a 4d mov.b r13, r10 ; 000086cc <.LVL66>: 86cc: 04 45 mov r5, r4 ; 000086ce <.Loc.613.1>: 86ce: 48 9d cmp.b r13, r8 ; 86d0: f3 23 jnz $-24 ;abs 0x86b8 000086d2 <.L39>: //tmpbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 86d2: c4 43 00 00 mov.b #0, 0(r4) ;r3 As==00 000086d6 <.Loc.620.1>: RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 86d6: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 86da: 89 12 call r9 ; 000086dc <.LVL68>: 86dc: c2 4c ce 02 mov.b r12, &0x02ce ; 000086e0 <.Loc.621.1>: LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 86e0: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 86e4: 89 12 call r9 ; 000086e6 <.LVL69>: 86e6: c2 4c cd 02 mov.b r12, &0x02cd ; 000086ea <.Loc.622.1>: PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 86ea: 7c 40 38 00 mov.b #56, r12 ;#0x0038 86ee: 89 12 call r9 ; 000086f0 <.LVL70>: 86f0: c2 4c cc 02 mov.b r12, &0x02cc ; 000086f4 <.Loc.625.1>: if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 86f4: 25 41 mov @r1, r5 ; 86f6: 25 53 incd r5 ; 000086f8 <.Loc.625.1>: 86f8: 81 95 02 00 cmp r5, 2(r1) ; 86fc: 03 24 jz $+8 ;abs 0x8704 000086fe <.Loc.626.1>: LQI &= ~bit7; //force it to be INVALID! 86fe: f2 f0 7f 00 and.b #127, &0x02cd ;#0x007f 8702: cd 02 00008704 <.L41>: if (RSSI >= 128) 8704: 5c 42 ce 02 mov.b &0x02ce,r12 ;0x02ce 00008708 <.Loc.628.1>: 8708: 4c 93 cmp.b #0, r12 ;r3 As==00 870a: 12 38 jl $+38 ;abs 0x8730 0000870c <.Loc.632.1>: //RSSI_DBM = (int16_t)(RSSI - 256) / 2 - 72; RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; 870c: 12 c3 clrc 870e: 0c 10 rrc r12 ; 8710: 7c 50 b8 ff add.b #-72, r12 ;#0xffb8 8714: c2 4c ca 02 mov.b r12, &0x02ca ; 00008718 <.L43>: CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 8718: 39 40 c0 8d mov #-29248,r9 ;#0x8dc0 871c: 7c 40 3a 00 mov.b #58, r12 ;#0x003a 8720: 89 12 call r9 ; 00008722 <.LVL71>: CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 8722: 7c 40 36 00 mov.b #54, r12 ;#0x0036 8726: 89 12 call r9 ; 00008728 <.LVL72>: return i; //i = real length } 8728: 4c 4a mov.b r10, r12 ; 872a: 21 52 add #4, r1 ;r2 As==10 0000872c <.LCFI17>: 872c: 30 40 ee 8f br #0x8fee ; 00008730 <.L48>: RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8730: 3c 50 01 ff add #-255, r12 ;#0xff01 8734: 0c 11 rra r12 ; 00008736 <.Loc.630.1>: 8736: 7c 50 b8 ff add.b #-72, r12 ;#0xffb8 873a: c2 4c ca 02 mov.b r12, &0x02ca ; 873e: ec 3f jmp $-38 ;abs 0x8718 00008740 <.L44>: for(i=0; i < length && i < pkt_length; i++) 8740: 0a 48 mov r8, r10 ; 8742: c7 3f jmp $-112 ;abs 0x86d2 00008744 <.L45>: 8744: 2a 41 mov @r1, r10 ; 8746: c5 3f jmp $-116 ;abs 0x86d2 00008748 : /** Transmit a string of bytes. (use burst write) */ void TX_STRING(unsigned char *txstring, unsigned char length) { 8748: 0a 12 push r10 ; 0000874a <.LCFI19>: 874a: 09 12 push r9 ; 0000874c <.LCFI20>: 874c: 08 12 push r8 ; 0000874e <.LCFI21>: 874e: 07 12 push r7 ; 00008750 <.LCFI22>: 8750: 08 4c mov r12, r8 ; 8752: 47 4d mov.b r13, r7 ; 8754: 3a 40 c0 8d mov #-29248,r10 ;#0x8dc0 00008758 <.Loc.649.1>: //unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8758: 79 40 36 00 mov.b #54, r9 ;#0x0036 0000875c <.L50>: 875c: 4c 49 mov.b r9, r12 ; 875e: 8a 12 call r10 ; 00008760 <.LVL78>: }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 8760: f2 b0 70 00 bit.b #112, &0x02d4 ;#0x0070 8764: d4 02 8766: fa 23 jnz $-10 ;abs 0x875c 00008768 <.Loc.656.1>: //CC2500_SPI_WRREG(CCxxx0_TXFIFO, length);//Write the data length first CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8768: 4e 47 mov.b r7, r14 ; 876a: 0d 48 mov r8, r13 ; 876c: 7c 40 7f 00 mov.b #127, r12 ;#0x007f 8770: b0 12 a0 8e call #-29024 ;#0x8ea0 00008774 <.LVL79>: CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8774: 7c 40 35 00 mov.b #53, r12 ;#0x0035 8778: 8a 12 call r10 ; 0000877a <.LVL80>: do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 877a: 79 40 3d 00 mov.b #61, r9 ;#0x003d 877e: 03 3c jmp $+8 ;abs 0x8786 00008780 <.L58>: if(status == 31) //fast RX mode yay break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 8780: 3c b0 70 00 bit #112, r12 ;#0x0070 8784: 07 24 jz $+16 ;abs 0x8794 00008786 <.L52>: CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8786: 4c 49 mov.b r9, r12 ; 8788: 8a 12 call r10 ; 0000878a <.LVL81>: if(status == 31) //fast RX mode yay 878a: 5c 42 d4 02 mov.b &0x02d4,r12 ;0x02d4 0000878e <.Loc.663.1>: 878e: 3c 90 1f 00 cmp #31, r12 ;#0x001f 8792: f6 23 jnz $-18 ;abs 0x8780 00008794 <.L49>: } 8794: 30 40 f4 8f br #0x8ff4 ; 00008798
: { 8798: 0a 12 push r10 ; 0000879a <.LCFI24>: 879a: 09 12 push r9 ; 0000879c <.LCFI25>: 879c: 08 12 push r8 ; 0000879e <.LCFI26>: 879e: 07 12 push r7 ; 000087a0 <.LCFI27>: 87a0: 06 12 push r6 ; 000087a2 <.LCFI28>: 87a2: 05 12 push r5 ; 000087a4 <.LCFI29>: 87a4: 04 12 push r4 ; 000087a6 <.LCFI30>: 87a6: 31 80 fa 00 sub #250, r1 ;#0x00fa 000087aa <.LCFI31>: sys_init(); //initialize system parameters 87aa: b0 12 fa 83 call #-31750 ;#0x83fa 000087ae <.LBB29>: UCA0CTL1 = UCSSEL_2; // SMCLK 87ae: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 87b2: 61 00 000087b4 <.Loc.234.1>: UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 87b4: f2 40 e2 ff mov.b #-30, &0x0062 ;#0xffe2 87b8: 62 00 000087ba <.Loc.234.1>: 87ba: e2 42 63 00 mov.b #4, &0x0063 ;r2 As==10 000087be <.Loc.238.1>: UCA0MCTL = UCBRS_2; 87be: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 000087c2 <.Loc.239.1>: UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 87c2: d2 c3 61 00 bic.b #1, &0x0061 ;r3 As==01 000087c6 <.Loc.240.1>: IE2 |= UCA0RXIE; 87c6: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 000087ca <.LBB31>: UCB0CTL1 = UCSWRST; 87ca: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 000087ce <.Loc.246.1>: UCB0CTL1 = UCSWRST | UCSSEL1; 87ce: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 87d2: 69 00 000087d4 <.Loc.247.1>: UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 87d4: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 87d8: 68 00 000087da <.Loc.248.1>: UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 87da: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 000087de <.Loc.249.1>: UCB0BR1 = 0; 87de: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 000087e2 <.Loc.250.1>: UCB0CTL1 &= ~UCSWRST; 87e2: d2 c3 69 00 bic.b #1, &0x0069 ;r3 As==01 000087e6 <.LBB33>: ADC10AE0 = ADC_IN; 87e6: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 000087ea <.Loc.204.1>: ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 87ea: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 87ee: b0 01 000087f0 <.Loc.205.1>: ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 87f0: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 87f4: b2 01 000087f6 <.LBE33>: P1OUT ^= LED_GRN; 87f6: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 000087fa <.Loc.275.1>: delay(0xFFFF); //lil bit O delay 87fa: 3c 43 mov #-1, r12 ;r3 As==11 87fc: b0 12 cc 83 call #-31796 ;#0x83cc 00008800 <.LVL84>: P1OUT ^= LED_GRN; 8800: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 00008804 <.Loc.278.1>: memset(rxbuf, 0, 64); //clear the buffer 8804: 0a 41 mov r1, r10 ; 8806: 3a 50 6a 00 add #106, r10 ;#0x006a 880a: 7e 40 40 00 mov.b #64, r14 ;#0x0040 880e: 4d 43 clr.b r13 ; 8810: 0c 4a mov r10, r12 ; 8812: b0 12 66 90 call #-28570 ;#0x9066 00008816 <.LVL85>: P3OUT &= ~CSn; //power on reset for radio, strobe CSn 8816: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 0000881a <.Loc.281.1>: delay(0xFF); 881a: 7c 40 ff 00 mov.b #255, r12 ;#0x00ff 881e: b0 12 cc 83 call #-31796 ;#0x83cc 00008822 <.LVL86>: P3OUT |= CSn; 8822: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008826 <.Loc.284.1>: delay(0xFFFF); 8826: 3c 43 mov #-1, r12 ;r3 As==11 8828: b0 12 cc 83 call #-31796 ;#0x83cc 0000882c <.LVL87>: CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 882c: 39 40 c0 8d mov #-29248,r9 ;#0x8dc0 8830: 7c 40 30 00 mov.b #48, r12 ;#0x0030 8834: 89 12 call r9 ; 00008836 <.LVL88>: CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 8836: b0 12 e0 84 call #-31520 ;#0x84e0 0000883a <.LVL89>: CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 883a: 7c 40 36 00 mov.b #54, r12 ;#0x0036 883e: 89 12 call r9 ; 00008840 <.LVL90>: WDOG(); //Feed the dog 8840: 1c 42 20 01 mov &0x0120,r12 ;0x0120 8844: 7c f0 ff 00 and.b #255, r12 ;#0x00ff 8848: 3c 50 08 5a add #23048, r12 ;#0x5a08 884c: 82 4c 20 01 mov r12, &0x0120 ; 00008850 <.Loc.294.1>: i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 8850: 79 40 35 00 mov.b #53, r9 ;#0x0035 00008854 <.L60>: 8854: 4c 49 mov.b r9, r12 ; 8856: b0 12 f4 8d call #-29196 ;#0x8df4 0000885a <.LVL91>: }while(i != 1); //this loop won't finish if theres a problem with the chip 885a: 5c 93 cmp.b #1, r12 ;r3 As==01 885c: fb 23 jnz $-8 ;abs 0x8854 0000885e <.Loc.299.1>: P1OUT ^= LED_RED; 885e: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 00008862 <.Loc.300.1>: delay(0xFF); //lil bit O delay 8862: 7c 40 ff 00 mov.b #255, r12 ;#0x00ff 00008866 <.LVL92>: 8866: b0 12 cc 83 call #-31796 ;#0x83cc 0000886a <.LVL93>: P1OUT ^= LED_RED; 886a: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 0000886e <.Loc.303.1>: flags = 0; 886e: 82 43 d2 02 mov #0, &0x02d2 ;r3 As==00 00008872 <.Loc.304.1>: P2IFG = 0x00; 8872: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 00008876 <.LBB35>: TACTL = TASSEL_1; // ACLK, upmode 8876: b2 40 00 01 mov #256, &0x0160 ;#0x0100 887a: 60 01 0000887c <.Loc.127.1>: TACTL &= ~TAIFG; //clear interrupt 887c: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008880 <.Loc.128.1>: TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8880: b2 40 e0 2e mov #12000, &0x0172 ;#0x2ee0 8884: 72 01 00008886 <.Loc.130.1>: TAR = 0; 8886: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 0000888a <.Loc.131.1>: TACTL |= MC_UPTO_CCR0 | TAIE; //overflow interrupt enabled, start counting! 888a: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 888e: 60 01 00008890 <.LBE35>: seconds = 0; 8890: 82 43 d0 02 mov #0, &0x02d0 ;r3 As==00 00008894 <.Loc.308.1>: TX_STRING("MON Startup", 11); 8894: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 8898: 3c 40 00 80 mov #-32768,r12 ;#0x8000 889c: b0 12 48 87 call #-30904 ;#0x8748 000088a0 <.LVL96>: P2IFG &= ~GDO0; //reset trashed interrupt state 88a0: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 88a4: 2b 00 000088a6 <.Loc.312.1>: _enable_interrupts(); //enable interrupts 88a6: 32 d2 eint 000088a8 <.Loc.314.1>: RX_MODE(); //put radio into listen mode. 88a8: b0 12 3c 86 call #-31172 ;#0x863c 000088ac <.LBB37>: for( pointer = 0; pointer < length; pointer++) 88ac: 3d 40 0d 80 mov #-32755,r13 ;#0x800d 000088b0 <.LBE37>: RX_MODE(); //put radio into listen mode. 88b0: 7c 40 4d 00 mov.b #77, r12 ;#0x004d 000088b4 <.LBB39>: UCA0TXBUF = string[pointer]; 88b4: c2 4c 67 00 mov.b r12, &0x0067 ; 000088b8 <.L61>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 88b8: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 88bc: fd 27 jz $-4 ;abs 0x88b8 000088be <.LBE39>: for( pointer = 0; pointer < length; pointer++) 88be: 3d 90 19 80 cmp #-32743,r13 ;#0x8019 88c2: 04 24 jz $+10 ;abs 0x88cc 88c4: 7c 4d mov.b @r13+, r12 ; 000088c6 <.LBB40>: UCA0TXBUF = string[pointer]; 88c6: c2 4c 67 00 mov.b r12, &0x0067 ; 000088ca <.Loc.224.1>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 88ca: f6 3f jmp $-18 ;abs 0x88b8 000088cc <.L105>: int loop=0,interval=120; //programmable variables 88cc: 75 40 78 00 mov.b #120, r5 ;#0x0078 000088d0 <.Loc.259.1>: unsigned int interchiplength=0,sample,length=0,i,rs232buflength=0; 88d0: 44 43 clr.b r4 ; 88d2: 38 40 e2 90 mov #-28446,r8 ;#0x90e2 000088d6 <.L62>: WDOG(); //Feed the dog 88d6: 1c 42 20 01 mov &0x0120,r12 ;0x0120 88da: 7c f0 ff 00 and.b #255, r12 ;#0x00ff 88de: 3c 50 08 5a add #23048, r12 ;#0x5a08 88e2: 82 4c 20 01 mov r12, &0x0120 ; 000088e6 <.LVL104>: if(flags & RXCHAR_RDY) 88e6: 1c 42 d2 02 mov &0x02d2,r12 ;0x02d2 000088ea <.LVL105>: 88ea: 7c f2 and.b #8, r12 ;r2 As==11 000088ec <.Loc.322.1>: 88ec: b2 b2 d2 02 bit #8, &0x02d2 ;r2 As==11 88f0: 36 24 jz $+110 ;abs 0x895e 000088f2 <.Loc.324.1>: _disable_interrupts(); 88f2: 32 c2 dint 88f4: 03 43 nop 000088f6 <.LVL106>: flags &= ~RXCHAR_RDY; 88f6: b2 c2 d2 02 bic #8, &0x02d2 ;r2 As==11 000088fa <.Loc.327.1>: if(rx_char == '\r' || rx_char == '\n'); //don't count a return in the buffer! 88fa: 5d 42 cb 02 mov.b &0x02cb,r13 ;0x02cb 000088fe <.Loc.327.1>: 88fe: 7d 90 0d 00 cmp.b #13, r13 ;#0x000d 8902: 7c 25 jz $+762 ;abs 0x8bfc 00008904 <.Loc.327.1>: 8904: 7d 90 0a 00 cmp.b #10, r13 ;#0x000a 8908: 07 24 jz $+16 ;abs 0x8918 0000890a <.Loc.330.1>: rs232buf[rs232buflength]=rx_char; 890a: 7c 40 2a 00 mov.b #42, r12 ;#0x002a 890e: 0c 51 add r1, r12 ; 8910: 0c 54 add r4, r12 ; 8912: cc 4d 00 00 mov.b r13, 0(r12) ; 00008916 <.Loc.331.1>: rs232buflength++; 8916: 14 53 inc r4 ; 00008918 <.L66>: if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 8918: 7c 40 3c 00 mov.b #60, r12 ;#0x003c 891c: 0c 94 cmp r4, r12 ; 891e: 1b 2c jc $+56 ;abs 0x8956 00008920 <.Loc.336.1>: P1OUT |= LED_RED; 8920: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 00008924 <.Loc.337.1>: if(memcmp("Reset",rs232buf,5)==0) 8924: 7e 40 05 00 mov.b #5, r14 ; 8928: 0d 41 mov r1, r13 ; 892a: 3d 50 2a 00 add #42, r13 ;#0x002a 892e: 3c 40 1a 80 mov #-32742,r12 ;#0x801a 8932: b0 12 20 90 call #-28640 ;#0x9020 00008936 <.LVL108>: 8936: 0c 93 cmp #0, r12 ;r3 As==00 8938: 70 25 jz $+738 ;abs 0x8c1a 0000893a <.L68>: TX_STRING(rs232buf,rs232buflength); //Send the string out 893a: 4d 44 mov.b r4, r13 ; 893c: 0c 41 mov r1, r12 ; 893e: 3c 50 2a 00 add #42, r12 ;#0x002a 8942: b0 12 48 87 call #-30904 ;#0x8748 00008946 <.LVL109>: P2IFG &= ~GDO0; //reset trashed interrupt state 8946: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 894a: 2b 00 0000894c <.Loc.344.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 894c: b0 12 3c 86 call #-31172 ;#0x863c 00008950 <.LVL110>: P1OUT &= ~LED_RED; 8950: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008954 <.Loc.345.1>: rs232buflength = 0; 8954: 44 43 clr.b r4 ; 00008956 <.L67>: P1OUT &= ~LED_RED; 8956: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 0000895a <.Loc.352.1>: _enable_interrupts(); 895a: 32 d2 eint 0000895c <.Loc.325.1>: loop = 1; 895c: 5c 43 mov.b #1, r12 ;r3 As==01 0000895e <.L64>: if(flags & CONTROLLER_RDY) //Someone is sending us something 895e: a2 b3 d2 02 bit #2, &0x02d2 ;r3 As==10 8962: 08 20 jnz $+18 ;abs 0x8974 00008964 <.Loc.432.1>: if(flags & TIMER_UP) //Did the timer expire? report your findings! 8964: 92 b3 d2 02 bit #1, &0x02d2 ;r3 As==01 8968: 26 20 jnz $+78 ;abs 0x89b6 0000896a <.Loc.530.1>: if(loop == 0) 896a: 0c 93 cmp #0, r12 ;r3 As==00 896c: b4 23 jnz $-150 ;abs 0x88d6 0000896e <.Loc.531.1>: LPM3; //when we wake up it'll be because of an event 896e: 32 d0 d0 00 bis #208, r2 ;#0x00d0 8972: b1 3f jmp $-156 ;abs 0x88d6 00008974 <.L148>: _disable_interrupts(); 8974: 32 c2 dint 8976: 03 43 nop 00008978 <.LVL113>: P1OUT |= LED_RED; 8978: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 0000897c <.Loc.359.1>: flags &= ~CONTROLLER_RDY; 897c: a2 c3 d2 02 bic #2, &0x02d2 ;r3 As==10 00008980 <.Loc.360.1>: memset(rxbuf, 0, 64); 8980: 7e 40 40 00 mov.b #64, r14 ;#0x0040 8984: 4d 43 clr.b r13 ; 8986: 0c 4a mov r10, r12 ; 8988: b0 12 66 90 call #-28570 ;#0x9066 0000898c <.LVL114>: length = RX_STRING(rxbuf, 64); 898c: 7d 40 40 00 mov.b #64, r13 ;#0x0040 8990: 0c 4a mov r10, r12 ; 8992: b0 12 6c 86 call #-31124 ;#0x866c 00008996 <.LVL115>: if(LQI & bit7) //CRC ok 8996: c2 93 cd 02 cmp.b #0, &0x02cd ;r3 As==00 899a: 42 39 jl $+646 ;abs 0x8c20 0000899c <.L71>: P2IFG &= ~GDO0; //reset trashed interrupt state 899c: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 89a0: 2b 00 000089a2 <.Loc.425.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 89a2: b0 12 3c 86 call #-31172 ;#0x863c 000089a6 <.LVL116>: P1OUT &= ~LED_RED; 89a6: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 000089aa <.Loc.429.1>: P1OUT &= ~LED_GRN; 89aa: e2 c3 21 00 bic.b #2, &0x0021 ;r3 As==10 000089ae <.Loc.430.1>: _enable_interrupts(); 89ae: 32 d2 eint 000089b0 <.Loc.432.1>: if(flags & TIMER_UP) //Did the timer expire? report your findings! 89b0: 92 b3 d2 02 bit #1, &0x02d2 ;r3 As==01 89b4: 90 27 jz $-222 ;abs 0x88d6 000089b6 <.L90>: if(flags & GO_NOW) //report every 20 second by default 89b6: a2 b2 d2 02 bit #4, &0x02d2 ;r2 As==10 89ba: 0d 21 jnz $+540 ;abs 0x8bd6 000089bc <.L93>: if(((seconds) % interval) == 0 || (flags & GO_NOW)) //report every 60 second by default 89bc: 0d 45 mov r5, r13 ; 89be: 1c 42 d0 02 mov &0x02d0,r12 ;0x02d0 89c2: b0 12 42 8f call #-28862 ;#0x8f42 000089c6 <.Loc.464.1>: 89c6: 0c 93 cmp #0, r12 ;r3 As==00 89c8: 03 24 jz $+8 ;abs 0x89d0 000089ca <.Loc.464.1>: 89ca: a2 b2 d2 02 bit #4, &0x02d2 ;r2 As==10 89ce: 83 27 jz $-248 ;abs 0x88d6 000089d0 <.L94>: flags &= ~(TIMER_UP|GO_NOW); //clear the flag 89d0: b2 f0 fa ff and #-6, &0x02d2 ;#0xfffa 89d4: d2 02 000089d6 <.Loc.469.1>: P1OUT |= LED_RED; 89d6: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 000089da <.Loc.471.1>: ADC10CTL1 = INCH_10 + ADC10DIV_4; // Temp Sensor ADC10CLK/5 89da: b2 40 80 a0 mov #-24448,&0x01b2 ;#0xa080 89de: b2 01 000089e0 <.Loc.472.1>: ADC10CTL0 = SREF_1 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE + ADC10SR; 89e0: b2 40 38 3c mov #15416, &0x01b0 ;#0x3c38 89e4: b0 01 000089e6 <.Loc.473.1>: ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 89e6: b2 d0 03 00 bis #3, &0x01b0 ; 89ea: b0 01 000089ec <.Loc.475.1>: LPM3; 89ec: 32 d0 d0 00 bis #208, r2 ;#0x00d0 000089f0 <.Loc.476.1>: traw = ADC10MEM; 89f0: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 89f4: 0d 43 clr r13 ; 89f6: 81 4c 22 00 mov r12, 34(r1) ; 0x0022 89fa: 81 4d 24 00 mov r13, 36(r1) ; 0x0024 000089fe <.Loc.478.1>: ADC10CTL0 &= ~ENC; 89fe: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 00008a02 <.Loc.480.1>: ADC10CTL1 = INCH_11; // AVcc/2 8a02: b2 40 00 b0 mov #-20480,&0x01b2 ;#0xb000 8a06: b2 01 00008a08 <.Loc.481.1>: ADC10CTL0 = SREF_1 + ADC10SHT_2 + REFON + ADC10ON + ADC10IE + REF2_5V; 8a08: b2 40 78 30 mov #12408, &0x01b0 ;#0x3078 8a0c: b0 01 00008a0e <.Loc.482.1>: ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 8a0e: b2 d0 03 00 bis #3, &0x01b0 ; 8a12: b0 01 00008a14 <.Loc.484.1>: LPM3; 8a14: 32 d0 d0 00 bis #208, r2 ;#0x00d0 00008a18 <.Loc.485.1>: _disable_interrupts(); 8a18: 32 c2 dint 8a1a: 03 43 nop 00008a1c <.Loc.486.1>: vraw = ADC10MEM; 8a1c: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 8a20: 0d 43 clr r13 ; 8a22: 81 4c 26 00 mov r12, 38(r1) ; 0x0026 8a26: 81 4d 28 00 mov r13, 40(r1) ; 0x0028 00008a2a <.Loc.487.1>: ADC10CTL0 &= ~ENC; 8a2a: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 00008a2e <.Loc.488.1>: ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 8a2e: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 8a32: b0 01 00008a34 <.Loc.494.1>: degC = (((traw - 673) * 4230) / 1024); 8a34: 91 41 22 00 mov 34(r1), 18(r1) ;0x00022, 0x0012 8a38: 12 00 8a3a: 91 41 24 00 mov 36(r1), 20(r1) ;0x00024, 0x0014 8a3e: 14 00 00008a40 <.LVL119>: volt = (vraw*25)/512; 8a40: 1c 41 26 00 mov 38(r1), r12 ;0x00026 8a44: 1d 41 28 00 mov 40(r1), r13 ;0x00028 00008a48 <.LVL120>: length=sprintf(rxbuf, "GND:%s S:%u T:%d V:%d", CALLSIGN, seconds, degC, volt); //send the temperature to the ground 8a48: 19 42 d0 02 mov &0x02d0,r9 ;0x02d0 00008a4c <.Loc.501.1>: volt = (vraw*25)/512; 8a4c: 0e 4c mov r12, r14 ; 8a4e: 0e 5c add r12, r14 ; 8a50: 0f 4d mov r13, r15 ; 8a52: 0f 6d addc r13, r15 ; 8a54: 0e 5c add r12, r14 ; 8a56: 81 4e 16 00 mov r14, 22(r1) ; 0x0016 8a5a: 0f 6d addc r13, r15 ; 8a5c: 81 4f 18 00 mov r15, 24(r1) ; 0x0018 8a60: 1e 41 16 00 mov 22(r1), r14 ;0x00016 8a64: 1f 41 18 00 mov 24(r1), r15 ;0x00018 8a68: 0e 5e rla r14 ; 8a6a: 0f 6f rlc r15 ; 8a6c: 0e 5e rla r14 ; 8a6e: 0f 6f rlc r15 ; 8a70: 0e 5e rla r14 ; 8a72: 0f 6f rlc r15 ; 8a74: 0b 4e mov r14, r11 ; 8a76: 0b 5c add r12, r11 ; 8a78: 81 4b 0a 00 mov r11, 10(r1) ; 0x000a 8a7c: 0b 4f mov r15, r11 ; 8a7e: 0b 6d addc r13, r11 ; 8a80: 81 4b 0c 00 mov r11, 12(r1) ; 0x000c 00008a84 <.Loc.501.1>: 8a84: 0b 93 cmp #0, r11 ;r3 As==00 8a86: 05 34 jge $+12 ;abs 0x8a92 8a88: b1 50 ff 01 add #511, 10(r1) ;#0x01ff, 0x000a 8a8c: 0a 00 8a8e: 81 63 0c 00 adc 12(r1) ; 00008a92 <.L95>: 8a92: 1c 41 0a 00 mov 10(r1), r12 ;0x0000a 00008a96 <.LVL121>: 8a96: 1d 41 0c 00 mov 12(r1), r13 ;0x0000c 8a9a: 0d 11 rra r13 ; 8a9c: 0c 10 rrc r12 ; 8a9e: 0d 11 rra r13 ; 8aa0: 0c 10 rrc r12 ; 8aa2: 0d 11 rra r13 ; 8aa4: 0c 10 rrc r12 ; 8aa6: 0d 11 rra r13 ; 8aa8: 0c 10 rrc r12 ; 8aaa: 0d 11 rra r13 ; 8aac: 0c 10 rrc r12 ; 8aae: 0d 11 rra r13 ; 8ab0: 0c 10 rrc r12 ; 8ab2: 0d 11 rra r13 ; 8ab4: 0c 10 rrc r12 ; 8ab6: 0d 11 rra r13 ; 8ab8: 0c 10 rrc r12 ; 8aba: 0d 11 rra r13 ; 8abc: 0c 10 rrc r12 ; 00008abe <.Loc.501.1>: 8abe: 81 4c 08 00 mov r12, 8(r1) ; 00008ac2 <.Loc.494.1>: degC = (((traw - 673) * 4230) / 1024); 8ac2: 16 41 12 00 mov 18(r1), r6 ;0x00012 8ac6: 36 50 5f fd add #-673, r6 ;#0xfd5f 8aca: 17 41 14 00 mov 20(r1), r7 ;0x00014 8ace: 37 63 addc #-1, r7 ;r3 As==11 00008ad0 <.Loc.494.1>: 8ad0: 0c 46 mov r6, r12 ; 8ad2: 0d 47 mov r7, r13 ; 8ad4: 0c 5c rla r12 ; 8ad6: 0d 6d rlc r13 ; 8ad8: 0c 5c rla r12 ; 8ada: 0d 6d rlc r13 ; 8adc: 0c 5c rla r12 ; 8ade: 0d 6d rlc r13 ; 8ae0: 0c 5c rla r12 ; 8ae2: 0d 6d rlc r13 ; 8ae4: 0c 5c rla r12 ; 8ae6: 0d 6d rlc r13 ; 8ae8: 0e 4c mov r12, r14 ; 8aea: 0e 56 add r6, r14 ; 8aec: 81 4e 1a 00 mov r14, 26(r1) ; 0x001a 8af0: 0b 4d mov r13, r11 ; 8af2: 0b 67 addc r7, r11 ; 8af4: 81 4b 1c 00 mov r11, 28(r1) ; 0x001c 8af8: 1c 41 1a 00 mov 26(r1), r12 ;0x0001a 8afc: 1d 41 1c 00 mov 28(r1), r13 ;0x0001c 8b00: 0c 5c rla r12 ; 8b02: 0d 6d rlc r13 ; 8b04: 0c 5c rla r12 ; 8b06: 0d 6d rlc r13 ; 8b08: 0c 5c rla r12 ; 8b0a: 0d 6d rlc r13 ; 8b0c: 0c 5c rla r12 ; 8b0e: 0d 6d rlc r13 ; 8b10: 0e 4c mov r12, r14 ; 8b12: 0e 56 add r6, r14 ; 8b14: 81 4e 1e 00 mov r14, 30(r1) ; 0x001e 8b18: 0b 4d mov r13, r11 ; 8b1a: 0b 67 addc r7, r11 ; 8b1c: 81 4b 20 00 mov r11, 32(r1) ; 0x0020 8b20: 1c 41 1e 00 mov 30(r1), r12 ;0x0001e 8b24: 1d 41 20 00 mov 32(r1), r13 ;0x00020 8b28: 0c 5c rla r12 ; 8b2a: 0d 6d rlc r13 ; 8b2c: 0c 5c rla r12 ; 8b2e: 0d 6d rlc r13 ; 8b30: 0c 86 sub r6, r12 ; 8b32: 0d 77 subc r7, r13 ; 8b34: 0e 4c mov r12, r14 ; 8b36: 0e 5c add r12, r14 ; 8b38: 81 4e 0e 00 mov r14, 14(r1) ; 0x000e 8b3c: 0b 4d mov r13, r11 ; 8b3e: 0b 6d addc r13, r11 ; 8b40: 81 4b 10 00 mov r11, 16(r1) ; 0x0010 00008b44 <.Loc.494.1>: 8b44: 0b 93 cmp #0, r11 ;r3 As==00 8b46: 05 34 jge $+12 ;abs 0x8b52 8b48: b1 50 ff 03 add #1023, 14(r1) ;#0x03ff, 0x000e 8b4c: 0e 00 8b4e: 81 63 10 00 adc 16(r1) ; 00008b52 <.L97>: 8b52: 1c 41 0e 00 mov 14(r1), r12 ;0x0000e 8b56: 1d 41 10 00 mov 16(r1), r13 ;0x00010 8b5a: 0d 11 rra r13 ; 8b5c: 0c 10 rrc r12 ; 8b5e: 0d 11 rra r13 ; 8b60: 0c 10 rrc r12 ; 8b62: 0d 11 rra r13 ; 8b64: 0c 10 rrc r12 ; 8b66: 0d 11 rra r13 ; 8b68: 0c 10 rrc r12 ; 8b6a: 0d 11 rra r13 ; 8b6c: 0c 10 rrc r12 ; 8b6e: 0d 11 rra r13 ; 8b70: 0c 10 rrc r12 ; 8b72: 0d 11 rra r13 ; 8b74: 0c 10 rrc r12 ; 8b76: 0d 11 rra r13 ; 8b78: 0c 10 rrc r12 ; 8b7a: 0d 11 rra r13 ; 8b7c: 0c 10 rrc r12 ; 8b7e: 0d 11 rra r13 ; 8b80: 0c 10 rrc r12 ; 00008b82 <.Loc.494.1>: 8b82: 81 4c 06 00 mov r12, 6(r1) ; 00008b86 <.Loc.511.1>: length=sprintf(rxbuf, "GND:%s S:%u T:%d V:%d", CALLSIGN, seconds, degC, volt); //send the temperature to the ground 8b86: 81 49 04 00 mov r9, 4(r1) ; 8b8a: b1 40 39 80 mov #-32711,2(r1) ;#0x8039 8b8e: 02 00 8b90: b1 40 e6 80 mov #-32538,0(r1) ;#0x80e6 8b94: 00 00 8b96: 0c 4a mov r10, r12 ; 8b98: 88 12 call r8 ; 00008b9a <.LBB43>: for( pointer = 0; pointer < length; pointer++) 8b9a: 0d 4a mov r10, r13 ; 8b9c: 0c 5a add r10, r12 ; 00008b9e <.L99>: UCA0TXBUF = string[pointer]; 8b9e: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008ba2 <.L101>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8ba2: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8ba6: fd 27 jz $-4 ;abs 0x8ba2 00008ba8 <.LBE45>: for( pointer = 0; pointer < length; pointer++) 8ba8: 0c 9d cmp r13, r12 ; 8baa: f9 23 jnz $-12 ;abs 0x8b9e 00008bac <.LBB46>: UCA0TXBUF = string[pointer]; 8bac: f2 40 0d 00 mov.b #13, &0x0067 ;#0x000d 8bb0: 67 00 00008bb2 <.L100>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8bb2: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8bb6: fd 27 jz $-4 ;abs 0x8bb2 00008bb8 <.LBB49>: UCA0TXBUF = string[pointer]; 8bb8: f2 40 0a 00 mov.b #10, &0x0067 ;#0x000a 8bbc: 67 00 00008bbe <.L103>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8bbe: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8bc2: fd 27 jz $-4 ;abs 0x8bbe 00008bc4 <.LBE46>: P2IFG &= ~GDO0; //reset trashed interrupt state 8bc4: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8bc8: 2b 00 00008bca <.Loc.517.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 8bca: b0 12 3c 86 call #-31172 ;#0x863c 00008bce <.LVL129>: P1OUT &= ~LED_RED; 8bce: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008bd2 <.Loc.527.1>: _enable_interrupts(); 8bd2: 32 d2 eint 00008bd4 <.Loc.530.1>: if(loop == 0) 8bd4: 80 3e jmp $-766 ;abs 0x88d6 00008bd6 <.L150>: _disable_interrupts(); 8bd6: 32 c2 dint 8bd8: 03 43 nop 00008bda <.Loc.440.1>: flags &= ~(TIMER_UP|GO_NOW); //clear the flag 8bda: b2 f0 fa ff and #-6, &0x02d2 ;#0xfffa 8bde: d2 02 00008be0 <.Loc.441.1>: P1OUT |= LED_GRN; 8be0: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008be4 <.Loc.455.1>: length=sprintf(rxbuf, "GND:%s TEST", CALLSIGN); //send the temperature to the ground 8be4: b1 40 39 80 mov #-32711,2(r1) ;#0x8039 8be8: 02 00 8bea: b1 40 da 80 mov #-32550,0(r1) ;#0x80da 8bee: 00 00 8bf0: 0c 4a mov r10, r12 ; 8bf2: 88 12 call r8 ; 00008bf4 <.LVL131>: P1OUT &= ~LED_GRN; 8bf4: e2 c3 21 00 bic.b #2, &0x0021 ;r3 As==10 00008bf8 <.Loc.462.1>: _enable_interrupts(); 8bf8: 32 d2 eint 8bfa: e0 3e jmp $-574 ;abs 0x89bc 00008bfc <.L65>: if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 8bfc: 04 93 cmp #0, r4 ;r3 As==00 8bfe: ab 26 jz $-680 ;abs 0x8956 00008c00 <.Loc.336.1>: P1OUT |= LED_RED; 8c00: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 00008c04 <.Loc.337.1>: if(memcmp("Reset",rs232buf,5)==0) 8c04: 7e 40 05 00 mov.b #5, r14 ; 8c08: 0d 41 mov r1, r13 ; 8c0a: 3d 50 2a 00 add #42, r13 ;#0x002a 8c0e: 3c 40 1a 80 mov #-32742,r12 ;#0x801a 8c12: b0 12 20 90 call #-28640 ;#0x9020 00008c16 <.LVL132>: 8c16: 0c 93 cmp #0, r12 ;r3 As==00 8c18: 90 22 jnz $-734 ;abs 0x893a 00008c1a <.L147>: WDTCTL = 1;//not using the password will trigger a reset immediately 8c1a: 92 43 20 01 mov #1, &0x0120 ;r3 As==01 00008c1e <.L69>: while(1); //Save us WDOG (alternate, takes 2.7 seconds with VLO) 8c1e: ff 3f jmp $+0 ;abs 0x8c1e 00008c20 <.L149>: P1OUT |= LED_GRN; 8c20: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008c24 <.Loc.367.1>: interchiplength = snprintf(interchip,sizeof(interchip),"%s :%ddBm",rxbuf, RSSI_DBM); 8c24: 5b 42 ca 02 mov.b &0x02ca,r11 ;0x02ca 8c28: 8b 11 sxt r11 ; 8c2a: 81 4b 04 00 mov r11, 4(r1) ; 8c2e: 81 4a 02 00 mov r10, 2(r1) ; 8c32: b1 40 20 80 mov #-32736,0(r1) ;#0x8020 8c36: 00 00 8c38: 7d 40 50 00 mov.b #80, r13 ;#0x0050 8c3c: 0c 41 mov r1, r12 ; 8c3e: 3c 50 aa 00 add #170, r12 ;#0x00aa 8c42: b0 12 78 90 call #-28552 ;#0x9078 00008c46 <.LBB50>: for( pointer = 0; pointer < length; pointer++) 8c46: 0d 41 mov r1, r13 ; 8c48: 3d 50 aa 00 add #170, r13 ;#0x00aa 8c4c: 0c 5d add r13, r12 ; 00008c4e <.L72>: UCA0TXBUF = string[pointer]; 8c4e: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008c52 <.L74>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8c52: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8c56: fd 27 jz $-4 ;abs 0x8c52 00008c58 <.LBE52>: for( pointer = 0; pointer < length; pointer++) 8c58: 0c 9d cmp r13, r12 ; 8c5a: f9 23 jnz $-12 ;abs 0x8c4e 00008c5c <.LBE50>: interchiplength = snprintf(interchip,sizeof(interchip)," LQI:%d FE: %d", LQI-128, (signed char)CCXX_SPI_RDREG(CCxxx0_FREQEST)); 8c5c: 59 42 cd 02 mov.b &0x02cd,r9 ;0x02cd 8c60: 39 50 80 ff add #-128, r9 ;#0xff80 00008c64 <.Loc.370.1>: 8c64: 7c 40 32 00 mov.b #50, r12 ;#0x0032 8c68: b0 12 f4 8d call #-29196 ;#0x8df4 00008c6c <.LVL138>: 8c6c: 8c 11 sxt r12 ; 8c6e: 81 4c 04 00 mov r12, 4(r1) ; 8c72: 81 49 02 00 mov r9, 2(r1) ; 8c76: b1 40 2a 80 mov #-32726,0(r1) ;#0x802a 8c7a: 00 00 8c7c: 7d 40 50 00 mov.b #80, r13 ;#0x0050 8c80: 0c 41 mov r1, r12 ; 8c82: 3c 50 aa 00 add #170, r12 ;#0x00aa 8c86: b0 12 78 90 call #-28552 ;#0x9078 00008c8a <.LBB53>: for( pointer = 0; pointer < length; pointer++) 8c8a: 0d 41 mov r1, r13 ; 8c8c: 3d 50 aa 00 add #170, r13 ;#0x00aa 8c90: 0c 5d add r13, r12 ; 00008c92 <.L73>: UCA0TXBUF = string[pointer]; 8c92: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008c96 <.L77>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8c96: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8c9a: fd 27 jz $-4 ;abs 0x8c96 00008c9c <.LBE55>: for( pointer = 0; pointer < length; pointer++) 8c9c: 0c 9d cmp r13, r12 ; 8c9e: f9 23 jnz $-12 ;abs 0x8c92 00008ca0 <.LBB56>: UCA0TXBUF = string[pointer]; 8ca0: f2 40 0d 00 mov.b #13, &0x0067 ;#0x000d 8ca4: 67 00 00008ca6 <.L76>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8ca6: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8caa: fd 27 jz $-4 ;abs 0x8ca6 00008cac <.LBB59>: UCA0TXBUF = string[pointer]; 8cac: f2 40 0a 00 mov.b #10, &0x0067 ;#0x000a 8cb0: 67 00 00008cb2 <.L79>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8cb2: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8cb6: fd 27 jz $-4 ;abs 0x8cb2 00008cb8 <.LBE56>: if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8cb8: fa 90 4d 00 cmp.b #77, 0(r10) ;#0x004d 8cbc: 00 00 8cbe: 10 24 jz $+34 ;abs 0x8ce0 00008cc0 <.L82>: if(memcmp("Pong!",rxbuf,5)==0) //if this is an ack to an outbound packet then we'll light a green light 8cc0: 7e 40 05 00 mov.b #5, r14 ; 8cc4: 0d 4a mov r10, r13 ; 8cc6: 3c 40 d4 80 mov #-32556,r12 ;#0x80d4 8cca: b0 12 20 90 call #-28640 ;#0x9020 00008cce <.LVL146>: 8cce: 0c 93 cmp #0, r12 ;r3 As==00 8cd0: 65 22 jnz $-820 ;abs 0x899c 00008cd2 <.Loc.417.1>: P1OUT |= LED_GRN; 8cd2: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008cd6 <.Loc.418.1>: delay(0xFFF); 8cd6: 3c 40 ff 0f mov #4095, r12 ;#0x0fff 8cda: b0 12 cc 83 call #-31796 ;#0x83cc 00008cde <.LVL147>: 8cde: 5e 3e jmp $-834 ;abs 0x899c 00008ce0 <.L151>: if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8ce0: f1 90 4f 00 cmp.b #79, 107(r1) ;#0x004f, 0x006b 8ce4: 6b 00 8ce6: ec 23 jnz $-38 ;abs 0x8cc0 8ce8: f1 90 4e 00 cmp.b #78, 108(r1) ;#0x004e, 0x006c 8cec: 6c 00 8cee: e8 23 jnz $-46 ;abs 0x8cc0 00008cf0 <.Loc.377.1>: if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 8cf0: 3d 40 3d 80 mov #-32707,r13 ;#0x803d 8cf4: 0c 4a mov r10, r12 ; 8cf6: b0 12 3e 91 call #-28354 ;#0x913e 00008cfa <.LVL148>: 8cfa: 0c 93 cmp #0, r12 ;r3 As==00 8cfc: 18 24 jz $+50 ;abs 0x8d2e 00008cfe <.Loc.379.1>: length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8cfe: 7d 40 3d 00 mov.b #61, r13 ;#0x003d 8d02: 0c 4a mov r10, r12 ; 8d04: b0 12 22 91 call #-28382 ;#0x9122 00008d08 <.LVL149>: 8d08: 1c 53 inc r12 ; 8d0a: b0 12 14 90 call #-28652 ;#0x9014 00008d0e <.LVL150>: 8d0e: 09 4c mov r12, r9 ; 00008d10 <.LVL151>: if(length > 0) 8d10: 0c 93 cmp #0, r12 ;r3 As==00 8d12: 2a 24 jz $+86 ;abs 0x8d68 00008d14 <.LVL152>: length = sprintf(rxbuf,"\e[32mGND:MON Interval is now %d\e[30m",interval); 8d14: 81 4c 02 00 mov r12, 2(r1) ; 8d18: b1 40 46 80 mov #-32698,0(r1) ;#0x8046 8d1c: 00 00 8d1e: 0c 4a mov r10, r12 ; 8d20: 88 12 call r8 ; 00008d22 <.L85>: TX_STRING(rxbuf,length); 8d22: 4d 4c mov.b r12, r13 ; 8d24: 0c 4a mov r10, r12 ; 00008d26 <.LVL154>: 8d26: b0 12 48 87 call #-30904 ;#0x8748 00008d2a <.LVL155>: 8d2a: 05 49 mov r9, r5 ; 8d2c: 37 3e jmp $-912 ;abs 0x899c 00008d2e <.L83>: else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 8d2e: 3d 40 98 80 mov #-32616,r13 ;#0x8098 8d32: 0c 4a mov r10, r12 ; 8d34: b0 12 3e 91 call #-28354 ;#0x913e 00008d38 <.LVL157>: 8d38: 0c 93 cmp #0, r12 ;r3 As==00 8d3a: 1f 24 jz $+64 ;abs 0x8d7a 00008d3c <.Loc.392.1>: length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 8d3c: 5c 42 cd 02 mov.b &0x02cd,r12 ;0x02cd 8d40: 81 4c 06 00 mov r12, 6(r1) ; 8d44: 5e 42 ca 02 mov.b &0x02ca,r14 ;0x02ca 8d48: 8e 11 sxt r14 ; 8d4a: 81 4e 04 00 mov r14, 4(r1) ; 8d4e: b1 40 39 80 mov #-32711,2(r1) ;#0x8039 8d52: 02 00 8d54: b1 40 9f 80 mov #-32609,0(r1) ;#0x809f 8d58: 00 00 8d5a: 0c 4a mov r10, r12 ; 8d5c: 88 12 call r8 ; 00008d5e <.LVL158>: TX_STRING(rxbuf,length); 8d5e: 4d 4c mov.b r12, r13 ; 8d60: 0c 4a mov r10, r12 ; 00008d62 <.LVL159>: 8d62: b0 12 48 87 call #-30904 ;#0x8748 00008d66 <.LVL160>: 8d66: 1a 3e jmp $-970 ;abs 0x899c 00008d68 <.L84>: length = sprintf(rxbuf,"\e[32mGND:MON Reporting every %d seconds\e[30m",interval); 8d68: 81 45 02 00 mov r5, 2(r1) ; 8d6c: b1 40 6b 80 mov #-32661,0(r1) ;#0x806b 8d70: 00 00 8d72: 0c 4a mov r10, r12 ; 8d74: 88 12 call r8 ; 00008d76 <.LVL162>: 8d76: 09 45 mov r5, r9 ; 8d78: d4 3f jmp $-86 ;abs 0x8d22 00008d7a <.L86>: else if(strstr( rxbuf, "now" ) != NULL) //report now 8d7a: 3d 40 b8 80 mov #-32584,r13 ;#0x80b8 8d7e: 0c 4a mov r10, r12 ; 8d80: b0 12 3e 91 call #-28354 ;#0x913e 00008d84 <.LVL164>: 8d84: 0c 93 cmp #0, r12 ;r3 As==00 8d86: 04 24 jz $+10 ;abs 0x8d90 00008d88 <.Loc.398.1>: flags |= GO_NOW | TIMER_UP; ///set event flags to trigger the reporting 8d88: b2 d0 05 00 bis #5, &0x02d2 ; 8d8c: d2 02 8d8e: 06 3e jmp $-1010 ;abs 0x899c 00008d90 <.L87>: else if(strstr( rxbuf, "Reset" ) != NULL) //reboot the processor 8d90: 3d 40 1a 80 mov #-32742,r13 ;#0x801a 8d94: 0c 4a mov r10, r12 ; 8d96: b0 12 3e 91 call #-28354 ;#0x913e 00008d9a <.LVL165>: 8d9a: 0c 93 cmp #0, r12 ;r3 As==00 8d9c: 0e 20 jnz $+30 ;abs 0x8dba 00008d9e <.Loc.408.1>: length = sprintf(rxbuf,"\e[34mGND:MON Pong!\e[30m"); 8d9e: 7e 40 18 00 mov.b #24, r14 ;#0x0018 8da2: 3d 40 bc 80 mov #-32580,r13 ;#0x80bc 8da6: 0c 4a mov r10, r12 ; 8da8: b0 12 4a 90 call #-28598 ;#0x904a 00008dac <.LVL166>: TX_STRING(rxbuf, length); 8dac: 7d 40 17 00 mov.b #23, r13 ;#0x0017 8db0: 0c 4a mov r10, r12 ; 8db2: b0 12 48 87 call #-30904 ;#0x8748 00008db6 <.LVL167>: 8db6: 30 40 9c 89 br #0x899c ; 00008dba <.L152>: WDTCTL = 1;//not using the password will trigger a reset immediately 8dba: 92 43 20 01 mov #1, &0x0120 ;r3 As==01 00008dbe <.L89>: while(1); //Save us WDOG (alternate, takes 2.7 seconds with VLO) 8dbe: ff 3f jmp $+0 ;abs 0x8dbe 00008dc0 : #include "hardware.h" /** Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { 8dc0: 3c f0 ff 00 and #255, r12 ;#0x00ff 00008dc4 <.Loc.8.1>: status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8dc4: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008dc8 <.L2>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8dc8: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8dcc: fd 23 jnz $-4 ;abs 0x8dc8 00008dce <.Loc.13.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8dce: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8dd2: 1b 00 00008dd4 <.Loc.15.1>: IFG2 &= ~UCB0RXIFG; 8dd4: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008dd8 <.Loc.16.1>: UCB0TXBUF = reg; 8dd8: c2 4c 6f 00 mov.b r12, &0x006f ; 00008ddc <.L3>: while (!(IFG2 & UCB0RXIFG)); 8ddc: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 00008de0 : 8de0: fd 27 jz $-4 ;abs 0x8ddc 00008de2 <.Loc.18.1>: status = UCB0RXBUF; 8de2: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8de6: d4 02 00008de8 <.Loc.20.1>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8de8: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008dec <.Loc.21.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8dec: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8df0: 1b 00 00008df2 <.Loc.23.1>: } 8df2: 30 41 ret 00008df4 : /** Read a register from the CCXX */ char CCXX_SPI_RDREG(char reg) { 8df4: 4d 4c mov.b r12, r13 ; 00008df6 <.LVL2>: unsigned char rx=0; if(reg >= 0x30) 8df6: 7e 40 2f 00 mov.b #47, r14 ;#0x002f 8dfa: 4e 9c cmp.b r12, r14 ; 8dfc: 25 2c jc $+76 ;abs 0x8e48 00008dfe <.Loc.33.1>: reg |= 0xC0; 8dfe: 7d d0 c0 ff bis.b #-64, r13 ;#0xffc0 8e02: 3d f0 ff 00 and #255, r13 ;#0x00ff 00008e06 <.LVL3>: else reg |= 0x80; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8e06: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008e0a <.L11>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e0a: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8e0e: fd 23 jnz $-4 ;abs 0x8e0a 00008e10 <.Loc.42.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8e10: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8e14: 1b 00 00008e16 <.Loc.44.1>: IFG2 &= ~UCB0RXIFG; 8e16: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e1a <.Loc.45.1>: UCB0TXBUF = reg; 8e1a: c2 4d 6f 00 mov.b r13, &0x006f ; 00008e1e <.L12>: while (!(IFG2 & UCB0RXIFG)); 8e1e: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8e22: fd 27 jz $-4 ;abs 0x8e1e 00008e24 <.Loc.47.1>: status = UCB0RXBUF; 8e24: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8e28: d4 02 00008e2a <.Loc.49.1>: IFG2 &= ~UCB0RXIFG; 8e2a: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e2e <.Loc.50.1>: UCB0TXBUF = 0; 8e2e: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 00008e32 <.L13>: while (!(IFG2 & UCB0RXIFG)); 8e32: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8e36: fd 27 jz $-4 ;abs 0x8e32 00008e38 <.Loc.52.1>: rx = UCB0RXBUF; 8e38: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008e3c <.LVL5>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8e3c: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008e40 <.Loc.55.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8e40: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8e44: 1b 00 00008e46 <.Loc.56.1>: return rx; } 8e46: 30 41 ret 00008e48 <.L9>: reg |= 0x80; 8e48: 7d d0 80 ff bis.b #-128, r13 ;#0xff80 8e4c: 3d f0 ff 00 and #255, r13 ;#0x00ff 00008e50 <.LVL7>: P3OUT &= ~CSn; //pull CSn low to activate chip 8e50: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008e54 <.Loc.40.1>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e54: da 3f jmp $-74 ;abs 0x8e0a 00008e56 : /** Write a register from the CCXX */ void CCXX_SPI_WRREG(char reg, char byte) { 8e56: 3c f0 ff 00 and #255, r12 ;#0x00ff 8e5a: 3d f0 ff 00 and #255, r13 ;#0x00ff 00008e5e <.Loc.64.1>: unsigned char dummy; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8e5e: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008e62 <.L20>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e62: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8e66: fd 23 jnz $-4 ;abs 0x8e62 00008e68 <.Loc.72.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8e68: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8e6c: 1b 00 00008e6e <.Loc.74.1>: IFG2 &= ~UCB0RXIFG; 8e6e: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e72 <.Loc.75.1>: UCB0TXBUF = reg; 8e72: c2 4c 6f 00 mov.b r12, &0x006f ; 00008e76 <.L21>: while (!(IFG2 & UCB0RXIFG)); 8e76: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8e7a: fd 27 jz $-4 ;abs 0x8e76 00008e7c <.Loc.77.1>: status = UCB0RXBUF; 8e7c: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8e80: d4 02 00008e82 <.Loc.82.1>: //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8e82: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e86 <.Loc.83.1>: UCB0TXBUF = byte; 8e86: c2 4d 6f 00 mov.b r13, &0x006f ; 00008e8a <.L22>: while (!(IFG2 & UCB0RXIFG)); 8e8a: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8e8e: fd 27 jz $-4 ;abs 0x8e8a 00008e90 <.Loc.85.1>: dummy = UCB0RXBUF; 8e90: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008e94 <.LVL9>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8e94: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008e98 <.Loc.88.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8e98: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8e9c: 1b 00 00008e9e <.Loc.89.1>: } 8e9e: 30 41 ret 00008ea0 : /** Burst write registers to the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) { 8ea0: 3c f0 ff 00 and #255, r12 ;#0x00ff 8ea4: 3e f0 ff 00 and #255, r14 ;#0x00ff 00008ea8 <.Loc.100.1>: unsigned char dummy; unsigned int index; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8ea8: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008eac <.L29>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8eac: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8eb0: fd 23 jnz $-4 ;abs 0x8eac 00008eb2 <.Loc.104.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8eb2: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8eb6: 1b 00 00008eb8 <.Loc.106.1>: IFG2 &= ~UCB0RXIFG; 8eb8: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008ebc <.Loc.107.1>: UCB0TXBUF = reg; 8ebc: c2 4c 6f 00 mov.b r12, &0x006f ; 00008ec0 <.L30>: while (!(IFG2 & UCB0RXIFG)); 8ec0: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8ec4: fd 27 jz $-4 ;abs 0x8ec0 00008ec6 <.Loc.109.1>: status = UCB0RXBUF; 8ec6: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8eca: d4 02 00008ecc <.Loc.111.1>: IFG2 &= ~UCB0RXIFG; 8ecc: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008ed0 <.Loc.112.1>: UCB0TXBUF = length; 8ed0: c2 4e 6f 00 mov.b r14, &0x006f ; 00008ed4 <.L31>: while (!(IFG2 & UCB0RXIFG)); 8ed4: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8ed8: fd 27 jz $-4 ;abs 0x8ed4 00008eda <.Loc.114.1>: dummy = UCB0RXBUF; 8eda: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008ede <.LVL11>: for(index = 0; index < length; index++) 8ede: 0e 93 cmp #0, r14 ;r3 As==00 8ee0: 0c 24 jz $+26 ;abs 0x8efa 8ee2: 0e 5d add r13, r14 ; 00008ee4 <.L34>: { IFG2 &= ~UCB0RXIFG; 8ee4: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008ee8 <.Loc.119.1>: UCB0TXBUF = buf[index]; 8ee8: f2 4d 6f 00 mov.b @r13+, &0x006f ; 00008eec <.L33>: while (!(IFG2 & UCB0RXIFG)); 8eec: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8ef0: fd 27 jz $-4 ;abs 0x8eec 00008ef2 <.Loc.121.1>: dummy = UCB0RXBUF; 8ef2: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008ef6 <.LVL14>: for(index = 0; index < length; index++) 8ef6: 0d 9e cmp r14, r13 ; 8ef8: f5 23 jnz $-20 ;abs 0x8ee4 00008efa <.L32>: } P3OUT |= CSn; //pull CSn high, we're done with the transfer 8efa: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008efe <.Loc.125.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8efe: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8f02: 1b 00 00008f04 <.Loc.126.1>: } 8f04: 30 41 ret 00008f06 : 8f06: 0f 4c mov r12, r15 ; 00008f08 : 8f08: 7c 40 11 00 mov.b #17, r12 ;#0x0011 00008f0c <.LVL2>: 8f0c: 5b 43 mov.b #1, r11 ;r3 As==01 00008f0e <.L2>: 8f0e: 0d 9f cmp r15, r13 ; 8f10: 05 2c jc $+12 ;abs 0x8f1c 8f12: 3c 53 add #-1, r12 ;r3 As==11 00008f14 <.Loc.38.1>: 8f14: 0c 93 cmp #0, r12 ;r3 As==00 8f16: 05 24 jz $+12 ;abs 0x8f22 00008f18 <.Loc.38.1>: 8f18: 0d 93 cmp #0, r13 ;r3 As==00 8f1a: 07 34 jge $+16 ;abs 0x8f2a 00008f1c <.L10>: 8f1c: 4c 43 clr.b r12 ; 00008f1e <.L6>: 8f1e: 0b 93 cmp #0, r11 ;r3 As==00 8f20: 07 20 jnz $+16 ;abs 0x8f30 00008f22 <.L4>: 8f22: 0e 93 cmp #0, r14 ;r3 As==00 8f24: 01 24 jz $+4 ;abs 0x8f28 8f26: 0c 4f mov r15, r12 ; 00008f28 <.L1>: 8f28: 30 41 ret 00008f2a <.L5>: 8f2a: 0d 5d rla r13 ; 00008f2c <.Loc.41.1>: 8f2c: 0b 5b rla r11 ; 8f2e: ef 3f jmp $-32 ;abs 0x8f0e 00008f30 <.L8>: 8f30: 0f 9d cmp r13, r15 ; 8f32: 02 28 jnc $+6 ;abs 0x8f38 00008f34 <.Loc.47.1>: 8f34: 0f 8d sub r13, r15 ; 00008f36 <.Loc.48.1>: 8f36: 0c db bis r11, r12 ; 00008f38 <.L7>: 8f38: 12 c3 clrc 8f3a: 0b 10 rrc r11 ; 00008f3c <.Loc.51.1>: 8f3c: 12 c3 clrc 8f3e: 0d 10 rrc r13 ; 8f40: ee 3f jmp $-34 ;abs 0x8f1e 00008f42 <__mspabi_remu>: 8f42: 5e 43 mov.b #1, r14 ;r3 As==01 8f44: 00008f46 : 8f46: 06 8f sub r15, r6 ; 00008f48 <.LVL36>: 8f48: 30 41 ret 00008f4a : 8f4a: 0a 12 push r10 ; 00008f4c <.LCFI0>: 8f4c: 09 12 push r9 ; 00008f4e <.LCFI1>: 8f4e: 08 12 push r8 ; 00008f50 <.LCFI2>: 8f50: 07 12 push r7 ; 00008f52 <.LCFI3>: 8f52: 06 12 push r6 ; 00008f54 <.LCFI4>: 8f54: 05 12 push r5 ; 00008f56 <.LCFI5>: 8f56: 0a 4c mov r12, r10 ; 8f58: 0b 4d mov r13, r11 ; 00008f5a <.LVL1>: 8f5a: 7c 40 21 00 mov.b #33, r12 ;#0x0021 00008f5e <.LVL2>: 8f5e: 58 43 mov.b #1, r8 ;r3 As==01 8f60: 49 43 clr.b r9 ; 00008f62 <.Loc.38.1>: 8f62: 07 4d mov r13, r7 ; 00008f64 <.L2>: 8f64: 0f 9b cmp r11, r15 ; 8f66: 04 28 jnc $+10 ;abs 0x8f70 8f68: 07 9f cmp r15, r7 ; 8f6a: 07 20 jnz $+16 ;abs 0x8f7a 8f6c: 0e 9a cmp r10, r14 ; 8f6e: 05 2c jc $+12 ;abs 0x8f7a 00008f70 <.L15>: 8f70: 3c 53 add #-1, r12 ;r3 As==11 00008f72 <.Loc.38.1>: 8f72: 0c 93 cmp #0, r12 ;r3 As==00 8f74: 2c 24 jz $+90 ;abs 0x8fce 00008f76 <.Loc.38.1>: 8f76: 0f 93 cmp #0, r15 ;r3 As==00 8f78: 0c 34 jge $+26 ;abs 0x8f92 00008f7a <.L13>: 8f7a: 4c 43 clr.b r12 ; 8f7c: 0d 4c mov r12, r13 ; 00008f7e <.L8>: 8f7e: 07 48 mov r8, r7 ; 8f80: 07 d9 bis r9, r7 ; 8f82: 07 93 cmp #0, r7 ;r3 As==00 8f84: 13 20 jnz $+40 ;abs 0x8fac 00008f86 <.L5>: 8f86: 81 93 0e 00 cmp #0, 14(r1) ;r3 As==00, 0x000e 8f8a: 02 24 jz $+6 ;abs 0x8f90 8f8c: 0c 4a mov r10, r12 ; 8f8e: 0d 4b mov r11, r13 ; 00008f90 <.L1>: 8f90: 2f 3c jmp $+96 ;abs 0x8ff0 00008f92 <.L6>: 8f92: 05 4e mov r14, r5 ; 8f94: 06 4f mov r15, r6 ; 8f96: 05 5e add r14, r5 ; 8f98: 06 6f addc r15, r6 ; 8f9a: 0e 45 mov r5, r14 ; 00008f9c <.LVL7>: 8f9c: 0f 46 mov r6, r15 ; 00008f9e <.LVL8>: 8f9e: 05 48 mov r8, r5 ; 8fa0: 06 49 mov r9, r6 ; 8fa2: 05 58 add r8, r5 ; 8fa4: 06 69 addc r9, r6 ; 8fa6: 08 45 mov r5, r8 ; 00008fa8 <.LVL9>: 8fa8: 09 46 mov r6, r9 ; 00008faa <.LVL10>: 8faa: dc 3f jmp $-70 ;abs 0x8f64 00008fac <.L11>: 8fac: 0b 9f cmp r15, r11 ; 8fae: 08 28 jnc $+18 ;abs 0x8fc0 8fb0: 0f 9b cmp r11, r15 ; 8fb2: 02 20 jnz $+6 ;abs 0x8fb8 8fb4: 0a 9e cmp r14, r10 ; 8fb6: 04 28 jnc $+10 ;abs 0x8fc0 00008fb8 <.L16>: 8fb8: 0a 8e sub r14, r10 ; 8fba: 0b 7f subc r15, r11 ; 00008fbc <.Loc.48.1>: 8fbc: 0c d8 bis r8, r12 ; 00008fbe <.LVL13>: 8fbe: 0d d9 bis r9, r13 ; 00008fc0 <.L9>: 8fc0: 12 c3 clrc 8fc2: 09 10 rrc r9 ; 8fc4: 08 10 rrc r8 ; 00008fc6 <.Loc.51.1>: 8fc6: 12 c3 clrc 8fc8: 0f 10 rrc r15 ; 8fca: 0e 10 rrc r14 ; 8fcc: d8 3f jmp $-78 ;abs 0x8f7e 00008fce <.L14>: 8fce: 0d 4c mov r12, r13 ; 8fd0: da 3f jmp $-74 ;abs 0x8f86 00008fd2 <__mspabi_divlu>: 8fd2: 21 83 decd r1 ; 00008fd4 <.LCFI19>: 8fd4: 81 43 00 00 mov #0, 0(r1) ;r3 As==00 8fd8: 00008fda : 8fda: 4a 8f sub.b r15, r10 ; 00008fdc <.LVL43>: 8fdc: 21 53 incd r1 ; 00008fde <.LCFI20>: 8fde: 30 41 ret 00008fe0 <__mspabi_remul>: 8fe0: 21 83 decd r1 ; 00008fe2 <.LCFI21>: 8fe2: 91 43 00 00 mov #1, 0(r1) ;r3 As==01 8fe6: b0 12 4a 8f call #-28854 ;#0x8f4a 00008fea <.LVL45>: 8fea: 21 53 incd r1 ; 00008fec <.LCFI22>: 8fec: 30 41 ret 00008fee <__mspabi_func_epilog_7>: 8fee: 34 41 pop r4 ; 00008ff0 <__mspabi_func_epilog_6>: 8ff0: 35 41 pop r5 ; 00008ff2 <__mspabi_func_epilog_5>: 8ff2: 36 41 pop r6 ; 00008ff4 <__mspabi_func_epilog_4>: 8ff4: 37 41 pop r7 ; 00008ff6 <__mspabi_func_epilog_3>: 8ff6: 38 41 pop r8 ; 00008ff8 <__mspabi_func_epilog_2>: 8ff8: 39 41 pop r9 ; 00008ffa <__mspabi_func_epilog_1>: 8ffa: 3a 41 pop r10 ; 8ffc: 30 41 ret 00008ffe <.L1^B1>: 8ffe: 3d 53 add #-1, r13 ;r3 As==11 9000: 0c 5c rla r12 ; 00009002 <__mspabi_slli>: 9002: 0d 93 cmp #0, r13 ;r3 As==00 9004: fc 23 jnz $-6 ;abs 0x8ffe 9006: 30 41 ret 00009008 <.L1^B1>: 9008: 3d 53 add #-1, r13 ;r3 As==11 900a: 12 c3 clrc 900c: 0c 10 rrc r12 ; 0000900e <__mspabi_srli>: 900e: 0d 93 cmp #0, r13 ;r3 As==00 9010: fb 23 jnz $-8 ;abs 0x9008 9012: 30 41 ret 00009014 : 9014: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 9018: 4d 43 clr.b r13 ; 901a: b0 12 46 93 call #-27834 ;#0x9346 0000901e <.LVL1>: 901e: 30 41 ret 00009020 : 9020: 0a 12 push r10 ; 00009022 <.LCFI0>: 9022: 09 12 push r9 ; 00009024 <.LCFI1>: 9024: 4b 43 clr.b r11 ; 00009026 <.L2>: 9026: 0e 9b cmp r11, r14 ; 9028: 02 20 jnz $+6 ;abs 0x902e 0000902a <.Loc.71.1>: 902a: 4c 43 clr.b r12 ; 0000902c <.LVL3>: 902c: 0d 3c jmp $+28 ;abs 0x9048 0000902e <.L4>: 902e: 0f 4c mov r12, r15 ; 9030: 0f 5b add r11, r15 ; 9032: 6f 4f mov.b @r15, r15 ; 9034: 1b 53 inc r11 ; 00009036 <.LVL5>: 9036: 0a 4d mov r13, r10 ; 9038: 0a 5b add r11, r10 ; 903a: 59 4a ff ff mov.b -1(r10),r9 ; 0000903e <.Loc.64.1>: 903e: ca 9f ff ff cmp.b r15, -1(r10) ; 0xffff 9042: f1 27 jz $-28 ;abs 0x9026 00009044 <.Loc.66.1>: 9044: 0c 4f mov r15, r12 ; 9046: 0c 89 sub r9, r12 ; 00009048 <.L1>: 9048: d7 3f jmp $-80 ;abs 0x8ff8 0000904a : 904a: 0a 12 push r10 ; 0000904c <.LCFI0>: 904c: 4f 43 clr.b r15 ; 0000904e : 904e: 0e 9f cmp r15, r14 ; 9050: 02 20 jnz $+6 ;abs 0x9056 00009052 <.Loc.111.1>: 9052: 3a 41 pop r10 ; 00009054 <.LCFI1>: 9054: 30 41 ret 00009056 <.L3>: 9056: 0b 4c mov r12, r11 ; 9058: 0b 5f add r15, r11 ; 0000905a <.Loc.67.1>: 905a: 0a 4d mov r13, r10 ; 905c: 0a 5f add r15, r10 ; 0000905e <.Loc.67.1>: 905e: eb 4a 00 00 mov.b @r10, 0(r11) ; 9062: 1f 53 inc r15 ; 00009064 <.LVL4>: 9064: f4 3f jmp $-22 ;abs 0x904e 00009066 : 9066: 0e 5c add r12, r14 ; 00009068 : 9068: 0f 4c mov r12, r15 ; 0000906a <.L2>: 906a: 0f 9e cmp r14, r15 ; 906c: 01 20 jnz $+4 ;abs 0x9070 0000906e <.Loc.104.1>: 906e: 30 41 ret 00009070 <.L3>: 9070: 1f 53 inc r15 ; 00009072 <.LVL4>: 9072: cf 4d ff ff mov.b r13, -1(r15) ; 0xffff 9076: f9 3f jmp $-12 ;abs 0x906a 00009078 : 9078: 0a 12 push r10 ; 0000907a : 907a: 09 12 push r9 ; 0000907c <.LCFI6>: 907c: 31 80 3c 00 sub #60, r1 ;#0x003c 00009080 <.LCFI7>: 9080: 0a 4d mov r13, r10 ; 00009082 <.Loc.100.1>: 9082: 19 42 02 02 mov &0x0202,r9 ;0x0202 00009086 <.Loc.102.1>: 9086: 0d 93 cmp #0, r13 ;r3 As==00 9088: 07 34 jge $+16 ;abs 0x9098 0000908a <.Loc.104.1>: 908a: b9 40 8b 00 mov #139, 0(r9) ;#0x008b 908e: 00 00 00009090 <.Loc.105.1>: 9090: 3c 43 mov #-1, r12 ;r3 As==11 00009092 <.L10>: 9092: 31 50 3c 00 add #60, r1 ;#0x003c 00009096 <.LCFI8>: 9096: b0 3f jmp $-158 ;abs 0x8ff8 00009098 <.L11>: 9098: b1 40 08 02 mov #520, 6(r1) ;#0x0208 909c: 06 00 0000909e <.Loc.108.1>: 909e: 81 4c 00 00 mov r12, 0(r1) ; 000090a2 <.Loc.108.1>: 90a2: 81 4c 0a 00 mov r12, 10(r1) ; 0x000a 000090a6 <.Loc.109.1>: 90a6: 0c 4d mov r13, r12 ; 000090a8 <.LVL11>: 90a8: 0d 93 cmp #0, r13 ;r3 As==00 90aa: 01 24 jz $+4 ;abs 0x90ae 000090ac <.Loc.109.1>: 90ac: 3c 53 add #-1, r12 ;r3 As==11 000090ae <.L13>: 90ae: 81 4c 04 00 mov r12, 4(r1) ; 000090b2 <.Loc.109.1>: 90b2: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 000090b6 <.Loc.110.1>: 90b6: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 000090ba <.LVL12>: 90ba: 0f 41 mov r1, r15 ; 90bc: 3f 50 44 00 add #68, r15 ;#0x0044 90c0: 1e 41 42 00 mov 66(r1), r14 ;0x00042 90c4: 0d 41 mov r1, r13 ; 90c6: 0c 49 mov r9, r12 ; 90c8: b0 12 40 94 call #-27584 ;#0x9440 000090cc <.LVL13>: 90cc: 3c 93 cmp #-1, r12 ;r3 As==11 90ce: 03 34 jge $+8 ;abs 0x90d6 000090d0 <.Loc.119.1>: 90d0: b9 40 8b 00 mov #139, 0(r9) ;#0x008b 90d4: 00 00 000090d6 <.L14>: 90d6: 0a 93 cmp #0, r10 ;r3 As==00 90d8: dc 27 jz $-70 ;abs 0x9092 000090da <.Loc.121.1>: 90da: 2d 41 mov @r1, r13 ; 000090dc <.Loc.121.1>: 90dc: cd 43 00 00 mov.b #0, 0(r13) ;r3 As==00 000090e0 <.LVL14>: 90e0: d8 3f jmp $-78 ;abs 0x9092 000090e2 : 90e2: 31 80 3c 00 sub #60, r1 ;#0x003c 000090e6 : 90e6: 0f 41 mov r1, r15 ; 90e8: 3f 50 3e 00 add #62, r15 ;#0x003e 90ec: 3e 4f mov @r15+, r14 ; 000090ee <.Loc.634.1>: 90ee: b1 40 08 02 mov #520, 6(r1) ;#0x0208 90f2: 06 00 000090f4 <.Loc.639.1>: 90f4: 81 4c 00 00 mov r12, 0(r1) ; 000090f8 <.Loc.639.1>: 90f8: 81 4c 0a 00 mov r12, 10(r1) ; 0x000a 000090fc <.Loc.640.1>: 90fc: b1 40 ff 7f mov #32767, 4(r1) ;#0x7fff 9100: 04 00 00009102 <.Loc.640.1>: 9102: b1 40 ff 7f mov #32767, 12(r1) ;#0x7fff, 0x000c 9106: 0c 00 00009108 <.Loc.641.1>: 9108: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 0000910c <.LVL6>: 910c: 0d 41 mov r1, r13 ; 910e: 1c 42 02 02 mov &0x0202,r12 ;0x0202 00009112 <.LVL7>: 9112: b0 12 40 94 call #-27584 ;#0x9440 00009116 <.LVL8>: 9116: 2d 41 mov @r1, r13 ; 00009118 <.Loc.649.1>: 9118: cd 43 00 00 mov.b #0, 0(r13) ;r3 As==00 0000911c <.LVL9>: 911c: 31 50 3c 00 add #60, r1 ;#0x003c 00009120 <.LCFI3>: 9120: 30 41 ret 00009122 : 9122: 3d f0 ff 00 and #255, r13 ;#0x00ff 00009126 <.LVL2>: 9126: 0e 4c mov r12, r14 ; 00009128 <.L3>: 9128: 0c 4e mov r14, r12 ; 0000912a <.LVL4>: 912a: 7f 4e mov.b @r14+, r15 ; 0000912c <.Loc.118.1>: 912c: 0f 93 cmp #0, r15 ;r3 As==00 912e: 03 24 jz $+8 ;abs 0x9136 00009130 <.Loc.118.1>: 9130: 0f 9d cmp r13, r15 ; 9132: fa 23 jnz $-10 ;abs 0x9128 00009134 <.L1>: 9134: 30 41 ret 00009136 <.L2>: 9136: 0d 93 cmp #0, r13 ;r3 As==00 9138: fd 27 jz $-4 ;abs 0x9134 0000913a <.Loc.122.1>: 913a: 0c 4f mov r15, r12 ; 0000913c <.LVL7>: 913c: fb 3f jmp $-8 ;abs 0x9134 0000913e : 913e: 6e 4d mov.b @r13, r14 ; 00009140 : 9140: cc 93 00 00 cmp.b #0, 0(r12) ;r3 As==00 9144: 04 20 jnz $+10 ;abs 0x914e 00009146 <.Loc.57.1>: 9146: 0e 93 cmp #0, r14 ;r3 As==00 9148: 01 24 jz $+4 ;abs 0x914c 0000914a <.L7>: 914a: 4c 43 clr.b r12 ; 0000914c <.L3>: 914c: 30 41 ret 0000914e <.L6>: 914e: 4e 43 clr.b r14 ; 9150: 07 3c jmp $+16 ;abs 0x9160 00009152 <.L4>: 9152: 0f 4c mov r12, r15 ; 9154: 1f 53 inc r15 ; 00009156 <.LBE2>: 9156: cc 93 01 00 cmp.b #0, 1(r12) ;r3 As==00 915a: f7 27 jz $-16 ;abs 0x914a 0000915c <.LBB3>: 915c: 4e 43 clr.b r14 ; 0000915e <.L5>: 915e: 0c 4f mov r15, r12 ; 00009160 <.L2>: 9160: 0f 4d mov r13, r15 ; 9162: 0f 5e add r14, r15 ; 9164: 6b 4f mov.b @r15, r11 ; 00009166 <.Loc.69.1>: 9166: cf 93 00 00 cmp.b #0, 0(r15) ;r3 As==00 916a: f0 27 jz $-30 ;abs 0x914c 0000916c <.Loc.74.1>: 916c: 0f 4c mov r12, r15 ; 916e: 0f 5e add r14, r15 ; 00009170 <.Loc.74.1>: 9170: cf 9b 00 00 cmp.b r11, 0(r15) ; 9174: ee 23 jnz $-34 ;abs 0x9152 00009176 <.Loc.78.1>: 9176: 1e 53 inc r14 ; 00009178 <.Loc.67.1>: 9178: 0f 4c mov r12, r15 ; 917a: f1 3f jmp $-28 ;abs 0x915e 0000917c <_strtol_r>: 917c: 0a 12 push r10 ; 0000917e <.LCFI0>: 917e: 09 12 push r9 ; 00009180 : 9180: 08 12 push r8 ; 00009182 <.LCFI2>: 9182: 07 12 push r7 ; 00009184 <.LCFI3>: 9184: 06 12 push r6 ; 00009186 <.LCFI4>: 9186: 05 12 push r5 ; 00009188 <.LCFI5>: 9188: 04 12 push r4 ; 0000918a <.LCFI6>: 918a: 31 80 14 00 sub #20, r1 ;#0x0014 0000918e <.LCFI7>: 918e: 81 4c 12 00 mov r12, 18(r1) ; 0x0012 9192: 81 4d 08 00 mov r13, 8(r1) ; 9196: 81 4e 0a 00 mov r14, 10(r1) ; 0x000a 919a: 06 4f mov r15, r6 ; 0000919c <.LVL1>: 919c: 91 42 00 02 mov &0x0200,14(r1) ;0x0200, 0x000e 91a0: 0e 00 000091a2 <.Loc.140.1>: 91a2: 07 4d mov r13, r7 ; 000091a4 <.L2>: 91a4: 0c 47 mov r7, r12 ; 000091a6 <.LVL3>: 91a6: 7a 47 mov.b @r7+, r10 ; 000091a8 <.LVL4>: 91a8: 1d 41 0e 00 mov 14(r1), r13 ;0x0000e 91ac: 0d 5a add r10, r13 ; 000091ae <.Loc.153.1>: 91ae: fd b2 01 00 bit.b #8, 1(r13) ;r2 As==11 91b2: f8 23 jnz $-14 ;abs 0x91a4 000091b4 <.Loc.154.1>: 91b4: 7a 90 2d 00 cmp.b #45, r10 ;#0x002d 91b8: 76 20 jnz $+238 ;abs 0x92a6 000091ba <.LVL5>: 91ba: 6a 47 mov.b @r7, r10 ; 000091bc <.Loc.156.1>: 91bc: 07 4c mov r12, r7 ; 91be: 27 53 incd r7 ; 000091c0 <.LVL7>: 91c0: 91 43 02 00 mov #1, 2(r1) ;r3 As==01 000091c4 <.L4>: 91c4: 06 93 cmp #0, r6 ;r3 As==00 91c6: b9 24 jz $+372 ;abs 0x933a 000091c8 <.Loc.159.1>: 91c8: 36 90 10 00 cmp #16, r6 ;#0x0010 91cc: 0e 20 jnz $+30 ;abs 0x91ea 000091ce <.Loc.159.1>: 91ce: 3a 90 30 00 cmp #48, r10 ;#0x0030 91d2: 0b 20 jnz $+24 ;abs 0x91ea 000091d4 <.L23>: 91d4: 6c 47 mov.b @r7, r12 ; 91d6: 7c f0 df ff and.b #-33, r12 ;#0xffdf 91da: 7c 90 58 00 cmp.b #88, r12 ;#0x0058 91de: a7 20 jnz $+336 ;abs 0x932e 000091e0 <.Loc.161.1>: 91e0: 5a 47 01 00 mov.b 1(r7), r10 ; 000091e4 <.Loc.162.1>: 91e4: 27 53 incd r7 ; 000091e6 <.LVL10>: 91e6: 76 40 10 00 mov.b #16, r6 ;#0x0010 000091ea <.L8>: 91ea: 1e 41 02 00 mov 2(r1), r14 ; 000091ee <.LVL12>: 91ee: 0c 4e mov r14, r12 ; 91f0: 3c b0 00 80 bit #-32768,r12 ;#0x8000 91f4: 0d 7d subc r13, r13 ; 91f6: 3d e3 inv r13 ; 91f8: 04 4c mov r12, r4 ; 91fa: 34 53 add #-1, r4 ;r3 As==11 91fc: 05 4d mov r13, r5 ; 91fe: 35 60 ff 7f addc #32767, r5 ;#0x7fff 00009202 <.LVL13>: 9202: 0c 46 mov r6, r12 ; 9204: 3c b0 00 80 bit #-32768,r12 ;#0x8000 9208: 0d 7d subc r13, r13 ; 920a: 3d e3 inv r13 ; 920c: 81 4c 04 00 mov r12, 4(r1) ; 9210: 81 4d 06 00 mov r13, 6(r1) ; 00009214 <.Loc.186.1>: 9214: 0e 4c mov r12, r14 ; 9216: 0f 4d mov r13, r15 ; 9218: 0c 44 mov r4, r12 ; 921a: 0d 45 mov r5, r13 ; 921c: b0 12 e0 8f call #-28704 ;#0x8fe0 9220: 81 4c 10 00 mov r12, 16(r1) ; 0x0010 00009224 <.LVL15>: 9224: 1e 41 04 00 mov 4(r1), r14 ; 9228: 1f 41 06 00 mov 6(r1), r15 ; 922c: 0c 44 mov r4, r12 ; 0000922e <.LVL16>: 922e: 0d 45 mov r5, r13 ; 9230: b0 12 d2 8f call #-28718 ;#0x8fd2 9234: 0b 4d mov r13, r11 ; 9236: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 0000923a <.LVL18>: 923a: 4c 43 clr.b r12 ; 0000923c <.LVL19>: 923c: 48 43 clr.b r8 ; 923e: 49 43 clr.b r9 ; 00009240 <.L17>: 9240: 1d 41 0e 00 mov 14(r1), r13 ;0x0000e 9244: 0d 5a add r10, r13 ; 9246: 5d 4d 01 00 mov.b 1(r13), r13 ; 0000924a <.Loc.189.1>: 924a: 2d b2 bit #4, r13 ;r2 As==10 924c: 36 24 jz $+110 ;abs 0x92ba 0000924e <.Loc.190.1>: 924e: 3a 50 d0 ff add #-48, r10 ;#0xffd0 00009252 <.L11>: 9252: 0a 96 cmp r6, r10 ; 9254: 44 34 jge $+138 ;abs 0x92de 00009256 <.Loc.197.1>: 9256: 3c 93 cmp #-1, r12 ;r3 As==11 9258: 24 24 jz $+74 ;abs 0x92a2 0000925a <.Loc.197.1>: 925a: 0b 99 cmp r9, r11 ; 925c: 3e 28 jnc $+126 ;abs 0x92da 925e: 09 9b cmp r11, r9 ; 9260: 03 20 jnz $+8 ;abs 0x9268 9262: 81 98 0c 00 cmp r8, 12(r1) ; 0x000c 9266: 39 28 jnc $+116 ;abs 0x92da 00009268 <.L29>: 9268: 18 91 0c 00 cmp 12(r1), r8 ;0x0000c 926c: 05 20 jnz $+12 ;abs 0x9278 926e: 09 9b cmp r11, r9 ; 9270: 03 20 jnz $+8 ;abs 0x9278 00009272 <.Loc.197.1>: 9272: 81 9a 10 00 cmp r10, 16(r1) ; 0x0010 9276: 2e 38 jl $+94 ;abs 0x92d4 00009278 <.L16>: 9278: 0e 48 mov r8, r14 ; 927a: 0f 49 mov r9, r15 ; 927c: 1c 41 04 00 mov 4(r1), r12 ; 9280: 1d 41 06 00 mov 6(r1), r13 ; 9284: 81 4b 00 00 mov r11, 0(r1) ; 9288: b0 12 8a 9e call #-24950 ;#0x9e8a 0000928c <.LVL23>: 928c: 0e 4a mov r10, r14 ; 928e: 3e b0 00 80 bit #-32768,r14 ;#0x8000 9292: 0f 7f subc r15, r15 ; 9294: 3f e3 inv r15 ; 9296: 08 4e mov r14, r8 ; 9298: 08 5c add r12, r8 ; 929a: 09 4f mov r15, r9 ; 929c: 09 6d addc r13, r9 ; 0000929e <.LVL24>: 929e: 5c 43 mov.b #1, r12 ;r3 As==01 92a0: 2b 41 mov @r1, r11 ; 000092a2 <.L14>: 92a2: 7a 47 mov.b @r7+, r10 ; 000092a4 <.LVL26>: 92a4: cd 3f jmp $-100 ;abs 0x9240 000092a6 <.L3>: 92a6: 7a 90 2b 00 cmp.b #43, r10 ;#0x002b 92aa: 03 24 jz $+8 ;abs 0x92b2 000092ac <.L53>: 92ac: 81 43 02 00 mov #0, 2(r1) ;r3 As==00 92b0: 89 3f jmp $-236 ;abs 0x91c4 000092b2 <.L5>: 92b2: 6a 47 mov.b @r7, r10 ; 000092b4 <.Loc.158.1>: 92b4: 07 4c mov r12, r7 ; 92b6: 27 53 incd r7 ; 000092b8 <.LVL30>: 92b8: f9 3f jmp $-12 ;abs 0x92ac 000092ba <.L10>: 92ba: 7d f0 03 00 and.b #3, r13 ; 000092be <.Loc.191.1>: 92be: 4d 93 cmp.b #0, r13 ;r3 As==00 92c0: 0e 24 jz $+30 ;abs 0x92de 000092c2 <.Loc.192.1>: 92c2: 5d 93 cmp.b #1, r13 ;r3 As==01 92c4: 04 24 jz $+10 ;abs 0x92ce 92c6: 7d 40 57 00 mov.b #87, r13 ;#0x0057 000092ca <.L13>: 92ca: 0a 8d sub r13, r10 ; 92cc: c2 3f jmp $-122 ;abs 0x9252 000092ce <.L24>: 92ce: 7d 40 37 00 mov.b #55, r13 ;#0x0037 92d2: fb 3f jmp $-8 ;abs 0x92ca 000092d4 <.L26>: 92d4: 18 41 0c 00 mov 12(r1), r8 ;0x0000c 000092d8 <.LVL33>: 92d8: 09 4b mov r11, r9 ; 000092da <.L54>: 92da: 3c 43 mov #-1, r12 ;r3 As==11 000092dc <.LVL34>: 92dc: e2 3f jmp $-58 ;abs 0x92a2 000092de <.L12>: 92de: 3c 93 cmp #-1, r12 ;r3 As==11 92e0: 0f 20 jnz $+32 ;abs 0x9300 000092e2 <.LVL36>: 92e2: 1d 41 12 00 mov 18(r1), r13 ;0x00012 92e6: bd 40 22 00 mov #34, 0(r13) ;#0x0022 92ea: 00 00 000092ec <.Loc.206.1>: 92ec: 08 44 mov r4, r8 ; 92ee: 09 45 mov r5, r9 ; 000092f0 <.Loc.210.1>: 92f0: 81 93 0a 00 cmp #0, 10(r1) ;r3 As==00, 0x000a 92f4: 13 20 jnz $+40 ;abs 0x931c 000092f6 <.L37>: 92f6: 0c 48 mov r8, r12 ; 000092f8 <.LVL38>: 92f8: 0d 49 mov r9, r13 ; 92fa: 31 50 14 00 add #20, r1 ;#0x0014 000092fe <.LCFI8>: 92fe: 77 3e jmp $-784 ;abs 0x8fee 00009300 <.L18>: 9300: 81 93 02 00 cmp #0, 2(r1) ;r3 As==00 9304: 06 24 jz $+14 ;abs 0x9312 00009306 <.Loc.209.1>: 9306: 4d 43 clr.b r13 ; 9308: 4e 43 clr.b r14 ; 930a: 0d 88 sub r8, r13 ; 930c: 0e 79 subc r9, r14 ; 930e: 08 4d mov r13, r8 ; 00009310 <.LVL40>: 9310: 09 4e mov r14, r9 ; 00009312 <.L21>: 9312: 81 93 0a 00 cmp #0, 10(r1) ;r3 As==00, 0x000a 9316: ef 27 jz $-32 ;abs 0x92f6 00009318 <.Loc.211.1>: 9318: 0c 93 cmp #0, r12 ;r3 As==00 931a: 03 24 jz $+8 ;abs 0x9322 0000931c <.L19>: 931c: 37 53 add #-1, r7 ;r3 As==11 0000931e <.LVL43>: 931e: 81 47 08 00 mov r7, 8(r1) ; 00009322 <.L22>: 9322: 1e 41 0a 00 mov 10(r1), r14 ;0x0000a 9326: 9e 41 08 00 mov 8(r1), 0(r14) ; 932a: 00 00 0000932c <.Loc.212.1>: 932c: e4 3f jmp $-54 ;abs 0x92f6 0000932e <.L9>: 932e: 7a 40 30 00 mov.b #48, r10 ;#0x0030 9332: 06 93 cmp #0, r6 ;r3 As==00 9334: 5a 23 jnz $-330 ;abs 0x91ea 00009336 <.Loc.166.1>: 9336: 76 42 mov.b #8, r6 ;r2 As==11 00009338 <.LVL46>: 9338: 58 3f jmp $-334 ;abs 0x91ea 0000933a <.L6>: 933a: 3a 90 30 00 cmp #48, r10 ;#0x0030 933e: 4a 27 jz $-362 ;abs 0x91d4 00009340 <.Loc.166.1>: 9340: 76 40 0a 00 mov.b #10, r6 ;#0x000a 00009344 <.LVL48>: 9344: 52 3f jmp $-346 ;abs 0x91ea 00009346 : 9346: 0f 4e mov r14, r15 ; 9348: 0e 4d mov r13, r14 ; 0000934a <.LVL50>: 934a: 0d 4c mov r12, r13 ; 0000934c <.LVL51>: 934c: 1c 42 02 02 mov &0x0202,r12 ;0x0202 00009350 <.LVL52>: 9350: b0 12 7c 91 call #-28292 ;#0x917c 00009354 <.LVL53>: 9354: 30 41 ret 00009356 <__ssputs_r>: 9356: 0a 12 push r10 ; 00009358 <.LCFI0>: 9358: 09 12 push r9 ; 0000935a : 935a: 08 12 push r8 ; 0000935c <.LCFI2>: 935c: 07 12 push r7 ; 0000935e <.LCFI3>: 935e: 06 12 push r6 ; 00009360 <.LCFI4>: 9360: 05 12 push r5 ; 00009362 <.LCFI5>: 9362: 04 12 push r4 ; 00009364 <.LCFI6>: 9364: 21 83 decd r1 ; 00009366 <.LCFI7>: 9366: 06 4c mov r12, r6 ; 9368: 0a 4d mov r13, r10 ; 936a: 04 4e mov r14, r4 ; 936c: 07 4f mov r15, r7 ; 0000936e <.Loc.181.1>: 936e: 18 4d 04 00 mov 4(r13), r8 ; 00009372 <.LVL1>: 9372: 0f 98 cmp r8, r15 ; 9374: 4b 28 jnc $+152 ;abs 0x940c 00009376 <.Loc.184.1>: 9376: 1e 4d 06 00 mov 6(r13), r14 ; 0000937a <.LVL2>: 937a: 3e b0 80 04 bit #1152, r14 ;#0x0480 937e: 44 24 jz $+138 ;abs 0x9408 00009380 <.LBB2>: 9380: 18 4d 0a 00 mov 10(r13),r8 ;0x0000a 00009384 <.LVL3>: 9384: 25 4d mov @r13, r5 ; 9386: 05 88 sub r8, r5 ; 00009388 <.LVL4>: 9388: 1c 4d 0c 00 mov 12(r13),r12 ;0x0000c 0000938c <.LVL5>: 938c: 09 4c mov r12, r9 ; 938e: 09 5c add r12, r9 ; 9390: 09 5c add r12, r9 ; 00009392 <.Loc.196.1>: 9392: 0c 49 mov r9, r12 ; 9394: 7d 40 0f 00 mov.b #15, r13 ;#0x000f 00009398 <.LVL6>: 9398: 81 4e 00 00 mov r14, 0(r1) ; 939c: b0 12 0e 90 call #-28658 ;#0x900e 000093a0 <.LVL7>: 93a0: 09 5c add r12, r9 ; 93a2: 09 11 rra r9 ; 000093a4 <.LVL8>: 93a4: 0c 47 mov r7, r12 ; 93a6: 1c 53 inc r12 ; 93a8: 0c 55 add r5, r12 ; 000093aa <.Loc.197.1>: 93aa: 2e 41 mov @r1, r14 ; 93ac: 09 9c cmp r12, r9 ; 93ae: 01 2c jc $+4 ;abs 0x93b2 000093b0 <.Loc.198.1>: 93b0: 09 4c mov r12, r9 ; 000093b2 <.L3>: 93b2: 3e b0 00 04 bit #1024, r14 ;#0x0400 93b6: 36 24 jz $+110 ;abs 0x9424 000093b8 <.Loc.202.1>: 93b8: 0d 49 mov r9, r13 ; 93ba: 0c 46 mov r6, r12 ; 93bc: b0 12 62 9c call #-25502 ;#0x9c62 000093c0 <.LVL10>: 93c0: 08 4c mov r12, r8 ; 000093c2 <.LVL11>: 93c2: 0c 93 cmp #0, r12 ;r3 As==00 93c4: 09 20 jnz $+20 ;abs 0x93d8 000093c6 <.L14>: 93c6: b6 40 0c 00 mov #12, 0(r6) ;#0x000c 93ca: 00 00 000093cc <.L6>: 93cc: ba d0 40 00 bis #64, 6(r10) ;#0x0040 93d0: 06 00 000093d2 <.Loc.239.1>: 93d2: 3c 43 mov #-1, r12 ;r3 As==11 000093d4 <.L1>: 93d4: 21 53 incd r1 ; 000093d6 <.LCFI8>: 93d6: 0b 3e jmp $-1000 ;abs 0x8fee 000093d8 <.L5>: 93d8: 0e 45 mov r5, r14 ; 93da: 1d 4a 0a 00 mov 10(r10),r13 ;0x0000a 93de: b0 12 4a 90 call #-28598 ;#0x904a 000093e2 <.LVL14>: 93e2: 1c 4a 06 00 mov 6(r10), r12 ; 93e6: 3c f0 7f fb and #-1153, r12 ;#0xfb7f 93ea: 3c d0 80 00 bis #128, r12 ;#0x0080 93ee: 8a 4c 06 00 mov r12, 6(r10) ; 000093f2 <.L7>: 93f2: 8a 48 0a 00 mov r8, 10(r10) ; 0x000a 000093f6 <.Loc.224.1>: 93f6: 08 55 add r5, r8 ; 000093f8 <.LVL15>: 93f8: 8a 48 00 00 mov r8, 0(r10) ; 000093fc <.Loc.225.1>: 93fc: 8a 49 0c 00 mov r9, 12(r10) ; 0x000c 00009400 <.LVL16>: 9400: 08 47 mov r7, r8 ; 00009402 <.Loc.227.1>: 9402: 09 85 sub r5, r9 ; 00009404 <.LVL17>: 9404: 8a 49 04 00 mov r9, 4(r10) ; 00009408 <.L2>: 9408: 07 98 cmp r8, r7 ; 940a: 01 2c jc $+4 ;abs 0x940e 0000940c <.L10>: 940c: 08 47 mov r7, r8 ; 0000940e <.L8>: 940e: 0e 48 mov r8, r14 ; 9410: 0d 44 mov r4, r13 ; 9412: 2c 4a mov @r10, r12 ; 9414: b0 12 2e 9b call #-25810 ;#0x9b2e 00009418 <.LVL21>: 9418: 8a 88 04 00 sub r8, 4(r10) ; 0000941c <.Loc.234.1>: 941c: 8a 58 00 00 add r8, 0(r10) ; 00009420 <.Loc.235.1>: 9420: 4c 43 clr.b r12 ; 9422: d8 3f jmp $-78 ;abs 0x93d4 00009424 <.L4>: 9424: 0e 49 mov r9, r14 ; 9426: 0d 48 mov r8, r13 ; 9428: 0c 46 mov r6, r12 ; 942a: b0 12 4a 9d call #-25270 ;#0x9d4a 0000942e <.LVL23>: 942e: 08 4c mov r12, r8 ; 00009430 <.LVL24>: 9430: 0c 93 cmp #0, r12 ;r3 As==00 9432: df 23 jnz $-64 ;abs 0x93f2 00009434 <.Loc.217.1>: 9434: 1d 4a 0a 00 mov 10(r10),r13 ;0x0000a 9438: 0c 46 mov r6, r12 ; 943a: b0 12 76 9b call #-25738 ;#0x9b76 0000943e <.LVL25>: 943e: c3 3f jmp $-120 ;abs 0x93c6 00009440 <_svfiprintf_r>: 9440: 0a 12 push r10 ; 00009442 <.LCFI20>: 9442: 09 12 push r9 ; 00009444 <.LCFI21>: 9444: 08 12 push r8 ; 00009446 : 9446: 07 12 push r7 ; 00009448 <.LCFI23>: 9448: 06 12 push r6 ; 0000944a <.LCFI24>: 944a: 05 12 push r5 ; 0000944c <.LCFI25>: 944c: 04 12 push r4 ; 0000944e <.LCFI26>: 944e: 31 80 52 00 sub #82, r1 ;#0x0052 00009452 <.LCFI27>: 9452: 07 4c mov r12, r7 ; 9454: 09 4d mov r13, r9 ; 9456: 0a 4e mov r14, r10 ; 9458: 81 4f 04 00 mov r15, 4(r1) ; 0000945c <.Loc.480.1>: 945c: 1d 4d 06 00 mov 6(r13), r13 ; 00009460 <.LVL59>: 9460: 7d f0 80 00 and.b #128, r13 ;#0x0080 00009464 <.Loc.505.1>: 9464: 0d 93 cmp #0, r13 ;r3 As==00 9466: 15 24 jz $+44 ;abs 0x9492 00009468 <.Loc.505.1>: 9468: 89 93 0a 00 cmp #0, 10(r9) ;r3 As==00, 0x000a 946c: 12 20 jnz $+38 ;abs 0x9492 0000946e <.Loc.507.1>: 946e: 7d 40 40 00 mov.b #64, r13 ;#0x0040 9472: b0 12 62 9c call #-25502 ;#0x9c62 00009476 <.LVL60>: 9476: 89 4c 00 00 mov r12, 0(r9) ; 0000947a <.Loc.507.1>: 947a: 89 4c 0a 00 mov r12, 10(r9) ; 0x000a 0000947e <.Loc.508.1>: 947e: 0c 93 cmp #0, r12 ;r3 As==00 9480: 05 20 jnz $+12 ;abs 0x948c 00009482 <.Loc.510.1>: 9482: b7 40 0c 00 mov #12, 0(r7) ;#0x000c 9486: 00 00 00009488 <.L64>: 9488: 3c 43 mov #-1, r12 ;r3 As==11 948a: 07 3d jmp $+528 ;abs 0x969a 0000948c <.L35>: 948c: b9 40 40 00 mov #64, 12(r9) ;#0x0040, 0x000c 9490: 0c 00 00009492 <.L34>: 9492: 81 43 10 00 mov #0, 16(r1) ;r3 As==00, 0x0010 00009496 <.Loc.519.1>: 9496: f1 40 20 00 mov.b #32, 19(r1) ;#0x0020, 0x0013 949a: 13 00 0000949c <.Loc.520.1>: 949c: f1 40 30 00 mov.b #48, 20(r1) ;#0x0030, 0x0014 94a0: 14 00 000094a2 <.Loc.531.1>: 94a2: 36 40 56 93 mov #-27818,r6 ;#0x9356 000094a6 <.Loc.554.1>: 94a6: 35 40 12 9b mov #-25838,r5 ;#0x9b12 000094aa <.L63>: 94aa: 0c 4a mov r10, r12 ; 000094ac <.L38>: 94ac: 04 4c mov r12, r4 ; 000094ae <.LVL66>: 94ae: 7d 4c mov.b @r12+, r13 ; 000094b0 <.Loc.526.1>: 94b0: 0d 93 cmp #0, r13 ;r3 As==00 94b2: 03 24 jz $+8 ;abs 0x94ba 000094b4 <.Loc.526.1>: 94b4: 3d 90 25 00 cmp #37, r13 ;#0x0025 94b8: f9 23 jnz $-12 ;abs 0x94ac 000094ba <.L37>: 94ba: 0b 44 mov r4, r11 ; 94bc: 0b 8a sub r10, r11 ; 000094be <.LVL67>: 94be: 04 9a cmp r10, r4 ; 94c0: 0d 24 jz $+28 ;abs 0x94dc 000094c2 <.Loc.531.1>: 94c2: 0f 4b mov r11, r15 ; 94c4: 0e 4a mov r10, r14 ; 94c6: 0d 49 mov r9, r13 ; 94c8: 0c 47 mov r7, r12 ; 94ca: 81 4b 02 00 mov r11, 2(r1) ; 94ce: 86 12 call r6 ; 000094d0 <.LVL68>: 94d0: 1b 41 02 00 mov 2(r1), r11 ; 94d4: 3c 93 cmp #-1, r12 ;r3 As==11 94d6: db 24 jz $+440 ;abs 0x968e 000094d8 <.Loc.531.1>: 94d8: 81 5b 10 00 add r11, 16(r1) ; 0x0010 000094dc <.L39>: 94dc: c4 93 00 00 cmp.b #0, 0(r4) ;r3 As==00 94e0: d6 24 jz $+430 ;abs 0x968e 000094e2 <.Loc.537.1>: 94e2: 0f 44 mov r4, r15 ; 94e4: 1f 53 inc r15 ; 000094e6 <.LVL69>: 94e6: 81 43 06 00 mov #0, 6(r1) ;r3 As==00 000094ea <.Loc.540.1>: 94ea: 81 43 0c 00 mov #0, 12(r1) ;r3 As==00, 0x000c 000094ee <.Loc.541.1>: 94ee: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 000094f2 <.Loc.542.1>: 94f2: 81 43 0a 00 mov #0, 10(r1) ;r3 As==00, 0x000a 000094f6 <.Loc.543.1>: 94f6: c1 43 3d 00 mov.b #0, 61(r1) ;r3 As==00, 0x003d 000094fa <.Loc.545.1>: 94fa: 81 43 50 00 mov #0, 80(r1) ;r3 As==00, 0x0050 000094fe <.Loc.553.1>: 94fe: 74 40 05 00 mov.b #5, r4 ; 00009502 <.L41>: 9502: 0a 4f mov r15, r10 ; 9504: 0e 44 mov r4, r14 ; 9506: 7d 4a mov.b @r10+, r13 ; 9508: 3c 40 ff 81 mov #-32257,r12 ;#0x81ff 950c: 81 4f 02 00 mov r15, 2(r1) ; 9510: 85 12 call r5 ; 00009512 <.LVL72>: 9512: 0d 4c mov r12, r13 ; 00009514 <.LVL73>: 9514: 1f 41 02 00 mov 2(r1), r15 ; 9518: 0c 93 cmp #0, r12 ;r3 As==00 951a: 23 20 jnz $+72 ;abs 0x9562 0000951c <.Loc.557.1>: 951c: 1d 41 06 00 mov 6(r1), r13 ; 00009520 <.Loc.557.1>: 9520: 3d b0 10 00 bit #16, r13 ;#0x0010 9524: 03 24 jz $+8 ;abs 0x952c 00009526 <.Loc.558.1>: 9526: f1 40 20 00 mov.b #32, 61(r1) ;#0x0020, 0x003d 952a: 3d 00 0000952c <.L43>: 952c: 3d b2 bit #8, r13 ;r2 As==11 952e: 03 24 jz $+8 ;abs 0x9536 00009530 <.Loc.566.1>: 9530: f1 40 2b 00 mov.b #43, 61(r1) ;#0x002b, 0x003d 9534: 3d 00 00009536 <.L44>: 9536: ff 90 2a 00 cmp.b #42, 0(r15) ;#0x002a 953a: 00 00 953c: 1b 24 jz $+56 ;abs 0x9574 953e: 14 41 0c 00 mov 12(r1), r4 ;0x0000c 9542: 0a 4f mov r15, r10 ; 9544: 4c 43 clr.b r12 ; 00009546 <.LVL74>: 9546: 5f 43 mov.b #1, r15 ;r3 As==01 00009548 <.L46>: 9548: 0e 4a mov r10, r14 ; 954a: 7d 4e mov.b @r14+, r13 ; 954c: 3d 50 d0 ff add #-48, r13 ;#0xffd0 00009550 <.Loc.587.1>: 9550: 7b 40 09 00 mov.b #9, r11 ; 9554: 0b 9d cmp r13, r11 ; 9556: 63 2c jc $+200 ;abs 0x961e 9558: 0c 93 cmp #0, r12 ;r3 As==00 955a: 19 24 jz $+52 ;abs 0x958e 955c: 81 44 0c 00 mov r4, 12(r1) ; 0x000c 9560: 16 3c jmp $+46 ;abs 0x958e 00009562 <.L42>: 9562: 5c 43 mov.b #1, r12 ;r3 As==01 00009564 <.LVL77>: 9564: 3d 80 ff 81 sub #-32257,r13 ;#0x81ff 00009568 <.LVL78>: 9568: b0 12 02 90 call #-28670 ;#0x9002 0000956c <.LVL79>: 956c: 81 dc 06 00 bis r12, 6(r1) ; 00009570 <.Loc.554.1>: 9570: 0f 4a mov r10, r15 ; 9572: c7 3f jmp $-112 ;abs 0x9502 00009574 <.L45>: 9574: 1c 41 04 00 mov 4(r1), r12 ; 00009578 <.LVL81>: 9578: 1c 53 inc r12 ; 957a: 1c c3 bic #1, r12 ;r3 As==01 957c: 0b 4c mov r12, r11 ; 957e: 2b 53 incd r11 ; 9580: 81 4b 04 00 mov r11, 4(r1) ; 9584: 2c 4c mov @r12, r12 ; 00009586 <.Loc.578.1>: 9586: 0c 93 cmp #0, r12 ;r3 As==00 9588: 42 38 jl $+134 ;abs 0x960e 0000958a <.Loc.577.1>: 958a: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 0000958e <.L49>: 958e: fa 90 2e 00 cmp.b #46, 0(r10) ;#0x002e 9592: 00 00 9594: 12 20 jnz $+38 ;abs 0x95ba 00009596 <.Loc.594.1>: 9596: fa 90 2a 00 cmp.b #42, 1(r10) ;#0x002a 959a: 01 00 959c: 4d 20 jnz $+156 ;abs 0x9638 0000959e <.LVL82>: 959e: 2a 53 incd r10 ; 000095a0 <.LVL83>: 95a0: 1c 41 04 00 mov 4(r1), r12 ; 95a4: 1c 53 inc r12 ; 95a6: 1c c3 bic #1, r12 ;r3 As==01 95a8: 0d 4c mov r12, r13 ; 95aa: 2d 53 incd r13 ; 95ac: 81 4d 04 00 mov r13, 4(r1) ; 95b0: 2c 4c mov @r12, r12 ; 000095b2 <.Loc.599.1>: 95b2: 0c 93 cmp #0, r12 ;r3 As==00 95b4: 3e 38 jl $+126 ;abs 0x9632 000095b6 <.Loc.598.1>: 95b6: 81 4c 08 00 mov r12, 8(r1) ; 000095ba <.L52>: 95ba: 7e 40 03 00 mov.b #3, r14 ; 95be: 6d 4a mov.b @r10, r13 ; 95c0: 3c 40 05 82 mov #-32251,r12 ;#0x8205 95c4: 85 12 call r5 ; 000095c6 <.LVL85>: 95c6: 0d 4c mov r12, r13 ; 000095c8 <.LVL86>: 95c8: 0c 93 cmp #0, r12 ;r3 As==00 95ca: 09 24 jz $+20 ;abs 0x95de 000095cc <.LVL87>: 95cc: 1a 53 inc r10 ; 000095ce <.LVL88>: 95ce: 7c 40 40 00 mov.b #64, r12 ;#0x0040 000095d2 <.LVL89>: 95d2: 3d 80 05 82 sub #-32251,r13 ;#0x8205 000095d6 <.LVL90>: 95d6: b0 12 02 90 call #-28670 ;#0x9002 000095da <.LVL91>: 95da: 81 dc 06 00 bis r12, 6(r1) ; 000095de <.L58>: 95de: 7d 4a mov.b @r10+, r13 ; 000095e0 <.LVL93>: 95e0: c1 4d 12 00 mov.b r13, 18(r1) ; 0x0012 000095e4 <.Loc.620.1>: 95e4: 7e 40 06 00 mov.b #6, r14 ; 95e8: 3c 40 09 82 mov #-32247,r12 ;#0x8209 95ec: 85 12 call r5 ; 000095ee <.LVL94>: 95ee: 0c 93 cmp #0, r12 ;r3 As==00 95f0: 58 24 jz $+178 ;abs 0x96a2 000095f2 <.Loc.627.1>: 95f2: 34 40 00 00 mov #0, r4 ; 95f6: 04 93 cmp #0, r4 ;r3 As==00 95f8: 3c 20 jnz $+122 ;abs 0x9672 000095fa <.Loc.629.1>: 95fa: 1c 41 04 00 mov 4(r1), r12 ; 000095fe <.LVL95>: 95fe: 1c 53 inc r12 ; 9600: 1c c3 bic #1, r12 ;r3 As==01 9602: 3c 52 add #8, r12 ;r2 As==11 9604: 81 4c 04 00 mov r12, 4(r1) ; 00009608 <.L61>: 9608: 81 58 10 00 add r8, 16(r1) ; 0x0010 0000960c <.Loc.523.1>: 960c: 4e 3f jmp $-354 ;abs 0x94aa 0000960e <.L47>: 960e: 4e 43 clr.b r14 ; 9610: 0e 8c sub r12, r14 ; 9612: 81 4e 0c 00 mov r14, 12(r1) ; 0x000c 00009616 <.Loc.581.1>: 9616: 2d d3 bis #2, r13 ;r3 As==10 9618: 81 4d 06 00 mov r13, 6(r1) ; 0000961c <.Loc.583.1>: 961c: b8 3f jmp $-142 ;abs 0x958e 0000961e <.L50>: 961e: 0c 44 mov r4, r12 ; 9620: 0c 5c rla r12 ; 9622: 0c 5c rla r12 ; 9624: 0c 54 add r4, r12 ; 9626: 0c 5c rla r12 ; 00009628 <.Loc.588.1>: 9628: 04 4c mov r12, r4 ; 962a: 04 5d add r13, r4 ; 0000962c <.LVL98>: 962c: 0a 4e mov r14, r10 ; 0000962e <.Loc.588.1>: 962e: 0c 4f mov r15, r12 ; 9630: 8b 3f jmp $-232 ;abs 0x9548 00009632 <.L54>: 9632: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 9636: c1 3f jmp $-124 ;abs 0x95ba 00009638 <.L53>: 9638: 1a 53 inc r10 ; 0000963a <.LVL101>: 963a: 81 43 08 00 mov #0, 8(r1) ;r3 As==00 0000963e <.Loc.605.1>: 963e: 4c 43 clr.b r12 ; 9640: 04 4c mov r12, r4 ; 00009642 <.Loc.606.1>: 9642: 5f 43 mov.b #1, r15 ;r3 As==01 00009644 <.L55>: 9644: 0e 4a mov r10, r14 ; 9646: 7d 4e mov.b @r14+, r13 ; 9648: 3d 50 d0 ff add #-48, r13 ;#0xffd0 0000964c <.Loc.605.1>: 964c: 7b 40 09 00 mov.b #9, r11 ; 9650: 0b 9d cmp r13, r11 ; 9652: 05 2c jc $+12 ;abs 0x965e 9654: 0c 93 cmp #0, r12 ;r3 As==00 9656: b1 27 jz $-156 ;abs 0x95ba 9658: 81 44 08 00 mov r4, 8(r1) ; 965c: ae 3f jmp $-162 ;abs 0x95ba 0000965e <.L56>: 965e: 0c 44 mov r4, r12 ; 9660: 0c 5c rla r12 ; 9662: 0c 5c rla r12 ; 9664: 0c 54 add r4, r12 ; 9666: 0c 5c rla r12 ; 00009668 <.Loc.606.1>: 9668: 04 4c mov r12, r4 ; 966a: 04 5d add r13, r4 ; 0000966c <.LVL103>: 966c: 0a 4e mov r14, r10 ; 0000966e <.Loc.606.1>: 966e: 0c 4f mov r15, r12 ; 9670: e9 3f jmp $-44 ;abs 0x9644 00009672 <.L60>: 9672: 6c 42 mov.b #4, r12 ;r2 As==10 00009674 <.LVL105>: 9674: 0c 51 add r1, r12 ; 9676: 81 4c 00 00 mov r12, 0(r1) ; 967a: 0f 46 mov r6, r15 ; 967c: 0e 49 mov r9, r14 ; 967e: 0d 41 mov r1, r13 ; 9680: 3d 50 06 00 add #6, r13 ; 9684: 0c 47 mov r7, r12 ; 9686: 84 12 call r4 ; 00009688 <.L96>: 9688: 08 4c mov r12, r8 ; 0000968a <.Loc.643.1>: 968a: 3c 93 cmp #-1, r12 ;r3 As==11 968c: bd 23 jnz $-132 ;abs 0x9608 0000968e <.L40>: 968e: f9 b0 40 00 bit.b #64, 6(r9) ;#0x0040 9692: 06 00 9694: f9 22 jnz $-524 ;abs 0x9488 00009696 <.Loc.654.1>: 9696: 1c 41 10 00 mov 16(r1), r12 ;0x00010 0000969a <.L33>: 969a: 31 50 52 00 add #82, r1 ;#0x0052 0000969e <.LCFI28>: 969e: 30 40 ee 8f br #0x8fee ; 000096a2 <.L59>: 96a2: 6d 42 mov.b #4, r13 ;r2 As==10 96a4: 0d 51 add r1, r13 ; 96a6: 81 4d 00 00 mov r13, 0(r1) ; 96aa: 0f 46 mov r6, r15 ; 96ac: 0e 49 mov r9, r14 ; 96ae: 0d 41 mov r1, r13 ; 96b0: 3d 50 06 00 add #6, r13 ; 96b4: 0c 47 mov r7, r12 ; 000096b6 <.LVL111>: 96b6: b0 12 d0 97 call #-26672 ;#0x97d0 000096ba <.LVL112>: 96ba: e6 3f jmp $-50 ;abs 0x9688 000096bc <_printf_common>: 96bc: 0a 12 push r10 ; 000096be <.LCFI0>: 96be: 09 12 push r9 ; 000096c0 <.LCFI1>: 96c0: 08 12 push r8 ; 000096c2 <.LCFI2>: 96c2: 07 12 push r7 ; 000096c4 <.LCFI3>: 96c4: 06 12 push r6 ; 000096c6 <.LCFI4>: 96c6: 05 12 push r5 ; 000096c8 <.LCFI5>: 96c8: 04 12 push r4 ; 000096ca <.LCFI6>: 96ca: 21 83 decd r1 ; 000096cc <.LCFI7>: 96cc: 07 4c mov r12, r7 ; 96ce: 0a 4d mov r13, r10 ; 000096d0 : 96d0: 08 4e mov r14, r8 ; 96d2: 06 4f mov r15, r6 ; 96d4: 15 41 12 00 mov 18(r1), r5 ;0x00012 000096d8 <.Loc.56.1>: 96d8: 1d 4d 04 00 mov 4(r13), r13 ; 000096dc <.LVL1>: 96dc: 1c 4a 08 00 mov 8(r10), r12 ; 000096e0 <.LVL2>: 96e0: 0c 9d cmp r13, r12 ; 96e2: 01 34 jge $+4 ;abs 0x96e6 96e4: 0c 4d mov r13, r12 ; 000096e6 <.L2>: 96e6: 88 4c 00 00 mov r12, 0(r8) ; 000096ea <.Loc.73.1>: 96ea: ca 93 37 00 cmp.b #0, 55(r10) ;r3 As==00, 0x0037 96ee: 03 24 jz $+8 ;abs 0x96f6 000096f0 <.Loc.74.1>: 96f0: 1c 53 inc r12 ; 96f2: 88 4c 00 00 mov r12, 0(r8) ; 000096f6 <.L3>: 96f6: fa b0 20 00 bit.b #32, 0(r10) ;#0x0020 96fa: 00 00 96fc: 02 24 jz $+6 ;abs 0x9702 000096fe <.Loc.77.1>: 96fe: a8 53 00 00 incd 0(r8) ; 00009702 <.L4>: 9702: 29 4a mov @r10, r9 ; 9704: 79 f0 06 00 and.b #6, r9 ; 00009708 <.Loc.80.1>: 9708: ba b0 06 00 bit #6, 0(r10) ; 970c: 00 00 970e: 09 20 jnz $+20 ;abs 0x9722 00009710 <.LBB2>: 9710: 04 4a mov r10, r4 ; 9712: 34 50 0d 00 add #13, r4 ;#0x000d 9716: 5b 43 mov.b #1, r11 ;r3 As==01 00009718 <.L5>: 9718: 1c 4a 06 00 mov 6(r10), r12 ; 971c: 2c 88 sub @r8, r12 ; 971e: 09 9c cmp r12, r9 ; 9720: 31 38 jl $+100 ;abs 0x9784 00009722 <.L11>: 9722: 5d 4a 37 00 mov.b 55(r10),r13 ;0x00037 9726: 0c 43 clr r12 ; 9728: 0c 8d sub r13, r12 ; 972a: 7d 40 0f 00 mov.b #15, r13 ;#0x000f 972e: b0 12 0e 90 call #-28658 ;#0x900e 9732: 0f 4c mov r12, r15 ; 00009734 <.LVL7>: 9734: fa b0 20 00 bit.b #32, 0(r10) ;#0x0020 9738: 00 00 973a: 34 20 jnz $+106 ;abs 0x97a4 0000973c <.L7>: 973c: 0e 4a mov r10, r14 ; 973e: 3e 50 37 00 add #55, r14 ;#0x0037 9742: 0d 46 mov r6, r13 ; 9744: 0c 47 mov r7, r12 ; 9746: 85 12 call r5 ; 00009748 <.LVL9>: 9748: 3c 93 cmp #-1, r12 ;r3 As==11 974a: 26 24 jz $+78 ;abs 0x9798 0000974c <.Loc.94.1>: 974c: 19 4a 06 00 mov 6(r10), r9 ; 00009750 <.Loc.95.1>: 9750: 2c 48 mov @r8, r12 ; 00009752 <.LVL10>: 9752: 2d 4a mov @r10, r13 ; 9754: 7d f0 06 00 and.b #6, r13 ; 00009758 <.Loc.96.1>: 9758: 2d 92 cmp #4, r13 ;r2 As==10 975a: 03 20 jnz $+8 ;abs 0x9762 0000975c <.Loc.95.1>: 975c: 09 8c sub r12, r9 ; 0000975e <.LVL11>: 975e: 09 93 cmp #0, r9 ;r3 As==00 9760: 01 34 jge $+4 ;abs 0x9764 00009762 <.L18>: 9762: 49 43 clr.b r9 ; 00009764 <.L13>: 9764: 1c 4a 04 00 mov 4(r10), r12 ; 00009768 <.Loc.99.1>: 9768: 1d 4a 08 00 mov 8(r10), r13 ; 0000976c <.Loc.99.1>: 976c: 0d 9c cmp r12, r13 ; 976e: 02 34 jge $+6 ;abs 0x9774 00009770 <.Loc.100.1>: 9770: 0c 8d sub r13, r12 ; 00009772 <.Loc.100.1>: 9772: 09 5c add r12, r9 ; 00009774 <.L15>: 9774: 48 43 clr.b r8 ; 00009776 <.LVL15>: 9776: 3a 50 0e 00 add #14, r10 ;#0x000e 0000977a <.LVL16>: 977a: 54 43 mov.b #1, r4 ;r3 As==01 0000977c <.L16>: 977c: 09 98 cmp r8, r9 ; 977e: 1f 20 jnz $+64 ;abs 0x97be 00009780 <.LBE3>: 9780: 4c 43 clr.b r12 ; 9782: 0b 3c jmp $+24 ;abs 0x979a 00009784 <.L10>: 9784: 0f 4b mov r11, r15 ; 9786: 0e 44 mov r4, r14 ; 9788: 0d 46 mov r6, r13 ; 978a: 0c 47 mov r7, r12 ; 978c: 81 4b 00 00 mov r11, 0(r1) ; 9790: 85 12 call r5 ; 00009792 <.LVL19>: 9792: 2b 41 mov @r1, r11 ; 9794: 3c 93 cmp #-1, r12 ;r3 As==11 9796: 04 20 jnz $+10 ;abs 0x97a0 00009798 <.L12>: 9798: 3c 43 mov #-1, r12 ;r3 As==11 0000979a <.L1>: 979a: 21 53 incd r1 ; 0000979c <.LCFI8>: 979c: 30 40 ee 8f br #0x8fee ; 000097a0 <.L8>: 97a0: 19 53 inc r9 ; 97a2: ba 3f jmp $-138 ;abs 0x9718 000097a4 <.L6>: 97a4: 0c 4a mov r10, r12 ; 97a6: 0c 5f add r15, r12 ; 97a8: fc 40 30 00 mov.b #48, 55(r12) ;#0x0030, 0x0037 97ac: 37 00 000097ae <.LVL24>: 97ae: 0c 4f mov r15, r12 ; 97b0: 1c 53 inc r12 ; 97b2: 0c 5a add r10, r12 ; 97b4: 2f 53 incd r15 ; 000097b6 <.LVL25>: 97b6: dc 4a 39 00 mov.b 57(r10),55(r12) ;0x00039, 0x0037 97ba: 37 00 97bc: bf 3f jmp $-128 ;abs 0x973c 000097be <.L17>: 97be: 0f 44 mov r4, r15 ; 97c0: 0e 4a mov r10, r14 ; 97c2: 0d 46 mov r6, r13 ; 97c4: 0c 47 mov r7, r12 ; 97c6: 85 12 call r5 ; 000097c8 <.LVL27>: 97c8: 3c 93 cmp #-1, r12 ;r3 As==11 97ca: e6 27 jz $-50 ;abs 0x9798 000097cc <.Loc.102.1>: 97cc: 18 53 inc r8 ; 97ce: d6 3f jmp $-82 ;abs 0x977c 000097d0 <_printf_i>: 97d0: 0a 12 push r10 ; 000097d2 <.LCFI10>: 97d2: 09 12 push r9 ; 000097d4 <.LCFI11>: 97d4: 08 12 push r8 ; 000097d6 <.LCFI12>: 97d6: 07 12 push r7 ; 000097d8 : 97d8: 06 12 push r6 ; 000097da <.LCFI14>: 97da: 05 12 push r5 ; 000097dc <.LCFI15>: 97dc: 04 12 push r4 ; 000097de <.LCFI16>: 97de: 31 80 14 00 sub #20, r1 ;#0x0014 000097e2 <.LCFI17>: 97e2: 81 4c 08 00 mov r12, 8(r1) ; 97e6: 0a 4d mov r13, r10 ; 97e8: 04 4e mov r14, r4 ; 97ea: 81 4f 0a 00 mov r15, 10(r1) ; 0x000a 97ee: 1d 41 24 00 mov 36(r1), r13 ;0x00024 000097f2 <.LVL30>: 97f2: 0b 4a mov r10, r11 ; 97f4: 3b 50 37 00 add #55, r11 ;#0x0037 000097f8 <.LVL31>: 97f8: 5c 4a 0c 00 mov.b 12(r10),r12 ;0x0000c 000097fc <.LVL32>: 97fc: 76 40 78 00 mov.b #120, r6 ;#0x0078 9800: 56 9a 0c 00 cmp.b 12(r10),r6 ;0x0000c 9804: 09 28 jnc $+20 ;abs 0x9818 9806: 77 40 62 00 mov.b #98, r7 ;#0x0062 980a: 47 9c cmp.b r12, r7 ; 980c: 0b 28 jnc $+24 ;abs 0x9824 980e: 0c 93 cmp #0, r12 ;r3 As==00 9810: 33 25 jz $+616 ;abs 0x9a78 9812: 3c 90 58 00 cmp #88, r12 ;#0x0058 9816: e8 24 jz $+466 ;abs 0x99e8 00009818 <.L30>: 9818: 07 4a mov r10, r7 ; 981a: 37 50 36 00 add #54, r7 ;#0x0036 0000981e <.LVL34>: 981e: ca 4c 36 00 mov.b r12, 54(r10) ; 0x0036 9822: 31 3c jmp $+100 ;abs 0x9886 00009824 <.L31>: 9824: 4e 4c mov.b r12, r14 ; 9826: 7e 50 9d ff add.b #-99, r14 ;#0xff9d 982a: 78 40 15 00 mov.b #21, r8 ;#0x0015 982e: 48 9e cmp.b r14, r8 ; 9830: f3 2b jnc $-24 ;abs 0x9818 9832: 3e f0 ff 00 and #255, r14 ;#0x00ff 9836: 0e 5e rla r14 ; 9838: 3e 50 42 98 add #-26558,r14 ;#0x9842 983c: 2e 4e mov @r14, r14 ; 983e: 00 4e br r14 ; ... 00009842 <.L35>: 9842: 6e 98 cmp.b @r8, r14 ; 9844: 8c 98 18 98 cmp r8, -26600(r12); 0x9818 9848: 18 98 18 98 cmp -26600(r8),r8 ;0xffff9818 984c: 18 98 8c 98 cmp -26484(r8),r8 ;0xffff988c 9850: 18 98 18 98 cmp -26600(r8),r8 ;0xffff9818 9854: 18 98 18 98 cmp -26600(r8),r8 ;0xffff9818 9858: 4e 9a cmp.b r10, r14 ; 985a: e0 98 2c 9a cmp.b @r8, 0x9a2c ; PC rel. 0x3288 985e: 18 98 18 98 cmp -26600(r8),r8 ;0xffff9818 9862: 86 9a 18 98 cmp r10, -26600(r6); 0x9818 9866: e0 98 18 98 cmp.b @r8, 0x9818 ; PC rel. 0x3080 986a: 18 98 32 9a cmp -26062(r8),r8 ;0xffff9a32 0000986e <.L41>: 986e: 2c 4d mov @r13, r12 ; 9870: 1c 53 inc r12 ; 9872: 1c c3 bic #1, r12 ;r3 As==01 9874: 09 4c mov r12, r9 ; 9876: 29 53 incd r9 ; 9878: 8d 49 00 00 mov r9, 0(r13) ; 0000987c <.Loc.124.1>: 987c: 07 4a mov r10, r7 ; 987e: 37 50 36 00 add #54, r7 ;#0x0036 00009882 <.LVL36>: 9882: ea 4c 36 00 mov.b @r12, 54(r10) ; 0x0036 00009886 <.L97>: 9886: 9a 43 08 00 mov #1, 8(r10) ;r3 As==01 988a: 11 3d jmp $+548 ;abs 0x9aae 0000988c <.L40>: 988c: 2c 4d mov @r13, r12 ; 988e: 1c 53 inc r12 ; 9890: 1c c3 bic #1, r12 ;r3 As==01 00009892 <.Loc.129.1>: 9892: 2e 4a mov @r10, r14 ; 9894: 7e f0 80 00 and.b #128, r14 ;#0x0080 9898: 0e 93 cmp #0, r14 ;r3 As==00 989a: 17 24 jz $+48 ;abs 0x98ca 989c: 0e 4c mov r12, r14 ; 989e: 2e 52 add #4, r14 ;r2 As==10 98a0: 8d 4e 00 00 mov r14, 0(r13) ; 98a4: 28 4c mov @r12, r8 ; 98a6: 19 4c 02 00 mov 2(r12), r9 ; 000098aa <.L44>: 98aa: 09 93 cmp #0, r9 ;r3 As==00 98ac: 09 34 jge $+20 ;abs 0x98c0 000098ae <.Loc.132.1>: 98ae: 46 43 clr.b r6 ; 98b0: 47 43 clr.b r7 ; 98b2: 06 88 sub r8, r6 ; 98b4: 07 79 subc r9, r7 ; 98b6: 08 46 mov r6, r8 ; 000098b8 <.LVL40>: 98b8: 09 47 mov r7, r9 ; 000098ba <.LVL41>: 98ba: fa 40 2d 00 mov.b #45, 55(r10) ;#0x002d, 0x0037 98be: 37 00 000098c0 <.L73>: 98c0: 35 40 10 82 mov #-32240,r5 ;#0x8210 000098c4 <.LBB8>: 98c4: 76 40 0a 00 mov.b #10, r6 ;#0x000a 98c8: 22 3c jmp $+70 ;abs 0x990e 000098ca <.L43>: 98ca: 0f 4c mov r12, r15 ; 000098cc <.LVL43>: 98cc: 2f 53 incd r15 ; 98ce: 8d 4f 00 00 mov r15, 0(r13) ; 98d2: 2c 4c mov @r12, r12 ; 98d4: 08 4c mov r12, r8 ; 98d6: 38 b0 00 80 bit #-32768,r8 ;#0x8000 98da: 09 79 subc r9, r9 ; 98dc: 39 e3 inv r9 ; 98de: e5 3f jmp $-52 ;abs 0x98aa 000098e0 <.L36>: 98e0: 2f 4a mov @r10, r15 ; 000098e2 <.LVL45>: 98e2: 2e 4d mov @r13, r14 ; 98e4: 1e 53 inc r14 ; 98e6: 1e c3 bic #1, r14 ;r3 As==01 98e8: 3f b0 80 00 bit #128, r15 ;#0x0080 98ec: 77 24 jz $+240 ;abs 0x99dc 98ee: 07 4e mov r14, r7 ; 98f0: 27 52 add #4, r7 ;r2 As==10 98f2: 8d 47 00 00 mov r7, 0(r13) ; 98f6: 28 4e mov @r14, r8 ; 98f8: 19 4e 02 00 mov 2(r14), r9 ; 000098fc <.L48>: 98fc: 35 40 10 82 mov #-32240,r5 ;#0x8210 00009900 <.LBB9>: 9900: 3c 90 6f 00 cmp #111, r12 ;#0x006f 9904: a2 24 jz $+326 ;abs 0x9a4a 00009906 <.Loc.140.1>: 9906: 76 40 0a 00 mov.b #10, r6 ;#0x000a 0000990a <.L50>: 990a: ca 43 37 00 mov.b #0, 55(r10) ;r3 As==00, 0x0037 0000990e <.L45>: 990e: 1c 4a 02 00 mov 2(r10), r12 ; 00009912 <.Loc.179.1>: 9912: 8a 4c 04 00 mov r12, 4(r10) ; 00009916 <.Loc.179.1>: 9916: 0c 93 cmp #0, r12 ;r3 As==00 9918: 02 38 jl $+6 ;abs 0x991e 0000991a <.Loc.180.1>: 991a: aa c2 00 00 bic #4, 0(r10) ;r2 As==10 0000991e <.L56>: 991e: 0d 48 mov r8, r13 ; 00009920 <.LVL49>: 9920: 0d d9 bis r9, r13 ; 00009922 <.Loc.135.1>: 9922: 07 4b mov r11, r7 ; 00009924 <.Loc.187.1>: 9924: 0d 93 cmp #0, r13 ;r3 As==00 9926: 02 20 jnz $+6 ;abs 0x992c 00009928 <.LVL50>: 9928: 0c 93 cmp #0, r12 ;r3 As==00 992a: 35 24 jz $+108 ;abs 0x9996 0000992c <.L57>: 992c: 0c 46 mov r6, r12 ; 992e: 3c b0 00 80 bit #-32768,r12 ;#0x8000 9932: 0d 7d subc r13, r13 ; 9934: 3d e3 inv r13 ; 9936: 81 4c 04 00 mov r12, 4(r1) ; 993a: 81 4d 06 00 mov r13, 6(r1) ; 0000993e <.Loc.194.1>: 993e: 81 4d 10 00 mov r13, 16(r1) ; 0x0010 00009942 <.L90>: 9942: 37 53 add #-1, r7 ;r3 As==11 00009944 <.Loc.191.1>: 9944: 1e 41 04 00 mov 4(r1), r14 ; 9948: 1f 41 06 00 mov 6(r1), r15 ; 994c: 0c 48 mov r8, r12 ; 994e: 0d 49 mov r9, r13 ; 9950: 81 4b 02 00 mov r11, 2(r1) ; 9954: b0 12 e0 8f call #-28704 ;#0x8fe0 00009958 <.Loc.191.1>: 9958: 0c 55 add r5, r12 ; 0000995a <.Loc.191.1>: 995a: e7 4c 00 00 mov.b @r12, 0(r7) ; 0000995e <.Loc.192.1>: 995e: 81 48 0e 00 mov r8, 14(r1) ; 0x000e 9962: 81 49 0c 00 mov r9, 12(r1) ; 0x000c 00009966 <.Loc.192.1>: 9966: 1e 41 04 00 mov 4(r1), r14 ; 996a: 1f 41 06 00 mov 6(r1), r15 ; 996e: 0c 48 mov r8, r12 ; 9970: 0d 49 mov r9, r13 ; 9972: b0 12 d2 8f call #-28718 ;#0x8fd2 9976: 08 4c mov r12, r8 ; 00009978 <.LVL54>: 9978: 09 4d mov r13, r9 ; 0000997a <.LVL55>: 997a: 1b 41 02 00 mov 2(r1), r11 ; 997e: 91 91 06 00 cmp 6(r1), 12(r1) ; 0x000c 9982: 0c 00 9984: 08 28 jnc $+18 ;abs 0x9996 9986: 91 91 0c 00 cmp 12(r1), 16(r1) ;0x0000c, 0x0010 998a: 10 00 998c: da 23 jnz $-74 ;abs 0x9942 998e: 91 91 04 00 cmp 4(r1), 14(r1) ; 0x000e 9992: 0e 00 9994: d6 2f jc $-82 ;abs 0x9942 00009996 <.L58>: 9996: 36 92 cmp #8, r6 ;r2 As==11 9998: 0b 20 jnz $+24 ;abs 0x99b0 0000999a <.Loc.198.1>: 999a: da b3 00 00 bit.b #1, 0(r10) ;r3 As==01 999e: 08 24 jz $+18 ;abs 0x99b0 000099a0 <.Loc.198.1>: 99a0: 9a 9a 02 00 cmp 2(r10), 8(r10) ; 99a4: 08 00 99a6: 04 38 jl $+10 ;abs 0x99b0 000099a8 <.LVL56>: 99a8: f7 40 30 00 mov.b #48, -1(r7) ;#0x0030, 0xffff 99ac: ff ff 99ae: 37 53 add #-1, r7 ;r3 As==11 000099b0 <.L61>: 99b0: 0b 87 sub r7, r11 ; 99b2: 8a 4b 08 00 mov r11, 8(r10) ; 000099b6 <.L62>: 99b6: 91 41 0a 00 mov 10(r1), 0(r1) ;0x0000a 99ba: 00 00 99bc: 0f 44 mov r4, r15 ; 99be: 0e 41 mov r1, r14 ; 99c0: 3e 50 12 00 add #18, r14 ;#0x0012 99c4: 0d 4a mov r10, r13 ; 99c6: 1c 41 08 00 mov 8(r1), r12 ; 99ca: b0 12 bc 96 call #-26948 ;#0x96bc 000099ce <.LVL59>: 99ce: 3c 93 cmp #-1, r12 ;r3 As==11 99d0: 71 20 jnz $+228 ;abs 0x9ab4 000099d2 <.L68>: 99d2: 3c 43 mov #-1, r12 ;r3 As==11 000099d4 <.L29>: 99d4: 31 50 14 00 add #20, r1 ;#0x0014 000099d8 <.LCFI18>: 99d8: 30 40 ee 8f br #0x8fee ; 000099dc <.L47>: 99dc: 36 4e mov @r14+, r6 ; 99de: 08 46 mov r6, r8 ; 99e0: 09 43 clr r9 ; 000099e2 <.LBB10>: 99e2: 8d 4e 00 00 mov r14, 0(r13) ; 99e6: 8a 3f jmp $-234 ;abs 0x98fc 000099e8 <.L33>: 99e8: ca 4c 39 00 mov.b r12, 57(r10) ; 0x0039 000099ec <.LBE10>: 99ec: 35 40 10 82 mov #-32240,r5 ;#0x8210 000099f0 <.L51>: 99f0: 2c 4a mov @r10, r12 ; 99f2: 2e 4d mov @r13, r14 ; 99f4: 1e 53 inc r14 ; 99f6: 1e c3 bic #1, r14 ;r3 As==01 99f8: 3c b0 80 00 bit #128, r12 ;#0x0080 99fc: 20 24 jz $+66 ;abs 0x9a3e 99fe: 07 4e mov r14, r7 ; 9a00: 27 52 add #4, r7 ;r2 As==10 9a02: 8d 47 00 00 mov r7, 0(r13) ; 9a06: 28 4e mov @r14, r8 ; 9a08: 19 4e 02 00 mov 2(r14), r9 ; 00009a0c <.L53>: 9a0c: 1c b3 bit #1, r12 ;r3 As==01 9a0e: 04 24 jz $+10 ;abs 0x9a18 00009a10 <.Loc.164.1>: 9a10: 3c d0 20 00 bis #32, r12 ;#0x0020 9a14: 8a 4c 00 00 mov r12, 0(r10) ; 00009a18 <.L55>: 9a18: 0c 48 mov r8, r12 ; 9a1a: 0c d9 bis r9, r12 ; 9a1c: 0c 93 cmp #0, r12 ;r3 As==00 9a1e: 03 20 jnz $+8 ;abs 0x9a26 00009a20 <.Loc.168.1>: 9a20: ba f0 df ff and #-33, 0(r10) ;#0xffdf 9a24: 00 00 00009a26 <.L75>: 9a26: 76 40 10 00 mov.b #16, r6 ;#0x0010 9a2a: 6f 3f jmp $-288 ;abs 0x990a 00009a2c <.L38>: 9a2c: ba d0 20 00 bis #32, 0(r10) ;#0x0020 9a30: 00 00 00009a32 <.L34>: 9a32: fa 40 78 00 mov.b #120, 57(r10) ;#0x0078, 0x0039 9a36: 39 00 00009a38 <.Loc.159.1>: 9a38: 35 40 21 82 mov #-32223,r5 ;#0x8221 9a3c: d9 3f jmp $-76 ;abs 0x99f0 00009a3e <.L52>: 9a3e: 3f 4e mov @r14+, r15 ; 00009a40 <.LVL68>: 9a40: 08 4f mov r15, r8 ; 9a42: 09 43 clr r9 ; 00009a44 <.Loc.161.1>: 9a44: 8d 4e 00 00 mov r14, 0(r13) ; 9a48: e1 3f jmp $-60 ;abs 0x9a0c 00009a4a <.L74>: 9a4a: 76 42 mov.b #8, r6 ;r2 As==11 9a4c: 5e 3f jmp $-322 ;abs 0x990a 00009a4e <.L39>: 9a4e: 29 4a mov @r10, r9 ; 9a50: 1e 4a 0a 00 mov 10(r10),r14 ;0x0000a 9a54: 2c 4d mov @r13, r12 ; 9a56: 0f 4c mov r12, r15 ; 00009a58 <.LVL71>: 9a58: 2f 53 incd r15 ; 00009a5a <.Loc.205.1>: 9a5a: 8d 4f 00 00 mov r15, 0(r13) ; 00009a5e <.Loc.205.1>: 9a5e: 2c 4c mov @r12, r12 ; 00009a60 <.Loc.204.1>: 9a60: 39 b0 80 00 bit #128, r9 ;#0x0080 9a64: 0d 24 jz $+28 ;abs 0x9a80 00009a66 <.Loc.205.1>: 9a66: 06 4e mov r14, r6 ; 9a68: 36 b0 00 80 bit #-32768,r6 ;#0x8000 9a6c: 07 77 subc r7, r7 ; 9a6e: 37 e3 inv r7 ; 9a70: 8c 46 00 00 mov r6, 0(r12) ; 9a74: 8c 47 02 00 mov r7, 2(r12) ; 00009a78 <.L32>: 9a78: 8a 43 08 00 mov #0, 8(r10) ;r3 As==00 00009a7c <.LBE11>: 9a7c: 07 4b mov r11, r7 ; 00009a7e <.LBB12>: 9a7e: 9b 3f jmp $-200 ;abs 0x99b6 00009a80 <.L63>: 9a80: 8c 4e 00 00 mov r14, 0(r12) ; 00009a84 <.LVL74>: 9a84: f9 3f jmp $-12 ;abs 0x9a78 00009a86 <.L37>: 9a86: 2c 4d mov @r13, r12 ; 9a88: 07 4c mov r12, r7 ; 9a8a: 27 53 incd r7 ; 9a8c: 8d 47 00 00 mov r7, 0(r13) ; 9a90: 27 4c mov @r12, r7 ; 00009a92 <.LVL76>: 9a92: 1e 4a 02 00 mov 2(r10), r14 ; 9a96: 4d 43 clr.b r13 ; 00009a98 <.LVL77>: 9a98: 0c 47 mov r7, r12 ; 9a9a: b0 12 12 9b call #-25838 ;#0x9b12 00009a9e <.LVL78>: 9a9e: 0c 93 cmp #0, r12 ;r3 As==00 9aa0: 03 24 jz $+8 ;abs 0x9aa8 00009aa2 <.Loc.222.1>: 9aa2: 0c 87 sub r7, r12 ; 00009aa4 <.LVL79>: 9aa4: 8a 4c 02 00 mov r12, 2(r10) ; 00009aa8 <.L65>: 9aa8: 9a 4a 02 00 mov 2(r10), 8(r10) ; 9aac: 08 00 00009aae <.L42>: 9aae: ca 43 37 00 mov.b #0, 55(r10) ;r3 As==00, 0x0037 00009ab2 <.Loc.233.1>: 9ab2: 81 3f jmp $-252 ;abs 0x99b6 00009ab4 <.L66>: 9ab4: 1f 4a 08 00 mov 8(r10), r15 ; 9ab8: 0e 47 mov r7, r14 ; 9aba: 0d 44 mov r4, r13 ; 9abc: 1c 41 08 00 mov 8(r1), r12 ; 00009ac0 <.LVL82>: 9ac0: 18 41 0a 00 mov 10(r1), r8 ;0x0000a 9ac4: 88 12 call r8 ; 00009ac6 <.LVL83>: 9ac6: 3c 93 cmp #-1, r12 ;r3 As==11 9ac8: 84 27 jz $-246 ;abs 0x99d2 00009aca <.Loc.241.1>: 9aca: ea b3 00 00 bit.b #2, 0(r10) ;r3 As==10 9ace: 1a 20 jnz $+54 ;abs 0x9b04 00009ad0 <.L72>: 9ad0: 1d 41 12 00 mov 18(r1), r13 ;0x00012 9ad4: 1c 4a 06 00 mov 6(r10), r12 ; 9ad8: 0c 9d cmp r13, r12 ; 9ada: 7c 37 jge $-262 ;abs 0x99d4 9adc: 0c 4d mov r13, r12 ; 9ade: 7a 3f jmp $-266 ;abs 0x99d4 00009ae0 <.L71>: 9ae0: 0f 47 mov r7, r15 ; 9ae2: 0e 48 mov r8, r14 ; 9ae4: 0d 44 mov r4, r13 ; 9ae6: 1c 41 08 00 mov 8(r1), r12 ; 9aea: 16 41 0a 00 mov 10(r1), r6 ;0x0000a 9aee: 86 12 call r6 ; 00009af0 <.LVL86>: 9af0: 3c 93 cmp #-1, r12 ;r3 As==11 9af2: 6f 27 jz $-288 ;abs 0x99d2 00009af4 <.Loc.244.1>: 9af4: 19 53 inc r9 ; 00009af6 <.L69>: 9af6: 1c 4a 06 00 mov 6(r10), r12 ; 9afa: 1c 81 12 00 sub 18(r1), r12 ;0x00012 9afe: 09 9c cmp r12, r9 ; 9b00: ef 3b jl $-32 ;abs 0x9ae0 9b02: e6 3f jmp $-50 ;abs 0x9ad0 00009b04 <.L77>: 9b04: 49 43 clr.b r9 ; 9b06: 08 4a mov r10, r8 ; 9b08: 38 50 0d 00 add #13, r8 ;#0x000d 9b0c: 57 43 mov.b #1, r7 ;r3 As==01 00009b0e <.LVL89>: 9b0e: f3 3f jmp $-24 ;abs 0x9af6 00009b10 : ... 00009b12 : 9b12: 3d f0 ff 00 and #255, r13 ;#0x00ff 00009b16 <.LVL2>: 9b16: 0f 4c mov r12, r15 ; 9b18: 0e 5c add r12, r14 ; 00009b1a <.L2>: 9b1a: 0c 4f mov r15, r12 ; 00009b1c <.LVL4>: 9b1c: 0f 9e cmp r14, r15 ; 9b1e: 02 20 jnz $+6 ;abs 0x9b24 00009b20 <.Loc.133.1>: 9b20: 4c 43 clr.b r12 ; 00009b22 <.LVL5>: 9b22: 04 3c jmp $+10 ;abs 0x9b2c 00009b24 <.L4>: 9b24: 1f 53 inc r15 ; 00009b26 <.Loc.128.1>: 9b26: cc 9d 00 00 cmp.b r13, 0(r12) ; 9b2a: f7 23 jnz $-16 ;abs 0x9b1a 00009b2c <.L1>: 9b2c: 30 41 ret 00009b2e : 9b2e: 0a 12 push r10 ; 00009b30 : 9b30: 09 12 push r9 ; 00009b32 <.LCFI1>: 9b32: 0d 9c cmp r12, r13 ; 9b34: 1e 2c jc $+62 ;abs 0x9b72 00009b36 <.Loc.69.1>: 9b36: 0a 4d mov r13, r10 ; 9b38: 0a 5e add r14, r10 ; 00009b3a <.Loc.69.1>: 9b3a: 0c 9a cmp r10, r12 ; 9b3c: 1a 2c jc $+54 ;abs 0x9b72 00009b3e <.LVL2>: 9b3e: 09 4e mov r14, r9 ; 9b40: 39 e3 inv r9 ; 00009b42 <.Loc.74.1>: 9b42: 4d 43 clr.b r13 ; 00009b44 <.L3>: 9b44: 3d 53 add #-1, r13 ;r3 As==11 00009b46 <.LVL4>: 9b46: 09 9d cmp r13, r9 ; 9b48: 02 20 jnz $+6 ;abs 0x9b4e 00009b4a <.L10>: 9b4a: 30 40 f8 8f br #0x8ff8 ; 00009b4e <.L4>: 9b4e: 0f 4e mov r14, r15 ; 9b50: 0f 5d add r13, r15 ; 9b52: 0f 5c add r12, r15 ; 9b54: 0b 4a mov r10, r11 ; 9b56: 0b 5d add r13, r11 ; 00009b58 <.LVL7>: 9b58: ef 4b 00 00 mov.b @r11, 0(r15) ; 9b5c: f3 3f jmp $-24 ;abs 0x9b44 00009b5e <.L6>: 9b5e: 0b 4d mov r13, r11 ; 9b60: 0b 5f add r15, r11 ; 00009b62 <.Loc.83.1>: 9b62: 0a 4c mov r12, r10 ; 9b64: 0a 5f add r15, r10 ; 9b66: ea 4b 00 00 mov.b @r11, 0(r10) ; 9b6a: 1f 53 inc r15 ; 00009b6c <.L5>: 9b6c: 0e 9f cmp r15, r14 ; 9b6e: f7 23 jnz $-16 ;abs 0x9b5e 9b70: ec 3f jmp $-38 ;abs 0x9b4a 00009b72 <.L9>: 9b72: 4f 43 clr.b r15 ; 9b74: fb 3f jmp $-8 ;abs 0x9b6c 00009b76 <_free_r>: 9b76: 0a 12 push r10 ; 00009b78 <.LCFI0>: 9b78: 09 12 push r9 ; 00009b7a <.LCFI1>: 9b7a: 08 12 push r8 ; 00009b7c : 9b7c: 07 12 push r7 ; 00009b7e <.LCFI3>: 9b7e: 0d 93 cmp #0, r13 ;r3 As==00 9b80: 27 24 jz $+80 ;abs 0x9bd0 00009b82 <.LBB4>: 9b82: 0e 4d mov r13, r14 ; 9b84: 3e 50 fc ff add #-4, r14 ;#0xfffc 00009b88 <.LVL2>: 9b88: 1f 4d fc ff mov -4(r13),r15 ; 00009b8c <.Loc.193.1>: 9b8c: 8d 93 fe ff cmp #0, -2(r13) ;r3 As==00, 0xfffe 9b90: 01 34 jge $+4 ;abs 0x9b94 00009b92 <.Loc.193.1>: 9b92: 0e 5f add r15, r14 ; 00009b94 <.L4>: 9b94: 1d 42 d8 02 mov &0x02d8,r13 ;0x02d8 00009b98 <.LVL4>: 9b98: 0d 93 cmp #0, r13 ;r3 As==00 9b9a: 03 20 jnz $+8 ;abs 0x9ba2 00009b9c <.L8>: 9b9c: 8e 4d 04 00 mov r13, 4(r14) ; 9ba0: 15 3c jmp $+44 ;abs 0x9bcc 00009ba2 <.L6>: 9ba2: 0e 9d cmp r13, r14 ; 9ba4: 17 2c jc $+48 ;abs 0x9bd4 00009ba6 <.Loc.359.1>: 9ba6: 2a 4e mov @r14, r10 ; 9ba8: 1b 4e 02 00 mov 2(r14), r11 ; 00009bac <.Loc.359.1>: 9bac: 0c 4e mov r14, r12 ; 00009bae <.LVL7>: 9bae: 0c 5a add r10, r12 ; 00009bb0 <.Loc.359.1>: 9bb0: 0d 9c cmp r12, r13 ; 9bb2: f4 23 jnz $-22 ;abs 0x9b9c 00009bb4 <.Loc.363.1>: 9bb4: 08 4a mov r10, r8 ; 9bb6: 09 4b mov r11, r9 ; 9bb8: 28 5d add @r13, r8 ; 9bba: 19 6d 02 00 addc 2(r13), r9 ; 9bbe: 8e 48 00 00 mov r8, 0(r14) ; 9bc2: 8e 49 02 00 mov r9, 2(r14) ; 00009bc6 <.Loc.364.1>: 9bc6: 9e 4d 04 00 mov 4(r13), 4(r14) ; 9bca: 04 00 00009bcc <.L9>: 9bcc: 82 4e d8 02 mov r14, &0x02d8 ; 00009bd0 <.L1>: 9bd0: 30 40 f4 8f br #0x8ff4 ; 00009bd4 <.L7>: 9bd4: 0f 4d mov r13, r15 ; 00009bd6 <.Loc.381.1>: 9bd6: 1d 4d 04 00 mov 4(r13), r13 ; 00009bda <.LVL10>: 9bda: 0d 93 cmp #0, r13 ;r3 As==00 9bdc: 02 24 jz $+6 ;abs 0x9be2 00009bde <.Loc.382.1>: 9bde: 0e 9d cmp r13, r14 ; 9be0: f9 2f jc $-12 ;abs 0x9bd4 00009be2 <.L10>: 9be2: 29 4f mov @r15, r9 ; 9be4: 17 4f 02 00 mov 2(r15), r7 ; 00009be8 <.Loc.387.1>: 9be8: 08 4f mov r15, r8 ; 9bea: 08 59 add r9, r8 ; 00009bec <.Loc.387.1>: 9bec: 08 9e cmp r14, r8 ; 9bee: 1a 20 jnz $+54 ;abs 0x9c24 00009bf0 <.Loc.391.1>: 9bf0: 0a 49 mov r9, r10 ; 9bf2: 2a 5e add @r14, r10 ; 9bf4: 1b 4e 02 00 mov 2(r14), r11 ; 9bf8: 0b 67 addc r7, r11 ; 9bfa: 8f 4a 00 00 mov r10, 0(r15) ; 9bfe: 8f 4b 02 00 mov r11, 2(r15) ; 00009c02 <.Loc.394.1>: 9c02: 0c 4f mov r15, r12 ; 00009c04 <.LVL11>: 9c04: 0c 5a add r10, r12 ; 00009c06 <.Loc.394.1>: 9c06: 0d 9c cmp r12, r13 ; 9c08: e3 23 jnz $-56 ;abs 0x9bd0 00009c0a <.Loc.396.1>: 9c0a: 08 4a mov r10, r8 ; 9c0c: 09 4b mov r11, r9 ; 9c0e: 28 5d add @r13, r8 ; 9c10: 19 6d 02 00 addc 2(r13), r9 ; 9c14: 8f 48 00 00 mov r8, 0(r15) ; 9c18: 8f 49 02 00 mov r9, 2(r15) ; 00009c1c <.Loc.397.1>: 9c1c: 9f 4d 04 00 mov 4(r13), 4(r15) ; 9c20: 04 00 9c22: d6 3f jmp $-82 ;abs 0x9bd0 00009c24 <.L11>: 9c24: 0e 98 cmp r8, r14 ; 9c26: 04 2c jc $+10 ;abs 0x9c30 00009c28 <.Loc.404.1>: 9c28: bc 40 0c 00 mov #12, 0(r12) ;#0x000c 9c2c: 00 00 00009c2e <.Loc.405.1>: 9c2e: d0 3f jmp $-94 ;abs 0x9bd0 00009c30 <.L13>: 9c30: 2a 4e mov @r14, r10 ; 9c32: 1b 4e 02 00 mov 2(r14), r11 ; 00009c36 <.Loc.409.1>: 9c36: 0c 4e mov r14, r12 ; 00009c38 <.LVL13>: 9c38: 0c 5a add r10, r12 ; 00009c3a <.Loc.409.1>: 9c3a: 0d 9c cmp r12, r13 ; 9c3c: 0f 20 jnz $+32 ;abs 0x9c5c 00009c3e <.Loc.413.1>: 9c3e: 08 4a mov r10, r8 ; 9c40: 09 4b mov r11, r9 ; 9c42: 28 5d add @r13, r8 ; 9c44: 19 6d 02 00 addc 2(r13), r9 ; 9c48: 8e 48 00 00 mov r8, 0(r14) ; 9c4c: 8e 49 02 00 mov r9, 2(r14) ; 00009c50 <.Loc.414.1>: 9c50: 9e 4d 04 00 mov 4(r13), 4(r14) ; 9c54: 04 00 00009c56 <.L20>: 9c56: 8f 4e 04 00 mov r14, 4(r15) ; 00009c5a <.Loc.424.1>: 9c5a: ba 3f jmp $-138 ;abs 0x9bd0 00009c5c <.L14>: 9c5c: 8e 4d 04 00 mov r13, 4(r14) ; 9c60: fa 3f jmp $-10 ;abs 0x9c56 00009c62 <_malloc_r>: 9c62: 0a 12 push r10 ; 00009c64 <.LCFI0>: 9c64: 09 12 push r9 ; 00009c66 <.LCFI1>: 9c66: 08 12 push r8 ; 00009c68 <.LCFI2>: 9c68: 07 12 push r7 ; 00009c6a <.LCFI3>: 9c6a: 08 4c mov r12, r8 ; 00009c6c : 9c6c: 09 4d mov r13, r9 ; 9c6e: 19 53 inc r9 ; 00009c70 <.Loc.247.1>: 9c70: 19 c3 bic #1, r9 ;r3 As==01 00009c72 <.LVL1>: 9c72: 39 50 0a 00 add #10, r9 ;#0x000a 00009c76 <.LVL2>: 9c76: 39 90 0c 00 cmp #12, r9 ;#0x000c 9c7a: 02 2c jc $+6 ;abs 0x9c80 9c7c: 79 40 0c 00 mov.b #12, r9 ;#0x000c 00009c80 <.L2>: 9c80: 09 9d cmp r13, r9 ; 9c82: 06 2c jc $+14 ;abs 0x9c90 00009c84 <.L13>: 9c84: b8 40 0c 00 mov #12, 0(r8) ;#0x000c 9c88: 00 00 00009c8a <.Loc.255.1>: 9c8a: 4c 43 clr.b r12 ; 00009c8c <.L1>: 9c8c: 30 40 f4 8f br #0x8ff4 ; 00009c90 <.L3>: 9c90: 1c 42 d8 02 mov &0x02d8,r12 ;0x02d8 00009c94 <.LVL6>: 9c94: 0a 4c mov r12, r10 ; 00009c96 <.L5>: 9c96: 0a 93 cmp #0, r10 ;r3 As==00 9c98: 1b 20 jnz $+56 ;abs 0x9cd0 00009c9a <.LBB5>: 9c9a: 37 40 a2 9d mov #-25182,r7 ;#0x9da2 00009c9e <.Loc.214.1>: 9c9e: 82 93 d6 02 cmp #0, &0x02d6 ;r3 As==00 9ca2: 05 20 jnz $+12 ;abs 0x9cae 00009ca4 <.Loc.214.1>: 9ca4: 0d 4a mov r10, r13 ; 9ca6: 0c 48 mov r8, r12 ; 00009ca8 <.LVL9>: 9ca8: 87 12 call r7 ; 00009caa <.LVL10>: 9caa: 82 4c d6 02 mov r12, &0x02d6 ; 00009cae <.L17>: 9cae: 0d 49 mov r9, r13 ; 9cb0: 0c 48 mov r8, r12 ; 9cb2: 87 12 call r7 ; 00009cb4 <.LVL11>: 9cb4: 3c 93 cmp #-1, r12 ;r3 As==11 9cb6: e6 27 jz $-50 ;abs 0x9c84 00009cb8 <.Loc.222.1>: 9cb8: 0a 4c mov r12, r10 ; 9cba: 1a 53 inc r10 ; 9cbc: 1a c3 bic #1, r10 ;r3 As==01 00009cbe <.LVL12>: 9cbe: 0c 9a cmp r10, r12 ; 9cc0: 19 24 jz $+52 ;abs 0x9cf4 00009cc2 <.Loc.227.1>: 9cc2: 0d 4a mov r10, r13 ; 9cc4: 0d 8c sub r12, r13 ; 9cc6: 0c 48 mov r8, r12 ; 00009cc8 <.LVL13>: 9cc8: 87 12 call r7 ; 00009cca <.LVL14>: 9cca: 3c 93 cmp #-1, r12 ;r3 As==11 9ccc: 13 20 jnz $+40 ;abs 0x9cf4 9cce: da 3f jmp $-74 ;abs 0x9c84 00009cd0 <.L10>: 9cd0: 2d 4a mov @r10, r13 ; 9cd2: 0d 89 sub r9, r13 ; 00009cd4 <.LVL16>: 9cd4: 0d 93 cmp #0, r13 ;r3 As==00 9cd6: 35 38 jl $+108 ;abs 0x9d42 00009cd8 <.Loc.268.1>: 9cd8: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 9cdc: 0e 9d cmp r13, r14 ; 9cde: 11 2c jc $+36 ;abs 0x9d02 00009ce0 <.Loc.272.1>: 9ce0: 0e 4d mov r13, r14 ; 9ce2: 3e b0 00 80 bit #-32768,r14 ;#0x8000 9ce6: 0f 7f subc r15, r15 ; 9ce8: 3f e3 inv r15 ; 9cea: 8a 4e 00 00 mov r14, 0(r10) ; 9cee: 8a 4f 02 00 mov r15, 2(r10) ; 00009cf2 <.Loc.273.1>: 9cf2: 0a 5d add r13, r10 ; 00009cf4 <.L14>: 9cf4: 0c 49 mov r9, r12 ; 9cf6: 0d 43 clr r13 ; 9cf8: 8a 4c 00 00 mov r12, 0(r10) ; 9cfc: 8a 4d 02 00 mov r13, 2(r10) ; 9d00: 06 3c jmp $+14 ;abs 0x9d0e 00009d02 <.L7>: 9d02: 1d 4a 04 00 mov 4(r10), r13 ; 00009d06 <.LVL19>: 9d06: 0c 9a cmp r10, r12 ; 9d08: 19 20 jnz $+52 ;abs 0x9d3c 00009d0a <.Loc.282.1>: 9d0a: 82 4d d8 02 mov r13, &0x02d8 ; 00009d0e <.L8>: 9d0e: 0d 4a mov r10, r13 ; 9d10: 2d 52 add #4, r13 ;r2 As==10 00009d12 <.LVL21>: 9d12: 0c 4a mov r10, r12 ; 9d14: 3c 50 0b 00 add #11, r12 ;#0x000b 9d18: 3c f0 f8 ff and #-8, r12 ;#0xfff8 00009d1c <.LVL22>: 9d1c: 0e 4c mov r12, r14 ; 9d1e: 0e 8d sub r13, r14 ; 00009d20 <.LVL23>: 9d20: 0c 9d cmp r13, r12 ; 9d22: b4 27 jz $-150 ;abs 0x9c8c 00009d24 <.Loc.318.1>: 9d24: 0a 5e add r14, r10 ; 00009d26 <.LVL24>: 9d26: 0d 8c sub r12, r13 ; 00009d28 <.LVL25>: 9d28: 0e 4d mov r13, r14 ; 9d2a: 3e b0 00 80 bit #-32768,r14 ;#0x8000 9d2e: 0f 7f subc r15, r15 ; 9d30: 3f e3 inv r15 ; 00009d32 <.LVL26>: 9d32: 8a 4e 00 00 mov r14, 0(r10) ; 9d36: 8a 4f 02 00 mov r15, 2(r10) ; 9d3a: a8 3f jmp $-174 ;abs 0x9c8c 00009d3c <.L9>: 9d3c: 8c 4d 04 00 mov r13, 4(r12) ; 9d40: e6 3f jmp $-50 ;abs 0x9d0e 00009d42 <.L6>: 9d42: 0c 4a mov r10, r12 ; 9d44: 1a 4a 04 00 mov 4(r10), r10 ; 00009d48 <.LVL29>: 9d48: a6 3f jmp $-178 ;abs 0x9c96 00009d4a <_realloc_r>: 9d4a: 0a 12 push r10 ; 00009d4c <.LCFI0>: 9d4c: 09 12 push r9 ; 00009d4e <.LCFI1>: 9d4e: 08 12 push r8 ; 00009d50 <.LCFI2>: 9d50: 07 12 push r7 ; 00009d52 <.LCFI3>: 9d52: 07 4c mov r12, r7 ; 00009d54 : 9d54: 08 4d mov r13, r8 ; 9d56: 09 4e mov r14, r9 ; 00009d58 <.Loc.451.1>: 9d58: 0d 93 cmp #0, r13 ;r3 As==00 9d5a: 07 20 jnz $+16 ;abs 0x9d6a 00009d5c <.Loc.454.1>: 9d5c: 0d 4e mov r14, r13 ; 00009d5e <.LVL1>: 9d5e: b0 12 62 9c call #-25502 ;#0x9c62 00009d62 <.LVL2>: 9d62: 0a 4c mov r12, r10 ; 00009d64 <.L1>: 9d64: 0c 4a mov r10, r12 ; 9d66: 30 40 f4 8f br #0x8ff4 ; 00009d6a <.L2>: 9d6a: 0e 93 cmp #0, r14 ;r3 As==00 9d6c: 04 20 jnz $+10 ;abs 0x9d76 00009d6e <.Loc.458.1>: 9d6e: b0 12 76 9b call #-25738 ;#0x9b76 00009d72 <.LVL3>: 9d72: 0a 49 mov r9, r10 ; 9d74: f7 3f jmp $-16 ;abs 0x9d64 00009d76 <.L4>: 9d76: b0 12 c4 9d call #-25148 ;#0x9dc4 00009d7a <.LVL4>: 9d7a: 0c 99 cmp r9, r12 ; 9d7c: 10 2c jc $+34 ;abs 0x9d9e 00009d7e <.Loc.467.1>: 9d7e: 0d 49 mov r9, r13 ; 9d80: 0c 47 mov r7, r12 ; 9d82: b0 12 62 9c call #-25502 ;#0x9c62 00009d86 <.LVL5>: 9d86: 0a 4c mov r12, r10 ; 00009d88 <.LVL6>: 9d88: 0c 93 cmp #0, r12 ;r3 As==00 9d8a: ec 27 jz $-38 ;abs 0x9d64 00009d8c <.Loc.470.1>: 9d8c: 0e 49 mov r9, r14 ; 9d8e: 0d 48 mov r8, r13 ; 9d90: b0 12 4a 90 call #-28598 ;#0x904a 00009d94 <.LVL7>: 9d94: 0d 48 mov r8, r13 ; 9d96: 0c 47 mov r7, r12 ; 9d98: b0 12 76 9b call #-25738 ;#0x9b76 00009d9c <.LVL8>: 9d9c: e3 3f jmp $-56 ;abs 0x9d64 00009d9e <.L5>: 9d9e: 0a 48 mov r8, r10 ; 9da0: e1 3f jmp $-60 ;abs 0x9d64 00009da2 <_sbrk_r>: 9da2: 0a 12 push r10 ; 00009da4 <.LCFI0>: 9da4: 0a 4c mov r12, r10 ; 9da6: 0c 4d mov r13, r12 ; 00009da8 : 9da8: 82 43 da 02 mov #0, &0x02da ;r3 As==00 00009dac <.Loc.58.1>: 9dac: b0 12 d8 9d call #-25128 ;#0x9dd8 00009db0 <.LVL2>: 9db0: 3c 93 cmp #-1, r12 ;r3 As==11 9db2: 06 20 jnz $+14 ;abs 0x9dc0 00009db4 <.Loc.58.1>: 9db4: 1d 42 da 02 mov &0x02da,r13 ;0x02da 00009db8 <.Loc.58.1>: 9db8: 0d 93 cmp #0, r13 ;r3 As==00 9dba: 02 24 jz $+6 ;abs 0x9dc0 00009dbc <.Loc.59.1>: 9dbc: 8a 4d 00 00 mov r13, 0(r10) ; 00009dc0 <.L1>: 9dc0: 3a 41 pop r10 ; 00009dc2 <.LCFI1>: 9dc2: 30 41 ret 00009dc4 <_malloc_usable_size_r>: 9dc4: 1e 4d fc ff mov -4(r13),r14 ; 00009dc8 <.Loc.530.1>: 9dc8: 0c 4e mov r14, r12 ; 00009dca <.LVL3>: 9dca: 3c 50 fc ff add #-4, r12 ;#0xfffc 00009dce <.Loc.530.1>: 9dce: 0e 93 cmp #0, r14 ;r3 As==00 9dd0: 02 34 jge $+6 ;abs 0x9dd6 00009dd2 <.LVL4>: 9dd2: 0d 5c add r12, r13 ; 00009dd4 <.LVL5>: 9dd4: 2c 5d add @r13, r12 ; 00009dd6 <.L1>: 9dd6: 30 41 ret 00009dd8 <_sbrk>: 9dd8: 21 83 decd r1 ; 00009dda <.LCFI0>: 9dda: 0d 4c mov r12, r13 ; 00009ddc <.Loc.17.1>: 9ddc: 1c 42 7c 02 mov &0x027c,r12 ;0x027c 00009de0 <.LVL1>: 9de0: 4e 43 clr.b r14 ; 9de2: 0e 51 add r1, r14 ; 9de4: 81 4e 00 00 mov r14, 0(r1) ; 00009de8 <.Loc.22.1>: 9de8: 0d 5c add r12, r13 ; 00009dea <.LVL2>: 9dea: 0e 41 mov r1, r14 ; 9dec: 0e 9d cmp r13, r14 ; 9dee: 09 2c jc $+20 ;abs 0x9e02 00009df0 <.LBB7>: 9df0: 7e 40 1a 00 mov.b #26, r14 ;#0x001a 9df4: 3d 40 32 82 mov #-32206,r13 ;#0x8232 9df8: 5c 43 mov.b #1, r12 ;r3 As==01 00009dfa <.LVL4>: 9dfa: b0 12 0a 9e call #-25078 ;#0x9e0a 00009dfe <.LVL5>: 9dfe: b0 12 d6 9e call #-24874 ;#0x9ed6 00009e02 <.L2>: 9e02: 82 4d 7c 02 mov r13, &0x027c ; 00009e06 <.Loc.30.1>: 9e06: 21 53 incd r1 ; 00009e08 <.LCFI1>: 9e08: 30 41 ret 00009e0a : 9e0a: 0a 12 push r10 ; 00009e0c <.LCFI0>: 9e0c: 09 12 push r9 ; 00009e0e <.LCFI1>: 9e0e: 08 12 push r8 ; 00009e10 <.LCFI2>: 9e10: 07 12 push r7 ; 00009e12 <.LCFI3>: 9e12: 06 12 push r6 ; 00009e14 <.LCFI4>: 9e14: 05 12 push r5 ; 00009e16 <.LCFI5>: 9e16: 04 12 push r4 ; 00009e18 <.LCFI6>: 9e18: 21 83 decd r1 ; 00009e1a <.LCFI7>: 9e1a: 06 4c mov r12, r6 ; 9e1c: 81 4d 00 00 mov r13, 0(r1) ; 9e20: 0a 4e mov r14, r10 ; 00009e22 <.LBB5>: 9e22: 7d 42 mov.b #8, r13 ;r2 As==11 00009e24 <.LVL2>: 9e24: b0 12 7c 9f call #-24708 ;#0x9f7c 00009e28 <.LVL3>: 9e28: 47 4c mov.b r12, r7 ; 00009e2a <.LBE5>: 9e2a: 45 43 clr.b r5 ; 00009e2c <.LBB10>: 9e2c: 39 40 7e 02 mov #638, r9 ;#0x027e 00009e30 <.Loc.28.1>: 9e30: 04 49 mov r9, r4 ; 9e32: 34 50 0b 00 add #11, r4 ;#0x000b 00009e36 <.L2>: 9e36: 4c 43 clr.b r12 ; 9e38: 0c 9a cmp r10, r12 ; 9e3a: 04 38 jl $+10 ;abs 0x9e44 00009e3c <.Loc.60.1>: 9e3c: 0c 45 mov r5, r12 ; 9e3e: 21 53 incd r1 ; 00009e40 <.LCFI8>: 9e40: 30 40 ee 8f br #0x8fee ; 00009e44 <.L4>: 9e44: 08 4a mov r10, r8 ; 9e46: 7c 40 40 00 mov.b #64, r12 ;#0x0040 9e4a: 0c 9a cmp r10, r12 ; 9e4c: 01 34 jge $+4 ;abs 0x9e50 00009e4e <.LVL7>: 9e4e: 08 4c mov r12, r8 ; 00009e50 <.L3>: 9e50: 4c 48 mov.b r8, r12 ; 9e52: c9 4c 00 00 mov.b r12, 0(r9) ; 00009e56 <.Loc.22.1>: 9e56: c2 43 7f 02 mov.b #0, &0x027f ;r3 As==00 00009e5a <.Loc.23.1>: 9e5a: f2 40 f3 ff mov.b #-13, &0x0280 ;#0xfff3 9e5e: 80 02 00009e60 <.Loc.24.1>: 9e60: c9 46 03 00 mov.b r6, 3(r9) ; 00009e64 <.Loc.25.1>: 9e64: c9 47 04 00 mov.b r7, 4(r9) ; 00009e68 <.Loc.26.1>: 9e68: c9 4c 05 00 mov.b r12, 5(r9) ; 00009e6c <.Loc.27.1>: 9e6c: c2 43 84 02 mov.b #0, &0x0284 ;r3 As==00 00009e70 <.Loc.28.1>: 9e70: 0e 48 mov r8, r14 ; 9e72: 2d 41 mov @r1, r13 ; 9e74: 0d 55 add r5, r13 ; 00009e76 <.LVL9>: 9e76: 0c 44 mov r4, r12 ; 9e78: b0 12 4a 90 call #-28598 ;#0x904a 00009e7c <.LVL10>: 9e7c: b0 12 86 9e call #-24954 ;#0x9e86 00009e80 <.LBE11>: 9e80: 05 58 add r8, r5 ; 00009e82 <.LVL12>: 9e82: 0a 88 sub r8, r10 ; 00009e84 <.LVL13>: 9e84: d8 3f jmp $-78 ;abs 0x9e36 00009e86 : 9e86: 03 43 nop 00009e88 : 9e88: 30 41 ret 00009e8a <__mspabi_mpyl>: 9e8a: 0a 12 push r10 ; 00009e8c <.LCFI0>: 9e8c: 09 12 push r9 ; 00009e8e <.LCFI1>: 9e8e: 08 12 push r8 ; 00009e90 <.LCFI2>: 9e90: 07 12 push r7 ; 00009e92 <.LCFI3>: 9e92: 06 12 push r6 ; 00009e94 <.LCFI4>: 9e94: 0a 4c mov r12, r10 ; 9e96: 0b 4d mov r13, r11 ; 00009e98 <.LVL1>: 9e98: 78 40 21 00 mov.b #33, r8 ;#0x0021 00009e9c <.Loc.30.1>: 9e9c: 4c 43 clr.b r12 ; 00009e9e <.LVL2>: 9e9e: 4d 43 clr.b r13 ; 00009ea0 <.L2>: 9ea0: 09 4e mov r14, r9 ; 9ea2: 09 df bis r15, r9 ; 9ea4: 09 93 cmp #0, r9 ;r3 As==00 9ea6: 05 24 jz $+12 ;abs 0x9eb2 9ea8: 49 48 mov.b r8, r9 ; 9eaa: 79 53 add.b #-1, r9 ;r3 As==11 9eac: 48 49 mov.b r9, r8 ; 00009eae <.LVL4>: 9eae: 49 93 cmp.b #0, r9 ;r3 As==00 9eb0: 02 20 jnz $+6 ;abs 0x9eb6 00009eb2 <.L1>: 9eb2: 30 40 f2 8f br #0x8ff2 ; 00009eb6 <.L6>: 9eb6: 09 4e mov r14, r9 ; 9eb8: 59 f3 and.b #1, r9 ;r3 As==01 00009eba <.Loc.36.1>: 9eba: 09 93 cmp #0, r9 ;r3 As==00 9ebc: 02 24 jz $+6 ;abs 0x9ec2 00009ebe <.Loc.37.1>: 9ebe: 0c 5a add r10, r12 ; 00009ec0 <.LVL5>: 9ec0: 0d 6b addc r11, r13 ; 00009ec2 <.L3>: 9ec2: 06 4a mov r10, r6 ; 9ec4: 07 4b mov r11, r7 ; 9ec6: 06 5a add r10, r6 ; 9ec8: 07 6b addc r11, r7 ; 9eca: 0a 46 mov r6, r10 ; 00009ecc <.LVL7>: 9ecc: 0b 47 mov r7, r11 ; 00009ece <.LVL8>: 9ece: 12 c3 clrc 9ed0: 0f 10 rrc r15 ; 9ed2: 0e 10 rrc r14 ; 00009ed4 <.LVL9>: 9ed4: e5 3f jmp $-52 ;abs 0x9ea0 00009ed6 : 9ed6: 00009ed8 : 9ed8: 06 00 mova @r0, r6 ; 9eda: b0 12 42 9f call #-24766 ;#0x9f42 00009ede <.LVL0>: 9ede: 5c 43 mov.b #1, r12 ;r3 As==01 9ee0: b0 12 96 9f call #-24682 ;#0x9f96 00009ee4 <_raise_r>: 9ee4: 0a 12 push r10 ; 00009ee6 <.LCFI7>: 9ee6: 09 12 push r9 ; 00009ee8 <.LCFI8>: 9ee8: 09 4c mov r12, r9 ; 9eea: 0a 4d mov r13, r10 ; 00009eec <.Loc.149.1>: 9eec: 7c 40 1f 00 mov.b #31, r12 ;#0x001f 00009ef0 <.LVL16>: 9ef0: 0c 9d cmp r13, r12 ; 9ef2: 06 2c jc $+14 ;abs 0x9f00 00009ef4 <.Loc.153.1>: 9ef4: b9 40 16 00 mov #22, 0(r9) ;#0x0016 9ef8: 00 00 00009efa <.Loc.154.1>: 9efa: 3c 43 mov #-1, r12 ;r3 As==11 00009efc <.L16>: 9efc: 30 40 f8 8f br #0x8ff8 ; 00009f00 <.L17>: 9f00: 1c 49 22 00 mov 34(r9), r12 ;0x00022 00009f04 <.Loc.157.1>: 9f04: 0c 93 cmp #0, r12 ;r3 As==00 9f06: 05 24 jz $+12 ;abs 0x9f12 00009f08 <.Loc.160.1>: 9f08: 0d 5d rla r13 ; 9f0a: 0c 5d add r13, r12 ; 00009f0c <.Loc.160.1>: 9f0c: 2d 4c mov @r12, r13 ; 00009f0e <.LVL18>: 9f0e: 0d 93 cmp #0, r13 ;r3 As==00 9f10: 09 20 jnz $+20 ;abs 0x9f24 00009f12 <.L19>: 9f12: 0c 49 mov r9, r12 ; 9f14: b0 12 72 9f call #-24718 ;#0x9f72 00009f18 <.LVL20>: 9f18: 0e 4a mov r10, r14 ; 9f1a: 0d 4c mov r12, r13 ; 9f1c: 0c 49 mov r9, r12 ; 9f1e: b0 12 4e 9f call #-24754 ;#0x9f4e 00009f22 <.LVL21>: 9f22: ec 3f jmp $-38 ;abs 0x9efc 00009f24 <.L20>: 9f24: 1d 93 cmp #1, r13 ;r3 As==01 9f26: 0b 24 jz $+24 ;abs 0x9f3e 00009f28 <.Loc.166.1>: 9f28: 3d 93 cmp #-1, r13 ;r3 As==11 9f2a: 05 20 jnz $+12 ;abs 0x9f36 00009f2c <.Loc.168.1>: 9f2c: b9 40 16 00 mov #22, 0(r9) ;#0x0016 9f30: 00 00 00009f32 <.Loc.169.1>: 9f32: 5c 43 mov.b #1, r12 ;r3 As==01 9f34: e3 3f jmp $-56 ;abs 0x9efc 00009f36 <.L21>: 9f36: 8c 43 00 00 mov #0, 0(r12) ;r3 As==00 00009f3a <.Loc.174.1>: 9f3a: 0c 4a mov r10, r12 ; 9f3c: 8d 12 call r13 ; 00009f3e <.L22>: 9f3e: 4c 43 clr.b r12 ; 9f40: dd 3f jmp $-68 ;abs 0x9efc 00009f42 : 9f42: 0d 4c mov r12, r13 ; 9f44: 1c 42 02 02 mov &0x0202,r12 ;0x0202 00009f48 : 9f48: b0 12 e4 9e call #-24860 ;#0x9ee4 00009f4c <.LVL35>: 9f4c: 30 41 ret 00009f4e <_kill_r>: 9f4e: 0a 12 push r10 ; 00009f50 <.LCFI0>: 9f50: 0a 4c mov r12, r10 ; 9f52: 0c 4d mov r13, r12 ; 00009f54 <.LVL1>: 9f54: 0d 4e mov r14, r13 ; 00009f56 <.LVL2>: 9f56: 82 43 da 02 mov #0, &0x02da ;r3 As==00 00009f5a <.Loc.61.1>: 9f5a: b0 12 88 9f call #-24696 ;#0x9f88 00009f5e <.LVL3>: 9f5e: 3c 93 cmp #-1, r12 ;r3 As==11 9f60: 06 20 jnz $+14 ;abs 0x9f6e 00009f62 <.Loc.61.1>: 9f62: 1d 42 da 02 mov &0x02da,r13 ;0x02da 00009f66 <.Loc.61.1>: 9f66: 0d 93 cmp #0, r13 ;r3 As==00 9f68: 02 24 jz $+6 ;abs 0x9f6e 00009f6a <.Loc.62.1>: 9f6a: 8a 4d 00 00 mov r13, 0(r10) ; 00009f6e <.L1>: 9f6e: 3a 41 pop r10 ; 00009f70 <.LCFI1>: 9f70: 30 41 ret 00009f72 <_getpid_r>: 9f72: b0 12 82 9f call #-24702 ;#0x9f82 00009f76 <.LVL6>: 9f76: 30 41 ret 00009f78 : 9f78: 3d 53 add #-1, r13 ;r3 As==11 9f7a: 0c 11 rra r12 ; 00009f7c <__mspabi_srai>: 9f7c: 0d 93 cmp #0, r13 ;r3 As==00 9f7e: fc 23 jnz $-6 ;abs 0x9f78 9f80: 30 41 ret 00009f82 : 9f82: 3c 40 2a 00 mov #42, r12 ;#0x002a 00009f86 <.Loc.57.1>: 9f86: 30 41 ret 00009f88 : 9f88: b0 12 98 9f call #-24680 ;#0x9f98 9f8c: bc 40 58 00 mov #88, 0(r12) ;#0x0058 9f90: 00 00 9f92: 3c 43 mov #-1, r12 ;r3 As==11 9f94: 30 41 ret 00009f96 <_exit>: 9f96: ff 3f jmp $+0 ;abs 0x9f96 00009f98 <__errno>: 9f98: 00009f9a : 9f9a: 02 02 mova @r2, r2 ; 9f9c: 30 41 ret