rf_mon.elf: file format elf32-msp430 SYMBOL TABLE: 0000ffe6 l d __interrupt_vector_4 00000000 __interrupt_vector_4 0000ffea l d __interrupt_vector_6 00000000 __interrupt_vector_6 0000ffee l d __interrupt_vector_8 00000000 __interrupt_vector_8 0000fff0 l d __interrupt_vector_9 00000000 __interrupt_vector_9 0000fffe l d __reset_vector 00000000 __reset_vector 00008000 l d .rodata 00000000 .rodata 0000820c l d .rodata2 00000000 .rodata2 0000827c l d .text 00000000 .text 00000200 l d .data 00000000 .data 000002ca l d .bss 00000000 .bss 000002dc l d .noinit 00000000 .noinit 000002dc l d .heap 00000000 .heap 00000000 l d .MSP430.attributes 00000000 .MSP430.attributes 00000000 l d .comment 00000000 .comment 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 00000000 l df *ABS* 00000000 c:/msp430-gcc/bin/../lib/gcc/msp430-elf/9.2.0/../../../../msp430-elf/lib/430/crt0.o 0000fffe l __reset_vector 00000000 __msp430_resetvec_hook 00000000 l df *ABS* 00000000 lib_a-impure.o 00000204 l O .data 00000078 impure_data 00000000 l df *ABS* 00000000 lib_a-nano-svfprintf.o 00000000 l df *ABS* 00000000 lib_a-nano-vfprintf_i.o 00000000 l df *ABS* 00000000 sbrk.c 0000027c l O .data 00000002 heap.1412 00000000 l df *ABS* 00000000 crt_bss.o 00000000 l df *ABS* 00000000 crt_movedata.o 00000000 l df *ABS* 00000000 crt_main.o 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 lib2divHI.o 00000000 l df *ABS* 00000000 lib2divSI.o 00000000 l df *ABS* 00000000 slli.o 00000000 l df *ABS* 00000000 srli.o 00000000 l df *ABS* 00000000 lib_a-atoi.o 00000000 l df *ABS* 00000000 lib_a-memcmp.o 00000000 l df *ABS* 00000000 lib_a-memset.o 00000000 l df *ABS* 00000000 lib_a-snprintf.o 00000000 l df *ABS* 00000000 lib_a-sprintf.o 00000000 l df *ABS* 00000000 lib_a-strchr.o 00000000 l df *ABS* 00000000 lib_a-strstr.o 00000000 l df *ABS* 00000000 lib_a-strtol.o 00000000 l df *ABS* 00000000 lib_a-memchr.o 00000000 l df *ABS* 00000000 lib_a-memcpy.o 00000000 l df *ABS* 00000000 lib_a-memmove.o 00000000 l df *ABS* 00000000 lib_a-nano-freer.o 00000000 l df *ABS* 00000000 lib_a-nano-mallocr.o 00000000 l df *ABS* 00000000 lib_a-nano-reallocr.o 00000000 l df *ABS* 00000000 lib_a-sbrkr.o 00000000 l df *ABS* 00000000 lib_a-nano-msizer.o 00000000 l df *ABS* 00000000 write.c 00000000 l df *ABS* 00000000 cio.o 00000000 l df *ABS* 00000000 lib2_mul_none.o 00000000 l df *ABS* 00000000 lib_a-abort.o 00000000 l df *ABS* 00000000 lib_a-signal.o 00000000 l df *ABS* 00000000 lib_a-signalr.o 00000000 l df *ABS* 00000000 srai.o 00000000 l df *ABS* 00000000 ciosyscalls.o 00000000 l df *ABS* 00000000 exit.c 00000000 l df *ABS* 00000000 lib_a-errno.o 00009e6c g F .text 00000014 _malloc_usable_size_r 00009f32 g F .text 0000004e __mspabi_mpyl 00000001 g *ABS* 00000000 IE2 00000061 g *ABS* 00000000 UCA0CTL1 00000022 g *ABS* 00000000 P1DIR 00000067 g *ABS* 00000000 UCA0TXBUF 00000064 g *ABS* 00000000 UCA0MCTL 00008d56 g F .text 000000c2 CCXX_SPI_RDREG 00009ff6 g F .text 00000024 _kill_r 00000053 g *ABS* 00000000 BCSCTL3 000010f8 g *ABS* 00000000 CALDCO_16MHZ 00000025 g *ABS* 00000000 P1IE 0000846e g F .text 0000001e init_UART_SPI 00009bd6 g F .text 0000004e memmove 00009104 g F .text 0000006e snprintf 00008fae g F .text 00000040 .hidden udivmodhi4 0000a040 g F .text 00000006 __errno 0000027e g .data 00000000 __CIOBUF__ 00009f2e g .text 00000000 C$$IO$$ 000001b4 g *ABS* 00000000 ADC10MEM 000002da g O .bss 00000002 errno 00009098 g .text 00000000 .hidden __mspabi_func_epilog_6 00008424 g F .text 00000012 sample_adc 0000a02a w F .text 00000006 getpid 00000024 g *ABS* 00000000 P1IES 00009bba g F .text 0000001e memcpy 00009088 g F .text 0000000e .hidden __mspabi_remul 000094cc g F .text 00000290 _svfprintf_r 000083ba g F .text 00000058 sys_init 0000012e g *ABS* 00000000 TAIV 0000002a g *ABS* 00000000 P2DIR 00000120 g *ABS* 00000000 WDTCTL 00009f8c g F .text 00000064 _raise_r 00008314 g F .text 00000078 tinit 0000827c g F .text 00000004 __crt0_start 0000a01a g F .text 00000006 _getpid_r 000002e0 g .heap 00000000 __HeapLimit 000002e0 g .heap 00000000 __heap_end__ 00008280 g F .text 0000000e __crt0_init_bss 00009e4a g F .text 00000022 _sbrk_r 000082a8 g F .text 0000001e P2_VEC 00000012 g *ABS* 00000000 __bsssize 00008cd6 g F .text 00000080 CCXX_SPI_STROBE 000090a2 g .text 00000000 .hidden __mspabi_func_epilog_1 000090aa g .text 00000000 .hidden __mspabi_slli 00009f2e g .text 00000000 _libgloss_cio_hook 0000909e g .text 00000000 .hidden __mspabi_func_epilog_3 00009df2 g F .text 0000005e _realloc_r 0000006e g *ABS* 00000000 UCB0RXBUF 00008e18 g F .text 000000a8 CCXX_SPI_WRREG 000090b6 g .text 00000000 .hidden __mspabi_srli 00009f7e g F .text 0000000e abort 00009e80 g F .text 00000032 _sbrk 0000004a g *ABS* 00000000 ADC10AE0 000001b2 g *ABS* 00000000 ADC10CTL1 0000848c g F .text 0000015c CCXX_WRITE_SPI_RF_SETTINGS 00000063 g *ABS* 00000000 UCA0BR1 000093d2 g F .text 00000010 strtol 00000172 g *ABS* 00000000 TACCR0 00008ec0 g F .text 000000f0 CCXX_SPI_BURST_WRREG 000002ca g O .bss 00000001 RSSI_DBM 00000019 g *ABS* 00000000 P3OUT 0000001b g *ABS* 00000000 P3SEL 00009eb2 g F .text 0000007e write 0000002e g *ABS* 00000000 P2SEL 0000a030 w F .text 0000000e kill 0000006b g *ABS* 00000000 UCB0BR1 00009104 g F .text 0000006e sniprintf 000002dc g .noinit 00000000 end 000093e2 g F .text 000000f0 __ssputs_r 000002ce g O .bss 00000001 RSSI 00008fea g F .text 00000008 .hidden __mspabi_remu 00000026 g *ABS* 00000000 P1SEL 0000002d g *ABS* 00000000 P2IE 00009b9e g F .text 0000001e memchr 00009c1e g F .text 000000f6 _free_r 00000062 g *ABS* 00000000 UCA0BR0 00008ff2 g F .text 00000090 .hidden udivmodsi4 0000827c g .text 00000000 _start 000091ca g F .text 00000042 strstr 000082c6 g F .text 00000028 TA1_VEC 00000056 g *ABS* 00000000 DCOCTL 0000844e g F .text 00000020 init_UART_232 0000002c g *ABS* 00000000 P2IES 0000a024 g .text 00000000 .hidden __mspabi_srai 0000907a g F .text 0000000e .hidden __mspabi_divul 000000ca g *ABS* 00000000 __romdatacopysize 00000066 g *ABS* 00000000 UCA0RXBUF 000090c8 g F .text 0000002e memcmp 00008412 g F .text 00000012 init_adc 00000003 g *ABS* 00000000 IFG2 00000029 g *ABS* 00000000 P2OUT 00009e80 w F .text 00000032 sbrk 00008306 g F .text 0000000e ADC_VEC 00000000 w *ABS* 00000000 __rom_highdatacopysize 000090f2 g F .text 00000014 memset 00000069 g *ABS* 00000000 UCB0CTL1 00008744 g F .text 000005a4 main 00000018 g *ABS* 00000000 P3IN 00000160 g *ABS* 00000000 TACTL 0000027e g .data 00000000 _CIOBUF_ 00009208 g F .text 000001de _strtol_r 00009d0a g F .text 000000f2 _malloc_r 000002dc g .heap 00000000 __heap_start__ 000002d0 g O .bss 00000002 seconds 00000000 w *ABS* 00000000 __high_bsssize 000010f9 g *ABS* 00000000 CALBC1_16MHZ 00000000 w *ABS* 00000000 __rom_highdatastart 0000006f g *ABS* 00000000 UCB0TXBUF 0000838c g F .text 0000002e delay 000086f4 g F .text 00000050 TX_STRING 0000a046 g *ABS* 00000000 __romdatastart 0000916e g F .text 00000040 sprintf 000002cd g O .bss 00000001 LQI 000082ee g F .text 00000018 RX_VEC 00009748 g F .text 0000011c _printf_common 00000202 g O .data 00000002 _impure_ptr 0000001a g *ABS* 00000000 P3DIR 00008618 g F .text 000000dc RX_STRING 000094cc g F .text 00000290 _svfiprintf_r 000001b0 g *ABS* 00000000 ADC10CTL0 00000021 g *ABS* 00000000 P1OUT 00000000 w *ABS* 00000000 __high_datastart 00000000 w *ABS* 00000000 __upper_data_init 000002ca g .bss 00000000 __bssstart 0000909a g .text 00000000 .hidden __mspabi_func_epilog_5 000002cc g O .bss 00000001 PKTSTATUS 00000600 g .MSP430.attributes 00000000 __stack 000002ca g .data 00000000 _edata 000002dc g .heap 00000000 _end 0000a03e w F .text 00000004 exit 00000057 g *ABS* 00000000 BCSCTL1 000002d2 g O .bss 00000002 flags 00000000 w *ABS* 00000000 __high_bssstart 00000200 g O .data 00000002 __ctype_ptr__ 0000916e g F .text 00000040 siprintf 000090bc g F .text 0000000c atoi 000080bc g O .rodata 00000101 _ctype_ 000082a2 g F .text 00000006 __crt0_call_main 00000170 g *ABS* 00000000 TAR 000085e8 g F .text 00000030 RX_MODE 0000a03e w F .text 00000004 _exit 0000907a g F .text 0000000e __mspabi_divlu 0000985c g F .text 00000340 _printf_i 0000006a g *ABS* 00000000 UCB0BR0 000002d6 g O .bss 00000002 __malloc_sbrk_start 00000068 g *ABS* 00000000 UCB0CTL0 000091ae g F .text 0000001e strchr 00000200 g .data 00000000 __datastart 000002d8 g O .bss 00000002 __malloc_free_list 0000828e g F .text 00000014 __crt0_movedata 000090a0 g .text 00000000 .hidden __mspabi_func_epilog_2 000002d4 g O .bss 00000001 status 000002cb g O .bss 00000001 rx_char 00009096 g .text 00000000 .hidden __mspabi_func_epilog_7 0000909c g .text 00000000 .hidden __mspabi_func_epilog_4 00008436 g F .text 00000018 TX232String 0000002b g *ABS* 00000000 P2IFG 00009fea g F .text 0000000c raise Disassembly of section __interrupt_vector_4: 0000ffe6 <__interrupt_vector_4>: ffe6: a8 82 interrupt service routine at 0x82a8 Disassembly of section __interrupt_vector_6: 0000ffea <__interrupt_vector_6>: ffea: 06 83 interrupt service routine at 0x8306 Disassembly of section __interrupt_vector_8: 0000ffee <__interrupt_vector_8>: ffee: ee 82 interrupt service routine at 0x82ee Disassembly of section __interrupt_vector_9: 0000fff0 <__interrupt_vector_9>: fff0: c6 82 interrupt service routine at 0x82c6 Disassembly of section .text: 0000827c <__crt0_start>: 827c: 31 40 00 06 mov #1536, r1 ;#0x0600 00008280 <__crt0_init_bss>: 8280: 3c 40 ca 02 mov #714, r12 ;#0x02ca 00008284 <.Loc.76.1>: 8284: 0d 43 clr r13 ; 00008286 <.Loc.77.1>: 8286: 3e 40 12 00 mov #18, r14 ;#0x0012 0000828a <.Loc.81.1>: 828a: b0 12 f2 90 call #-28430 ;#0x90f2 0000828e <__crt0_movedata>: 828e: 3c 40 00 02 mov #512, r12 ;#0x0200 00008292 <.Loc.116.1>: 8292: 3d 40 46 a0 mov #-24506,r13 ;#0xa046 00008296 <.Loc.119.1>: 8296: 0d 9c cmp r12, r13 ; 00008298 <.Loc.120.1>: 8298: 04 24 jz $+10 ;abs 0x82a2 0000829a <.Loc.122.1>: 829a: 3e 40 ca 00 mov #202, r14 ;#0x00ca 0000829e <.Loc.124.1>: 829e: b0 12 d6 9b call #-25642 ;#0x9bd6 000082a2 <__crt0_call_main>: 82a2: 0c 43 clr r12 ; 000082a4 <.Loc.254.1>: 82a4: b0 12 44 87 call #-30908 ;#0x8744 000082a8 : // Port 2 interripts : the allspice controller is talking to us //interrupt (PORT2_VECTOR) P2_VEC(void) void __interrupt_vec(PORT2_VECTOR) P2_VEC(void) { _disable_interrupts(); //no nesting! 82a8: 32 c2 dint 82aa: 03 43 nop 000082ac <.Loc.51.1>: if((P2IFG & GDO0) == GDO0) 82ac: f2 b0 40 00 bit.b #64, &0x002b ;#0x0040 82b0: 2b 00 82b2: 05 24 jz $+12 ;abs 0x82be 000082b4 <.Loc.53.1>: { flags |= CONTROLLER_RDY; 82b4: a2 d3 d2 02 bis #2, &0x02d2 ;r3 As==10 000082b8 <.Loc.54.1>: LPM3_EXIT; 82b8: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 82bc: 00 00 000082be <.L2>: //We need to grab that byte! } P2IFG=0x00; 82be: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 000082c2 <.Loc.58.1>: _enable_interrupts(); 82c2: 32 d2 eint 000082c4 <.Loc.59.1>: } 82c4: 00 13 reti 000082c6 : /** This is called once every overflow */ //interrupt (TIMERA1_VECTOR) TA1_VEC(void) void __interrupt_vec(TIMERA1_VECTOR) TA1_VEC(void) { 82c6: 0c 12 push r12 ; 000082c8 <.LCFI0>: _disable_interrupts(); //no nesting! 82c8: 32 c2 dint 82ca: 03 43 nop 000082cc <.Loc.69.1>: if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 82cc: 1c 42 2e 01 mov &0x012e,r12 ;0x012e 000082d0 <.Loc.69.1>: 82d0: 3c 90 0a 00 cmp #10, r12 ;#0x000a 82d4: 09 20 jnz $+20 ;abs 0x82e8 000082d6 <.Loc.71.1>: { flags |= TIMER_UP; 82d6: 92 d3 d2 02 bis #1, &0x02d2 ;r3 As==01 000082da <.Loc.72.1>: seconds++; 82da: 92 53 d0 02 inc &0x02d0 ; 000082de <.Loc.73.1>: TACTL &= ~TAIFG; //clear the flag 82de: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 000082e2 <.Loc.74.1>: LPM3_EXIT; 82e2: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0 82e6: 02 00 000082e8 <.L8>: } _enable_interrupts(); 82e8: 32 d2 eint 000082ea <.Loc.77.1>: } 82ea: 3c 41 pop r12 ; 000082ec <.LCFI1>: 82ec: 00 13 reti 000082ee : This is called once for every RS232 character that comes in */ //interrupt (USCIAB0RX_VECTOR) RX_VEC(void) void __interrupt_vec(USCIAB0RX_VECTOR) RX_VEC(void) { _disable_interrupts(); //no nesting! 82ee: 32 c2 dint 82f0: 03 43 nop 000082f2 <.Loc.87.1>: //P1OUT^=LED_GRN; rx_char = UCA0RXBUF; 82f2: d2 42 66 00 mov.b &0x0066,&0x02cb ;0x0066 82f6: cb 02 000082f8 <.Loc.88.1>: flags |= RXCHAR_RDY; 82f8: b2 d2 d2 02 bis #8, &0x02d2 ;r2 As==11 000082fc <.Loc.89.1>: LPM3_EXIT; 82fc: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 8300: 00 00 00008302 <.Loc.90.1>: _enable_interrupts(); 8302: 32 d2 eint 00008304 <.Loc.91.1>: } 8304: 00 13 reti 00008306 : // Port 2 interripts : the allspice controller is talking to us //interrupt (ADC10_VECTOR) ADC_VEC(void) void __interrupt_vec(ADC10_VECTOR) ADC_VEC(void) { _disable_interrupts(); //no nesting! 8306: 32 c2 dint 8308: 03 43 nop 0000830a <.Loc.102.1>: LPM3_EXIT; 830a: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 830e: 00 00 00008310 <.Loc.103.1>: _enable_interrupts(); 8310: 32 d2 eint 00008312 <.Loc.104.1>: } 8312: 00 13 reti 00008314 : TAR = 0; TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! }*/ void tinit(unsigned int milliseconds) { 8314: 0a 12 push r10 ; 00008316 <.LCFI2>: TACTL = TASSEL_1; // ACLK, upmode 8316: b2 40 00 01 mov #256, &0x0160 ;#0x0100 831a: 60 01 0000831c <.Loc.124.1>: TACTL &= ~TAIFG; //clear interrupt 831c: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008320 <.Loc.125.1>: TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8320: 0e 4c mov r12, r14 ; 8322: 0f 43 clr r15 ; 8324: 0c 4e mov r14, r12 ; 00008326 <.LVL1>: 8326: 0c 5e add r14, r12 ; 8328: 0d 4f mov r15, r13 ; 832a: 0d 6f addc r15, r13 ; 832c: 0a 4c mov r12, r10 ; 832e: 0a 5e add r14, r10 ; 8330: 0b 4d mov r13, r11 ; 8332: 0b 6f addc r15, r11 ; 8334: 0a 5a rla r10 ; 8336: 0b 6b rlc r11 ; 8338: 0a 5a rla r10 ; 833a: 0b 6b rlc r11 ; 833c: 0a 5a rla r10 ; 833e: 0b 6b rlc r11 ; 8340: 0a 5a rla r10 ; 8342: 0b 6b rlc r11 ; 8344: 0c 4a mov r10, r12 ; 8346: 0d 4b mov r11, r13 ; 8348: 0c 8e sub r14, r12 ; 834a: 0d 7f subc r15, r13 ; 834c: 0c 5c rla r12 ; 834e: 0d 6d rlc r13 ; 8350: 0c 5c rla r12 ; 8352: 0d 6d rlc r13 ; 8354: 0c 5c rla r12 ; 8356: 0d 6d rlc r13 ; 8358: 0c 8e sub r14, r12 ; 835a: 0d 7f subc r15, r13 ; 0000835c <.Loc.125.1>: 835c: 3e 40 e8 03 mov #1000, r14 ;#0x03e8 00008360 <.LVL2>: 8360: 4f 43 clr.b r15 ; 8362: 0c 5c rla r12 ; 8364: 0d 6d rlc r13 ; 8366: 0c 5c rla r12 ; 8368: 0d 6d rlc r13 ; 836a: 0c 5c rla r12 ; 836c: 0d 6d rlc r13 ; 836e: 0c 5c rla r12 ; 8370: 0d 6d rlc r13 ; 8372: 0c 5c rla r12 ; 8374: 0d 6d rlc r13 ; 8376: b0 12 7a 90 call #-28550 ;#0x907a 0000837a <.Loc.125.1>: 837a: 82 4c 72 01 mov r12, &0x0172 ; 0000837e <.Loc.127.1>: //TACCR0 = 12000; // ~1 second TAR = 0; 837e: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 00008382 <.Loc.128.1>: TACTL |= MC_UPTO_CCR0 | TAIE; //overflow interrupt enabled, start counting! 8382: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8386: 60 01 00008388 <.Loc.129.1>: } 8388: 3a 41 pop r10 ; 0000838a <.LCFI3>: 838a: 30 41 ret 0000838c : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: 8390: 4d 43 clr.b r13 ; 00008392 <.L14>: { __nop(); 8392: 03 43 nop 00008394 <.Loc.140.1>: __nop(); 8394: 03 43 nop 00008396 <.Loc.141.1>: __nop(); 8396: 03 43 nop 00008398 <.Loc.142.1>: __nop(); 8398: 03 43 nop 0000839a <.Loc.143.1>: __nop(); 839a: 03 43 nop 0000839c <.Loc.144.1>: __nop(); 839c: 03 43 nop 0000839e <.Loc.145.1>: __nop(); 839e: 03 43 nop 000083a0 <.Loc.146.1>: __nop(); 83a0: 03 43 nop 000083a2 <.Loc.147.1>: __nop(); 83a2: 03 43 nop 000083a4 <.Loc.148.1>: __nop(); 83a4: 03 43 nop 000083a6 <.Loc.149.1>: __nop(); 83a6: 03 43 nop 000083a8 <.Loc.150.1>: __nop(); 83a8: 03 43 nop 000083aa <.Loc.151.1>: __nop(); 83aa: 03 43 nop 000083ac <.Loc.152.1>: __nop(); 83ac: 03 43 nop 000083ae <.Loc.153.1>: __nop(); 83ae: 03 43 nop 000083b0 <.Loc.154.1>: __nop(); 83b0: 03 43 nop 000083b2 <.Loc.137.1>: for (i = 0; i: 83b4: 0d 9c cmp r12, r13 ; 83b6: ed 23 jnz $-36 ;abs 0x8392 000083b8 <.L12>: } } 83b8: 30 41 ret 000083ba : Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 83ba: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 83be: 20 01 000083c0 <.Loc.166.1>: P1OUT = P1OUT_INIT; //Init output data of port1 83c0: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 000083c4 <.Loc.167.1>: P2OUT = P2OUT_INIT; //Init output data of port2 83c4: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 000083c8 <.Loc.168.1>: P3OUT = P3OUT_INIT; 83c8: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 000083cc <.Loc.170.1>: P1SEL = P1SEL_INIT; //Select port or module -function on port1 83cc: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 000083d0 <.Loc.171.1>: P2SEL = P2SEL_INIT; //Select port or module -function on port2 83d0: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 000083d4 <.Loc.172.1>: P3SEL = P3SEL_INIT; 83d4: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 83d8: 1b 00 000083da <.Loc.174.1>: P1DIR = P1DIR_INIT; //Init port direction register of port1 83da: f2 43 22 00 mov.b #-1, &0x0022 ;r3 As==11 000083de <.Loc.175.1>: P2DIR = P2DIR_INIT; //Init port direction register of port2 83de: f2 40 3f 00 mov.b #63, &0x002a ;#0x003f 83e2: 2a 00 000083e4 <.Loc.176.1>: P3DIR = P3DIR_INIT; 83e4: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 83e8: 1a 00 000083ea <.Loc.178.1>: P1IES = P1IES_INIT; //init port interrupts 83ea: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 000083ee <.Loc.179.1>: P2IES = P2IES_INIT; 83ee: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 83f2: 2c 00 000083f4 <.Loc.181.1>: P1IE = P1IE_INIT; 83f4: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 000083f8 <.Loc.182.1>: P2IE = P2IE_INIT; 83f8: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 83fc: 2d 00 000083fe <.Loc.184.1>: BCSCTL1 = CALBC1_16MHZ; // Set DCO 83fe: d2 42 f9 10 mov.b &0x10f9,&0x0057 ;0x10f9 8402: 57 00 00008404 <.Loc.186.1>: DCOCTL = CALDCO_16MHZ; 8404: d2 42 f8 10 mov.b &0x10f8,&0x0056 ;0x10f8 8408: 56 00 0000840a <.Loc.188.1>: BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 840a: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 840e: 53 00 00008410 <.Loc.189.1>: } 8410: 30 41 ret 00008412 : /**init the ADC10 */ void init_adc() { ADC10AE0 = ADC_IN; 8412: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 00008416 <.Loc.197.1>: ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 8416: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 841a: b0 01 0000841c <.Loc.198.1>: ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 841c: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8420: b2 01 00008422 <.Loc.199.1>: } 8422: 30 41 ret 00008424 : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 8424: b2 d0 03 00 bis #3, &0x01b0 ; 8428: b0 01 0000842a <.L22>: while(ADC10CTL1 & ADC10BUSY); 842a: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 842e: fd 23 jnz $-4 ;abs 0x842a 00008430 <.Loc.207.1>: return ADC10MEM; } 8430: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 8434: 30 41 ret 00008436 : void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 8436: 4e 43 clr.b r14 ; 8438: 0e 9d cmp r13, r14 ; 843a: 08 34 jge $+18 ;abs 0x844c 843c: 0d 5c add r12, r13 ; 0000843e <.L27>: { volatile int i; UCA0TXBUF = string[pointer]; 843e: f2 4c 67 00 mov.b @r12+, &0x0067 ; 00008442 <.L26>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8442: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8446: fd 27 jz $-4 ;abs 0x8442 00008448 <.LBE22>: for( pointer = 0; pointer < length; pointer++) 8448: 0c 9d cmp r13, r12 ; 844a: f9 23 jnz $-12 ;abs 0x843e 0000844c <.L24>: } } 844c: 30 41 ret 0000844e : void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 844e: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 8452: 61 00 00008454 <.Loc.224.1>: UCA0BR0 = 0x82; // 9600 from 16Mhz 8454: f2 40 82 ff mov.b #-126, &0x0062 ;#0xff82 8458: 62 00 0000845a <.Loc.225.1>: UCA0BR1 = 0x6; 845a: f2 40 06 00 mov.b #6, &0x0063 ; 845e: 63 00 00008460 <.Loc.231.1>: //UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 8460: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 00008464 <.Loc.232.1>: UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 8464: d2 c3 61 00 bic.b #1, &0x0061 ;r3 As==01 00008468 <.Loc.233.1>: IE2 |= UCA0RXIE; 8468: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 0000846c <.Loc.234.1>: } 846c: 30 41 ret 0000846e : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 846e: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 00008472 <.Loc.239.1>: UCB0CTL1 = UCSWRST | UCSSEL1; 8472: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8476: 69 00 00008478 <.Loc.240.1>: UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8478: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 847c: 68 00 0000847e <.Loc.241.1>: UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 847e: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 00008482 <.Loc.242.1>: UCB0BR1 = 0; 8482: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 00008486 <.Loc.243.1>: UCB0CTL1 &= ~UCSWRST; 8486: d2 c3 69 00 bic.b #1, &0x0069 ;r3 As==01 0000848a <.Loc.245.1>: } 848a: 30 41 ret 0000848c : void CCXX_WRITE_SPI_RF_SETTINGS() { 848c: 0a 12 push r10 ; 0000848e <.LCFI4>: // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 848e: 3a 40 18 8e mov #-29160,r10 ;#0x8e18 8492: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 8496: 4c 43 clr.b r12 ; 8498: 8a 12 call r10 ; 0000849a <.LVL15>: CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 849a: 7d 40 06 00 mov.b #6, r13 ; 849e: 6c 43 mov.b #2, r12 ;r3 As==10 84a0: 8a 12 call r10 ; 000084a2 <.LVL16>: CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 84a2: 7d 40 3c 00 mov.b #60, r13 ;#0x003c 84a6: 7c 40 06 00 mov.b #6, r12 ; 84aa: 8a 12 call r10 ; 000084ac <.LVL17>: CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 84ac: 6d 42 mov.b #4, r13 ;r2 As==10 84ae: 7c 40 07 00 mov.b #7, r12 ; 84b2: 8a 12 call r10 ; 000084b4 <.LVL18>: CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 84b4: 7d 40 05 00 mov.b #5, r13 ; 84b8: 7c 42 mov.b #8, r12 ;r2 As==11 84ba: 8a 12 call r10 ; 000084bc <.LVL19>: CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 84bc: 5d 43 mov.b #1, r13 ;r3 As==01 84be: 7c 40 09 00 mov.b #9, r12 ; 84c2: 8a 12 call r10 ; 000084c4 <.LVL20>: CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 84c4: 7d 40 9a ff mov.b #-102, r13 ;#0xff9a 84c8: 7c 40 0a 00 mov.b #10, r12 ;#0x000a 84cc: 8a 12 call r10 ; 000084ce <.LVL21>: CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 84ce: 7d 40 0a 00 mov.b #10, r13 ;#0x000a 84d2: 7c 40 0b 00 mov.b #11, r12 ;#0x000b 84d6: 8a 12 call r10 ; 000084d8 <.LVL22>: CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 84d8: 4d 43 clr.b r13 ; 84da: 7c 40 0c 00 mov.b #12, r12 ;#0x000c 84de: 8a 12 call r10 ; 000084e0 <.LVL23>: CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 84e0: 7d 40 5c 00 mov.b #92, r13 ;#0x005c 84e4: 7c 40 0d 00 mov.b #13, r12 ;#0x000d 84e8: 8a 12 call r10 ; 000084ea <.LVL24>: CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 84ea: 7d 40 4f 00 mov.b #79, r13 ;#0x004f 84ee: 7c 40 0e 00 mov.b #14, r12 ;#0x000e 84f2: 8a 12 call r10 ; 000084f4 <.LVL25>: CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 84f4: 7d 40 c0 ff mov.b #-64, r13 ;#0xffc0 84f8: 7c 40 0f 00 mov.b #15, r12 ;#0x000f 84fc: 8a 12 call r10 ; 000084fe <.LVL26>: CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 84fe: 7d 40 2d 00 mov.b #45, r13 ;#0x002d 8502: 7c 40 10 00 mov.b #16, r12 ;#0x0010 8506: 8a 12 call r10 ; 00008508 <.LVL27>: CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 8508: 7d 40 3b 00 mov.b #59, r13 ;#0x003b 850c: 7c 40 11 00 mov.b #17, r12 ;#0x0011 8510: 8a 12 call r10 ; 00008512 <.LVL28>: CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 8512: 7d 40 73 00 mov.b #115, r13 ;#0x0073 8516: 7c 40 12 00 mov.b #18, r12 ;#0x0012 851a: 8a 12 call r10 ; 0000851c <.LVL29>: CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 851c: 7d 40 23 00 mov.b #35, r13 ;#0x0023 8520: 7c 40 13 00 mov.b #19, r12 ;#0x0013 8524: 8a 12 call r10 ; 00008526 <.LVL30>: CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 8526: 7d 40 b9 ff mov.b #-71, r13 ;#0xffb9 852a: 7c 40 14 00 mov.b #20, r12 ;#0x0014 852e: 8a 12 call r10 ; 00008530 <.LVL31>: CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 8530: 5d 43 mov.b #1, r13 ;r3 As==01 8532: 7c 40 15 00 mov.b #21, r12 ;#0x0015 8536: 8a 12 call r10 ; 00008538 <.LVL32>: CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 8538: 7d 40 33 00 mov.b #51, r13 ;#0x0033 853c: 7c 40 17 00 mov.b #23, r12 ;#0x0017 8540: 8a 12 call r10 ; 00008542 <.LVL33>: CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 8542: 7d 40 18 00 mov.b #24, r13 ;#0x0018 8546: 4c 4d mov.b r13, r12 ; 8548: 8a 12 call r10 ; 0000854a <.LVL34>: CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 854a: 7d 40 1d 00 mov.b #29, r13 ;#0x001d 854e: 7c 40 19 00 mov.b #25, r12 ;#0x0019 8552: 8a 12 call r10 ; 00008554 <.LVL35>: CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 8554: 7d 40 1c 00 mov.b #28, r13 ;#0x001c 8558: 7c 40 1a 00 mov.b #26, r12 ;#0x001a 855c: 8a 12 call r10 ; 0000855e <.LVL36>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 855e: 7d 40 c7 ff mov.b #-57, r13 ;#0xffc7 8562: 7c 40 1b 00 mov.b #27, r12 ;#0x001b 8566: 8a 12 call r10 ; 00008568 <.LVL37>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 8568: 4d 43 clr.b r13 ; 856a: 7c 40 1c 00 mov.b #28, r12 ;#0x001c 856e: 8a 12 call r10 ; 00008570 <.LVL38>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 8570: 7d 40 b0 ff mov.b #-80, r13 ;#0xffb0 8574: 7c 40 1d 00 mov.b #29, r12 ;#0x001d 8578: 8a 12 call r10 ; 0000857a <.LVL39>: CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 857a: 7d 40 b6 ff mov.b #-74, r13 ;#0xffb6 857e: 7c 40 21 00 mov.b #33, r12 ;#0x0021 8582: 8a 12 call r10 ; 00008584 <.LVL40>: CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 8584: 7d 40 10 00 mov.b #16, r13 ;#0x0010 8588: 7c 40 22 00 mov.b #34, r12 ;#0x0022 858c: 8a 12 call r10 ; 0000858e <.LVL41>: CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 858e: 7d 40 ea ff mov.b #-22, r13 ;#0xffea 8592: 7c 40 23 00 mov.b #35, r12 ;#0x0023 8596: 8a 12 call r10 ; 00008598 <.LVL42>: CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 8598: 7d 40 0a 00 mov.b #10, r13 ;#0x000a 859c: 7c 40 24 00 mov.b #36, r12 ;#0x0024 85a0: 8a 12 call r10 ; 000085a2 <.LVL43>: CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 85a2: 4d 43 clr.b r13 ; 85a4: 7c 40 25 00 mov.b #37, r12 ;#0x0025 85a8: 8a 12 call r10 ; 000085aa <.LVL44>: CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 85aa: 7d 40 11 00 mov.b #17, r13 ;#0x0011 85ae: 7c 40 26 00 mov.b #38, r12 ;#0x0026 85b2: 8a 12 call r10 ; 000085b4 <.LVL45>: CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 85b4: 7d 40 59 00 mov.b #89, r13 ;#0x0059 85b8: 7c 40 29 00 mov.b #41, r12 ;#0x0029 85bc: 8a 12 call r10 ; 000085be <.LVL46>: CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 85be: 7d 40 88 ff mov.b #-120, r13 ;#0xff88 85c2: 7c 40 2c 00 mov.b #44, r12 ;#0x002c 85c6: 8a 12 call r10 ; 000085c8 <.LVL47>: CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 85c8: 7d 40 31 00 mov.b #49, r13 ;#0x0031 85cc: 7c 40 2d 00 mov.b #45, r12 ;#0x002d 85d0: 8a 12 call r10 ; 000085d2 <.LVL48>: CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 85d2: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 85d6: 7c 40 2e 00 mov.b #46, r12 ;#0x002e 85da: 8a 12 call r10 ; 000085dc <.LVL49>: CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 85dc: 7d 43 mov.b #-1, r13 ;r3 As==11 85de: 7c 40 3e 00 mov.b #62, r12 ;#0x003e 85e2: 8a 12 call r10 ; 000085e4 <.LVL50>: } 85e4: 3a 41 pop r10 ; 000085e6 <.LCFI5>: 85e6: 30 41 ret 000085e8 : No timeout Interrupt driven! yay! */ void RX_MODE() { 85e8: 0a 12 push r10 ; 000085ea <.LCFI6>: 85ea: 09 12 push r9 ; 000085ec <.LCFI7>: CCXX_SPI_STROBE(CCxxx0_SIDLE); 85ec: 3a 40 d6 8c mov #-29482,r10 ;#0x8cd6 85f0: 7c 40 36 00 mov.b #54, r12 ;#0x0036 85f4: 8a 12 call r10 ; 000085f6 <.LVL51>: while(status!=15) //(15)31 for return to TX on complete, see MCSM1 85f6: f2 90 0f 00 cmp.b #15, &0x02d4 ;#0x000f 85fa: d4 02 85fc: 08 24 jz $+18 ;abs 0x860e 000085fe <.Loc.565.1>: CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 85fe: 79 40 3d 00 mov.b #61, r9 ;#0x003d 00008602 <.L36>: 8602: 4c 49 mov.b r9, r12 ; 8604: 8a 12 call r10 ; 00008606 <.LVL52>: while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8606: f2 90 0f 00 cmp.b #15, &0x02d4 ;#0x000f 860a: d4 02 860c: fa 23 jnz $-10 ;abs 0x8602 0000860e <.L35>: CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 860e: 7c 40 34 00 mov.b #52, r12 ;#0x0034 8612: 8a 12 call r10 ; 00008614 <.LVL53>: } 8614: 30 40 a0 90 br #0x90a0 ; 00008618 : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 8618: 0a 12 push r10 ; 0000861a <.LCFI9>: 861a: 09 12 push r9 ; 0000861c <.LCFI10>: 861c: 08 12 push r8 ; 0000861e <.LCFI11>: 861e: 07 12 push r7 ; 00008620 <.LCFI12>: 8620: 06 12 push r6 ; 00008622 <.LCFI13>: 8622: 05 12 push r5 ; 00008624 <.LCFI14>: 8624: 04 12 push r4 ; 00008626 <.LCFI15>: 8626: 21 82 sub #4, r1 ;r2 As==10 00008628 <.LCFI16>: 8628: 04 4c mov r12, r4 ; 862a: 48 4d mov.b r13, r8 ; 0000862c <.LVL55>: //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 862c: 39 40 56 8d mov #-29354,r9 ;#0x8d56 8630: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 00008634 <.LVL56>: 8634: 89 12 call r9 ; 00008636 <.LVL57>: 8636: 3c f0 ff 00 and #255, r12 ;#0x00ff 863a: 81 4c 00 00 mov r12, 0(r1) ; 0000863e <.LVL58>: real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 863e: 7c 40 3b 00 mov.b #59, r12 ;#0x003b 00008642 <.LVL59>: 8642: 89 12 call r9 ; 00008644 <.LVL60>: 8644: 3c f0 ff 00 and #255, r12 ;#0x00ff 8648: 81 4c 02 00 mov r12, 2(r1) ; 0000864c <.LVL61>: for(i=0; i < length && i < pkt_length; i++) 864c: 08 93 cmp #0, r8 ;r3 As==00 864e: 4e 24 jz $+158 ;abs 0x86ec 00008650 <.Loc.587.1>: 8650: 81 93 00 00 cmp #0, 0(r1) ;r3 As==00 8654: 4d 24 jz $+156 ;abs 0x86f0 8656: 05 44 mov r4, r5 ; 00008658 <.Loc.587.1>: 8658: 4a 43 clr.b r10 ; 0000865a <.Loc.589.1>: { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 865a: 77 40 bf ff mov.b #-65, r7 ;#0xffbf 0000865e <.Loc.587.1>: for(i=0; i < length && i < pkt_length; i++) 865e: 2c 41 mov @r1, r12 ; 00008660 <.LVL62>: 8660: 46 4c mov.b r12, r6 ; 8662: 02 3c jmp $+6 ;abs 0x8668 00008664 <.L47>: 8664: 46 9d cmp.b r13, r6 ; 8666: 0b 24 jz $+24 ;abs 0x867e 00008668 <.L40>: rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 8668: 4c 47 mov.b r7, r12 ; 866a: 89 12 call r9 ; 0000866c <.LVL65>: 866c: c5 4c 00 00 mov.b r12, 0(r5) ; 8670: 15 53 inc r5 ; 00008672 <.Loc.587.1>: for(i=0; i < length && i < pkt_length; i++) 8672: 4d 4a mov.b r10, r13 ; 8674: 5d 53 inc.b r13 ; 8676: 4a 4d mov.b r13, r10 ; 00008678 <.LVL66>: 8678: 04 45 mov r5, r4 ; 0000867a <.Loc.587.1>: 867a: 48 9d cmp.b r13, r8 ; 867c: f3 23 jnz $-24 ;abs 0x8664 0000867e <.L39>: //tmpbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 867e: c4 43 00 00 mov.b #0, 0(r4) ;r3 As==00 00008682 <.Loc.594.1>: RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 8682: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 8686: 89 12 call r9 ; 00008688 <.LVL68>: 8688: c2 4c ce 02 mov.b r12, &0x02ce ; 0000868c <.Loc.595.1>: LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 868c: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 8690: 89 12 call r9 ; 00008692 <.LVL69>: 8692: c2 4c cd 02 mov.b r12, &0x02cd ; 00008696 <.Loc.596.1>: PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 8696: 7c 40 38 00 mov.b #56, r12 ;#0x0038 869a: 89 12 call r9 ; 0000869c <.LVL70>: 869c: c2 4c cc 02 mov.b r12, &0x02cc ; 000086a0 <.Loc.599.1>: if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 86a0: 25 41 mov @r1, r5 ; 86a2: 25 53 incd r5 ; 000086a4 <.Loc.599.1>: 86a4: 81 95 02 00 cmp r5, 2(r1) ; 86a8: 03 24 jz $+8 ;abs 0x86b0 000086aa <.Loc.600.1>: LQI &= ~bit7; //force it to be INVALID! 86aa: f2 f0 7f 00 and.b #127, &0x02cd ;#0x007f 86ae: cd 02 000086b0 <.L41>: if (RSSI >= 128) 86b0: 5c 42 ce 02 mov.b &0x02ce,r12 ;0x02ce 000086b4 <.Loc.602.1>: 86b4: 4c 93 cmp.b #0, r12 ;r3 As==00 86b6: 12 38 jl $+38 ;abs 0x86dc 000086b8 <.Loc.606.1>: //RSSI_DBM = (int16_t)(RSSI - 256) / 2 - 72; RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; 86b8: 12 c3 clrc 86ba: 0c 10 rrc r12 ; 86bc: 7c 50 b8 ff add.b #-72, r12 ;#0xffb8 86c0: c2 4c ca 02 mov.b r12, &0x02ca ; 000086c4 <.L43>: CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 86c4: 39 40 d6 8c mov #-29482,r9 ;#0x8cd6 86c8: 7c 40 3a 00 mov.b #58, r12 ;#0x003a 86cc: 89 12 call r9 ; 000086ce <.LVL71>: CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 86ce: 7c 40 36 00 mov.b #54, r12 ;#0x0036 86d2: 89 12 call r9 ; 000086d4 <.LVL72>: return i; //i = real length } 86d4: 4c 4a mov.b r10, r12 ; 86d6: 21 52 add #4, r1 ;r2 As==10 000086d8 <.LCFI17>: 86d8: 30 40 96 90 br #0x9096 ; 000086dc <.L48>: RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 86dc: 3c 50 01 ff add #-255, r12 ;#0xff01 86e0: 0c 11 rra r12 ; 000086e2 <.Loc.604.1>: 86e2: 7c 50 b8 ff add.b #-72, r12 ;#0xffb8 86e6: c2 4c ca 02 mov.b r12, &0x02ca ; 86ea: ec 3f jmp $-38 ;abs 0x86c4 000086ec <.L44>: for(i=0; i < length && i < pkt_length; i++) 86ec: 0a 48 mov r8, r10 ; 86ee: c7 3f jmp $-112 ;abs 0x867e 000086f0 <.L45>: 86f0: 2a 41 mov @r1, r10 ; 86f2: c5 3f jmp $-116 ;abs 0x867e 000086f4 : /** Transmit a string of bytes. (use burst write) */ void TX_STRING(unsigned char *txstring, unsigned char length) { 86f4: 0a 12 push r10 ; 000086f6 <.LCFI19>: 86f6: 09 12 push r9 ; 000086f8 <.LCFI20>: 86f8: 08 12 push r8 ; 000086fa <.LCFI21>: 86fa: 07 12 push r7 ; 000086fc <.LCFI22>: 86fc: 08 4c mov r12, r8 ; 86fe: 47 4d mov.b r13, r7 ; 8700: 3a 40 d6 8c mov #-29482,r10 ;#0x8cd6 00008704 <.Loc.623.1>: //unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8704: 79 40 36 00 mov.b #54, r9 ;#0x0036 00008708 <.L50>: 8708: 4c 49 mov.b r9, r12 ; 870a: 8a 12 call r10 ; 0000870c <.LVL78>: }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 870c: f2 b0 70 00 bit.b #112, &0x02d4 ;#0x0070 8710: d4 02 8712: fa 23 jnz $-10 ;abs 0x8708 00008714 <.Loc.630.1>: //CC2500_SPI_WRREG(CCxxx0_TXFIFO, length);//Write the data length first CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8714: 4e 47 mov.b r7, r14 ; 8716: 0d 48 mov r8, r13 ; 8718: 7c 40 7f 00 mov.b #127, r12 ;#0x007f 871c: b0 12 c0 8e call #-28992 ;#0x8ec0 00008720 <.LVL79>: CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8720: 7c 40 35 00 mov.b #53, r12 ;#0x0035 8724: 8a 12 call r10 ; 00008726 <.LVL80>: do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8726: 79 40 3d 00 mov.b #61, r9 ;#0x003d 872a: 03 3c jmp $+8 ;abs 0x8732 0000872c <.L58>: if(status == 31) //fast RX mode yay break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 872c: 3c b0 70 00 bit #112, r12 ;#0x0070 8730: 07 24 jz $+16 ;abs 0x8740 00008732 <.L52>: CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8732: 4c 49 mov.b r9, r12 ; 8734: 8a 12 call r10 ; 00008736 <.LVL81>: if(status == 31) //fast RX mode yay 8736: 5c 42 d4 02 mov.b &0x02d4,r12 ;0x02d4 0000873a <.Loc.637.1>: 873a: 3c 90 1f 00 cmp #31, r12 ;#0x001f 873e: f6 23 jnz $-18 ;abs 0x872c 00008740 <.L49>: } 8740: 30 40 9c 90 br #0x909c ; 00008744
: { 8744: 0a 12 push r10 ; 00008746 <.LCFI24>: 8746: 09 12 push r9 ; 00008748 <.LCFI25>: 8748: 08 12 push r8 ; 0000874a <.LCFI26>: 874a: 07 12 push r7 ; 0000874c <.LCFI27>: 874c: 06 12 push r6 ; 0000874e <.LCFI28>: 874e: 05 12 push r5 ; 00008750 <.LCFI29>: 8750: 04 12 push r4 ; 00008752 <.LCFI30>: 8752: 31 80 f8 00 sub #248, r1 ;#0x00f8 00008756 <.LCFI31>: sys_init(); //initialize system parameters 8756: b0 12 ba 83 call #-31814 ;#0x83ba 0000875a <.LBB23>: UCA0CTL1 = UCSSEL_2; // SMCLK 875a: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 875e: 61 00 00008760 <.Loc.224.1>: UCA0BR0 = 0x82; // 9600 from 16Mhz 8760: f2 40 82 ff mov.b #-126, &0x0062 ;#0xff82 8764: 62 00 00008766 <.Loc.225.1>: UCA0BR1 = 0x6; 8766: f2 40 06 00 mov.b #6, &0x0063 ; 876a: 63 00 0000876c <.Loc.231.1>: UCA0MCTL = UCBRS_2; 876c: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 00008770 <.Loc.232.1>: UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 8770: d2 c3 61 00 bic.b #1, &0x0061 ;r3 As==01 00008774 <.Loc.233.1>: IE2 |= UCA0RXIE; 8774: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 00008778 <.LBB25>: UCB0CTL1 = UCSWRST; 8778: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 0000877c <.Loc.239.1>: UCB0CTL1 = UCSWRST | UCSSEL1; 877c: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8780: 69 00 00008782 <.Loc.240.1>: UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8782: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 8786: 68 00 00008788 <.Loc.241.1>: UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 8788: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 0000878c <.Loc.242.1>: UCB0BR1 = 0; 878c: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 00008790 <.Loc.243.1>: UCB0CTL1 &= ~UCSWRST; 8790: d2 c3 69 00 bic.b #1, &0x0069 ;r3 As==01 00008794 <.LBB27>: ADC10AE0 = ADC_IN; 8794: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 00008798 <.Loc.197.1>: ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 8798: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 879c: b0 01 0000879e <.Loc.198.1>: ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 879e: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 87a2: b2 01 000087a4 <.LBE27>: P1OUT ^= LED_GRN; 87a4: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 000087a8 <.Loc.268.1>: delay(0xFFFF); //lil bit O delay 87a8: 3c 43 mov #-1, r12 ;r3 As==11 87aa: b0 12 8c 83 call #-31860 ;#0x838c 000087ae <.LVL84>: P1OUT ^= LED_GRN; 87ae: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 000087b2 <.Loc.271.1>: memset(rxbuf, 0, 64); //clear the buffer 87b2: 0a 41 mov r1, r10 ; 87b4: 3a 50 68 00 add #104, r10 ;#0x0068 87b8: 7e 40 40 00 mov.b #64, r14 ;#0x0040 87bc: 4d 43 clr.b r13 ; 87be: 0c 4a mov r10, r12 ; 87c0: b0 12 f2 90 call #-28430 ;#0x90f2 000087c4 <.LVL85>: P3OUT &= ~CSn; //power on reset for radio, strobe CSn 87c4: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 000087c8 <.Loc.274.1>: delay(0xFF); 87c8: 7c 40 ff 00 mov.b #255, r12 ;#0x00ff 87cc: b0 12 8c 83 call #-31860 ;#0x838c 000087d0 <.LVL86>: P3OUT |= CSn; 87d0: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 000087d4 <.Loc.277.1>: delay(0xFFFF); 87d4: 3c 43 mov #-1, r12 ;r3 As==11 87d6: b0 12 8c 83 call #-31860 ;#0x838c 000087da <.LVL87>: CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 87da: 39 40 d6 8c mov #-29482,r9 ;#0x8cd6 87de: 7c 40 30 00 mov.b #48, r12 ;#0x0030 87e2: 89 12 call r9 ; 000087e4 <.LVL88>: CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 87e4: b0 12 8c 84 call #-31604 ;#0x848c 000087e8 <.LVL89>: CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 87e8: 7c 40 36 00 mov.b #54, r12 ;#0x0036 87ec: 89 12 call r9 ; 000087ee <.LVL90>: 87ee: 38 40 56 8d mov #-29354,r8 ;#0x8d56 000087f2 <.Loc.286.1>: i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 87f2: 79 40 35 00 mov.b #53, r9 ;#0x0035 000087f6 <.L60>: 87f6: 4c 49 mov.b r9, r12 ; 87f8: 88 12 call r8 ; 000087fa <.LVL91>: }while(i != 1); //this loop won't finish if theres a problem with the chip 87fa: 5c 93 cmp.b #1, r12 ;r3 As==01 87fc: fc 23 jnz $-6 ;abs 0x87f6 000087fe <.Loc.292.1>: P1OUT ^= LED_RED; 87fe: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 00008802 <.Loc.293.1>: delay(0xFF); //lil bit O delay 8802: 7c 40 ff 00 mov.b #255, r12 ;#0x00ff 00008806 <.LVL92>: 8806: b0 12 8c 83 call #-31860 ;#0x838c 0000880a <.LVL93>: P1OUT ^= LED_RED; 880a: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 0000880e <.Loc.296.1>: flags = 0; 880e: 82 43 d2 02 mov #0, &0x02d2 ;r3 As==00 00008812 <.Loc.297.1>: P2IFG = 0x00; 8812: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 00008816 <.LBB29>: TACTL = TASSEL_1; // ACLK, upmode 8816: b2 40 00 01 mov #256, &0x0160 ;#0x0100 881a: 60 01 0000881c <.Loc.124.1>: TACTL &= ~TAIFG; //clear interrupt 881c: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008820 <.Loc.125.1>: TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8820: b2 40 e0 2e mov #12000, &0x0172 ;#0x2ee0 8824: 72 01 00008826 <.Loc.127.1>: TAR = 0; 8826: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 0000882a <.Loc.128.1>: TACTL |= MC_UPTO_CCR0 | TAIE; //overflow interrupt enabled, start counting! 882a: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 882e: 60 01 00008830 <.LBE29>: seconds = 0; 8830: 82 43 d0 02 mov #0, &0x02d0 ;r3 As==00 00008834 <.Loc.300.1>: _enable_interrupts(); //enable interrupts 8834: 32 d2 eint 00008836 <.Loc.302.1>: RX_MODE(); //put radio into listen mode. 8836: b0 12 e8 85 call #-31256 ;#0x85e8 0000883a <.LVL96>: int loop=0,interval=120; //programmable variables 883a: b1 40 78 00 mov #120, 30(r1) ;#0x0078, 0x001e 883e: 1e 00 00008840 <.Loc.252.1>: unsigned int interchiplength=0,sample,length=0,i,rs232buflength=0; 8840: 81 43 10 00 mov #0, 16(r1) ;r3 As==00, 0x0010 00008844 <.L61>: if(flags & RXCHAR_RDY) 8844: 1c 42 d2 02 mov &0x02d2,r12 ;0x02d2 00008848 <.LVL98>: 8848: 7c f2 and.b #8, r12 ;r2 As==11 0000884a <.Loc.309.1>: 884a: b2 b2 d2 02 bit #8, &0x02d2 ;r2 As==11 884e: 1e 24 jz $+62 ;abs 0x888c 00008850 <.Loc.311.1>: _disable_interrupts(); 8850: 32 c2 dint 8852: 03 43 nop 00008854 <.LVL99>: flags &= ~RXCHAR_RDY; 8854: b2 c2 d2 02 bic #8, &0x02d2 ;r2 As==11 00008858 <.Loc.314.1>: if(rx_char == '\r' || rx_char == '\n'); //don't count a return in the buffer! 8858: 5d 42 cb 02 mov.b &0x02cb,r13 ;0x02cb 0000885c <.Loc.314.1>: 885c: 7d 90 0d 00 cmp.b #13, r13 ;#0x000d 8860: 4a 25 jz $+662 ;abs 0x8af6 00008862 <.Loc.314.1>: 8862: 7d 90 0a 00 cmp.b #10, r13 ;#0x000a 8866: 09 24 jz $+20 ;abs 0x887a 00008868 <.Loc.317.1>: rs232buf[rs232buflength]=rx_char; 8868: 7c 40 28 00 mov.b #40, r12 ;#0x0028 886c: 0c 51 add r1, r12 ; 886e: 1c 51 10 00 add 16(r1), r12 ;0x00010 8872: cc 4d 00 00 mov.b r13, 0(r12) ; 00008876 <.Loc.318.1>: rs232buflength++; 8876: 91 53 10 00 inc 16(r1) ; 0000887a <.L64>: if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 887a: 7c 40 3c 00 mov.b #60, r12 ;#0x003c 887e: 1c 91 10 00 cmp 16(r1), r12 ;0x00010 8882: 3c 29 jnc $+634 ;abs 0x8afc 00008884 <.L65>: P1OUT &= ~LED_RED; 8884: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008888 <.Loc.334.1>: _enable_interrupts(); 8888: 32 d2 eint 0000888a <.Loc.312.1>: loop = 1; 888a: 5c 43 mov.b #1, r12 ;r3 As==01 0000888c <.L62>: if(flags & CONTROLLER_RDY) //Someone is sending us something 888c: a2 b3 d2 02 bit #2, &0x02d2 ;r3 As==10 8890: 08 20 jnz $+18 ;abs 0x88a2 00008892 <.Loc.406.1>: if(flags & TIMER_UP) //Did the timer expire? report your findings! 8892: 92 b3 d2 02 bit #1, &0x02d2 ;r3 As==01 8896: 27 20 jnz $+80 ;abs 0x88e6 00008898 <.Loc.504.1>: if(loop == 0) 8898: 0c 93 cmp #0, r12 ;r3 As==00 889a: d4 23 jnz $-86 ;abs 0x8844 0000889c <.Loc.505.1>: LPM3; //when we wake up it'll be because of an event 889c: 32 d0 d0 00 bis #208, r2 ;#0x00d0 88a0: d1 3f jmp $-92 ;abs 0x8844 000088a2 <.L128>: _disable_interrupts(); 88a2: 32 c2 dint 88a4: 03 43 nop 000088a6 <.LVL103>: P1OUT |= LED_RED; 88a6: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 000088aa <.Loc.341.1>: flags &= ~CONTROLLER_RDY; 88aa: a2 c3 d2 02 bic #2, &0x02d2 ;r3 As==10 000088ae <.Loc.342.1>: memset(rxbuf, 0, 64); 88ae: 7e 40 40 00 mov.b #64, r14 ;#0x0040 88b2: 4d 43 clr.b r13 ; 88b4: 0c 4a mov r10, r12 ; 88b6: b0 12 f2 90 call #-28430 ;#0x90f2 000088ba <.LVL104>: length = RX_STRING(rxbuf, 64); 88ba: 7d 40 40 00 mov.b #64, r13 ;#0x0040 88be: 0c 4a mov r10, r12 ; 88c0: b0 12 18 86 call #-31208 ;#0x8618 000088c4 <.LVL105>: if(LQI & bit7) //CRC ok 88c4: 5c 42 cd 02 mov.b &0x02cd,r12 ;0x02cd 000088c8 <.Loc.345.1>: 88c8: 4c 93 cmp.b #0, r12 ;r3 As==00 88ca: 40 39 jl $+642 ;abs 0x8b4c 000088cc <.L67>: P2IFG &= ~GDO0; //reset trashed interrupt state 88cc: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 88d0: 2b 00 000088d2 <.Loc.399.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 88d2: b0 12 e8 85 call #-31256 ;#0x85e8 000088d6 <.LVL106>: P1OUT &= ~LED_RED; 88d6: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 000088da <.Loc.403.1>: P1OUT &= ~LED_GRN; 88da: e2 c3 21 00 bic.b #2, &0x0021 ;r3 As==10 000088de <.Loc.404.1>: _enable_interrupts(); 88de: 32 d2 eint 000088e0 <.Loc.406.1>: if(flags & TIMER_UP) //Did the timer expire? report your findings! 88e0: 92 b3 d2 02 bit #1, &0x02d2 ;r3 As==01 88e4: af 27 jz $-160 ;abs 0x8844 000088e6 <.L80>: if(flags & GO_NOW) //report every 20 second by default 88e6: a2 b2 d2 02 bit #4, &0x02d2 ;r2 As==10 88ea: 1c 21 jnz $+570 ;abs 0x8b24 000088ec <.L83>: if(((seconds) % interval) == 0 || (flags & GO_NOW)) //report every 60 second by default 88ec: 1d 41 1e 00 mov 30(r1), r13 ;0x0001e 88f0: 1c 42 d0 02 mov &0x02d0,r12 ;0x02d0 88f4: b0 12 ea 8f call #-28694 ;#0x8fea 000088f8 <.Loc.438.1>: 88f8: 0c 93 cmp #0, r12 ;r3 As==00 88fa: 03 24 jz $+8 ;abs 0x8902 000088fc <.Loc.438.1>: 88fc: a2 b2 d2 02 bit #4, &0x02d2 ;r2 As==10 8900: a1 27 jz $-188 ;abs 0x8844 00008902 <.L84>: flags &= ~(TIMER_UP|GO_NOW); //clear the flag 8902: b2 f0 fa ff and #-6, &0x02d2 ;#0xfffa 8906: d2 02 00008908 <.Loc.443.1>: P1OUT |= LED_RED; 8908: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 0000890c <.Loc.445.1>: ADC10CTL1 = INCH_10 + ADC10DIV_4; // Temp Sensor ADC10CLK/5 890c: b2 40 80 a0 mov #-24448,&0x01b2 ;#0xa080 8910: b2 01 00008912 <.Loc.446.1>: ADC10CTL0 = SREF_1 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE + ADC10SR; 8912: b2 40 38 3c mov #15416, &0x01b0 ;#0x3c38 8916: b0 01 00008918 <.Loc.447.1>: ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 8918: b2 d0 03 00 bis #3, &0x01b0 ; 891c: b0 01 0000891e <.Loc.449.1>: LPM3; 891e: 32 d0 d0 00 bis #208, r2 ;#0x00d0 00008922 <.Loc.450.1>: traw = ADC10MEM; 8922: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 8926: 0d 43 clr r13 ; 8928: 81 4c 20 00 mov r12, 32(r1) ; 0x0020 892c: 81 4d 22 00 mov r13, 34(r1) ; 0x0022 00008930 <.Loc.452.1>: ADC10CTL0 &= ~ENC; 8930: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 00008934 <.Loc.454.1>: ADC10CTL1 = INCH_11; // AVcc/2 8934: b2 40 00 b0 mov #-20480,&0x01b2 ;#0xb000 8938: b2 01 0000893a <.Loc.455.1>: ADC10CTL0 = SREF_1 + ADC10SHT_2 + REFON + ADC10ON + ADC10IE + REF2_5V; 893a: b2 40 78 30 mov #12408, &0x01b0 ;#0x3078 893e: b0 01 00008940 <.Loc.456.1>: ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 8940: b2 d0 03 00 bis #3, &0x01b0 ; 8944: b0 01 00008946 <.Loc.458.1>: LPM3; 8946: 32 d0 d0 00 bis #208, r2 ;#0x00d0 0000894a <.Loc.459.1>: _disable_interrupts(); 894a: 32 c2 dint 894c: 03 43 nop 0000894e <.Loc.460.1>: vraw = ADC10MEM; 894e: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 8952: 0d 43 clr r13 ; 8954: 81 4c 24 00 mov r12, 36(r1) ; 0x0024 8958: 81 4d 26 00 mov r13, 38(r1) ; 0x0026 0000895c <.Loc.461.1>: ADC10CTL0 &= ~ENC; 895c: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 00008960 <.Loc.462.1>: ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 8960: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 8964: b0 01 00008966 <.Loc.468.1>: degC = (((traw - 673) * 4230) / 1024); 8966: 18 41 20 00 mov 32(r1), r8 ;0x00020 896a: 19 41 22 00 mov 34(r1), r9 ;0x00022 0000896e <.LVL109>: volt = (vraw*25)/512; 896e: 1c 41 24 00 mov 36(r1), r12 ;0x00024 8972: 1d 41 26 00 mov 38(r1), r13 ;0x00026 00008976 <.LVL110>: length=sprintf(rxbuf, "GND:%s S:%u T:%d V:%d", CALLSIGN, seconds, degC, volt); //send the temperature to the ground 8976: 91 42 d0 02 mov &0x02d0,10(r1) ;0x02d0, 0x000a 897a: 0a 00 0000897c <.Loc.475.1>: volt = (vraw*25)/512; 897c: 0e 4c mov r12, r14 ; 897e: 0e 5c add r12, r14 ; 8980: 0f 4d mov r13, r15 ; 8982: 0f 6d addc r13, r15 ; 8984: 0e 5c add r12, r14 ; 8986: 81 4e 12 00 mov r14, 18(r1) ; 0x0012 898a: 0f 6d addc r13, r15 ; 898c: 81 4f 14 00 mov r15, 20(r1) ; 0x0014 8990: 1e 41 12 00 mov 18(r1), r14 ;0x00012 8994: 1f 41 14 00 mov 20(r1), r15 ;0x00014 8998: 0e 5e rla r14 ; 899a: 0f 6f rlc r15 ; 899c: 0e 5e rla r14 ; 899e: 0f 6f rlc r15 ; 89a0: 0e 5e rla r14 ; 89a2: 0f 6f rlc r15 ; 89a4: 0b 4e mov r14, r11 ; 89a6: 0b 5c add r12, r11 ; 89a8: 81 4b 0c 00 mov r11, 12(r1) ; 0x000c 89ac: 0b 4f mov r15, r11 ; 89ae: 0b 6d addc r13, r11 ; 89b0: 81 4b 0e 00 mov r11, 14(r1) ; 0x000e 000089b4 <.Loc.475.1>: 89b4: 0b 93 cmp #0, r11 ;r3 As==00 89b6: 05 34 jge $+12 ;abs 0x89c2 89b8: b1 50 ff 01 add #511, 12(r1) ;#0x01ff, 0x000c 89bc: 0c 00 89be: 81 63 0e 00 adc 14(r1) ; 000089c2 <.L85>: 89c2: 1c 41 0c 00 mov 12(r1), r12 ;0x0000c 000089c6 <.LVL111>: 89c6: 1d 41 0e 00 mov 14(r1), r13 ;0x0000e 89ca: 0d 11 rra r13 ; 89cc: 0c 10 rrc r12 ; 89ce: 0d 11 rra r13 ; 89d0: 0c 10 rrc r12 ; 89d2: 0d 11 rra r13 ; 89d4: 0c 10 rrc r12 ; 89d6: 0d 11 rra r13 ; 89d8: 0c 10 rrc r12 ; 89da: 0d 11 rra r13 ; 89dc: 0c 10 rrc r12 ; 89de: 0d 11 rra r13 ; 89e0: 0c 10 rrc r12 ; 89e2: 0d 11 rra r13 ; 89e4: 0c 10 rrc r12 ; 89e6: 0d 11 rra r13 ; 89e8: 0c 10 rrc r12 ; 89ea: 0d 11 rra r13 ; 89ec: 0c 10 rrc r12 ; 000089ee <.Loc.475.1>: 89ee: 81 4c 08 00 mov r12, 8(r1) ; 000089f2 <.Loc.468.1>: degC = (((traw - 673) * 4230) / 1024); 89f2: 06 48 mov r8, r6 ; 89f4: 36 50 5f fd add #-673, r6 ;#0xfd5f 89f8: 07 49 mov r9, r7 ; 89fa: 37 63 addc #-1, r7 ;r3 As==11 000089fc <.Loc.468.1>: 89fc: 0c 46 mov r6, r12 ; 89fe: 0d 47 mov r7, r13 ; 8a00: 0c 5c rla r12 ; 8a02: 0d 6d rlc r13 ; 8a04: 0c 5c rla r12 ; 8a06: 0d 6d rlc r13 ; 8a08: 0c 5c rla r12 ; 8a0a: 0d 6d rlc r13 ; 8a0c: 0c 5c rla r12 ; 8a0e: 0d 6d rlc r13 ; 8a10: 0c 5c rla r12 ; 8a12: 0d 6d rlc r13 ; 8a14: 0e 4c mov r12, r14 ; 8a16: 0e 56 add r6, r14 ; 8a18: 81 4e 16 00 mov r14, 22(r1) ; 0x0016 8a1c: 0b 4d mov r13, r11 ; 8a1e: 0b 67 addc r7, r11 ; 8a20: 81 4b 18 00 mov r11, 24(r1) ; 0x0018 8a24: 1c 41 16 00 mov 22(r1), r12 ;0x00016 8a28: 1d 41 18 00 mov 24(r1), r13 ;0x00018 8a2c: 0c 5c rla r12 ; 8a2e: 0d 6d rlc r13 ; 8a30: 0c 5c rla r12 ; 8a32: 0d 6d rlc r13 ; 8a34: 0c 5c rla r12 ; 8a36: 0d 6d rlc r13 ; 8a38: 0c 5c rla r12 ; 8a3a: 0d 6d rlc r13 ; 8a3c: 0e 4c mov r12, r14 ; 8a3e: 0e 56 add r6, r14 ; 8a40: 81 4e 1a 00 mov r14, 26(r1) ; 0x001a 8a44: 0b 4d mov r13, r11 ; 8a46: 0b 67 addc r7, r11 ; 8a48: 81 4b 1c 00 mov r11, 28(r1) ; 0x001c 8a4c: 1c 41 1a 00 mov 26(r1), r12 ;0x0001a 8a50: 1d 41 1c 00 mov 28(r1), r13 ;0x0001c 8a54: 0c 5c rla r12 ; 8a56: 0d 6d rlc r13 ; 8a58: 0c 5c rla r12 ; 8a5a: 0d 6d rlc r13 ; 8a5c: 0c 86 sub r6, r12 ; 8a5e: 0d 77 subc r7, r13 ; 8a60: 04 4c mov r12, r4 ; 8a62: 04 5c add r12, r4 ; 8a64: 05 4d mov r13, r5 ; 8a66: 05 6d addc r13, r5 ; 00008a68 <.Loc.468.1>: 8a68: 05 93 cmp #0, r5 ;r3 As==00 8a6a: 03 34 jge $+8 ;abs 0x8a72 8a6c: 34 50 ff 03 add #1023, r4 ;#0x03ff 8a70: 05 63 adc r5 ; 00008a72 <.L87>: 8a72: 0c 44 mov r4, r12 ; 8a74: 0d 45 mov r5, r13 ; 8a76: 0d 11 rra r13 ; 8a78: 0c 10 rrc r12 ; 8a7a: 0d 11 rra r13 ; 8a7c: 0c 10 rrc r12 ; 8a7e: 0d 11 rra r13 ; 8a80: 0c 10 rrc r12 ; 8a82: 0d 11 rra r13 ; 8a84: 0c 10 rrc r12 ; 8a86: 0d 11 rra r13 ; 8a88: 0c 10 rrc r12 ; 8a8a: 0d 11 rra r13 ; 8a8c: 0c 10 rrc r12 ; 8a8e: 0d 11 rra r13 ; 8a90: 0c 10 rrc r12 ; 8a92: 0d 11 rra r13 ; 8a94: 0c 10 rrc r12 ; 8a96: 0d 11 rra r13 ; 8a98: 0c 10 rrc r12 ; 8a9a: 0d 11 rra r13 ; 8a9c: 0c 10 rrc r12 ; 00008a9e <.Loc.468.1>: 8a9e: 81 4c 06 00 mov r12, 6(r1) ; 00008aa2 <.Loc.485.1>: length=sprintf(rxbuf, "GND:%s S:%u T:%d V:%d", CALLSIGN, seconds, degC, volt); //send the temperature to the ground 8aa2: 91 41 0a 00 mov 10(r1), 4(r1) ;0x0000a 8aa6: 04 00 8aa8: b1 40 11 80 mov #-32751,2(r1) ;#0x8011 8aac: 02 00 8aae: b1 40 a6 80 mov #-32602,0(r1) ;#0x80a6 8ab2: 00 00 8ab4: 0c 4a mov r10, r12 ; 8ab6: b0 12 6e 91 call #-28306 ;#0x916e 00008aba <.LBB31>: for( pointer = 0; pointer < length; pointer++) 8aba: 0d 4a mov r10, r13 ; 8abc: 0c 5a add r10, r12 ; 00008abe <.L90>: UCA0TXBUF = string[pointer]; 8abe: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008ac2 <.L89>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8ac2: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8ac6: fd 27 jz $-4 ;abs 0x8ac2 00008ac8 <.LBE33>: for( pointer = 0; pointer < length; pointer++) 8ac8: 0c 9d cmp r13, r12 ; 8aca: f9 23 jnz $-12 ;abs 0x8abe 00008acc <.LBB34>: UCA0TXBUF = string[pointer]; 8acc: f2 40 0d 00 mov.b #13, &0x0067 ;#0x000d 8ad0: 67 00 00008ad2 <.L91>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8ad2: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8ad6: fd 27 jz $-4 ;abs 0x8ad2 00008ad8 <.LBB37>: UCA0TXBUF = string[pointer]; 8ad8: f2 40 0a 00 mov.b #10, &0x0067 ;#0x000a 8adc: 67 00 00008ade <.L92>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8ade: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8ae2: fd 27 jz $-4 ;abs 0x8ade 00008ae4 <.LBE34>: P2IFG &= ~GDO0; //reset trashed interrupt state 8ae4: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8ae8: 2b 00 00008aea <.Loc.491.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 8aea: b0 12 e8 85 call #-31256 ;#0x85e8 00008aee <.LVL119>: P1OUT &= ~LED_RED; 8aee: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008af2 <.Loc.501.1>: _enable_interrupts(); 8af2: 32 d2 eint 00008af4 <.Loc.504.1>: if(loop == 0) 8af4: a7 3e jmp $-688 ;abs 0x8844 00008af6 <.L63>: if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 8af6: 81 93 10 00 cmp #0, 16(r1) ;r3 As==00, 0x0010 8afa: c4 26 jz $-630 ;abs 0x8884 00008afc <.L93>: P1OUT |= LED_RED; 8afc: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 00008b00 <.Loc.324.1>: TX_STRING(rs232buf,rs232buflength); //Send the string out 8b00: 1b 41 10 00 mov 16(r1), r11 ;0x00010 8b04: 4d 4b mov.b r11, r13 ; 8b06: 0c 41 mov r1, r12 ; 8b08: 3c 50 28 00 add #40, r12 ;#0x0028 8b0c: b0 12 f4 86 call #-30988 ;#0x86f4 00008b10 <.LVL121>: P2IFG &= ~GDO0; //reset trashed interrupt state 8b10: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8b14: 2b 00 00008b16 <.Loc.326.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 8b16: b0 12 e8 85 call #-31256 ;#0x85e8 00008b1a <.LVL122>: P1OUT &= ~LED_RED; 8b1a: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008b1e <.Loc.327.1>: rs232buflength = 0; 8b1e: 81 43 10 00 mov #0, 16(r1) ;r3 As==00, 0x0010 8b22: b0 3e jmp $-670 ;abs 0x8884 00008b24 <.L130>: _disable_interrupts(); 8b24: 32 c2 dint 8b26: 03 43 nop 00008b28 <.Loc.414.1>: flags &= ~(TIMER_UP|GO_NOW); //clear the flag 8b28: b2 f0 fa ff and #-6, &0x02d2 ;#0xfffa 8b2c: d2 02 00008b2e <.Loc.415.1>: P1OUT |= LED_GRN; 8b2e: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008b32 <.Loc.429.1>: length=sprintf(rxbuf, "GND:%s TEST", CALLSIGN); //send the temperature to the ground 8b32: b1 40 11 80 mov #-32751,2(r1) ;#0x8011 8b36: 02 00 8b38: b1 40 9a 80 mov #-32614,0(r1) ;#0x809a 8b3c: 00 00 8b3e: 0c 4a mov r10, r12 ; 8b40: b0 12 6e 91 call #-28306 ;#0x916e 00008b44 <.LVL124>: P1OUT &= ~LED_GRN; 8b44: e2 c3 21 00 bic.b #2, &0x0021 ;r3 As==10 00008b48 <.Loc.436.1>: _enable_interrupts(); 8b48: 32 d2 eint 8b4a: d0 3e jmp $-606 ;abs 0x88ec 00008b4c <.L129>: P1OUT |= LED_GRN; 8b4c: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008b50 <.Loc.349.1>: interchiplength = snprintf(interchip,sizeof(interchip),"%s :%ddBm LQI:%d",rxbuf, RSSI_DBM, LQI-128); 8b50: 3c 50 80 ff add #-128, r12 ;#0xff80 8b54: 81 4c 06 00 mov r12, 6(r1) ; 8b58: 5c 42 ca 02 mov.b &0x02ca,r12 ;0x02ca 8b5c: 8c 11 sxt r12 ; 8b5e: 81 4c 04 00 mov r12, 4(r1) ; 8b62: 81 4a 02 00 mov r10, 2(r1) ; 8b66: b1 40 00 80 mov #-32768,0(r1) ;#0x8000 8b6a: 00 00 8b6c: 7d 40 50 00 mov.b #80, r13 ;#0x0050 8b70: 0c 41 mov r1, r12 ; 8b72: 3c 50 a8 00 add #168, r12 ;#0x00a8 8b76: b0 12 04 91 call #-28412 ;#0x9104 00008b7a <.LBB38>: for( pointer = 0; pointer < length; pointer++) 8b7a: 0d 41 mov r1, r13 ; 8b7c: 3d 50 a8 00 add #168, r13 ;#0x00a8 8b80: 0c 5d add r13, r12 ; 00008b82 <.L69>: UCA0TXBUF = string[pointer]; 8b82: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008b86 <.L68>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8b86: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8b8a: fd 27 jz $-4 ;abs 0x8b86 00008b8c <.LBE40>: for( pointer = 0; pointer < length; pointer++) 8b8c: 0c 9d cmp r13, r12 ; 8b8e: f9 23 jnz $-12 ;abs 0x8b82 00008b90 <.LBB41>: UCA0TXBUF = string[pointer]; 8b90: f2 40 0d 00 mov.b #13, &0x0067 ;#0x000d 8b94: 67 00 00008b96 <.L70>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8b96: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8b9a: fd 27 jz $-4 ;abs 0x8b96 00008b9c <.LBB44>: UCA0TXBUF = string[pointer]; 8b9c: f2 40 0a 00 mov.b #10, &0x0067 ;#0x000a 8ba0: 67 00 00008ba2 <.L71>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8ba2: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8ba6: fd 27 jz $-4 ;abs 0x8ba2 00008ba8 <.LBE41>: if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8ba8: fa 90 4d 00 cmp.b #77, 0(r10) ;#0x004d 8bac: 00 00 8bae: 10 24 jz $+34 ;abs 0x8bd0 00008bb0 <.L74>: if(memcmp("Pong!",rxbuf,5)==0) //if this is an ack to an outbound packet then we'll light a green light 8bb0: 7e 40 05 00 mov.b #5, r14 ; 8bb4: 0d 4a mov r10, r13 ; 8bb6: 3c 40 94 80 mov #-32620,r12 ;#0x8094 8bba: b0 12 c8 90 call #-28472 ;#0x90c8 00008bbe <.LVL132>: 8bbe: 0c 93 cmp #0, r12 ;r3 As==00 8bc0: 85 22 jnz $-756 ;abs 0x88cc 00008bc2 <.Loc.391.1>: P1OUT |= LED_GRN; 8bc2: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008bc6 <.Loc.392.1>: delay(0xFFF); 8bc6: 3c 40 ff 0f mov #4095, r12 ;#0x0fff 8bca: b0 12 8c 83 call #-31860 ;#0x838c 00008bce <.LVL133>: 8bce: 7e 3e jmp $-770 ;abs 0x88cc 00008bd0 <.L131>: if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8bd0: f1 90 4f 00 cmp.b #79, 105(r1) ;#0x004f, 0x0069 8bd4: 69 00 8bd6: ec 23 jnz $-38 ;abs 0x8bb0 8bd8: f1 90 4e 00 cmp.b #78, 106(r1) ;#0x004e, 0x006a 8bdc: 6a 00 8bde: e8 23 jnz $-46 ;abs 0x8bb0 00008be0 <.Loc.355.1>: if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 8be0: 3d 40 15 80 mov #-32747,r13 ;#0x8015 8be4: 0c 4a mov r10, r12 ; 8be6: b0 12 ca 91 call #-28214 ;#0x91ca 00008bea <.LVL134>: 8bea: 0c 93 cmp #0, r12 ;r3 As==00 8bec: 1a 24 jz $+54 ;abs 0x8c22 00008bee <.Loc.357.1>: length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8bee: 7d 40 3d 00 mov.b #61, r13 ;#0x003d 8bf2: 0c 4a mov r10, r12 ; 8bf4: b0 12 ae 91 call #-28242 ;#0x91ae 00008bf8 <.LVL135>: 8bf8: 1c 53 inc r12 ; 8bfa: b0 12 bc 90 call #-28484 ;#0x90bc 00008bfe <.LVL136>: 8bfe: 09 4c mov r12, r9 ; 00008c00 <.LVL137>: if(length > 0) 8c00: 0c 93 cmp #0, r12 ;r3 As==00 8c02: 29 24 jz $+84 ;abs 0x8c56 00008c04 <.LVL138>: length = sprintf(rxbuf,"\e[32mGND:MON Interval is now %d\e[30m",interval); 8c04: 81 4c 02 00 mov r12, 2(r1) ; 8c08: b1 40 1e 80 mov #-32738,0(r1) ;#0x801e 8c0c: 00 00 8c0e: 0c 4a mov r10, r12 ; 8c10: b0 12 6e 91 call #-28306 ;#0x916e 00008c14 <.LVL139>: 8c14: 81 49 1e 00 mov r9, 30(r1) ; 0x001e 00008c18 <.L127>: TX_STRING(rxbuf,length); 8c18: 4d 4c mov.b r12, r13 ; 8c1a: 0c 4a mov r10, r12 ; 00008c1c <.LVL141>: 8c1c: b0 12 f4 86 call #-30988 ;#0x86f4 00008c20 <.LVL142>: 8c20: 55 3e jmp $-852 ;abs 0x88cc 00008c22 <.L75>: else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 8c22: 3d 40 70 80 mov #-32656,r13 ;#0x8070 8c26: 0c 4a mov r10, r12 ; 8c28: b0 12 ca 91 call #-28214 ;#0x91ca 00008c2c <.LVL143>: 8c2c: 0c 93 cmp #0, r12 ;r3 As==00 8c2e: 1d 24 jz $+60 ;abs 0x8c6a 00008c30 <.Loc.370.1>: length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 8c30: 5b 42 cd 02 mov.b &0x02cd,r11 ;0x02cd 8c34: 81 4b 06 00 mov r11, 6(r1) ; 8c38: 5c 42 ca 02 mov.b &0x02ca,r12 ;0x02ca 8c3c: 8c 11 sxt r12 ; 8c3e: 81 4c 04 00 mov r12, 4(r1) ; 8c42: b1 40 11 80 mov #-32751,2(r1) ;#0x8011 8c46: 02 00 8c48: b1 40 77 80 mov #-32649,0(r1) ;#0x8077 8c4c: 00 00 8c4e: 0c 4a mov r10, r12 ; 8c50: b0 12 6e 91 call #-28306 ;#0x916e 00008c54 <.LVL144>: 8c54: e1 3f jmp $-60 ;abs 0x8c18 00008c56 <.L76>: length = sprintf(rxbuf,"\e[32mGND:MON Reporting every %d seconds\e[30m",interval); 8c56: 91 41 1e 00 mov 30(r1), 2(r1) ;0x0001e 8c5a: 02 00 8c5c: b1 40 43 80 mov #-32701,0(r1) ;#0x8043 8c60: 00 00 8c62: 0c 4a mov r10, r12 ; 8c64: b0 12 6e 91 call #-28306 ;#0x916e 00008c68 <.LVL146>: TX_STRING(rxbuf,length); 8c68: d7 3f jmp $-80 ;abs 0x8c18 00008c6a <.L78>: else if(strstr( rxbuf, "now" ) != NULL) //report now 8c6a: 3d 40 90 80 mov #-32624,r13 ;#0x8090 8c6e: 0c 4a mov r10, r12 ; 8c70: b0 12 ca 91 call #-28214 ;#0x91ca 00008c74 <.LVL148>: 8c74: 0c 93 cmp #0, r12 ;r3 As==00 8c76: 04 24 jz $+10 ;abs 0x8c80 00008c78 <.Loc.376.1>: flags |= GO_NOW | TIMER_UP; ///set event flags to trigger the reporting 8c78: b2 d0 05 00 bis #5, &0x02d2 ; 8c7c: d2 02 8c7e: 26 3e jmp $-946 ;abs 0x88cc 00008c80 <.L79>: length = sprintf(rxbuf,"\e[34mGND:MON Pong!\e[30m"); 8c80: ba 40 1b 5b mov #23323, 0(r10) ;#0x5b1b 8c84: 00 00 8c86: ba 40 33 34 mov #13363, 2(r10) ;#0x3433 8c8a: 02 00 8c8c: ba 40 6d 47 mov #18285, 4(r10) ;#0x476d 8c90: 04 00 8c92: ba 40 4e 44 mov #17486, 6(r10) ;#0x444e 8c96: 06 00 8c98: ba 40 3a 4d mov #19770, 8(r10) ;#0x4d3a 8c9c: 08 00 8c9e: ba 40 4f 4e mov #20047, 10(r10) ;#0x4e4f, 0x000a 8ca2: 0a 00 8ca4: ba 40 20 50 mov #20512, 12(r10) ;#0x5020, 0x000c 8ca8: 0c 00 8caa: ba 40 6f 6e mov #28271, 14(r10) ;#0x6e6f, 0x000e 8cae: 0e 00 8cb0: ba 40 67 21 mov #8551, 16(r10) ;#0x2167, 0x0010 8cb4: 10 00 8cb6: ba 40 1b 5b mov #23323, 18(r10) ;#0x5b1b, 0x0012 8cba: 12 00 8cbc: ba 40 33 30 mov #12339, 20(r10) ;#0x3033, 0x0014 8cc0: 14 00 8cc2: ba 40 6d 00 mov #109, 22(r10) ;#0x006d, 0x0016 8cc6: 16 00 00008cc8 <.LVL149>: TX_STRING(rxbuf, length); 8cc8: 7d 40 17 00 mov.b #23, r13 ;#0x0017 8ccc: 0c 4a mov r10, r12 ; 8cce: b0 12 f4 86 call #-30988 ;#0x86f4 00008cd2 <.LVL150>: 8cd2: 30 40 cc 88 br #0x88cc ; 00008cd6 : #include "hardware.h" /** Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { 8cd6: 21 83 decd r1 ; 00008cd8 <.LCFI0>: 8cd8: c1 4c 01 00 mov.b r12, 1(r1) ; 00008cdc <.Loc.8.1>: status=0; 8cdc: c2 43 d4 02 mov.b #0, &0x02d4 ;r3 As==00 00008ce0 <.Loc.9.1>: P3OUT &= ~CSn; //pull CSn low to activate chip 8ce0: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8ce4: 5c c3 bic.b #1, r12 ;r3 As==01 8ce6: 3c f0 ff 00 and #255, r12 ;#0x00ff 8cea: c2 4c 19 00 mov.b r12, &0x0019 ; 00008cee <.Loc.11.1>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8cee: 03 43 nop 00008cf0 <.L2>: 8cf0: 00008cf2 : 8cf2: 18 00 mova @r0+, r8 ; 8cf4: 6c f2 and.b #4, r12 ;r2 As==10 00008cf6 <.Loc.11.1>: 8cf6: 0c 93 cmp #0, r12 ;r3 As==00 8cf8: fb 23 jnz $-8 ;abs 0x8cf0 00008cfa <.Loc.13.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8cfa: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8cfe: 7c d0 0e 00 bis.b #14, r12 ;#0x000e 8d02: 3c f0 ff 00 and #255, r12 ;#0x00ff 8d06: c2 4c 1b 00 mov.b r12, &0x001b ; 00008d0a <.Loc.15.1>: IFG2 &= ~UCB0RXIFG; 8d0a: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8d0e: 6c c2 bic.b #4, r12 ;r2 As==10 8d10: 3c f0 ff 00 and #255, r12 ;#0x00ff 8d14: c2 4c 03 00 mov.b r12, &0x0003 ; 00008d18 <.Loc.16.1>: UCB0TXBUF = reg; 8d18: d2 41 01 00 mov.b 1(r1), &0x006f ; 8d1c: 6f 00 00008d1e <.Loc.17.1>: while (!(IFG2 & UCB0RXIFG)); 8d1e: 03 43 nop 00008d20 <.L3>: 8d20: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8d24: 6c f2 and.b #4, r12 ;r2 As==10 00008d26 <.Loc.17.1>: 8d26: 0c 93 cmp #0, r12 ;r3 As==00 8d28: fb 27 jz $-8 ;abs 0x8d20 00008d2a <.Loc.18.1>: status = UCB0RXBUF; 8d2a: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 8d2e: c2 4c d4 02 mov.b r12, &0x02d4 ; 00008d32 <.Loc.20.1>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8d32: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8d36: 5c d3 bis.b #1, r12 ;r3 As==01 8d38: 3c f0 ff 00 and #255, r12 ;#0x00ff 8d3c: c2 4c 19 00 mov.b r12, &0x0019 ; 00008d40 <.Loc.21.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8d40: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8d44: 7c f0 f1 ff and.b #-15, r12 ;#0xfff1 8d48: 3c f0 ff 00 and #255, r12 ;#0x00ff 8d4c: c2 4c 1b 00 mov.b r12, &0x001b ; 00008d50 <.Loc.23.1>: } 8d50: 03 43 nop 8d52: 21 53 incd r1 ; 00008d54 <.LCFI1>: 8d54: 30 41 ret 00008d56 : /** Read a register from the CCXX */ char CCXX_SPI_RDREG(char reg) { 8d56: 21 82 sub #4, r1 ;r2 As==10 00008d58 <.LCFI2>: 8d58: c1 4c 01 00 mov.b r12, 1(r1) ; 00008d5c <.Loc.31.1>: unsigned char rx=0; 8d5c: c1 43 03 00 mov.b #0, 3(r1) ;r3 As==00 00008d60 <.Loc.32.1>: if(reg >= 0x30) 8d60: 7c 40 2f 00 mov.b #47, r12 ;#0x002f 8d64: 5c 91 01 00 cmp.b 1(r1), r12 ; 8d68: 04 2c jc $+10 ;abs 0x8d72 00008d6a <.Loc.33.1>: reg |= 0xC0; 8d6a: f1 d0 c0 ff bis.b #-64, 1(r1) ;#0xffc0 8d6e: 01 00 8d70: 03 3c jmp $+8 ;abs 0x8d78 00008d72 <.L5>: else reg |= 0x80; 8d72: f1 d0 80 ff bis.b #-128, 1(r1) ;#0xff80 8d76: 01 00 00008d78 <.L6>: status=0; 8d78: c2 43 d4 02 mov.b #0, &0x02d4 ;r3 As==00 00008d7c <.Loc.38.1>: P3OUT &= ~CSn; //pull CSn low to activate chip 8d7c: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8d80: 5c c3 bic.b #1, r12 ;r3 As==01 8d82: 3c f0 ff 00 and #255, r12 ;#0x00ff 8d86: c2 4c 19 00 mov.b r12, &0x0019 ; 00008d8a <.Loc.40.1>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8d8a: 03 43 nop 00008d8c <.L7>: 8d8c: 5c 42 18 00 mov.b &0x0018,r12 ;0x0018 8d90: 6c f2 and.b #4, r12 ;r2 As==10 00008d92 <.Loc.40.1>: 8d92: 0c 93 cmp #0, r12 ;r3 As==00 8d94: fb 23 jnz $-8 ;abs 0x8d8c 00008d96 <.Loc.42.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8d96: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8d9a: 7c d0 0e 00 bis.b #14, r12 ;#0x000e 8d9e: 3c f0 ff 00 and #255, r12 ;#0x00ff 8da2: c2 4c 1b 00 mov.b r12, &0x001b ; 00008da6 <.Loc.44.1>: IFG2 &= ~UCB0RXIFG; 8da6: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8daa: 6c c2 bic.b #4, r12 ;r2 As==10 8dac: 3c f0 ff 00 and #255, r12 ;#0x00ff 8db0: c2 4c 03 00 mov.b r12, &0x0003 ; 00008db4 <.Loc.45.1>: UCB0TXBUF = reg; 8db4: d2 41 01 00 mov.b 1(r1), &0x006f ; 8db8: 6f 00 00008dba <.Loc.46.1>: while (!(IFG2 & UCB0RXIFG)); 8dba: 03 43 nop 00008dbc <.L8>: 8dbc: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8dc0: 6c f2 and.b #4, r12 ;r2 As==10 00008dc2 <.Loc.46.1>: 8dc2: 0c 93 cmp #0, r12 ;r3 As==00 8dc4: fb 27 jz $-8 ;abs 0x8dbc 00008dc6 <.Loc.47.1>: status = UCB0RXBUF; 8dc6: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 8dca: c2 4c d4 02 mov.b r12, &0x02d4 ; 00008dce <.Loc.49.1>: IFG2 &= ~UCB0RXIFG; 8dce: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8dd2: 6c c2 bic.b #4, r12 ;r2 As==10 8dd4: 3c f0 ff 00 and #255, r12 ;#0x00ff 8dd8: c2 4c 03 00 mov.b r12, &0x0003 ; 00008ddc <.Loc.50.1>: UCB0TXBUF = 0; 8ddc: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 00008de0 <.Loc.51.1>: while (!(IFG2 & UCB0RXIFG)); 8de0: 03 43 nop 00008de2 <.L9>: 8de2: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8de6: 6c f2 and.b #4, r12 ;r2 As==10 00008de8 <.Loc.51.1>: 8de8: 0c 93 cmp #0, r12 ;r3 As==00 8dea: fb 27 jz $-8 ;abs 0x8de2 00008dec <.Loc.52.1>: rx = UCB0RXBUF; 8dec: d1 42 6e 00 mov.b &0x006e,3(r1) ;0x006e 8df0: 03 00 00008df2 <.Loc.54.1>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8df2: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8df6: 5c d3 bis.b #1, r12 ;r3 As==01 8df8: 3c f0 ff 00 and #255, r12 ;#0x00ff 8dfc: c2 4c 19 00 mov.b r12, &0x0019 ; 00008e00 <.Loc.55.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8e00: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8e04: 7c f0 f1 ff and.b #-15, r12 ;#0xfff1 8e08: 3c f0 ff 00 and #255, r12 ;#0x00ff 8e0c: c2 4c 1b 00 mov.b r12, &0x001b ; 00008e10 <.Loc.56.1>: return rx; 8e10: 5c 41 03 00 mov.b 3(r1), r12 ; 00008e14 <.Loc.57.1>: } 8e14: 21 52 add #4, r1 ;r2 As==10 00008e16 <.LCFI3>: 8e16: 30 41 ret 00008e18 : /** Write a register from the CCXX */ void CCXX_SPI_WRREG(char reg, char byte) { 8e18: 21 82 sub #4, r1 ;r2 As==10 00008e1a <.LCFI4>: 8e1a: c1 4c 01 00 mov.b r12, 1(r1) ; 8e1e: c1 4d 00 00 mov.b r13, 0(r1) ; 00008e22 <.Loc.67.1>: unsigned char dummy; status=0; 8e22: c2 43 d4 02 mov.b #0, &0x02d4 ;r3 As==00 00008e26 <.Loc.68.1>: P3OUT &= ~CSn; //pull CSn low to activate chip 8e26: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8e2a: 5c c3 bic.b #1, r12 ;r3 As==01 8e2c: 3c f0 ff 00 and #255, r12 ;#0x00ff 8e30: c2 4c 19 00 mov.b r12, &0x0019 ; 00008e34 <.Loc.70.1>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e34: 03 43 nop 00008e36 <.L12>: 8e36: 5c 42 18 00 mov.b &0x0018,r12 ;0x0018 8e3a: 6c f2 and.b #4, r12 ;r2 As==10 00008e3c <.Loc.70.1>: 8e3c: 0c 93 cmp #0, r12 ;r3 As==00 8e3e: fb 23 jnz $-8 ;abs 0x8e36 00008e40 <.Loc.72.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8e40: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8e44: 7c d0 0e 00 bis.b #14, r12 ;#0x000e 8e48: 3c f0 ff 00 and #255, r12 ;#0x00ff 8e4c: c2 4c 1b 00 mov.b r12, &0x001b ; 00008e50 <.Loc.74.1>: IFG2 &= ~UCB0RXIFG; 8e50: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8e54: 6c c2 bic.b #4, r12 ;r2 As==10 8e56: 3c f0 ff 00 and #255, r12 ;#0x00ff 8e5a: c2 4c 03 00 mov.b r12, &0x0003 ; 00008e5e <.Loc.75.1>: UCB0TXBUF = reg; 8e5e: d2 41 01 00 mov.b 1(r1), &0x006f ; 8e62: 6f 00 00008e64 <.Loc.76.1>: while (!(IFG2 & UCB0RXIFG)); 8e64: 03 43 nop 00008e66 <.L13>: 8e66: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8e6a: 6c f2 and.b #4, r12 ;r2 As==10 00008e6c <.Loc.76.1>: 8e6c: 0c 93 cmp #0, r12 ;r3 As==00 8e6e: fb 27 jz $-8 ;abs 0x8e66 00008e70 <.Loc.77.1>: status = UCB0RXBUF; 8e70: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 8e74: c2 4c d4 02 mov.b r12, &0x02d4 ; 00008e78 <.Loc.82.1>: //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8e78: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8e7c: 6c c2 bic.b #4, r12 ;r2 As==10 8e7e: 3c f0 ff 00 and #255, r12 ;#0x00ff 8e82: c2 4c 03 00 mov.b r12, &0x0003 ; 00008e86 <.Loc.83.1>: UCB0TXBUF = byte; 8e86: e2 41 6f 00 mov.b @r1, &0x006f ; 00008e8a <.Loc.84.1>: while (!(IFG2 & UCB0RXIFG)); 8e8a: 03 43 nop 00008e8c <.L14>: 8e8c: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8e90: 6c f2 and.b #4, r12 ;r2 As==10 00008e92 <.Loc.84.1>: 8e92: 0c 93 cmp #0, r12 ;r3 As==00 8e94: fb 27 jz $-8 ;abs 0x8e8c 00008e96 <.Loc.85.1>: dummy = UCB0RXBUF; 8e96: d1 42 6e 00 mov.b &0x006e,3(r1) ;0x006e 8e9a: 03 00 00008e9c <.Loc.87.1>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8e9c: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8ea0: 5c d3 bis.b #1, r12 ;r3 As==01 8ea2: 3c f0 ff 00 and #255, r12 ;#0x00ff 8ea6: c2 4c 19 00 mov.b r12, &0x0019 ; 00008eaa <.Loc.88.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8eaa: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8eae: 7c f0 f1 ff and.b #-15, r12 ;#0xfff1 8eb2: 3c f0 ff 00 and #255, r12 ;#0x00ff 8eb6: c2 4c 1b 00 mov.b r12, &0x001b ; 00008eba <.Loc.89.1>: } 8eba: 03 43 nop 8ebc: 21 52 add #4, r1 ;r2 As==10 00008ebe <.LCFI5>: 8ebe: 30 41 ret 00008ec0 : /** Burst write registers to the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) { 8ec0: 31 82 sub #8, r1 ;r2 As==11 00008ec2 <.LCFI6>: 8ec2: c1 4c 03 00 mov.b r12, 3(r1) ; 8ec6: 81 4d 00 00 mov r13, 0(r1) ; 8eca: c1 4e 02 00 mov.b r14, 2(r1) ; 00008ece <.Loc.99.1>: unsigned char dummy; unsigned int index; status=0; 8ece: c2 43 d4 02 mov.b #0, &0x02d4 ;r3 As==00 00008ed2 <.Loc.100.1>: P3OUT &= ~CSn; //pull CSn low to activate chip 8ed2: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8ed6: 5c c3 bic.b #1, r12 ;r3 As==01 8ed8: 3c f0 ff 00 and #255, r12 ;#0x00ff 8edc: c2 4c 19 00 mov.b r12, &0x0019 ; 00008ee0 <.Loc.102.1>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8ee0: 03 43 nop 00008ee2 <.L16>: 8ee2: 5c 42 18 00 mov.b &0x0018,r12 ;0x0018 8ee6: 6c f2 and.b #4, r12 ;r2 As==10 00008ee8 <.Loc.102.1>: 8ee8: 0c 93 cmp #0, r12 ;r3 As==00 8eea: fb 23 jnz $-8 ;abs 0x8ee2 00008eec <.Loc.104.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8eec: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8ef0: 7c d0 0e 00 bis.b #14, r12 ;#0x000e 8ef4: 3c f0 ff 00 and #255, r12 ;#0x00ff 8ef8: c2 4c 1b 00 mov.b r12, &0x001b ; 00008efc <.Loc.106.1>: IFG2 &= ~UCB0RXIFG; 8efc: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8f00: 6c c2 bic.b #4, r12 ;r2 As==10 8f02: 3c f0 ff 00 and #255, r12 ;#0x00ff 8f06: c2 4c 03 00 mov.b r12, &0x0003 ; 00008f0a <.Loc.107.1>: UCB0TXBUF = reg; 8f0a: d2 41 03 00 mov.b 3(r1), &0x006f ; 8f0e: 6f 00 00008f10 <.Loc.108.1>: while (!(IFG2 & UCB0RXIFG)); 8f10: 03 43 nop 00008f12 <.L17>: 8f12: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8f16: 6c f2 and.b #4, r12 ;r2 As==10 00008f18 <.Loc.108.1>: 8f18: 0c 93 cmp #0, r12 ;r3 As==00 8f1a: fb 27 jz $-8 ;abs 0x8f12 00008f1c <.Loc.109.1>: status = UCB0RXBUF; 8f1c: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 8f20: c2 4c d4 02 mov.b r12, &0x02d4 ; 00008f24 <.Loc.111.1>: IFG2 &= ~UCB0RXIFG; 8f24: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8f28: 6c c2 bic.b #4, r12 ;r2 As==10 8f2a: 3c f0 ff 00 and #255, r12 ;#0x00ff 8f2e: c2 4c 03 00 mov.b r12, &0x0003 ; 00008f32 <.Loc.112.1>: UCB0TXBUF = length; 8f32: d2 41 02 00 mov.b 2(r1), &0x006f ; 8f36: 6f 00 00008f38 <.Loc.113.1>: while (!(IFG2 & UCB0RXIFG)); 8f38: 03 43 nop 00008f3a <.L18>: 8f3a: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8f3e: 6c f2 and.b #4, r12 ;r2 As==10 00008f40 <.Loc.113.1>: 8f40: 0c 93 cmp #0, r12 ;r3 As==00 8f42: fb 27 jz $-8 ;abs 0x8f3a 00008f44 <.Loc.114.1>: dummy = UCB0RXBUF; 8f44: d1 42 6e 00 mov.b &0x006e,5(r1) ;0x006e 8f48: 05 00 00008f4a <.Loc.116.1>: for(index = 0; index < length; index++) 8f4a: 81 43 06 00 mov #0, 6(r1) ;r3 As==00 00008f4e <.Loc.116.1>: 8f4e: 18 3c jmp $+50 ;abs 0x8f80 00008f50 <.L21>: { IFG2 &= ~UCB0RXIFG; 8f50: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8f54: 6c c2 bic.b #4, r12 ;r2 As==10 8f56: 3c f0 ff 00 and #255, r12 ;#0x00ff 8f5a: c2 4c 03 00 mov.b r12, &0x0003 ; 00008f5e <.Loc.119.1>: UCB0TXBUF = buf[index]; 8f5e: 2c 41 mov @r1, r12 ; 8f60: 1c 51 06 00 add 6(r1), r12 ; 8f64: 6c 4c mov.b @r12, r12 ; 00008f66 <.Loc.119.1>: 8f66: c2 4c 6f 00 mov.b r12, &0x006f ; 00008f6a <.Loc.120.1>: while (!(IFG2 & UCB0RXIFG)); 8f6a: 03 43 nop 00008f6c <.L20>: 8f6c: 5c 42 03 00 mov.b &0x0003,r12 ;0x0003 8f70: 6c f2 and.b #4, r12 ;r2 As==10 00008f72 <.Loc.120.1>: 8f72: 0c 93 cmp #0, r12 ;r3 As==00 8f74: fb 27 jz $-8 ;abs 0x8f6c 00008f76 <.Loc.121.1>: dummy = UCB0RXBUF; 8f76: d1 42 6e 00 mov.b &0x006e,5(r1) ;0x006e 8f7a: 05 00 00008f7c <.Loc.116.1>: for(index = 0; index < length; index++) 8f7c: 91 53 06 00 inc 6(r1) ; 00008f80 <.L19>: 8f80: 5c 41 02 00 mov.b 2(r1), r12 ; 00008f84 <.Loc.116.1>: 8f84: 81 9c 06 00 cmp r12, 6(r1) ; 8f88: e3 2b jnc $-56 ;abs 0x8f50 00008f8a <.Loc.124.1>: } P3OUT |= CSn; //pull CSn high, we're done with the transfer 8f8a: 5c 42 19 00 mov.b &0x0019,r12 ;0x0019 8f8e: 5c d3 bis.b #1, r12 ;r3 As==01 8f90: 3c f0 ff 00 and #255, r12 ;#0x00ff 8f94: c2 4c 19 00 mov.b r12, &0x0019 ; 00008f98 <.Loc.125.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8f98: 5c 42 1b 00 mov.b &0x001b,r12 ;0x001b 8f9c: 7c f0 f1 ff and.b #-15, r12 ;#0xfff1 8fa0: 3c f0 ff 00 and #255, r12 ;#0x00ff 8fa4: c2 4c 1b 00 mov.b r12, &0x001b ; 00008fa8 <.Loc.126.1>: } 8fa8: 03 43 nop 8faa: 31 52 add #8, r1 ;r2 As==11 00008fac <.LCFI7>: 8fac: 30 41 ret 00008fae : 8fae: 0f 4c mov r12, r15 ; 00008fb0 <.LVL1>: 8fb0: 00008fb2 : 8fb2: 11 00 mova @r0+, r1 ; 00008fb4 <.LVL2>: 8fb4: 5b 43 mov.b #1, r11 ;r3 As==01 00008fb6 <.L2>: 8fb6: 0d 9f cmp r15, r13 ; 8fb8: 05 2c jc $+12 ;abs 0x8fc4 8fba: 3c 53 add #-1, r12 ;r3 As==11 00008fbc <.Loc.38.1>: 8fbc: 0c 93 cmp #0, r12 ;r3 As==00 8fbe: 05 24 jz $+12 ;abs 0x8fca 00008fc0 <.Loc.38.1>: 8fc0: 0d 93 cmp #0, r13 ;r3 As==00 8fc2: 07 34 jge $+16 ;abs 0x8fd2 00008fc4 <.L10>: 8fc4: 4c 43 clr.b r12 ; 00008fc6 <.L6>: 8fc6: 0b 93 cmp #0, r11 ;r3 As==00 8fc8: 07 20 jnz $+16 ;abs 0x8fd8 00008fca <.L4>: 8fca: 0e 93 cmp #0, r14 ;r3 As==00 8fcc: 01 24 jz $+4 ;abs 0x8fd0 8fce: 0c 4f mov r15, r12 ; 00008fd0 <.L1>: 8fd0: 30 41 ret 00008fd2 <.L5>: 8fd2: 0d 5d rla r13 ; 00008fd4 <.Loc.41.1>: 8fd4: 0b 5b rla r11 ; 8fd6: ef 3f jmp $-32 ;abs 0x8fb6 00008fd8 <.L8>: 8fd8: 0f 9d cmp r13, r15 ; 8fda: 02 28 jnc $+6 ;abs 0x8fe0 00008fdc <.Loc.47.1>: 8fdc: 0f 8d sub r13, r15 ; 00008fde <.Loc.48.1>: 8fde: 0c db bis r11, r12 ; 00008fe0 <.L7>: 8fe0: 12 c3 clrc 8fe2: 0b 10 rrc r11 ; 00008fe4 <.Loc.51.1>: 8fe4: 12 c3 clrc 8fe6: 0d 10 rrc r13 ; 8fe8: ee 3f jmp $-34 ;abs 0x8fc6 00008fea <__mspabi_remu>: 8fea: 5e 43 mov.b #1, r14 ;r3 As==01 8fec: 00008fee : 8fee: 00008ff0 <.LVL36>: 8ff0: 30 41 ret 00008ff2 : 8ff2: 0a 12 push r10 ; 00008ff4 <.LCFI0>: 8ff4: 09 12 push r9 ; 00008ff6 <.LCFI1>: 8ff6: 08 12 push r8 ; 00008ff8 <.LCFI2>: 8ff8: 07 12 push r7 ; 00008ffa <.LCFI3>: 8ffa: 06 12 push r6 ; 00008ffc <.LCFI4>: 8ffc: 05 12 push r5 ; 00008ffe <.LCFI5>: 8ffe: 0a 4c mov r12, r10 ; 9000: 0b 4d mov r13, r11 ; 00009002 <.LVL1>: 9002: 7c 40 21 00 mov.b #33, r12 ;#0x0021 00009006 <.LVL2>: 9006: 58 43 mov.b #1, r8 ;r3 As==01 9008: 49 43 clr.b r9 ; 0000900a <.Loc.38.1>: 900a: 07 4d mov r13, r7 ; 0000900c <.L2>: 900c: 0f 9b cmp r11, r15 ; 900e: 04 28 jnc $+10 ;abs 0x9018 9010: 07 9f cmp r15, r7 ; 9012: 07 20 jnz $+16 ;abs 0x9022 9014: 0e 9a cmp r10, r14 ; 9016: 05 2c jc $+12 ;abs 0x9022 00009018 <.L15>: 9018: 3c 53 add #-1, r12 ;r3 As==11 0000901a <.Loc.38.1>: 901a: 0c 93 cmp #0, r12 ;r3 As==00 901c: 2c 24 jz $+90 ;abs 0x9076 0000901e <.Loc.38.1>: 901e: 0f 93 cmp #0, r15 ;r3 As==00 9020: 0c 34 jge $+26 ;abs 0x903a 00009022 <.L13>: 9022: 4c 43 clr.b r12 ; 9024: 0d 4c mov r12, r13 ; 00009026 <.L8>: 9026: 07 48 mov r8, r7 ; 9028: 07 d9 bis r9, r7 ; 902a: 07 93 cmp #0, r7 ;r3 As==00 902c: 13 20 jnz $+40 ;abs 0x9054 0000902e <.L5>: 902e: 81 93 0e 00 cmp #0, 14(r1) ;r3 As==00, 0x000e 9032: 02 24 jz $+6 ;abs 0x9038 9034: 0c 4a mov r10, r12 ; 9036: 0d 4b mov r11, r13 ; 00009038 <.L1>: 9038: 2f 3c jmp $+96 ;abs 0x9098 0000903a <.L6>: 903a: 05 4e mov r14, r5 ; 903c: 06 4f mov r15, r6 ; 903e: 05 5e add r14, r5 ; 9040: 06 6f addc r15, r6 ; 9042: 0e 45 mov r5, r14 ; 00009044 <.LVL7>: 9044: 0f 46 mov r6, r15 ; 00009046 <.LVL8>: 9046: 05 48 mov r8, r5 ; 9048: 06 49 mov r9, r6 ; 904a: 05 58 add r8, r5 ; 904c: 06 69 addc r9, r6 ; 904e: 08 45 mov r5, r8 ; 00009050 <.LVL9>: 9050: 09 46 mov r6, r9 ; 00009052 <.LVL10>: 9052: dc 3f jmp $-70 ;abs 0x900c 00009054 <.L11>: 9054: 0b 9f cmp r15, r11 ; 9056: 08 28 jnc $+18 ;abs 0x9068 9058: 0f 9b cmp r11, r15 ; 905a: 02 20 jnz $+6 ;abs 0x9060 905c: 0a 9e cmp r14, r10 ; 905e: 04 28 jnc $+10 ;abs 0x9068 00009060 <.L16>: 9060: 0a 8e sub r14, r10 ; 9062: 0b 7f subc r15, r11 ; 00009064 <.Loc.48.1>: 9064: 0c d8 bis r8, r12 ; 00009066 <.LVL13>: 9066: 0d d9 bis r9, r13 ; 00009068 <.L9>: 9068: 12 c3 clrc 906a: 09 10 rrc r9 ; 906c: 08 10 rrc r8 ; 0000906e <.Loc.51.1>: 906e: 12 c3 clrc 9070: 0f 10 rrc r15 ; 9072: 0e 10 rrc r14 ; 9074: d8 3f jmp $-78 ;abs 0x9026 00009076 <.L14>: 9076: 0d 4c mov r12, r13 ; 9078: da 3f jmp $-74 ;abs 0x902e 0000907a <__mspabi_divlu>: 907a: 21 83 decd r1 ; 0000907c <.LCFI19>: 907c: 81 43 00 00 mov #0, 0(r1) ;r3 As==00 9080: 00009082 : 9082: 00009084 <.LVL43>: 9084: 21 53 incd r1 ; 00009086 <.LCFI20>: 9086: 30 41 ret 00009088 <__mspabi_remul>: 9088: 21 83 decd r1 ; 0000908a <.LCFI21>: 908a: 91 43 00 00 mov #1, 0(r1) ;r3 As==01 908e: b0 12 f2 8f call #-28686 ;#0x8ff2 00009092 <.LVL45>: 9092: 21 53 incd r1 ; 00009094 <.LCFI22>: 9094: 30 41 ret 00009096 <__mspabi_func_epilog_7>: 9096: 34 41 pop r4 ; 00009098 <__mspabi_func_epilog_6>: 9098: 35 41 pop r5 ; 0000909a <__mspabi_func_epilog_5>: 909a: 36 41 pop r6 ; 0000909c <__mspabi_func_epilog_4>: 909c: 37 41 pop r7 ; 0000909e <__mspabi_func_epilog_3>: 909e: 38 41 pop r8 ; 000090a0 <__mspabi_func_epilog_2>: 90a0: 39 41 pop r9 ; 000090a2 <__mspabi_func_epilog_1>: 90a2: 3a 41 pop r10 ; 90a4: 30 41 ret 000090a6 <.L1^B1>: 90a6: 3d 53 add #-1, r13 ;r3 As==11 90a8: 0c 5c rla r12 ; 000090aa <__mspabi_slli>: 90aa: 0d 93 cmp #0, r13 ;r3 As==00 90ac: fc 23 jnz $-6 ;abs 0x90a6 90ae: 30 41 ret 000090b0 <.L1^B1>: 90b0: 3d 53 add #-1, r13 ;r3 As==11 90b2: 12 c3 clrc 90b4: 0c 10 rrc r12 ; 000090b6 <__mspabi_srli>: 90b6: 0d 93 cmp #0, r13 ;r3 As==00 90b8: fb 23 jnz $-8 ;abs 0x90b0 90ba: 30 41 ret 000090bc : 90bc: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 90c0: 4d 43 clr.b r13 ; 90c2: b0 12 d2 93 call #-27694 ;#0x93d2 000090c6 <.LVL1>: 90c6: 30 41 ret 000090c8 : 90c8: 0a 12 push r10 ; 000090ca <.LCFI0>: 90ca: 09 12 push r9 ; 000090cc <.LCFI1>: 90cc: 4b 43 clr.b r11 ; 000090ce <.L2>: 90ce: 0e 9b cmp r11, r14 ; 90d0: 02 20 jnz $+6 ;abs 0x90d6 000090d2 <.Loc.71.1>: 90d2: 4c 43 clr.b r12 ; 000090d4 <.LVL3>: 90d4: 0d 3c jmp $+28 ;abs 0x90f0 000090d6 <.L4>: 90d6: 0f 4c mov r12, r15 ; 90d8: 0f 5b add r11, r15 ; 90da: 6f 4f mov.b @r15, r15 ; 90dc: 1b 53 inc r11 ; 000090de <.LVL5>: 90de: 0a 4d mov r13, r10 ; 90e0: 0a 5b add r11, r10 ; 90e2: 59 4a ff ff mov.b -1(r10),r9 ; 000090e6 <.Loc.64.1>: 90e6: ca 9f ff ff cmp.b r15, -1(r10) ; 0xffff 90ea: f1 27 jz $-28 ;abs 0x90ce 000090ec <.Loc.66.1>: 90ec: 0c 4f mov r15, r12 ; 90ee: 0c 89 sub r9, r12 ; 000090f0 <.L1>: 90f0: d7 3f jmp $-80 ;abs 0x90a0 000090f2 : 90f2: 0e 5c add r12, r14 ; 000090f4 <.LVL2>: 90f4: 0f 4c mov r12, r15 ; 000090f6 : 90f6: 0f 9e cmp r14, r15 ; 90f8: 01 20 jnz $+4 ;abs 0x90fc 000090fa <.Loc.104.1>: 90fa: 30 41 ret 000090fc <.L3>: 90fc: 1f 53 inc r15 ; 000090fe <.LVL4>: 90fe: cf 4d ff ff mov.b r13, -1(r15) ; 0xffff 9102: f9 3f jmp $-12 ;abs 0x90f6 00009104 : 9104: 0a 12 push r10 ; 00009106 : 9106: 09 12 push r9 ; 00009108 <.LCFI6>: 9108: 31 80 3c 00 sub #60, r1 ;#0x003c 0000910c <.LCFI7>: 910c: 0a 4d mov r13, r10 ; 0000910e <.Loc.100.1>: 910e: 19 42 02 02 mov &0x0202,r9 ;0x0202 00009112 <.Loc.102.1>: 9112: 0d 93 cmp #0, r13 ;r3 As==00 9114: 07 34 jge $+16 ;abs 0x9124 00009116 <.Loc.104.1>: 9116: b9 40 8b 00 mov #139, 0(r9) ;#0x008b 911a: 00 00 0000911c <.Loc.105.1>: 911c: 3c 43 mov #-1, r12 ;r3 As==11 0000911e <.L10>: 911e: 31 50 3c 00 add #60, r1 ;#0x003c 00009122 <.LCFI8>: 9122: be 3f jmp $-130 ;abs 0x90a0 00009124 <.L11>: 9124: b1 40 08 02 mov #520, 6(r1) ;#0x0208 9128: 06 00 0000912a <.Loc.108.1>: 912a: 81 4c 00 00 mov r12, 0(r1) ; 0000912e <.Loc.108.1>: 912e: 81 4c 0a 00 mov r12, 10(r1) ; 0x000a 00009132 <.Loc.109.1>: 9132: 0c 4d mov r13, r12 ; 00009134 <.LVL11>: 9134: 0d 93 cmp #0, r13 ;r3 As==00 9136: 01 24 jz $+4 ;abs 0x913a 00009138 <.Loc.109.1>: 9138: 3c 53 add #-1, r12 ;r3 As==11 0000913a <.L13>: 913a: 81 4c 04 00 mov r12, 4(r1) ; 0000913e <.Loc.109.1>: 913e: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 00009142 <.Loc.110.1>: 9142: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 00009146 <.LVL12>: 9146: 0f 41 mov r1, r15 ; 9148: 3f 50 44 00 add #68, r15 ;#0x0044 914c: 1e 41 42 00 mov 66(r1), r14 ;0x00042 9150: 0d 41 mov r1, r13 ; 9152: 0c 49 mov r9, r12 ; 9154: b0 12 cc 94 call #-27444 ;#0x94cc 00009158 <.LVL13>: 9158: 3c 93 cmp #-1, r12 ;r3 As==11 915a: 03 34 jge $+8 ;abs 0x9162 0000915c <.Loc.119.1>: 915c: b9 40 8b 00 mov #139, 0(r9) ;#0x008b 9160: 00 00 00009162 <.L14>: 9162: 0a 93 cmp #0, r10 ;r3 As==00 9164: dc 27 jz $-70 ;abs 0x911e 00009166 <.Loc.121.1>: 9166: 2d 41 mov @r1, r13 ; 00009168 <.Loc.121.1>: 9168: cd 43 00 00 mov.b #0, 0(r13) ;r3 As==00 0000916c <.LVL14>: 916c: d8 3f jmp $-78 ;abs 0x911e 0000916e : 916e: 31 80 3c 00 sub #60, r1 ;#0x003c 00009172 : 9172: 0f 41 mov r1, r15 ; 9174: 3f 50 3e 00 add #62, r15 ;#0x003e 9178: 3e 4f mov @r15+, r14 ; 0000917a <.Loc.634.1>: 917a: b1 40 08 02 mov #520, 6(r1) ;#0x0208 917e: 06 00 00009180 <.Loc.639.1>: 9180: 81 4c 00 00 mov r12, 0(r1) ; 00009184 <.Loc.639.1>: 9184: 81 4c 0a 00 mov r12, 10(r1) ; 0x000a 00009188 <.Loc.640.1>: 9188: b1 40 ff 7f mov #32767, 4(r1) ;#0x7fff 918c: 04 00 0000918e <.Loc.640.1>: 918e: b1 40 ff 7f mov #32767, 12(r1) ;#0x7fff, 0x000c 9192: 0c 00 00009194 <.Loc.641.1>: 9194: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 00009198 <.LVL6>: 9198: 0d 41 mov r1, r13 ; 919a: 1c 42 02 02 mov &0x0202,r12 ;0x0202 0000919e <.LVL7>: 919e: b0 12 cc 94 call #-27444 ;#0x94cc 000091a2 <.LVL8>: 91a2: 2d 41 mov @r1, r13 ; 000091a4 <.Loc.649.1>: 91a4: cd 43 00 00 mov.b #0, 0(r13) ;r3 As==00 000091a8 <.LVL9>: 91a8: 31 50 3c 00 add #60, r1 ;#0x003c 000091ac <.LCFI3>: 91ac: 30 41 ret 000091ae : 91ae: 3d f0 ff 00 and #255, r13 ;#0x00ff 000091b2 <.LVL2>: 91b2: 0e 4c mov r12, r14 ; 000091b4 <.L3>: 91b4: 0c 4e mov r14, r12 ; 000091b6 <.LVL4>: 91b6: 7f 4e mov.b @r14+, r15 ; 000091b8 <.Loc.118.1>: 91b8: 0f 93 cmp #0, r15 ;r3 As==00 91ba: 03 24 jz $+8 ;abs 0x91c2 000091bc <.Loc.118.1>: 91bc: 0f 9d cmp r13, r15 ; 91be: fa 23 jnz $-10 ;abs 0x91b4 000091c0 <.L1>: 91c0: 30 41 ret 000091c2 <.L2>: 91c2: 0d 93 cmp #0, r13 ;r3 As==00 91c4: fd 27 jz $-4 ;abs 0x91c0 000091c6 <.Loc.122.1>: 91c6: 0c 4f mov r15, r12 ; 000091c8 <.LVL7>: 91c8: fb 3f jmp $-8 ;abs 0x91c0 000091ca : 91ca: 6e 4d mov.b @r13, r14 ; 000091cc : 91cc: cc 93 00 00 cmp.b #0, 0(r12) ;r3 As==00 91d0: 04 20 jnz $+10 ;abs 0x91da 000091d2 <.Loc.57.1>: 91d2: 0e 93 cmp #0, r14 ;r3 As==00 91d4: 01 24 jz $+4 ;abs 0x91d8 000091d6 <.L7>: 91d6: 4c 43 clr.b r12 ; 000091d8 <.L3>: 91d8: 30 41 ret 000091da <.L6>: 91da: 4e 43 clr.b r14 ; 91dc: 07 3c jmp $+16 ;abs 0x91ec 000091de <.L4>: 91de: 0f 4c mov r12, r15 ; 91e0: 1f 53 inc r15 ; 000091e2 <.LBE2>: 91e2: cc 93 01 00 cmp.b #0, 1(r12) ;r3 As==00 91e6: f7 27 jz $-16 ;abs 0x91d6 000091e8 <.LBB3>: 91e8: 4e 43 clr.b r14 ; 000091ea <.L5>: 91ea: 0c 4f mov r15, r12 ; 000091ec <.L2>: 91ec: 0f 4d mov r13, r15 ; 91ee: 0f 5e add r14, r15 ; 91f0: 6b 4f mov.b @r15, r11 ; 000091f2 <.Loc.69.1>: 91f2: cf 93 00 00 cmp.b #0, 0(r15) ;r3 As==00 91f6: f0 27 jz $-30 ;abs 0x91d8 000091f8 <.Loc.74.1>: 91f8: 0f 4c mov r12, r15 ; 91fa: 0f 5e add r14, r15 ; 000091fc <.Loc.74.1>: 91fc: cf 9b 00 00 cmp.b r11, 0(r15) ; 9200: ee 23 jnz $-34 ;abs 0x91de 00009202 <.Loc.78.1>: 9202: 1e 53 inc r14 ; 00009204 <.Loc.67.1>: 9204: 0f 4c mov r12, r15 ; 9206: f1 3f jmp $-28 ;abs 0x91ea 00009208 <_strtol_r>: 9208: 0a 12 push r10 ; 0000920a <.LCFI0>: 920a: 09 12 push r9 ; 0000920c : 920c: 08 12 push r8 ; 0000920e <.LCFI2>: 920e: 07 12 push r7 ; 00009210 <.LCFI3>: 9210: 06 12 push r6 ; 00009212 <.LCFI4>: 9212: 05 12 push r5 ; 00009214 <.LCFI5>: 9214: 04 12 push r4 ; 00009216 <.LCFI6>: 9216: 31 80 14 00 sub #20, r1 ;#0x0014 0000921a <.LCFI7>: 921a: 81 4c 12 00 mov r12, 18(r1) ; 0x0012 921e: 81 4d 08 00 mov r13, 8(r1) ; 9222: 81 4e 0a 00 mov r14, 10(r1) ; 0x000a 9226: 06 4f mov r15, r6 ; 00009228 <.LVL1>: 9228: 91 42 00 02 mov &0x0200,14(r1) ;0x0200, 0x000e 922c: 0e 00 0000922e <.Loc.140.1>: 922e: 07 4d mov r13, r7 ; 00009230 <.L2>: 9230: 0c 47 mov r7, r12 ; 00009232 <.LVL3>: 9232: 7a 47 mov.b @r7+, r10 ; 00009234 <.LVL4>: 9234: 1d 41 0e 00 mov 14(r1), r13 ;0x0000e 9238: 0d 5a add r10, r13 ; 0000923a <.Loc.153.1>: 923a: fd b2 01 00 bit.b #8, 1(r13) ;r2 As==11 923e: f8 23 jnz $-14 ;abs 0x9230 00009240 <.Loc.154.1>: 9240: 7a 90 2d 00 cmp.b #45, r10 ;#0x002d 9244: 76 20 jnz $+238 ;abs 0x9332 00009246 <.LVL5>: 9246: 6a 47 mov.b @r7, r10 ; 00009248 <.Loc.156.1>: 9248: 07 4c mov r12, r7 ; 924a: 27 53 incd r7 ; 0000924c <.LVL7>: 924c: 91 43 02 00 mov #1, 2(r1) ;r3 As==01 00009250 <.L4>: 9250: 06 93 cmp #0, r6 ;r3 As==00 9252: b9 24 jz $+372 ;abs 0x93c6 00009254 <.Loc.159.1>: 9254: 36 90 10 00 cmp #16, r6 ;#0x0010 9258: 0e 20 jnz $+30 ;abs 0x9276 0000925a <.Loc.159.1>: 925a: 3a 90 30 00 cmp #48, r10 ;#0x0030 925e: 0b 20 jnz $+24 ;abs 0x9276 00009260 <.L23>: 9260: 6c 47 mov.b @r7, r12 ; 9262: 7c f0 df ff and.b #-33, r12 ;#0xffdf 9266: 7c 90 58 00 cmp.b #88, r12 ;#0x0058 926a: a7 20 jnz $+336 ;abs 0x93ba 0000926c <.Loc.161.1>: 926c: 5a 47 01 00 mov.b 1(r7), r10 ; 00009270 <.Loc.162.1>: 9270: 27 53 incd r7 ; 00009272 <.LVL10>: 9272: 76 40 10 00 mov.b #16, r6 ;#0x0010 00009276 <.L8>: 9276: 1e 41 02 00 mov 2(r1), r14 ; 0000927a <.LVL12>: 927a: 0c 4e mov r14, r12 ; 927c: 3c b0 00 80 bit #-32768,r12 ;#0x8000 9280: 0d 7d subc r13, r13 ; 9282: 3d e3 inv r13 ; 9284: 04 4c mov r12, r4 ; 9286: 34 53 add #-1, r4 ;r3 As==11 9288: 05 4d mov r13, r5 ; 928a: 35 60 ff 7f addc #32767, r5 ;#0x7fff 0000928e <.LVL13>: 928e: 0c 46 mov r6, r12 ; 9290: 3c b0 00 80 bit #-32768,r12 ;#0x8000 9294: 0d 7d subc r13, r13 ; 9296: 3d e3 inv r13 ; 9298: 81 4c 04 00 mov r12, 4(r1) ; 929c: 81 4d 06 00 mov r13, 6(r1) ; 000092a0 <.Loc.186.1>: 92a0: 0e 4c mov r12, r14 ; 92a2: 0f 4d mov r13, r15 ; 92a4: 0c 44 mov r4, r12 ; 92a6: 0d 45 mov r5, r13 ; 92a8: b0 12 88 90 call #-28536 ;#0x9088 92ac: 81 4c 10 00 mov r12, 16(r1) ; 0x0010 000092b0 <.LVL15>: 92b0: 1e 41 04 00 mov 4(r1), r14 ; 92b4: 1f 41 06 00 mov 6(r1), r15 ; 92b8: 0c 44 mov r4, r12 ; 000092ba <.LVL16>: 92ba: 0d 45 mov r5, r13 ; 92bc: b0 12 7a 90 call #-28550 ;#0x907a 92c0: 0b 4d mov r13, r11 ; 92c2: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 000092c6 <.LVL18>: 92c6: 4c 43 clr.b r12 ; 000092c8 <.LVL19>: 92c8: 48 43 clr.b r8 ; 92ca: 49 43 clr.b r9 ; 000092cc <.L17>: 92cc: 1d 41 0e 00 mov 14(r1), r13 ;0x0000e 92d0: 0d 5a add r10, r13 ; 92d2: 5d 4d 01 00 mov.b 1(r13), r13 ; 000092d6 <.Loc.189.1>: 92d6: 2d b2 bit #4, r13 ;r2 As==10 92d8: 36 24 jz $+110 ;abs 0x9346 000092da <.Loc.190.1>: 92da: 3a 50 d0 ff add #-48, r10 ;#0xffd0 000092de <.L11>: 92de: 0a 96 cmp r6, r10 ; 92e0: 44 34 jge $+138 ;abs 0x936a 000092e2 <.Loc.197.1>: 92e2: 3c 93 cmp #-1, r12 ;r3 As==11 92e4: 24 24 jz $+74 ;abs 0x932e 000092e6 <.Loc.197.1>: 92e6: 0b 99 cmp r9, r11 ; 92e8: 3e 28 jnc $+126 ;abs 0x9366 92ea: 09 9b cmp r11, r9 ; 92ec: 03 20 jnz $+8 ;abs 0x92f4 92ee: 81 98 0c 00 cmp r8, 12(r1) ; 0x000c 92f2: 39 28 jnc $+116 ;abs 0x9366 000092f4 <.L29>: 92f4: 18 91 0c 00 cmp 12(r1), r8 ;0x0000c 92f8: 05 20 jnz $+12 ;abs 0x9304 92fa: 09 9b cmp r11, r9 ; 92fc: 03 20 jnz $+8 ;abs 0x9304 000092fe <.Loc.197.1>: 92fe: 81 9a 10 00 cmp r10, 16(r1) ; 0x0010 9302: 2e 38 jl $+94 ;abs 0x9360 00009304 <.L16>: 9304: 0e 48 mov r8, r14 ; 9306: 0f 49 mov r9, r15 ; 9308: 1c 41 04 00 mov 4(r1), r12 ; 930c: 1d 41 06 00 mov 6(r1), r13 ; 9310: 81 4b 00 00 mov r11, 0(r1) ; 9314: b0 12 32 9f call #-24782 ;#0x9f32 00009318 <.LVL23>: 9318: 0e 4a mov r10, r14 ; 931a: 3e b0 00 80 bit #-32768,r14 ;#0x8000 931e: 0f 7f subc r15, r15 ; 9320: 3f e3 inv r15 ; 9322: 08 4e mov r14, r8 ; 9324: 08 5c add r12, r8 ; 9326: 09 4f mov r15, r9 ; 9328: 09 6d addc r13, r9 ; 0000932a <.LVL24>: 932a: 5c 43 mov.b #1, r12 ;r3 As==01 932c: 2b 41 mov @r1, r11 ; 0000932e <.L14>: 932e: 7a 47 mov.b @r7+, r10 ; 00009330 <.LVL26>: 9330: cd 3f jmp $-100 ;abs 0x92cc 00009332 <.L3>: 9332: 7a 90 2b 00 cmp.b #43, r10 ;#0x002b 9336: 03 24 jz $+8 ;abs 0x933e 00009338 <.L53>: 9338: 81 43 02 00 mov #0, 2(r1) ;r3 As==00 933c: 89 3f jmp $-236 ;abs 0x9250 0000933e <.L5>: 933e: 6a 47 mov.b @r7, r10 ; 00009340 <.Loc.158.1>: 9340: 07 4c mov r12, r7 ; 9342: 27 53 incd r7 ; 00009344 <.LVL30>: 9344: f9 3f jmp $-12 ;abs 0x9338 00009346 <.L10>: 9346: 7d f0 03 00 and.b #3, r13 ; 0000934a <.Loc.191.1>: 934a: 4d 93 cmp.b #0, r13 ;r3 As==00 934c: 0e 24 jz $+30 ;abs 0x936a 0000934e <.Loc.192.1>: 934e: 5d 93 cmp.b #1, r13 ;r3 As==01 9350: 04 24 jz $+10 ;abs 0x935a 9352: 7d 40 57 00 mov.b #87, r13 ;#0x0057 00009356 <.L13>: 9356: 0a 8d sub r13, r10 ; 9358: c2 3f jmp $-122 ;abs 0x92de 0000935a <.L24>: 935a: 7d 40 37 00 mov.b #55, r13 ;#0x0037 935e: fb 3f jmp $-8 ;abs 0x9356 00009360 <.L26>: 9360: 18 41 0c 00 mov 12(r1), r8 ;0x0000c 00009364 <.LVL33>: 9364: 09 4b mov r11, r9 ; 00009366 <.L54>: 9366: 3c 43 mov #-1, r12 ;r3 As==11 00009368 <.LVL34>: 9368: e2 3f jmp $-58 ;abs 0x932e 0000936a <.L12>: 936a: 3c 93 cmp #-1, r12 ;r3 As==11 936c: 0f 20 jnz $+32 ;abs 0x938c 0000936e <.LVL36>: 936e: 1d 41 12 00 mov 18(r1), r13 ;0x00012 9372: bd 40 22 00 mov #34, 0(r13) ;#0x0022 9376: 00 00 00009378 <.Loc.206.1>: 9378: 08 44 mov r4, r8 ; 937a: 09 45 mov r5, r9 ; 0000937c <.Loc.210.1>: 937c: 81 93 0a 00 cmp #0, 10(r1) ;r3 As==00, 0x000a 9380: 13 20 jnz $+40 ;abs 0x93a8 00009382 <.L37>: 9382: 0c 48 mov r8, r12 ; 00009384 <.LVL38>: 9384: 0d 49 mov r9, r13 ; 9386: 31 50 14 00 add #20, r1 ;#0x0014 0000938a <.LCFI8>: 938a: 85 3e jmp $-756 ;abs 0x9096 0000938c <.L18>: 938c: 81 93 02 00 cmp #0, 2(r1) ;r3 As==00 9390: 06 24 jz $+14 ;abs 0x939e 00009392 <.Loc.209.1>: 9392: 4d 43 clr.b r13 ; 9394: 4e 43 clr.b r14 ; 9396: 0d 88 sub r8, r13 ; 9398: 0e 79 subc r9, r14 ; 939a: 08 4d mov r13, r8 ; 0000939c <.LVL40>: 939c: 09 4e mov r14, r9 ; 0000939e <.L21>: 939e: 81 93 0a 00 cmp #0, 10(r1) ;r3 As==00, 0x000a 93a2: ef 27 jz $-32 ;abs 0x9382 000093a4 <.Loc.211.1>: 93a4: 0c 93 cmp #0, r12 ;r3 As==00 93a6: 03 24 jz $+8 ;abs 0x93ae 000093a8 <.L19>: 93a8: 37 53 add #-1, r7 ;r3 As==11 000093aa <.LVL43>: 93aa: 81 47 08 00 mov r7, 8(r1) ; 000093ae <.L22>: 93ae: 1e 41 0a 00 mov 10(r1), r14 ;0x0000a 93b2: 9e 41 08 00 mov 8(r1), 0(r14) ; 93b6: 00 00 000093b8 <.Loc.212.1>: 93b8: e4 3f jmp $-54 ;abs 0x9382 000093ba <.L9>: 93ba: 7a 40 30 00 mov.b #48, r10 ;#0x0030 93be: 06 93 cmp #0, r6 ;r3 As==00 93c0: 5a 23 jnz $-330 ;abs 0x9276 000093c2 <.Loc.166.1>: 93c2: 76 42 mov.b #8, r6 ;r2 As==11 000093c4 <.LVL46>: 93c4: 58 3f jmp $-334 ;abs 0x9276 000093c6 <.L6>: 93c6: 3a 90 30 00 cmp #48, r10 ;#0x0030 93ca: 4a 27 jz $-362 ;abs 0x9260 000093cc <.Loc.166.1>: 93cc: 76 40 0a 00 mov.b #10, r6 ;#0x000a 000093d0 <.LVL48>: 93d0: 52 3f jmp $-346 ;abs 0x9276 000093d2 : 93d2: 0f 4e mov r14, r15 ; 93d4: 0e 4d mov r13, r14 ; 000093d6 <.LVL50>: 93d6: 0d 4c mov r12, r13 ; 000093d8 <.LVL51>: 93d8: 1c 42 02 02 mov &0x0202,r12 ;0x0202 000093dc <.LVL52>: 93dc: b0 12 08 92 call #-28152 ;#0x9208 000093e0 <.LVL53>: 93e0: 30 41 ret 000093e2 <__ssputs_r>: 93e2: 0a 12 push r10 ; 000093e4 <.LCFI0>: 93e4: 09 12 push r9 ; 000093e6 : 93e6: 08 12 push r8 ; 000093e8 <.LCFI2>: 93e8: 07 12 push r7 ; 000093ea <.LCFI3>: 93ea: 06 12 push r6 ; 000093ec <.LCFI4>: 93ec: 05 12 push r5 ; 000093ee <.LCFI5>: 93ee: 04 12 push r4 ; 000093f0 <.LCFI6>: 93f0: 21 83 decd r1 ; 000093f2 <.LCFI7>: 93f2: 06 4c mov r12, r6 ; 93f4: 0a 4d mov r13, r10 ; 93f6: 04 4e mov r14, r4 ; 93f8: 07 4f mov r15, r7 ; 000093fa <.Loc.181.1>: 93fa: 18 4d 04 00 mov 4(r13), r8 ; 000093fe <.LVL1>: 93fe: 0f 98 cmp r8, r15 ; 9400: 4b 28 jnc $+152 ;abs 0x9498 00009402 <.Loc.184.1>: 9402: 1e 4d 06 00 mov 6(r13), r14 ; 00009406 <.LVL2>: 9406: 3e b0 80 04 bit #1152, r14 ;#0x0480 940a: 44 24 jz $+138 ;abs 0x9494 0000940c <.LBB2>: 940c: 18 4d 0a 00 mov 10(r13),r8 ;0x0000a 00009410 <.LVL3>: 9410: 25 4d mov @r13, r5 ; 9412: 05 88 sub r8, r5 ; 00009414 <.LVL4>: 9414: 1c 4d 0c 00 mov 12(r13),r12 ;0x0000c 00009418 <.LVL5>: 9418: 09 4c mov r12, r9 ; 941a: 09 5c add r12, r9 ; 941c: 09 5c add r12, r9 ; 0000941e <.Loc.196.1>: 941e: 0c 49 mov r9, r12 ; 9420: 7d 40 0f 00 mov.b #15, r13 ;#0x000f 00009424 <.LVL6>: 9424: 81 4e 00 00 mov r14, 0(r1) ; 9428: b0 12 b6 90 call #-28490 ;#0x90b6 0000942c <.LVL7>: 942c: 09 5c add r12, r9 ; 942e: 09 11 rra r9 ; 00009430 <.LVL8>: 9430: 0c 47 mov r7, r12 ; 9432: 1c 53 inc r12 ; 9434: 0c 55 add r5, r12 ; 00009436 <.Loc.197.1>: 9436: 2e 41 mov @r1, r14 ; 9438: 09 9c cmp r12, r9 ; 943a: 01 2c jc $+4 ;abs 0x943e 0000943c <.Loc.198.1>: 943c: 09 4c mov r12, r9 ; 0000943e <.L3>: 943e: 3e b0 00 04 bit #1024, r14 ;#0x0400 9442: 36 24 jz $+110 ;abs 0x94b0 00009444 <.Loc.202.1>: 9444: 0d 49 mov r9, r13 ; 9446: 0c 46 mov r6, r12 ; 9448: b0 12 0a 9d call #-25334 ;#0x9d0a 0000944c <.LVL10>: 944c: 08 4c mov r12, r8 ; 0000944e <.LVL11>: 944e: 0c 93 cmp #0, r12 ;r3 As==00 9450: 09 20 jnz $+20 ;abs 0x9464 00009452 <.L14>: 9452: b6 40 0c 00 mov #12, 0(r6) ;#0x000c 9456: 00 00 00009458 <.L6>: 9458: ba d0 40 00 bis #64, 6(r10) ;#0x0040 945c: 06 00 0000945e <.Loc.239.1>: 945e: 3c 43 mov #-1, r12 ;r3 As==11 00009460 <.L1>: 9460: 21 53 incd r1 ; 00009462 <.LCFI8>: 9462: 19 3e jmp $-972 ;abs 0x9096 00009464 <.L5>: 9464: 0e 45 mov r5, r14 ; 9466: 1d 4a 0a 00 mov 10(r10),r13 ;0x0000a 946a: b0 12 ba 9b call #-25670 ;#0x9bba 0000946e <.LVL14>: 946e: 1c 4a 06 00 mov 6(r10), r12 ; 9472: 3c f0 7f fb and #-1153, r12 ;#0xfb7f 9476: 3c d0 80 00 bis #128, r12 ;#0x0080 947a: 8a 4c 06 00 mov r12, 6(r10) ; 0000947e <.L7>: 947e: 8a 48 0a 00 mov r8, 10(r10) ; 0x000a 00009482 <.Loc.224.1>: 9482: 08 55 add r5, r8 ; 00009484 <.LVL15>: 9484: 8a 48 00 00 mov r8, 0(r10) ; 00009488 <.Loc.225.1>: 9488: 8a 49 0c 00 mov r9, 12(r10) ; 0x000c 0000948c <.LVL16>: 948c: 08 47 mov r7, r8 ; 0000948e <.Loc.227.1>: 948e: 09 85 sub r5, r9 ; 00009490 <.LVL17>: 9490: 8a 49 04 00 mov r9, 4(r10) ; 00009494 <.L2>: 9494: 07 98 cmp r8, r7 ; 9496: 01 2c jc $+4 ;abs 0x949a 00009498 <.L10>: 9498: 08 47 mov r7, r8 ; 0000949a <.L8>: 949a: 0e 48 mov r8, r14 ; 949c: 0d 44 mov r4, r13 ; 949e: 2c 4a mov @r10, r12 ; 94a0: b0 12 d6 9b call #-25642 ;#0x9bd6 000094a4 <.LVL21>: 94a4: 8a 88 04 00 sub r8, 4(r10) ; 000094a8 <.Loc.234.1>: 94a8: 8a 58 00 00 add r8, 0(r10) ; 000094ac <.Loc.235.1>: 94ac: 4c 43 clr.b r12 ; 94ae: d8 3f jmp $-78 ;abs 0x9460 000094b0 <.L4>: 94b0: 0e 49 mov r9, r14 ; 94b2: 0d 48 mov r8, r13 ; 94b4: 0c 46 mov r6, r12 ; 94b6: b0 12 f2 9d call #-25102 ;#0x9df2 000094ba <.LVL23>: 94ba: 08 4c mov r12, r8 ; 000094bc <.LVL24>: 94bc: 0c 93 cmp #0, r12 ;r3 As==00 94be: df 23 jnz $-64 ;abs 0x947e 000094c0 <.Loc.217.1>: 94c0: 1d 4a 0a 00 mov 10(r10),r13 ;0x0000a 94c4: 0c 46 mov r6, r12 ; 94c6: b0 12 1e 9c call #-25570 ;#0x9c1e 000094ca <.LVL25>: 94ca: c3 3f jmp $-120 ;abs 0x9452 000094cc <_svfiprintf_r>: 94cc: 0a 12 push r10 ; 000094ce <.LCFI20>: 94ce: 09 12 push r9 ; 000094d0 <.LCFI21>: 94d0: 08 12 push r8 ; 000094d2 : 94d2: 07 12 push r7 ; 000094d4 <.LCFI23>: 94d4: 06 12 push r6 ; 000094d6 <.LCFI24>: 94d6: 05 12 push r5 ; 000094d8 <.LCFI25>: 94d8: 04 12 push r4 ; 000094da <.LCFI26>: 94da: 31 80 52 00 sub #82, r1 ;#0x0052 000094de <.LCFI27>: 94de: 07 4c mov r12, r7 ; 94e0: 09 4d mov r13, r9 ; 94e2: 0a 4e mov r14, r10 ; 94e4: 81 4f 04 00 mov r15, 4(r1) ; 000094e8 <.Loc.480.1>: 94e8: 1d 4d 06 00 mov 6(r13), r13 ; 000094ec <.LVL59>: 94ec: 7d f0 80 00 and.b #128, r13 ;#0x0080 000094f0 <.Loc.505.1>: 94f0: 0d 93 cmp #0, r13 ;r3 As==00 94f2: 15 24 jz $+44 ;abs 0x951e 000094f4 <.Loc.505.1>: 94f4: 89 93 0a 00 cmp #0, 10(r9) ;r3 As==00, 0x000a 94f8: 12 20 jnz $+38 ;abs 0x951e 000094fa <.Loc.507.1>: 94fa: 7d 40 40 00 mov.b #64, r13 ;#0x0040 94fe: b0 12 0a 9d call #-25334 ;#0x9d0a 00009502 <.LVL60>: 9502: 89 4c 00 00 mov r12, 0(r9) ; 00009506 <.Loc.507.1>: 9506: 89 4c 0a 00 mov r12, 10(r9) ; 0x000a 0000950a <.Loc.508.1>: 950a: 0c 93 cmp #0, r12 ;r3 As==00 950c: 05 20 jnz $+12 ;abs 0x9518 0000950e <.Loc.510.1>: 950e: b7 40 0c 00 mov #12, 0(r7) ;#0x000c 9512: 00 00 00009514 <.L64>: 9514: 3c 43 mov #-1, r12 ;r3 As==11 9516: 07 3d jmp $+528 ;abs 0x9726 00009518 <.L35>: 9518: b9 40 40 00 mov #64, 12(r9) ;#0x0040, 0x000c 951c: 0c 00 0000951e <.L34>: 951e: 81 43 10 00 mov #0, 16(r1) ;r3 As==00, 0x0010 00009522 <.Loc.519.1>: 9522: f1 40 20 00 mov.b #32, 19(r1) ;#0x0020, 0x0013 9526: 13 00 00009528 <.Loc.520.1>: 9528: f1 40 30 00 mov.b #48, 20(r1) ;#0x0030, 0x0014 952c: 14 00 0000952e <.Loc.531.1>: 952e: 36 40 e2 93 mov #-27678,r6 ;#0x93e2 00009532 <.Loc.554.1>: 9532: 35 40 9e 9b mov #-25698,r5 ;#0x9b9e 00009536 <.L63>: 9536: 0c 4a mov r10, r12 ; 00009538 <.L38>: 9538: 04 4c mov r12, r4 ; 0000953a <.LVL66>: 953a: 7d 4c mov.b @r12+, r13 ; 0000953c <.Loc.526.1>: 953c: 0d 93 cmp #0, r13 ;r3 As==00 953e: 03 24 jz $+8 ;abs 0x9546 00009540 <.Loc.526.1>: 9540: 3d 90 25 00 cmp #37, r13 ;#0x0025 9544: f9 23 jnz $-12 ;abs 0x9538 00009546 <.L37>: 9546: 0b 44 mov r4, r11 ; 9548: 0b 8a sub r10, r11 ; 0000954a <.LVL67>: 954a: 04 9a cmp r10, r4 ; 954c: 0d 24 jz $+28 ;abs 0x9568 0000954e <.Loc.531.1>: 954e: 0f 4b mov r11, r15 ; 9550: 0e 4a mov r10, r14 ; 9552: 0d 49 mov r9, r13 ; 9554: 0c 47 mov r7, r12 ; 9556: 81 4b 02 00 mov r11, 2(r1) ; 955a: 86 12 call r6 ; 0000955c <.LVL68>: 955c: 1b 41 02 00 mov 2(r1), r11 ; 9560: 3c 93 cmp #-1, r12 ;r3 As==11 9562: db 24 jz $+440 ;abs 0x971a 00009564 <.Loc.531.1>: 9564: 81 5b 10 00 add r11, 16(r1) ; 0x0010 00009568 <.L39>: 9568: c4 93 00 00 cmp.b #0, 0(r4) ;r3 As==00 956c: d6 24 jz $+430 ;abs 0x971a 0000956e <.Loc.537.1>: 956e: 0f 44 mov r4, r15 ; 9570: 1f 53 inc r15 ; 00009572 <.LVL69>: 9572: 81 43 06 00 mov #0, 6(r1) ;r3 As==00 00009576 <.Loc.540.1>: 9576: 81 43 0c 00 mov #0, 12(r1) ;r3 As==00, 0x000c 0000957a <.Loc.541.1>: 957a: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 0000957e <.Loc.542.1>: 957e: 81 43 0a 00 mov #0, 10(r1) ;r3 As==00, 0x000a 00009582 <.Loc.543.1>: 9582: c1 43 3d 00 mov.b #0, 61(r1) ;r3 As==00, 0x003d 00009586 <.Loc.545.1>: 9586: 81 43 50 00 mov #0, 80(r1) ;r3 As==00, 0x0050 0000958a <.Loc.553.1>: 958a: 74 40 05 00 mov.b #5, r4 ; 0000958e <.L41>: 958e: 0a 4f mov r15, r10 ; 9590: 0e 44 mov r4, r14 ; 9592: 7d 4a mov.b @r10+, r13 ; 9594: 3c 40 bf 81 mov #-32321,r12 ;#0x81bf 9598: 81 4f 02 00 mov r15, 2(r1) ; 959c: 85 12 call r5 ; 0000959e <.LVL72>: 959e: 0d 4c mov r12, r13 ; 000095a0 <.LVL73>: 95a0: 1f 41 02 00 mov 2(r1), r15 ; 95a4: 0c 93 cmp #0, r12 ;r3 As==00 95a6: 23 20 jnz $+72 ;abs 0x95ee 000095a8 <.Loc.557.1>: 95a8: 1d 41 06 00 mov 6(r1), r13 ; 000095ac <.Loc.557.1>: 95ac: 3d b0 10 00 bit #16, r13 ;#0x0010 95b0: 03 24 jz $+8 ;abs 0x95b8 000095b2 <.Loc.558.1>: 95b2: f1 40 20 00 mov.b #32, 61(r1) ;#0x0020, 0x003d 95b6: 3d 00 000095b8 <.L43>: 95b8: 3d b2 bit #8, r13 ;r2 As==11 95ba: 03 24 jz $+8 ;abs 0x95c2 000095bc <.Loc.566.1>: 95bc: f1 40 2b 00 mov.b #43, 61(r1) ;#0x002b, 0x003d 95c0: 3d 00 000095c2 <.L44>: 95c2: ff 90 2a 00 cmp.b #42, 0(r15) ;#0x002a 95c6: 00 00 95c8: 1b 24 jz $+56 ;abs 0x9600 95ca: 14 41 0c 00 mov 12(r1), r4 ;0x0000c 95ce: 0a 4f mov r15, r10 ; 95d0: 4c 43 clr.b r12 ; 000095d2 <.LVL74>: 95d2: 5f 43 mov.b #1, r15 ;r3 As==01 000095d4 <.L46>: 95d4: 0e 4a mov r10, r14 ; 95d6: 7d 4e mov.b @r14+, r13 ; 95d8: 3d 50 d0 ff add #-48, r13 ;#0xffd0 000095dc <.Loc.587.1>: 95dc: 7b 40 09 00 mov.b #9, r11 ; 95e0: 0b 9d cmp r13, r11 ; 95e2: 63 2c jc $+200 ;abs 0x96aa 95e4: 0c 93 cmp #0, r12 ;r3 As==00 95e6: 19 24 jz $+52 ;abs 0x961a 95e8: 81 44 0c 00 mov r4, 12(r1) ; 0x000c 95ec: 16 3c jmp $+46 ;abs 0x961a 000095ee <.L42>: 95ee: 5c 43 mov.b #1, r12 ;r3 As==01 000095f0 <.LVL77>: 95f0: 3d 80 bf 81 sub #-32321,r13 ;#0x81bf 000095f4 <.LVL78>: 95f4: b0 12 aa 90 call #-28502 ;#0x90aa 000095f8 <.LVL79>: 95f8: 81 dc 06 00 bis r12, 6(r1) ; 000095fc <.Loc.554.1>: 95fc: 0f 4a mov r10, r15 ; 95fe: c7 3f jmp $-112 ;abs 0x958e 00009600 <.L45>: 9600: 1c 41 04 00 mov 4(r1), r12 ; 00009604 <.LVL81>: 9604: 1c 53 inc r12 ; 9606: 1c c3 bic #1, r12 ;r3 As==01 9608: 0b 4c mov r12, r11 ; 960a: 2b 53 incd r11 ; 960c: 81 4b 04 00 mov r11, 4(r1) ; 9610: 2c 4c mov @r12, r12 ; 00009612 <.Loc.578.1>: 9612: 0c 93 cmp #0, r12 ;r3 As==00 9614: 42 38 jl $+134 ;abs 0x969a 00009616 <.Loc.577.1>: 9616: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 0000961a <.L49>: 961a: fa 90 2e 00 cmp.b #46, 0(r10) ;#0x002e 961e: 00 00 9620: 12 20 jnz $+38 ;abs 0x9646 00009622 <.Loc.594.1>: 9622: fa 90 2a 00 cmp.b #42, 1(r10) ;#0x002a 9626: 01 00 9628: 4d 20 jnz $+156 ;abs 0x96c4 0000962a <.LVL82>: 962a: 2a 53 incd r10 ; 0000962c <.LVL83>: 962c: 1c 41 04 00 mov 4(r1), r12 ; 9630: 1c 53 inc r12 ; 9632: 1c c3 bic #1, r12 ;r3 As==01 9634: 0d 4c mov r12, r13 ; 9636: 2d 53 incd r13 ; 9638: 81 4d 04 00 mov r13, 4(r1) ; 963c: 2c 4c mov @r12, r12 ; 0000963e <.Loc.599.1>: 963e: 0c 93 cmp #0, r12 ;r3 As==00 9640: 3e 38 jl $+126 ;abs 0x96be 00009642 <.Loc.598.1>: 9642: 81 4c 08 00 mov r12, 8(r1) ; 00009646 <.L52>: 9646: 7e 40 03 00 mov.b #3, r14 ; 964a: 6d 4a mov.b @r10, r13 ; 964c: 3c 40 c5 81 mov #-32315,r12 ;#0x81c5 9650: 85 12 call r5 ; 00009652 <.LVL85>: 9652: 0d 4c mov r12, r13 ; 00009654 <.LVL86>: 9654: 0c 93 cmp #0, r12 ;r3 As==00 9656: 09 24 jz $+20 ;abs 0x966a 00009658 <.LVL87>: 9658: 1a 53 inc r10 ; 0000965a <.LVL88>: 965a: 7c 40 40 00 mov.b #64, r12 ;#0x0040 0000965e <.LVL89>: 965e: 3d 80 c5 81 sub #-32315,r13 ;#0x81c5 00009662 <.LVL90>: 9662: b0 12 aa 90 call #-28502 ;#0x90aa 00009666 <.LVL91>: 9666: 81 dc 06 00 bis r12, 6(r1) ; 0000966a <.L58>: 966a: 7d 4a mov.b @r10+, r13 ; 0000966c <.LVL93>: 966c: c1 4d 12 00 mov.b r13, 18(r1) ; 0x0012 00009670 <.Loc.620.1>: 9670: 7e 40 06 00 mov.b #6, r14 ; 9674: 3c 40 c9 81 mov #-32311,r12 ;#0x81c9 9678: 85 12 call r5 ; 0000967a <.LVL94>: 967a: 0c 93 cmp #0, r12 ;r3 As==00 967c: 58 24 jz $+178 ;abs 0x972e 0000967e <.Loc.627.1>: 967e: 34 40 00 00 mov #0, r4 ; 9682: 04 93 cmp #0, r4 ;r3 As==00 9684: 3c 20 jnz $+122 ;abs 0x96fe 00009686 <.Loc.629.1>: 9686: 1c 41 04 00 mov 4(r1), r12 ; 0000968a <.LVL95>: 968a: 1c 53 inc r12 ; 968c: 1c c3 bic #1, r12 ;r3 As==01 968e: 3c 52 add #8, r12 ;r2 As==11 9690: 81 4c 04 00 mov r12, 4(r1) ; 00009694 <.L61>: 9694: 81 58 10 00 add r8, 16(r1) ; 0x0010 00009698 <.Loc.523.1>: 9698: 4e 3f jmp $-354 ;abs 0x9536 0000969a <.L47>: 969a: 4e 43 clr.b r14 ; 969c: 0e 8c sub r12, r14 ; 969e: 81 4e 0c 00 mov r14, 12(r1) ; 0x000c 000096a2 <.Loc.581.1>: 96a2: 2d d3 bis #2, r13 ;r3 As==10 96a4: 81 4d 06 00 mov r13, 6(r1) ; 000096a8 <.Loc.583.1>: 96a8: b8 3f jmp $-142 ;abs 0x961a 000096aa <.L50>: 96aa: 0c 44 mov r4, r12 ; 96ac: 0c 5c rla r12 ; 96ae: 0c 5c rla r12 ; 96b0: 0c 54 add r4, r12 ; 96b2: 0c 5c rla r12 ; 000096b4 <.Loc.588.1>: 96b4: 04 4c mov r12, r4 ; 96b6: 04 5d add r13, r4 ; 000096b8 <.LVL98>: 96b8: 0a 4e mov r14, r10 ; 000096ba <.Loc.588.1>: 96ba: 0c 4f mov r15, r12 ; 96bc: 8b 3f jmp $-232 ;abs 0x95d4 000096be <.L54>: 96be: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 96c2: c1 3f jmp $-124 ;abs 0x9646 000096c4 <.L53>: 96c4: 1a 53 inc r10 ; 000096c6 <.LVL101>: 96c6: 81 43 08 00 mov #0, 8(r1) ;r3 As==00 000096ca <.Loc.605.1>: 96ca: 4c 43 clr.b r12 ; 96cc: 04 4c mov r12, r4 ; 000096ce <.Loc.606.1>: 96ce: 5f 43 mov.b #1, r15 ;r3 As==01 000096d0 <.L55>: 96d0: 0e 4a mov r10, r14 ; 96d2: 7d 4e mov.b @r14+, r13 ; 96d4: 3d 50 d0 ff add #-48, r13 ;#0xffd0 000096d8 <.Loc.605.1>: 96d8: 7b 40 09 00 mov.b #9, r11 ; 96dc: 0b 9d cmp r13, r11 ; 96de: 05 2c jc $+12 ;abs 0x96ea 96e0: 0c 93 cmp #0, r12 ;r3 As==00 96e2: b1 27 jz $-156 ;abs 0x9646 96e4: 81 44 08 00 mov r4, 8(r1) ; 96e8: ae 3f jmp $-162 ;abs 0x9646 000096ea <.L56>: 96ea: 0c 44 mov r4, r12 ; 96ec: 0c 5c rla r12 ; 96ee: 0c 5c rla r12 ; 96f0: 0c 54 add r4, r12 ; 96f2: 0c 5c rla r12 ; 000096f4 <.Loc.606.1>: 96f4: 04 4c mov r12, r4 ; 96f6: 04 5d add r13, r4 ; 000096f8 <.LVL103>: 96f8: 0a 4e mov r14, r10 ; 000096fa <.Loc.606.1>: 96fa: 0c 4f mov r15, r12 ; 96fc: e9 3f jmp $-44 ;abs 0x96d0 000096fe <.L60>: 96fe: 6c 42 mov.b #4, r12 ;r2 As==10 00009700 <.LVL105>: 9700: 0c 51 add r1, r12 ; 9702: 81 4c 00 00 mov r12, 0(r1) ; 9706: 0f 46 mov r6, r15 ; 9708: 0e 49 mov r9, r14 ; 970a: 0d 41 mov r1, r13 ; 970c: 3d 50 06 00 add #6, r13 ; 9710: 0c 47 mov r7, r12 ; 9712: 84 12 call r4 ; 00009714 <.L96>: 9714: 08 4c mov r12, r8 ; 00009716 <.Loc.643.1>: 9716: 3c 93 cmp #-1, r12 ;r3 As==11 9718: bd 23 jnz $-132 ;abs 0x9694 0000971a <.L40>: 971a: f9 b0 40 00 bit.b #64, 6(r9) ;#0x0040 971e: 06 00 9720: f9 22 jnz $-524 ;abs 0x9514 00009722 <.Loc.654.1>: 9722: 1c 41 10 00 mov 16(r1), r12 ;0x00010 00009726 <.L33>: 9726: 31 50 52 00 add #82, r1 ;#0x0052 0000972a <.LCFI28>: 972a: 30 40 96 90 br #0x9096 ; 0000972e <.L59>: 972e: 6d 42 mov.b #4, r13 ;r2 As==10 9730: 0d 51 add r1, r13 ; 9732: 81 4d 00 00 mov r13, 0(r1) ; 9736: 0f 46 mov r6, r15 ; 9738: 0e 49 mov r9, r14 ; 973a: 0d 41 mov r1, r13 ; 973c: 3d 50 06 00 add #6, r13 ; 9740: 0c 47 mov r7, r12 ; 00009742 <.LVL111>: 9742: b0 12 5c 98 call #-26532 ;#0x985c 00009746 <.LVL112>: 9746: e6 3f jmp $-50 ;abs 0x9714 00009748 <_printf_common>: 9748: 0a 12 push r10 ; 0000974a <.LCFI0>: 974a: 09 12 push r9 ; 0000974c <.LCFI1>: 974c: 08 12 push r8 ; 0000974e <.LCFI2>: 974e: 07 12 push r7 ; 00009750 <.LCFI3>: 9750: 06 12 push r6 ; 00009752 <.LCFI4>: 9752: 05 12 push r5 ; 00009754 <.LCFI5>: 9754: 04 12 push r4 ; 00009756 <.LCFI6>: 9756: 21 83 decd r1 ; 00009758 <.LCFI7>: 9758: 07 4c mov r12, r7 ; 975a: 0a 4d mov r13, r10 ; 0000975c : 975c: 08 4e mov r14, r8 ; 975e: 06 4f mov r15, r6 ; 9760: 15 41 12 00 mov 18(r1), r5 ;0x00012 00009764 <.Loc.56.1>: 9764: 1d 4d 04 00 mov 4(r13), r13 ; 00009768 <.LVL1>: 9768: 1c 4a 08 00 mov 8(r10), r12 ; 0000976c <.LVL2>: 976c: 0c 9d cmp r13, r12 ; 976e: 01 34 jge $+4 ;abs 0x9772 9770: 0c 4d mov r13, r12 ; 00009772 <.L2>: 9772: 88 4c 00 00 mov r12, 0(r8) ; 00009776 <.Loc.73.1>: 9776: ca 93 37 00 cmp.b #0, 55(r10) ;r3 As==00, 0x0037 977a: 03 24 jz $+8 ;abs 0x9782 0000977c <.Loc.74.1>: 977c: 1c 53 inc r12 ; 977e: 88 4c 00 00 mov r12, 0(r8) ; 00009782 <.L3>: 9782: fa b0 20 00 bit.b #32, 0(r10) ;#0x0020 9786: 00 00 9788: 02 24 jz $+6 ;abs 0x978e 0000978a <.Loc.77.1>: 978a: a8 53 00 00 incd 0(r8) ; 0000978e <.L4>: 978e: 29 4a mov @r10, r9 ; 9790: 79 f0 06 00 and.b #6, r9 ; 00009794 <.Loc.80.1>: 9794: ba b0 06 00 bit #6, 0(r10) ; 9798: 00 00 979a: 09 20 jnz $+20 ;abs 0x97ae 0000979c <.LBB2>: 979c: 04 4a mov r10, r4 ; 979e: 34 50 0d 00 add #13, r4 ;#0x000d 97a2: 5b 43 mov.b #1, r11 ;r3 As==01 000097a4 <.L5>: 97a4: 1c 4a 06 00 mov 6(r10), r12 ; 97a8: 2c 88 sub @r8, r12 ; 97aa: 09 9c cmp r12, r9 ; 97ac: 31 38 jl $+100 ;abs 0x9810 000097ae <.L11>: 97ae: 5d 4a 37 00 mov.b 55(r10),r13 ;0x00037 97b2: 0c 43 clr r12 ; 97b4: 0c 8d sub r13, r12 ; 97b6: 7d 40 0f 00 mov.b #15, r13 ;#0x000f 97ba: b0 12 b6 90 call #-28490 ;#0x90b6 97be: 0f 4c mov r12, r15 ; 000097c0 <.LVL7>: 97c0: fa b0 20 00 bit.b #32, 0(r10) ;#0x0020 97c4: 00 00 97c6: 34 20 jnz $+106 ;abs 0x9830 000097c8 <.L7>: 97c8: 0e 4a mov r10, r14 ; 97ca: 3e 50 37 00 add #55, r14 ;#0x0037 97ce: 0d 46 mov r6, r13 ; 97d0: 0c 47 mov r7, r12 ; 97d2: 85 12 call r5 ; 000097d4 <.LVL9>: 97d4: 3c 93 cmp #-1, r12 ;r3 As==11 97d6: 26 24 jz $+78 ;abs 0x9824 000097d8 <.Loc.94.1>: 97d8: 19 4a 06 00 mov 6(r10), r9 ; 000097dc <.Loc.95.1>: 97dc: 2c 48 mov @r8, r12 ; 000097de <.LVL10>: 97de: 2d 4a mov @r10, r13 ; 97e0: 7d f0 06 00 and.b #6, r13 ; 000097e4 <.Loc.96.1>: 97e4: 2d 92 cmp #4, r13 ;r2 As==10 97e6: 03 20 jnz $+8 ;abs 0x97ee 000097e8 <.Loc.95.1>: 97e8: 09 8c sub r12, r9 ; 000097ea <.LVL11>: 97ea: 09 93 cmp #0, r9 ;r3 As==00 97ec: 01 34 jge $+4 ;abs 0x97f0 000097ee <.L18>: 97ee: 49 43 clr.b r9 ; 000097f0 <.L13>: 97f0: 1c 4a 04 00 mov 4(r10), r12 ; 000097f4 <.Loc.99.1>: 97f4: 1d 4a 08 00 mov 8(r10), r13 ; 000097f8 <.Loc.99.1>: 97f8: 0d 9c cmp r12, r13 ; 97fa: 02 34 jge $+6 ;abs 0x9800 000097fc <.Loc.100.1>: 97fc: 0c 8d sub r13, r12 ; 000097fe <.Loc.100.1>: 97fe: 09 5c add r12, r9 ; 00009800 <.L15>: 9800: 48 43 clr.b r8 ; 00009802 <.LVL15>: 9802: 3a 50 0e 00 add #14, r10 ;#0x000e 00009806 <.LVL16>: 9806: 54 43 mov.b #1, r4 ;r3 As==01 00009808 <.L16>: 9808: 09 98 cmp r8, r9 ; 980a: 1f 20 jnz $+64 ;abs 0x984a 0000980c <.LBE3>: 980c: 4c 43 clr.b r12 ; 980e: 0b 3c jmp $+24 ;abs 0x9826 00009810 <.L10>: 9810: 0f 4b mov r11, r15 ; 9812: 0e 44 mov r4, r14 ; 9814: 0d 46 mov r6, r13 ; 9816: 0c 47 mov r7, r12 ; 9818: 81 4b 00 00 mov r11, 0(r1) ; 981c: 85 12 call r5 ; 0000981e <.LVL19>: 981e: 2b 41 mov @r1, r11 ; 9820: 3c 93 cmp #-1, r12 ;r3 As==11 9822: 04 20 jnz $+10 ;abs 0x982c 00009824 <.L12>: 9824: 3c 43 mov #-1, r12 ;r3 As==11 00009826 <.L1>: 9826: 21 53 incd r1 ; 00009828 <.LCFI8>: 9828: 30 40 96 90 br #0x9096 ; 0000982c <.L8>: 982c: 19 53 inc r9 ; 982e: ba 3f jmp $-138 ;abs 0x97a4 00009830 <.L6>: 9830: 0c 4a mov r10, r12 ; 9832: 0c 5f add r15, r12 ; 9834: fc 40 30 00 mov.b #48, 55(r12) ;#0x0030, 0x0037 9838: 37 00 0000983a <.LVL24>: 983a: 0c 4f mov r15, r12 ; 983c: 1c 53 inc r12 ; 983e: 0c 5a add r10, r12 ; 9840: 2f 53 incd r15 ; 00009842 <.LVL25>: 9842: dc 4a 39 00 mov.b 57(r10),55(r12) ;0x00039, 0x0037 9846: 37 00 9848: bf 3f jmp $-128 ;abs 0x97c8 0000984a <.L17>: 984a: 0f 44 mov r4, r15 ; 984c: 0e 4a mov r10, r14 ; 984e: 0d 46 mov r6, r13 ; 9850: 0c 47 mov r7, r12 ; 9852: 85 12 call r5 ; 00009854 <.LVL27>: 9854: 3c 93 cmp #-1, r12 ;r3 As==11 9856: e6 27 jz $-50 ;abs 0x9824 00009858 <.Loc.102.1>: 9858: 18 53 inc r8 ; 985a: d6 3f jmp $-82 ;abs 0x9808 0000985c <_printf_i>: 985c: 0a 12 push r10 ; 0000985e <.LCFI10>: 985e: 09 12 push r9 ; 00009860 <.LCFI11>: 9860: 08 12 push r8 ; 00009862 <.LCFI12>: 9862: 07 12 push r7 ; 00009864 : 9864: 06 12 push r6 ; 00009866 <.LCFI14>: 9866: 05 12 push r5 ; 00009868 <.LCFI15>: 9868: 04 12 push r4 ; 0000986a <.LCFI16>: 986a: 31 80 14 00 sub #20, r1 ;#0x0014 0000986e <.LCFI17>: 986e: 81 4c 08 00 mov r12, 8(r1) ; 9872: 0a 4d mov r13, r10 ; 9874: 04 4e mov r14, r4 ; 9876: 81 4f 0a 00 mov r15, 10(r1) ; 0x000a 987a: 1d 41 24 00 mov 36(r1), r13 ;0x00024 0000987e <.LVL30>: 987e: 0b 4a mov r10, r11 ; 9880: 3b 50 37 00 add #55, r11 ;#0x0037 00009884 <.LVL31>: 9884: 5c 4a 0c 00 mov.b 12(r10),r12 ;0x0000c 00009888 <.LVL32>: 9888: 76 40 78 00 mov.b #120, r6 ;#0x0078 988c: 56 9a 0c 00 cmp.b 12(r10),r6 ;0x0000c 9890: 09 28 jnc $+20 ;abs 0x98a4 9892: 77 40 62 00 mov.b #98, r7 ;#0x0062 9896: 47 9c cmp.b r12, r7 ; 9898: 0b 28 jnc $+24 ;abs 0x98b0 989a: 0c 93 cmp #0, r12 ;r3 As==00 989c: 33 25 jz $+616 ;abs 0x9b04 989e: 3c 90 58 00 cmp #88, r12 ;#0x0058 98a2: e8 24 jz $+466 ;abs 0x9a74 000098a4 <.L30>: 98a4: 07 4a mov r10, r7 ; 98a6: 37 50 36 00 add #54, r7 ;#0x0036 000098aa <.LVL34>: 98aa: ca 4c 36 00 mov.b r12, 54(r10) ; 0x0036 98ae: 31 3c jmp $+100 ;abs 0x9912 000098b0 <.L31>: 98b0: 4e 4c mov.b r12, r14 ; 98b2: 7e 50 9d ff add.b #-99, r14 ;#0xff9d 98b6: 78 40 15 00 mov.b #21, r8 ;#0x0015 98ba: 48 9e cmp.b r14, r8 ; 98bc: f3 2b jnc $-24 ;abs 0x98a4 98be: 3e f0 ff 00 and #255, r14 ;#0x00ff 98c2: 0e 5e rla r14 ; 98c4: 3e 50 ce 98 add #-26418,r14 ;#0x98ce 98c8: 2e 4e mov @r14, r14 ; 98ca: 00 4e br r14 ; ... 000098ce <.L35>: 98ce: fa 98 18 99 cmp.b @r8+, -26344(r10); 0x9918 98d2: a4 98 a4 98 cmp @r8, -26460(r4); 0x98a4 98d6: a4 98 a4 98 cmp @r8, -26460(r4); 0x98a4 98da: 18 99 a4 98 cmp -26460(r9),r8 ;0xffff98a4 98de: a4 98 a4 98 cmp @r8, -26460(r4); 0x98a4 98e2: a4 98 da 9a cmp @r8, -25894(r4); 0x9ada 98e6: 6c 99 cmp.b @r9, r12 ; 98e8: b8 9a a4 98 cmp @r10+, -26460(r8); 0x98a4 98ec: a4 98 12 9b cmp @r8, -25838(r4); 0x9b12 98f0: a4 98 6c 99 cmp @r8, -26260(r4); 0x996c 98f4: a4 98 a4 98 cmp @r8, -26460(r4); 0x98a4 98f8: 000098fa <.L41>: 98fa: 2c 4d mov @r13, r12 ; 98fc: 1c 53 inc r12 ; 98fe: 1c c3 bic #1, r12 ;r3 As==01 9900: 09 4c mov r12, r9 ; 9902: 29 53 incd r9 ; 9904: 8d 49 00 00 mov r9, 0(r13) ; 00009908 <.Loc.124.1>: 9908: 07 4a mov r10, r7 ; 990a: 37 50 36 00 add #54, r7 ;#0x0036 0000990e <.LVL36>: 990e: ea 4c 36 00 mov.b @r12, 54(r10) ; 0x0036 00009912 <.L97>: 9912: 9a 43 08 00 mov #1, 8(r10) ;r3 As==01 9916: 11 3d jmp $+548 ;abs 0x9b3a 00009918 <.L40>: 9918: 2c 4d mov @r13, r12 ; 991a: 1c 53 inc r12 ; 991c: 1c c3 bic #1, r12 ;r3 As==01 0000991e <.Loc.129.1>: 991e: 2e 4a mov @r10, r14 ; 9920: 7e f0 80 00 and.b #128, r14 ;#0x0080 9924: 0e 93 cmp #0, r14 ;r3 As==00 9926: 17 24 jz $+48 ;abs 0x9956 9928: 0e 4c mov r12, r14 ; 992a: 2e 52 add #4, r14 ;r2 As==10 992c: 8d 4e 00 00 mov r14, 0(r13) ; 9930: 28 4c mov @r12, r8 ; 9932: 19 4c 02 00 mov 2(r12), r9 ; 00009936 <.L44>: 9936: 09 93 cmp #0, r9 ;r3 As==00 9938: 09 34 jge $+20 ;abs 0x994c 0000993a <.Loc.132.1>: 993a: 46 43 clr.b r6 ; 993c: 47 43 clr.b r7 ; 993e: 06 88 sub r8, r6 ; 9940: 07 79 subc r9, r7 ; 9942: 08 46 mov r6, r8 ; 00009944 <.LVL40>: 9944: 09 47 mov r7, r9 ; 00009946 <.LVL41>: 9946: fa 40 2d 00 mov.b #45, 55(r10) ;#0x002d, 0x0037 994a: 37 00 0000994c <.L73>: 994c: 35 40 d0 81 mov #-32304,r5 ;#0x81d0 00009950 <.LBB8>: 9950: 76 40 0a 00 mov.b #10, r6 ;#0x000a 9954: 22 3c jmp $+70 ;abs 0x999a 00009956 <.L43>: 9956: 0f 4c mov r12, r15 ; 00009958 <.LVL43>: 9958: 2f 53 incd r15 ; 995a: 8d 4f 00 00 mov r15, 0(r13) ; 995e: 2c 4c mov @r12, r12 ; 9960: 08 4c mov r12, r8 ; 9962: 38 b0 00 80 bit #-32768,r8 ;#0x8000 9966: 09 79 subc r9, r9 ; 9968: 39 e3 inv r9 ; 996a: e5 3f jmp $-52 ;abs 0x9936 0000996c <.L36>: 996c: 2f 4a mov @r10, r15 ; 0000996e <.LVL45>: 996e: 2e 4d mov @r13, r14 ; 9970: 1e 53 inc r14 ; 9972: 1e c3 bic #1, r14 ;r3 As==01 9974: 3f b0 80 00 bit #128, r15 ;#0x0080 9978: 77 24 jz $+240 ;abs 0x9a68 997a: 07 4e mov r14, r7 ; 997c: 27 52 add #4, r7 ;r2 As==10 997e: 8d 47 00 00 mov r7, 0(r13) ; 9982: 28 4e mov @r14, r8 ; 9984: 19 4e 02 00 mov 2(r14), r9 ; 00009988 <.L48>: 9988: 35 40 d0 81 mov #-32304,r5 ;#0x81d0 0000998c <.LBB9>: 998c: 3c 90 6f 00 cmp #111, r12 ;#0x006f 9990: a2 24 jz $+326 ;abs 0x9ad6 00009992 <.Loc.140.1>: 9992: 76 40 0a 00 mov.b #10, r6 ;#0x000a 00009996 <.L50>: 9996: ca 43 37 00 mov.b #0, 55(r10) ;r3 As==00, 0x0037 0000999a <.L45>: 999a: 1c 4a 02 00 mov 2(r10), r12 ; 0000999e <.Loc.179.1>: 999e: 8a 4c 04 00 mov r12, 4(r10) ; 000099a2 <.Loc.179.1>: 99a2: 0c 93 cmp #0, r12 ;r3 As==00 99a4: 02 38 jl $+6 ;abs 0x99aa 000099a6 <.Loc.180.1>: 99a6: aa c2 00 00 bic #4, 0(r10) ;r2 As==10 000099aa <.L56>: 99aa: 0d 48 mov r8, r13 ; 000099ac <.LVL49>: 99ac: 0d d9 bis r9, r13 ; 000099ae <.Loc.135.1>: 99ae: 07 4b mov r11, r7 ; 000099b0 <.Loc.187.1>: 99b0: 0d 93 cmp #0, r13 ;r3 As==00 99b2: 02 20 jnz $+6 ;abs 0x99b8 000099b4 <.LVL50>: 99b4: 0c 93 cmp #0, r12 ;r3 As==00 99b6: 35 24 jz $+108 ;abs 0x9a22 000099b8 <.L57>: 99b8: 0c 46 mov r6, r12 ; 99ba: 3c b0 00 80 bit #-32768,r12 ;#0x8000 99be: 0d 7d subc r13, r13 ; 99c0: 3d e3 inv r13 ; 99c2: 81 4c 04 00 mov r12, 4(r1) ; 99c6: 81 4d 06 00 mov r13, 6(r1) ; 000099ca <.Loc.194.1>: 99ca: 81 4d 10 00 mov r13, 16(r1) ; 0x0010 000099ce <.L90>: 99ce: 37 53 add #-1, r7 ;r3 As==11 000099d0 <.Loc.191.1>: 99d0: 1e 41 04 00 mov 4(r1), r14 ; 99d4: 1f 41 06 00 mov 6(r1), r15 ; 99d8: 0c 48 mov r8, r12 ; 99da: 0d 49 mov r9, r13 ; 99dc: 81 4b 02 00 mov r11, 2(r1) ; 99e0: b0 12 88 90 call #-28536 ;#0x9088 000099e4 <.Loc.191.1>: 99e4: 0c 55 add r5, r12 ; 000099e6 <.Loc.191.1>: 99e6: e7 4c 00 00 mov.b @r12, 0(r7) ; 000099ea <.Loc.192.1>: 99ea: 81 48 0e 00 mov r8, 14(r1) ; 0x000e 99ee: 81 49 0c 00 mov r9, 12(r1) ; 0x000c 000099f2 <.Loc.192.1>: 99f2: 1e 41 04 00 mov 4(r1), r14 ; 99f6: 1f 41 06 00 mov 6(r1), r15 ; 99fa: 0c 48 mov r8, r12 ; 99fc: 0d 49 mov r9, r13 ; 99fe: b0 12 7a 90 call #-28550 ;#0x907a 9a02: 08 4c mov r12, r8 ; 00009a04 <.LVL54>: 9a04: 09 4d mov r13, r9 ; 00009a06 <.LVL55>: 9a06: 1b 41 02 00 mov 2(r1), r11 ; 9a0a: 91 91 06 00 cmp 6(r1), 12(r1) ; 0x000c 9a0e: 0c 00 9a10: 08 28 jnc $+18 ;abs 0x9a22 9a12: 91 91 0c 00 cmp 12(r1), 16(r1) ;0x0000c, 0x0010 9a16: 10 00 9a18: da 23 jnz $-74 ;abs 0x99ce 9a1a: 91 91 04 00 cmp 4(r1), 14(r1) ; 0x000e 9a1e: 0e 00 9a20: d6 2f jc $-82 ;abs 0x99ce 00009a22 <.L58>: 9a22: 36 92 cmp #8, r6 ;r2 As==11 9a24: 0b 20 jnz $+24 ;abs 0x9a3c 00009a26 <.Loc.198.1>: 9a26: da b3 00 00 bit.b #1, 0(r10) ;r3 As==01 9a2a: 08 24 jz $+18 ;abs 0x9a3c 00009a2c <.Loc.198.1>: 9a2c: 9a 9a 02 00 cmp 2(r10), 8(r10) ; 9a30: 08 00 9a32: 04 38 jl $+10 ;abs 0x9a3c 00009a34 <.LVL56>: 9a34: f7 40 30 00 mov.b #48, -1(r7) ;#0x0030, 0xffff 9a38: ff ff 9a3a: 37 53 add #-1, r7 ;r3 As==11 00009a3c <.L61>: 9a3c: 0b 87 sub r7, r11 ; 9a3e: 8a 4b 08 00 mov r11, 8(r10) ; 00009a42 <.L62>: 9a42: 91 41 0a 00 mov 10(r1), 0(r1) ;0x0000a 9a46: 00 00 9a48: 0f 44 mov r4, r15 ; 9a4a: 0e 41 mov r1, r14 ; 9a4c: 3e 50 12 00 add #18, r14 ;#0x0012 9a50: 0d 4a mov r10, r13 ; 9a52: 1c 41 08 00 mov 8(r1), r12 ; 9a56: b0 12 48 97 call #-26808 ;#0x9748 00009a5a <.LVL59>: 9a5a: 3c 93 cmp #-1, r12 ;r3 As==11 9a5c: 71 20 jnz $+228 ;abs 0x9b40 00009a5e <.L68>: 9a5e: 3c 43 mov #-1, r12 ;r3 As==11 00009a60 <.L29>: 9a60: 31 50 14 00 add #20, r1 ;#0x0014 00009a64 <.LCFI18>: 9a64: 30 40 96 90 br #0x9096 ; 00009a68 <.L47>: 9a68: 36 4e mov @r14+, r6 ; 9a6a: 08 46 mov r6, r8 ; 9a6c: 09 43 clr r9 ; 00009a6e <.LBB10>: 9a6e: 8d 4e 00 00 mov r14, 0(r13) ; 9a72: 8a 3f jmp $-234 ;abs 0x9988 00009a74 <.L33>: 9a74: ca 4c 39 00 mov.b r12, 57(r10) ; 0x0039 00009a78 <.LBE10>: 9a78: 35 40 d0 81 mov #-32304,r5 ;#0x81d0 00009a7c <.L51>: 9a7c: 2c 4a mov @r10, r12 ; 9a7e: 2e 4d mov @r13, r14 ; 9a80: 1e 53 inc r14 ; 9a82: 1e c3 bic #1, r14 ;r3 As==01 9a84: 3c b0 80 00 bit #128, r12 ;#0x0080 9a88: 20 24 jz $+66 ;abs 0x9aca 9a8a: 07 4e mov r14, r7 ; 9a8c: 27 52 add #4, r7 ;r2 As==10 9a8e: 8d 47 00 00 mov r7, 0(r13) ; 9a92: 28 4e mov @r14, r8 ; 9a94: 19 4e 02 00 mov 2(r14), r9 ; 00009a98 <.L53>: 9a98: 1c b3 bit #1, r12 ;r3 As==01 9a9a: 04 24 jz $+10 ;abs 0x9aa4 00009a9c <.Loc.164.1>: 9a9c: 3c d0 20 00 bis #32, r12 ;#0x0020 9aa0: 8a 4c 00 00 mov r12, 0(r10) ; 00009aa4 <.L55>: 9aa4: 0c 48 mov r8, r12 ; 9aa6: 0c d9 bis r9, r12 ; 9aa8: 0c 93 cmp #0, r12 ;r3 As==00 9aaa: 03 20 jnz $+8 ;abs 0x9ab2 00009aac <.Loc.168.1>: 9aac: ba f0 df ff and #-33, 0(r10) ;#0xffdf 9ab0: 00 00 00009ab2 <.L75>: 9ab2: 76 40 10 00 mov.b #16, r6 ;#0x0010 9ab6: 6f 3f jmp $-288 ;abs 0x9996 00009ab8 <.L38>: 9ab8: ba d0 20 00 bis #32, 0(r10) ;#0x0020 9abc: 00 00 00009abe <.L34>: 9abe: fa 40 78 00 mov.b #120, 57(r10) ;#0x0078, 0x0039 9ac2: 39 00 00009ac4 <.Loc.159.1>: 9ac4: 35 40 e1 81 mov #-32287,r5 ;#0x81e1 9ac8: d9 3f jmp $-76 ;abs 0x9a7c 00009aca <.L52>: 9aca: 3f 4e mov @r14+, r15 ; 00009acc <.LVL68>: 9acc: 08 4f mov r15, r8 ; 9ace: 09 43 clr r9 ; 00009ad0 <.Loc.161.1>: 9ad0: 8d 4e 00 00 mov r14, 0(r13) ; 9ad4: e1 3f jmp $-60 ;abs 0x9a98 00009ad6 <.L74>: 9ad6: 76 42 mov.b #8, r6 ;r2 As==11 9ad8: 5e 3f jmp $-322 ;abs 0x9996 00009ada <.L39>: 9ada: 29 4a mov @r10, r9 ; 9adc: 1e 4a 0a 00 mov 10(r10),r14 ;0x0000a 9ae0: 2c 4d mov @r13, r12 ; 9ae2: 0f 4c mov r12, r15 ; 00009ae4 <.LVL71>: 9ae4: 2f 53 incd r15 ; 00009ae6 <.Loc.205.1>: 9ae6: 8d 4f 00 00 mov r15, 0(r13) ; 00009aea <.Loc.205.1>: 9aea: 2c 4c mov @r12, r12 ; 00009aec <.Loc.204.1>: 9aec: 39 b0 80 00 bit #128, r9 ;#0x0080 9af0: 0d 24 jz $+28 ;abs 0x9b0c 00009af2 <.Loc.205.1>: 9af2: 06 4e mov r14, r6 ; 9af4: 36 b0 00 80 bit #-32768,r6 ;#0x8000 9af8: 07 77 subc r7, r7 ; 9afa: 37 e3 inv r7 ; 9afc: 8c 46 00 00 mov r6, 0(r12) ; 9b00: 8c 47 02 00 mov r7, 2(r12) ; 00009b04 <.L32>: 9b04: 8a 43 08 00 mov #0, 8(r10) ;r3 As==00 00009b08 <.LBE11>: 9b08: 07 4b mov r11, r7 ; 00009b0a <.LBB12>: 9b0a: 9b 3f jmp $-200 ;abs 0x9a42 00009b0c <.L63>: 9b0c: 8c 4e 00 00 mov r14, 0(r12) ; 00009b10 <.LVL74>: 9b10: f9 3f jmp $-12 ;abs 0x9b04 00009b12 <.L37>: 9b12: 2c 4d mov @r13, r12 ; 9b14: 07 4c mov r12, r7 ; 9b16: 27 53 incd r7 ; 9b18: 8d 47 00 00 mov r7, 0(r13) ; 9b1c: 27 4c mov @r12, r7 ; 00009b1e <.LVL76>: 9b1e: 1e 4a 02 00 mov 2(r10), r14 ; 9b22: 4d 43 clr.b r13 ; 00009b24 <.LVL77>: 9b24: 0c 47 mov r7, r12 ; 9b26: b0 12 9e 9b call #-25698 ;#0x9b9e 00009b2a <.LVL78>: 9b2a: 0c 93 cmp #0, r12 ;r3 As==00 9b2c: 03 24 jz $+8 ;abs 0x9b34 00009b2e <.Loc.222.1>: 9b2e: 0c 87 sub r7, r12 ; 00009b30 <.LVL79>: 9b30: 8a 4c 02 00 mov r12, 2(r10) ; 00009b34 <.L65>: 9b34: 9a 4a 02 00 mov 2(r10), 8(r10) ; 9b38: 08 00 00009b3a <.L42>: 9b3a: ca 43 37 00 mov.b #0, 55(r10) ;r3 As==00, 0x0037 00009b3e <.Loc.233.1>: 9b3e: 81 3f jmp $-252 ;abs 0x9a42 00009b40 <.L66>: 9b40: 1f 4a 08 00 mov 8(r10), r15 ; 9b44: 0e 47 mov r7, r14 ; 9b46: 0d 44 mov r4, r13 ; 9b48: 1c 41 08 00 mov 8(r1), r12 ; 00009b4c <.LVL82>: 9b4c: 18 41 0a 00 mov 10(r1), r8 ;0x0000a 9b50: 88 12 call r8 ; 00009b52 <.LVL83>: 9b52: 3c 93 cmp #-1, r12 ;r3 As==11 9b54: 84 27 jz $-246 ;abs 0x9a5e 00009b56 <.Loc.241.1>: 9b56: ea b3 00 00 bit.b #2, 0(r10) ;r3 As==10 9b5a: 1a 20 jnz $+54 ;abs 0x9b90 00009b5c <.L72>: 9b5c: 1d 41 12 00 mov 18(r1), r13 ;0x00012 9b60: 1c 4a 06 00 mov 6(r10), r12 ; 9b64: 0c 9d cmp r13, r12 ; 9b66: 7c 37 jge $-262 ;abs 0x9a60 9b68: 0c 4d mov r13, r12 ; 9b6a: 7a 3f jmp $-266 ;abs 0x9a60 00009b6c <.L71>: 9b6c: 0f 47 mov r7, r15 ; 9b6e: 0e 48 mov r8, r14 ; 9b70: 0d 44 mov r4, r13 ; 9b72: 1c 41 08 00 mov 8(r1), r12 ; 9b76: 16 41 0a 00 mov 10(r1), r6 ;0x0000a 9b7a: 86 12 call r6 ; 00009b7c <.LVL86>: 9b7c: 3c 93 cmp #-1, r12 ;r3 As==11 9b7e: 6f 27 jz $-288 ;abs 0x9a5e 00009b80 <.Loc.244.1>: 9b80: 19 53 inc r9 ; 00009b82 <.L69>: 9b82: 1c 4a 06 00 mov 6(r10), r12 ; 9b86: 1c 81 12 00 sub 18(r1), r12 ;0x00012 9b8a: 09 9c cmp r12, r9 ; 9b8c: ef 3b jl $-32 ;abs 0x9b6c 9b8e: e6 3f jmp $-50 ;abs 0x9b5c 00009b90 <.L77>: 9b90: 49 43 clr.b r9 ; 9b92: 08 4a mov r10, r8 ; 9b94: 38 50 0d 00 add #13, r8 ;#0x000d 9b98: 57 43 mov.b #1, r7 ;r3 As==01 00009b9a <.LVL89>: 9b9a: f3 3f jmp $-24 ;abs 0x9b82 00009b9c : ... 00009b9e : 9b9e: 3d f0 ff 00 and #255, r13 ;#0x00ff 00009ba2 <.LVL2>: 9ba2: 0f 4c mov r12, r15 ; 9ba4: 0e 5c add r12, r14 ; 00009ba6 <.L2>: 9ba6: 0c 4f mov r15, r12 ; 00009ba8 <.LVL4>: 9ba8: 0f 9e cmp r14, r15 ; 9baa: 02 20 jnz $+6 ;abs 0x9bb0 00009bac <.Loc.133.1>: 9bac: 4c 43 clr.b r12 ; 00009bae <.LVL5>: 9bae: 04 3c jmp $+10 ;abs 0x9bb8 00009bb0 <.L4>: 9bb0: 1f 53 inc r15 ; 00009bb2 <.Loc.128.1>: 9bb2: cc 9d 00 00 cmp.b r13, 0(r12) ; 9bb6: f7 23 jnz $-16 ;abs 0x9ba6 00009bb8 <.L1>: 9bb8: 30 41 ret 00009bba : 9bba: 0a 12 push r10 ; 00009bbc : 9bbc: 4f 43 clr.b r15 ; 00009bbe <.L2>: 9bbe: 0e 9f cmp r15, r14 ; 9bc0: 02 20 jnz $+6 ;abs 0x9bc6 00009bc2 <.Loc.111.1>: 9bc2: 3a 41 pop r10 ; 00009bc4 <.LCFI1>: 9bc4: 30 41 ret 00009bc6 <.L3>: 9bc6: 0b 4c mov r12, r11 ; 9bc8: 0b 5f add r15, r11 ; 00009bca <.Loc.67.1>: 9bca: 0a 4d mov r13, r10 ; 9bcc: 0a 5f add r15, r10 ; 00009bce <.Loc.67.1>: 9bce: eb 4a 00 00 mov.b @r10, 0(r11) ; 9bd2: 1f 53 inc r15 ; 00009bd4 <.LVL4>: 9bd4: f4 3f jmp $-22 ;abs 0x9bbe 00009bd6 : 9bd6: 0a 12 push r10 ; 00009bd8 : 9bd8: 09 12 push r9 ; 00009bda <.LCFI1>: 9bda: 0d 9c cmp r12, r13 ; 9bdc: 1e 2c jc $+62 ;abs 0x9c1a 00009bde <.Loc.69.1>: 9bde: 0a 4d mov r13, r10 ; 9be0: 0a 5e add r14, r10 ; 00009be2 <.Loc.69.1>: 9be2: 0c 9a cmp r10, r12 ; 9be4: 1a 2c jc $+54 ;abs 0x9c1a 00009be6 <.LVL2>: 9be6: 09 4e mov r14, r9 ; 9be8: 39 e3 inv r9 ; 00009bea <.Loc.74.1>: 9bea: 4d 43 clr.b r13 ; 00009bec <.L3>: 9bec: 3d 53 add #-1, r13 ;r3 As==11 00009bee <.LVL4>: 9bee: 09 9d cmp r13, r9 ; 9bf0: 02 20 jnz $+6 ;abs 0x9bf6 00009bf2 <.L10>: 9bf2: 30 40 a0 90 br #0x90a0 ; 00009bf6 <.L4>: 9bf6: 0f 4e mov r14, r15 ; 9bf8: 0f 5d add r13, r15 ; 9bfa: 0f 5c add r12, r15 ; 9bfc: 0b 4a mov r10, r11 ; 9bfe: 0b 5d add r13, r11 ; 00009c00 <.LVL7>: 9c00: ef 4b 00 00 mov.b @r11, 0(r15) ; 9c04: f3 3f jmp $-24 ;abs 0x9bec 00009c06 <.L6>: 9c06: 0b 4d mov r13, r11 ; 9c08: 0b 5f add r15, r11 ; 00009c0a <.Loc.83.1>: 9c0a: 0a 4c mov r12, r10 ; 9c0c: 0a 5f add r15, r10 ; 9c0e: ea 4b 00 00 mov.b @r11, 0(r10) ; 9c12: 1f 53 inc r15 ; 00009c14 <.L5>: 9c14: 0e 9f cmp r15, r14 ; 9c16: f7 23 jnz $-16 ;abs 0x9c06 9c18: ec 3f jmp $-38 ;abs 0x9bf2 00009c1a <.L9>: 9c1a: 4f 43 clr.b r15 ; 9c1c: fb 3f jmp $-8 ;abs 0x9c14 00009c1e <_free_r>: 9c1e: 0a 12 push r10 ; 00009c20 <.LCFI0>: 9c20: 09 12 push r9 ; 00009c22 <.LCFI1>: 9c22: 08 12 push r8 ; 00009c24 : 9c24: 07 12 push r7 ; 00009c26 <.LCFI3>: 9c26: 0d 93 cmp #0, r13 ;r3 As==00 9c28: 27 24 jz $+80 ;abs 0x9c78 00009c2a <.LBB4>: 9c2a: 0e 4d mov r13, r14 ; 9c2c: 3e 50 fc ff add #-4, r14 ;#0xfffc 00009c30 <.LVL2>: 9c30: 1f 4d fc ff mov -4(r13),r15 ; 00009c34 <.Loc.193.1>: 9c34: 8d 93 fe ff cmp #0, -2(r13) ;r3 As==00, 0xfffe 9c38: 01 34 jge $+4 ;abs 0x9c3c 00009c3a <.Loc.193.1>: 9c3a: 0e 5f add r15, r14 ; 00009c3c <.L4>: 9c3c: 1d 42 d8 02 mov &0x02d8,r13 ;0x02d8 00009c40 <.LVL4>: 9c40: 0d 93 cmp #0, r13 ;r3 As==00 9c42: 03 20 jnz $+8 ;abs 0x9c4a 00009c44 <.L8>: 9c44: 8e 4d 04 00 mov r13, 4(r14) ; 9c48: 15 3c jmp $+44 ;abs 0x9c74 00009c4a <.L6>: 9c4a: 0e 9d cmp r13, r14 ; 9c4c: 17 2c jc $+48 ;abs 0x9c7c 00009c4e <.Loc.359.1>: 9c4e: 2a 4e mov @r14, r10 ; 9c50: 1b 4e 02 00 mov 2(r14), r11 ; 00009c54 <.Loc.359.1>: 9c54: 0c 4e mov r14, r12 ; 00009c56 <.LVL7>: 9c56: 0c 5a add r10, r12 ; 00009c58 <.Loc.359.1>: 9c58: 0d 9c cmp r12, r13 ; 9c5a: f4 23 jnz $-22 ;abs 0x9c44 00009c5c <.Loc.363.1>: 9c5c: 08 4a mov r10, r8 ; 9c5e: 09 4b mov r11, r9 ; 9c60: 28 5d add @r13, r8 ; 9c62: 19 6d 02 00 addc 2(r13), r9 ; 9c66: 8e 48 00 00 mov r8, 0(r14) ; 9c6a: 8e 49 02 00 mov r9, 2(r14) ; 00009c6e <.Loc.364.1>: 9c6e: 9e 4d 04 00 mov 4(r13), 4(r14) ; 9c72: 04 00 00009c74 <.L9>: 9c74: 82 4e d8 02 mov r14, &0x02d8 ; 00009c78 <.L1>: 9c78: 30 40 9c 90 br #0x909c ; 00009c7c <.L7>: 9c7c: 0f 4d mov r13, r15 ; 00009c7e <.Loc.381.1>: 9c7e: 1d 4d 04 00 mov 4(r13), r13 ; 00009c82 <.LVL10>: 9c82: 0d 93 cmp #0, r13 ;r3 As==00 9c84: 02 24 jz $+6 ;abs 0x9c8a 00009c86 <.Loc.382.1>: 9c86: 0e 9d cmp r13, r14 ; 9c88: f9 2f jc $-12 ;abs 0x9c7c 00009c8a <.L10>: 9c8a: 29 4f mov @r15, r9 ; 9c8c: 17 4f 02 00 mov 2(r15), r7 ; 00009c90 <.Loc.387.1>: 9c90: 08 4f mov r15, r8 ; 9c92: 08 59 add r9, r8 ; 00009c94 <.Loc.387.1>: 9c94: 08 9e cmp r14, r8 ; 9c96: 1a 20 jnz $+54 ;abs 0x9ccc 00009c98 <.Loc.391.1>: 9c98: 0a 49 mov r9, r10 ; 9c9a: 2a 5e add @r14, r10 ; 9c9c: 1b 4e 02 00 mov 2(r14), r11 ; 9ca0: 0b 67 addc r7, r11 ; 9ca2: 8f 4a 00 00 mov r10, 0(r15) ; 9ca6: 8f 4b 02 00 mov r11, 2(r15) ; 00009caa <.Loc.394.1>: 9caa: 0c 4f mov r15, r12 ; 00009cac <.LVL11>: 9cac: 0c 5a add r10, r12 ; 00009cae <.Loc.394.1>: 9cae: 0d 9c cmp r12, r13 ; 9cb0: e3 23 jnz $-56 ;abs 0x9c78 00009cb2 <.Loc.396.1>: 9cb2: 08 4a mov r10, r8 ; 9cb4: 09 4b mov r11, r9 ; 9cb6: 28 5d add @r13, r8 ; 9cb8: 19 6d 02 00 addc 2(r13), r9 ; 9cbc: 8f 48 00 00 mov r8, 0(r15) ; 9cc0: 8f 49 02 00 mov r9, 2(r15) ; 00009cc4 <.Loc.397.1>: 9cc4: 9f 4d 04 00 mov 4(r13), 4(r15) ; 9cc8: 04 00 9cca: d6 3f jmp $-82 ;abs 0x9c78 00009ccc <.L11>: 9ccc: 0e 98 cmp r8, r14 ; 9cce: 04 2c jc $+10 ;abs 0x9cd8 00009cd0 <.Loc.404.1>: 9cd0: bc 40 0c 00 mov #12, 0(r12) ;#0x000c 9cd4: 00 00 00009cd6 <.Loc.405.1>: 9cd6: d0 3f jmp $-94 ;abs 0x9c78 00009cd8 <.L13>: 9cd8: 2a 4e mov @r14, r10 ; 9cda: 1b 4e 02 00 mov 2(r14), r11 ; 00009cde <.Loc.409.1>: 9cde: 0c 4e mov r14, r12 ; 00009ce0 <.LVL13>: 9ce0: 0c 5a add r10, r12 ; 00009ce2 <.Loc.409.1>: 9ce2: 0d 9c cmp r12, r13 ; 9ce4: 0f 20 jnz $+32 ;abs 0x9d04 00009ce6 <.Loc.413.1>: 9ce6: 08 4a mov r10, r8 ; 9ce8: 09 4b mov r11, r9 ; 9cea: 28 5d add @r13, r8 ; 9cec: 19 6d 02 00 addc 2(r13), r9 ; 9cf0: 8e 48 00 00 mov r8, 0(r14) ; 9cf4: 8e 49 02 00 mov r9, 2(r14) ; 00009cf8 <.Loc.414.1>: 9cf8: 9e 4d 04 00 mov 4(r13), 4(r14) ; 9cfc: 04 00 00009cfe <.L20>: 9cfe: 8f 4e 04 00 mov r14, 4(r15) ; 00009d02 <.Loc.424.1>: 9d02: ba 3f jmp $-138 ;abs 0x9c78 00009d04 <.L14>: 9d04: 8e 4d 04 00 mov r13, 4(r14) ; 9d08: fa 3f jmp $-10 ;abs 0x9cfe 00009d0a <_malloc_r>: 9d0a: 0a 12 push r10 ; 00009d0c <.LCFI0>: 9d0c: 09 12 push r9 ; 00009d0e <.LCFI1>: 9d0e: 08 12 push r8 ; 00009d10 <.LCFI2>: 9d10: 07 12 push r7 ; 00009d12 <.LCFI3>: 9d12: 08 4c mov r12, r8 ; 00009d14 : 9d14: 09 4d mov r13, r9 ; 9d16: 19 53 inc r9 ; 00009d18 <.Loc.247.1>: 9d18: 19 c3 bic #1, r9 ;r3 As==01 00009d1a <.LVL1>: 9d1a: 39 50 0a 00 add #10, r9 ;#0x000a 00009d1e <.LVL2>: 9d1e: 39 90 0c 00 cmp #12, r9 ;#0x000c 9d22: 02 2c jc $+6 ;abs 0x9d28 9d24: 79 40 0c 00 mov.b #12, r9 ;#0x000c 00009d28 <.L2>: 9d28: 09 9d cmp r13, r9 ; 9d2a: 06 2c jc $+14 ;abs 0x9d38 00009d2c <.L13>: 9d2c: b8 40 0c 00 mov #12, 0(r8) ;#0x000c 9d30: 00 00 00009d32 <.Loc.255.1>: 9d32: 4c 43 clr.b r12 ; 00009d34 <.L1>: 9d34: 30 40 9c 90 br #0x909c ; 00009d38 <.L3>: 9d38: 1c 42 d8 02 mov &0x02d8,r12 ;0x02d8 00009d3c <.LVL6>: 9d3c: 0a 4c mov r12, r10 ; 00009d3e <.L5>: 9d3e: 0a 93 cmp #0, r10 ;r3 As==00 9d40: 1b 20 jnz $+56 ;abs 0x9d78 00009d42 <.LBB5>: 9d42: 37 40 4a 9e mov #-25014,r7 ;#0x9e4a 00009d46 <.Loc.214.1>: 9d46: 82 93 d6 02 cmp #0, &0x02d6 ;r3 As==00 9d4a: 05 20 jnz $+12 ;abs 0x9d56 00009d4c <.Loc.214.1>: 9d4c: 0d 4a mov r10, r13 ; 9d4e: 0c 48 mov r8, r12 ; 00009d50 <.LVL9>: 9d50: 87 12 call r7 ; 00009d52 <.LVL10>: 9d52: 82 4c d6 02 mov r12, &0x02d6 ; 00009d56 <.L17>: 9d56: 0d 49 mov r9, r13 ; 9d58: 0c 48 mov r8, r12 ; 9d5a: 87 12 call r7 ; 00009d5c <.LVL11>: 9d5c: 3c 93 cmp #-1, r12 ;r3 As==11 9d5e: e6 27 jz $-50 ;abs 0x9d2c 00009d60 <.Loc.222.1>: 9d60: 0a 4c mov r12, r10 ; 9d62: 1a 53 inc r10 ; 9d64: 1a c3 bic #1, r10 ;r3 As==01 00009d66 <.LVL12>: 9d66: 0c 9a cmp r10, r12 ; 9d68: 19 24 jz $+52 ;abs 0x9d9c 00009d6a <.Loc.227.1>: 9d6a: 0d 4a mov r10, r13 ; 9d6c: 0d 8c sub r12, r13 ; 9d6e: 0c 48 mov r8, r12 ; 00009d70 <.LVL13>: 9d70: 87 12 call r7 ; 00009d72 <.LVL14>: 9d72: 3c 93 cmp #-1, r12 ;r3 As==11 9d74: 13 20 jnz $+40 ;abs 0x9d9c 9d76: da 3f jmp $-74 ;abs 0x9d2c 00009d78 <.L10>: 9d78: 2d 4a mov @r10, r13 ; 9d7a: 0d 89 sub r9, r13 ; 00009d7c <.LVL16>: 9d7c: 0d 93 cmp #0, r13 ;r3 As==00 9d7e: 35 38 jl $+108 ;abs 0x9dea 00009d80 <.Loc.268.1>: 9d80: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 9d84: 0e 9d cmp r13, r14 ; 9d86: 11 2c jc $+36 ;abs 0x9daa 00009d88 <.Loc.272.1>: 9d88: 0e 4d mov r13, r14 ; 9d8a: 3e b0 00 80 bit #-32768,r14 ;#0x8000 9d8e: 0f 7f subc r15, r15 ; 9d90: 3f e3 inv r15 ; 9d92: 8a 4e 00 00 mov r14, 0(r10) ; 9d96: 8a 4f 02 00 mov r15, 2(r10) ; 00009d9a <.Loc.273.1>: 9d9a: 0a 5d add r13, r10 ; 00009d9c <.L14>: 9d9c: 0c 49 mov r9, r12 ; 9d9e: 0d 43 clr r13 ; 9da0: 8a 4c 00 00 mov r12, 0(r10) ; 9da4: 8a 4d 02 00 mov r13, 2(r10) ; 9da8: 06 3c jmp $+14 ;abs 0x9db6 00009daa <.L7>: 9daa: 1d 4a 04 00 mov 4(r10), r13 ; 00009dae <.LVL19>: 9dae: 0c 9a cmp r10, r12 ; 9db0: 19 20 jnz $+52 ;abs 0x9de4 00009db2 <.Loc.282.1>: 9db2: 82 4d d8 02 mov r13, &0x02d8 ; 00009db6 <.L8>: 9db6: 0d 4a mov r10, r13 ; 9db8: 2d 52 add #4, r13 ;r2 As==10 00009dba <.LVL21>: 9dba: 0c 4a mov r10, r12 ; 9dbc: 3c 50 0b 00 add #11, r12 ;#0x000b 9dc0: 3c f0 f8 ff and #-8, r12 ;#0xfff8 00009dc4 <.LVL22>: 9dc4: 0e 4c mov r12, r14 ; 9dc6: 0e 8d sub r13, r14 ; 00009dc8 <.LVL23>: 9dc8: 0c 9d cmp r13, r12 ; 9dca: b4 27 jz $-150 ;abs 0x9d34 00009dcc <.Loc.318.1>: 9dcc: 0a 5e add r14, r10 ; 00009dce <.LVL24>: 9dce: 0d 8c sub r12, r13 ; 00009dd0 <.LVL25>: 9dd0: 0e 4d mov r13, r14 ; 9dd2: 3e b0 00 80 bit #-32768,r14 ;#0x8000 9dd6: 0f 7f subc r15, r15 ; 9dd8: 3f e3 inv r15 ; 00009dda <.LVL26>: 9dda: 8a 4e 00 00 mov r14, 0(r10) ; 9dde: 8a 4f 02 00 mov r15, 2(r10) ; 9de2: a8 3f jmp $-174 ;abs 0x9d34 00009de4 <.L9>: 9de4: 8c 4d 04 00 mov r13, 4(r12) ; 9de8: e6 3f jmp $-50 ;abs 0x9db6 00009dea <.L6>: 9dea: 0c 4a mov r10, r12 ; 9dec: 1a 4a 04 00 mov 4(r10), r10 ; 00009df0 <.LVL29>: 9df0: a6 3f jmp $-178 ;abs 0x9d3e 00009df2 <_realloc_r>: 9df2: 0a 12 push r10 ; 00009df4 <.LCFI0>: 9df4: 09 12 push r9 ; 00009df6 <.LCFI1>: 9df6: 08 12 push r8 ; 00009df8 <.LCFI2>: 9df8: 07 12 push r7 ; 00009dfa <.LCFI3>: 9dfa: 07 4c mov r12, r7 ; 00009dfc : 9dfc: 08 4d mov r13, r8 ; 9dfe: 09 4e mov r14, r9 ; 00009e00 <.Loc.451.1>: 9e00: 0d 93 cmp #0, r13 ;r3 As==00 9e02: 07 20 jnz $+16 ;abs 0x9e12 00009e04 <.Loc.454.1>: 9e04: 0d 4e mov r14, r13 ; 00009e06 <.LVL1>: 9e06: b0 12 0a 9d call #-25334 ;#0x9d0a 00009e0a <.LVL2>: 9e0a: 0a 4c mov r12, r10 ; 00009e0c <.L1>: 9e0c: 0c 4a mov r10, r12 ; 9e0e: 30 40 9c 90 br #0x909c ; 00009e12 <.L2>: 9e12: 0e 93 cmp #0, r14 ;r3 As==00 9e14: 04 20 jnz $+10 ;abs 0x9e1e 00009e16 <.Loc.458.1>: 9e16: b0 12 1e 9c call #-25570 ;#0x9c1e 00009e1a <.LVL3>: 9e1a: 0a 49 mov r9, r10 ; 9e1c: f7 3f jmp $-16 ;abs 0x9e0c 00009e1e <.L4>: 9e1e: b0 12 6c 9e call #-24980 ;#0x9e6c 00009e22 <.LVL4>: 9e22: 0c 99 cmp r9, r12 ; 9e24: 10 2c jc $+34 ;abs 0x9e46 00009e26 <.Loc.467.1>: 9e26: 0d 49 mov r9, r13 ; 9e28: 0c 47 mov r7, r12 ; 9e2a: b0 12 0a 9d call #-25334 ;#0x9d0a 00009e2e <.LVL5>: 9e2e: 0a 4c mov r12, r10 ; 00009e30 <.LVL6>: 9e30: 0c 93 cmp #0, r12 ;r3 As==00 9e32: ec 27 jz $-38 ;abs 0x9e0c 00009e34 <.Loc.470.1>: 9e34: 0e 49 mov r9, r14 ; 9e36: 0d 48 mov r8, r13 ; 9e38: b0 12 ba 9b call #-25670 ;#0x9bba 00009e3c <.LVL7>: 9e3c: 0d 48 mov r8, r13 ; 9e3e: 0c 47 mov r7, r12 ; 9e40: b0 12 1e 9c call #-25570 ;#0x9c1e 00009e44 <.LVL8>: 9e44: e3 3f jmp $-56 ;abs 0x9e0c 00009e46 <.L5>: 9e46: 0a 48 mov r8, r10 ; 9e48: e1 3f jmp $-60 ;abs 0x9e0c 00009e4a <_sbrk_r>: 9e4a: 0a 12 push r10 ; 00009e4c <.LCFI0>: 9e4c: 0a 4c mov r12, r10 ; 9e4e: 0c 4d mov r13, r12 ; 00009e50 : 9e50: 82 43 da 02 mov #0, &0x02da ;r3 As==00 00009e54 <.Loc.58.1>: 9e54: b0 12 80 9e call #-24960 ;#0x9e80 00009e58 <.LVL2>: 9e58: 3c 93 cmp #-1, r12 ;r3 As==11 9e5a: 06 20 jnz $+14 ;abs 0x9e68 00009e5c <.Loc.58.1>: 9e5c: 1d 42 da 02 mov &0x02da,r13 ;0x02da 00009e60 <.Loc.58.1>: 9e60: 0d 93 cmp #0, r13 ;r3 As==00 9e62: 02 24 jz $+6 ;abs 0x9e68 00009e64 <.Loc.59.1>: 9e64: 8a 4d 00 00 mov r13, 0(r10) ; 00009e68 <.L1>: 9e68: 3a 41 pop r10 ; 00009e6a <.LCFI1>: 9e6a: 30 41 ret 00009e6c <_malloc_usable_size_r>: 9e6c: 1e 4d fc ff mov -4(r13),r14 ; 00009e70 <.Loc.530.1>: 9e70: 0c 4e mov r14, r12 ; 00009e72 <.LVL3>: 9e72: 3c 50 fc ff add #-4, r12 ;#0xfffc 00009e76 <.Loc.530.1>: 9e76: 0e 93 cmp #0, r14 ;r3 As==00 9e78: 02 34 jge $+6 ;abs 0x9e7e 00009e7a <.LVL4>: 9e7a: 0d 5c add r12, r13 ; 00009e7c <.LVL5>: 9e7c: 2c 5d add @r13, r12 ; 00009e7e <.L1>: 9e7e: 30 41 ret 00009e80 <_sbrk>: 9e80: 21 83 decd r1 ; 00009e82 <.LCFI0>: 9e82: 0d 4c mov r12, r13 ; 00009e84 <.Loc.17.1>: 9e84: 1c 42 7c 02 mov &0x027c,r12 ;0x027c 00009e88 <.LVL1>: 9e88: 4e 43 clr.b r14 ; 9e8a: 0e 51 add r1, r14 ; 9e8c: 81 4e 00 00 mov r14, 0(r1) ; 00009e90 <.Loc.22.1>: 9e90: 0d 5c add r12, r13 ; 00009e92 <.LVL2>: 9e92: 0e 41 mov r1, r14 ; 9e94: 0e 9d cmp r13, r14 ; 9e96: 09 2c jc $+20 ;abs 0x9eaa 00009e98 <.LBB7>: 9e98: 7e 40 1a 00 mov.b #26, r14 ;#0x001a 9e9c: 3d 40 f2 81 mov #-32270,r13 ;#0x81f2 9ea0: 5c 43 mov.b #1, r12 ;r3 As==01 00009ea2 <.LVL4>: 9ea2: b0 12 b2 9e call #-24910 ;#0x9eb2 00009ea6 <.LVL5>: 9ea6: b0 12 7e 9f call #-24706 ;#0x9f7e 00009eaa <.L2>: 9eaa: 82 4d 7c 02 mov r13, &0x027c ; 00009eae <.Loc.30.1>: 9eae: 21 53 incd r1 ; 00009eb0 <.LCFI1>: 9eb0: 30 41 ret 00009eb2 : 9eb2: 0a 12 push r10 ; 00009eb4 <.LCFI0>: 9eb4: 09 12 push r9 ; 00009eb6 <.LCFI1>: 9eb6: 08 12 push r8 ; 00009eb8 <.LCFI2>: 9eb8: 07 12 push r7 ; 00009eba <.LCFI3>: 9eba: 06 12 push r6 ; 00009ebc <.LCFI4>: 9ebc: 05 12 push r5 ; 00009ebe <.LCFI5>: 9ebe: 04 12 push r4 ; 00009ec0 <.LCFI6>: 9ec0: 21 83 decd r1 ; 00009ec2 <.LCFI7>: 9ec2: 06 4c mov r12, r6 ; 9ec4: 81 4d 00 00 mov r13, 0(r1) ; 9ec8: 0a 4e mov r14, r10 ; 00009eca <.LBB5>: 9eca: 7d 42 mov.b #8, r13 ;r2 As==11 00009ecc <.LVL2>: 9ecc: b0 12 24 a0 call #-24540 ;#0xa024 00009ed0 <.LVL3>: 9ed0: 47 4c mov.b r12, r7 ; 00009ed2 <.LBE5>: 9ed2: 45 43 clr.b r5 ; 00009ed4 <.LBB10>: 9ed4: 39 40 7e 02 mov #638, r9 ;#0x027e 00009ed8 <.Loc.28.1>: 9ed8: 04 49 mov r9, r4 ; 9eda: 34 50 0b 00 add #11, r4 ;#0x000b 00009ede <.L2>: 9ede: 4c 43 clr.b r12 ; 9ee0: 0c 9a cmp r10, r12 ; 9ee2: 04 38 jl $+10 ;abs 0x9eec 00009ee4 <.Loc.60.1>: 9ee4: 0c 45 mov r5, r12 ; 9ee6: 21 53 incd r1 ; 00009ee8 <.LCFI8>: 9ee8: 30 40 96 90 br #0x9096 ; 00009eec <.L4>: 9eec: 08 4a mov r10, r8 ; 9eee: 7c 40 40 00 mov.b #64, r12 ;#0x0040 9ef2: 0c 9a cmp r10, r12 ; 9ef4: 01 34 jge $+4 ;abs 0x9ef8 00009ef6 <.LVL7>: 9ef6: 08 4c mov r12, r8 ; 00009ef8 <.L3>: 9ef8: 4c 48 mov.b r8, r12 ; 9efa: c9 4c 00 00 mov.b r12, 0(r9) ; 00009efe <.Loc.22.1>: 9efe: c2 43 7f 02 mov.b #0, &0x027f ;r3 As==00 00009f02 <.Loc.23.1>: 9f02: f2 40 f3 ff mov.b #-13, &0x0280 ;#0xfff3 9f06: 80 02 00009f08 <.Loc.24.1>: 9f08: c9 46 03 00 mov.b r6, 3(r9) ; 00009f0c <.Loc.25.1>: 9f0c: c9 47 04 00 mov.b r7, 4(r9) ; 00009f10 <.Loc.26.1>: 9f10: c9 4c 05 00 mov.b r12, 5(r9) ; 00009f14 <.Loc.27.1>: 9f14: c2 43 84 02 mov.b #0, &0x0284 ;r3 As==00 00009f18 <.Loc.28.1>: 9f18: 0e 48 mov r8, r14 ; 9f1a: 2d 41 mov @r1, r13 ; 9f1c: 0d 55 add r5, r13 ; 00009f1e <.LVL9>: 9f1e: 0c 44 mov r4, r12 ; 9f20: b0 12 ba 9b call #-25670 ;#0x9bba 00009f24 <.LVL10>: 9f24: b0 12 2e 9f call #-24786 ;#0x9f2e 00009f28 <.LBE11>: 9f28: 05 58 add r8, r5 ; 00009f2a <.LVL12>: 9f2a: 0a 88 sub r8, r10 ; 00009f2c <.LVL13>: 9f2c: d8 3f jmp $-78 ;abs 0x9ede 00009f2e : 9f2e: 03 43 nop 00009f30 : 9f30: 30 41 ret 00009f32 <__mspabi_mpyl>: 9f32: 0a 12 push r10 ; 00009f34 <.LCFI0>: 9f34: 09 12 push r9 ; 00009f36 <.LCFI1>: 9f36: 08 12 push r8 ; 00009f38 <.LCFI2>: 9f38: 07 12 push r7 ; 00009f3a <.LCFI3>: 9f3a: 06 12 push r6 ; 00009f3c <.LCFI4>: 9f3c: 0a 4c mov r12, r10 ; 9f3e: 0b 4d mov r13, r11 ; 00009f40 <.LVL1>: 9f40: 78 40 21 00 mov.b #33, r8 ;#0x0021 00009f44 <.Loc.30.1>: 9f44: 4c 43 clr.b r12 ; 00009f46 <.LVL2>: 9f46: 4d 43 clr.b r13 ; 00009f48 <.L2>: 9f48: 09 4e mov r14, r9 ; 9f4a: 09 df bis r15, r9 ; 9f4c: 09 93 cmp #0, r9 ;r3 As==00 9f4e: 05 24 jz $+12 ;abs 0x9f5a 9f50: 49 48 mov.b r8, r9 ; 9f52: 79 53 add.b #-1, r9 ;r3 As==11 9f54: 48 49 mov.b r9, r8 ; 00009f56 <.LVL4>: 9f56: 49 93 cmp.b #0, r9 ;r3 As==00 9f58: 02 20 jnz $+6 ;abs 0x9f5e 00009f5a <.L1>: 9f5a: 30 40 9a 90 br #0x909a ; 00009f5e <.L6>: 9f5e: 09 4e mov r14, r9 ; 9f60: 59 f3 and.b #1, r9 ;r3 As==01 00009f62 <.Loc.36.1>: 9f62: 09 93 cmp #0, r9 ;r3 As==00 9f64: 02 24 jz $+6 ;abs 0x9f6a 00009f66 <.Loc.37.1>: 9f66: 0c 5a add r10, r12 ; 00009f68 <.LVL5>: 9f68: 0d 6b addc r11, r13 ; 00009f6a <.L3>: 9f6a: 06 4a mov r10, r6 ; 9f6c: 07 4b mov r11, r7 ; 9f6e: 06 5a add r10, r6 ; 9f70: 07 6b addc r11, r7 ; 9f72: 0a 46 mov r6, r10 ; 00009f74 <.LVL7>: 9f74: 0b 47 mov r7, r11 ; 00009f76 <.LVL8>: 9f76: 12 c3 clrc 9f78: 0f 10 rrc r15 ; 9f7a: 0e 10 rrc r14 ; 00009f7c <.LVL9>: 9f7c: e5 3f jmp $-52 ;abs 0x9f48 00009f7e : 9f7e: 00009f80 : 9f80: 06 00 mova @r0, r6 ; 9f82: b0 12 ea 9f call #-24598 ;#0x9fea 00009f86 <.LVL0>: 9f86: 5c 43 mov.b #1, r12 ;r3 As==01 9f88: b0 12 3e a0 call #-24514 ;#0xa03e 00009f8c <_raise_r>: 9f8c: 0a 12 push r10 ; 00009f8e <.LCFI7>: 9f8e: 09 12 push r9 ; 00009f90 <.LCFI8>: 9f90: 09 4c mov r12, r9 ; 9f92: 0a 4d mov r13, r10 ; 00009f94 <.Loc.149.1>: 9f94: 7c 40 1f 00 mov.b #31, r12 ;#0x001f 00009f98 <.LVL16>: 9f98: 0c 9d cmp r13, r12 ; 9f9a: 06 2c jc $+14 ;abs 0x9fa8 00009f9c <.Loc.153.1>: 9f9c: b9 40 16 00 mov #22, 0(r9) ;#0x0016 9fa0: 00 00 00009fa2 <.Loc.154.1>: 9fa2: 3c 43 mov #-1, r12 ;r3 As==11 00009fa4 <.L16>: 9fa4: 30 40 a0 90 br #0x90a0 ; 00009fa8 <.L17>: 9fa8: 1c 49 22 00 mov 34(r9), r12 ;0x00022 00009fac <.Loc.157.1>: 9fac: 0c 93 cmp #0, r12 ;r3 As==00 9fae: 05 24 jz $+12 ;abs 0x9fba 00009fb0 <.Loc.160.1>: 9fb0: 0d 5d rla r13 ; 9fb2: 0c 5d add r13, r12 ; 00009fb4 <.Loc.160.1>: 9fb4: 2d 4c mov @r12, r13 ; 00009fb6 <.LVL18>: 9fb6: 0d 93 cmp #0, r13 ;r3 As==00 9fb8: 09 20 jnz $+20 ;abs 0x9fcc 00009fba <.L19>: 9fba: 0c 49 mov r9, r12 ; 9fbc: b0 12 1a a0 call #-24550 ;#0xa01a 00009fc0 <.LVL20>: 9fc0: 0e 4a mov r10, r14 ; 9fc2: 0d 4c mov r12, r13 ; 9fc4: 0c 49 mov r9, r12 ; 9fc6: b0 12 f6 9f call #-24586 ;#0x9ff6 00009fca <.LVL21>: 9fca: ec 3f jmp $-38 ;abs 0x9fa4 00009fcc <.L20>: 9fcc: 1d 93 cmp #1, r13 ;r3 As==01 9fce: 0b 24 jz $+24 ;abs 0x9fe6 00009fd0 <.Loc.166.1>: 9fd0: 3d 93 cmp #-1, r13 ;r3 As==11 9fd2: 05 20 jnz $+12 ;abs 0x9fde 00009fd4 <.Loc.168.1>: 9fd4: b9 40 16 00 mov #22, 0(r9) ;#0x0016 9fd8: 00 00 00009fda <.Loc.169.1>: 9fda: 5c 43 mov.b #1, r12 ;r3 As==01 9fdc: e3 3f jmp $-56 ;abs 0x9fa4 00009fde <.L21>: 9fde: 8c 43 00 00 mov #0, 0(r12) ;r3 As==00 00009fe2 <.Loc.174.1>: 9fe2: 0c 4a mov r10, r12 ; 9fe4: 8d 12 call r13 ; 00009fe6 <.L22>: 9fe6: 4c 43 clr.b r12 ; 9fe8: dd 3f jmp $-68 ;abs 0x9fa4 00009fea : 9fea: 0d 4c mov r12, r13 ; 9fec: 1c 42 02 02 mov &0x0202,r12 ;0x0202 00009ff0 : 9ff0: b0 12 8c 9f call #-24692 ;#0x9f8c 00009ff4 <.LVL35>: 9ff4: 30 41 ret 00009ff6 <_kill_r>: 9ff6: 0a 12 push r10 ; 00009ff8 <.LCFI0>: 9ff8: 0a 4c mov r12, r10 ; 9ffa: 0c 4d mov r13, r12 ; 00009ffc <.LVL1>: 9ffc: 0d 4e mov r14, r13 ; 00009ffe <.LVL2>: 9ffe: 82 43 da 02 mov #0, &0x02da ;r3 As==00 0000a002 <.Loc.61.1>: a002: b0 12 30 a0 call #-24528 ;#0xa030 0000a006 <.LVL3>: a006: 3c 93 cmp #-1, r12 ;r3 As==11 a008: 06 20 jnz $+14 ;abs 0xa016 0000a00a <.Loc.61.1>: a00a: 1d 42 da 02 mov &0x02da,r13 ;0x02da 0000a00e <.Loc.61.1>: a00e: 0d 93 cmp #0, r13 ;r3 As==00 a010: 02 24 jz $+6 ;abs 0xa016 0000a012 <.Loc.62.1>: a012: 8a 4d 00 00 mov r13, 0(r10) ; 0000a016 <.L1>: a016: 3a 41 pop r10 ; 0000a018 <.LCFI1>: a018: 30 41 ret 0000a01a <_getpid_r>: a01a: b0 12 2a a0 call #-24534 ;#0xa02a 0000a01e <.LVL6>: a01e: 30 41 ret 0000a020 : a020: 3d 53 add #-1, r13 ;r3 As==11 a022: 0c 11 rra r12 ; 0000a024 <__mspabi_srai>: a024: 0d 93 cmp #0, r13 ;r3 As==00 a026: fc 23 jnz $-6 ;abs 0xa020 a028: 30 41 ret 0000a02a : a02a: 3c 40 2a 00 mov #42, r12 ;#0x002a 0000a02e <.Loc.57.1>: a02e: 30 41 ret 0000a030 : a030: b0 12 40 a0 call #-24512 ;#0xa040 a034: bc 40 58 00 mov #88, 0(r12) ;#0x0058 a038: 00 00 a03a: 3c 43 mov #-1, r12 ;r3 As==11 a03c: 30 41 ret 0000a03e <_exit>: a03e: ff 3f jmp $+0 ;abs 0xa03e 0000a040 <__errno>: a040: 0000a042 : a042: 02 02 mova @r2, r2 ; a044: 30 41 ret