raspi_mon.elf: file format elf32-msp430 SYMBOL TABLE: 0000ffe6 l d __interrupt_vector_4 00000000 __interrupt_vector_4 0000ffea l d __interrupt_vector_6 00000000 __interrupt_vector_6 0000ffee l d __interrupt_vector_8 00000000 __interrupt_vector_8 0000fff0 l d __interrupt_vector_9 00000000 __interrupt_vector_9 0000fffe l d __reset_vector 00000000 __reset_vector 00008000 l d .rodata 00000000 .rodata 0000822c l d .rodata2 00000000 .rodata2 0000829c l d .text 00000000 .text 00000200 l d .data 00000000 .data 000002ca l d .bss 00000000 .bss 000002dc l d .noinit 00000000 .noinit 000002dc l d .heap 00000000 .heap 00000000 l d .MSP430.attributes 00000000 .MSP430.attributes 00000000 l d .comment 00000000 .comment 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 00000000 l df *ABS* 00000000 c:/msp430-gcc/bin/../lib/gcc/msp430-elf/9.2.0/../../../../msp430-elf/lib/430/crt0.o 0000fffe l __reset_vector 00000000 __msp430_resetvec_hook 00000000 l df *ABS* 00000000 lib_a-impure.o 00000204 l O .data 00000078 impure_data 00000000 l df *ABS* 00000000 lib_a-nano-svfprintf.o 00000000 l df *ABS* 00000000 lib_a-nano-vfprintf_i.o 00000000 l df *ABS* 00000000 sbrk.c 0000027c l O .data 00000002 heap.1412 00000000 l df *ABS* 00000000 crt_bss.o 00000000 l df *ABS* 00000000 crt_movedata.o 00000000 l df *ABS* 00000000 crt_main.o 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 lib2divHI.o 00000000 l df *ABS* 00000000 lib2divSI.o 00000000 l df *ABS* 00000000 slli.o 00000000 l df *ABS* 00000000 srli.o 00000000 l df *ABS* 00000000 lib_a-atoi.o 00000000 l df *ABS* 00000000 lib_a-memcmp.o 00000000 l df *ABS* 00000000 lib_a-memcpy.o 00000000 l df *ABS* 00000000 lib_a-memset.o 00000000 l df *ABS* 00000000 lib_a-snprintf.o 00000000 l df *ABS* 00000000 lib_a-sprintf.o 00000000 l df *ABS* 00000000 lib_a-strchr.o 00000000 l df *ABS* 00000000 lib_a-strstr.o 00000000 l df *ABS* 00000000 lib_a-strtol.o 00000000 l df *ABS* 00000000 lib_a-memchr.o 00000000 l df *ABS* 00000000 lib_a-memmove.o 00000000 l df *ABS* 00000000 lib_a-nano-freer.o 00000000 l df *ABS* 00000000 lib_a-nano-mallocr.o 00000000 l df *ABS* 00000000 lib_a-nano-reallocr.o 00000000 l df *ABS* 00000000 lib_a-sbrkr.o 00000000 l df *ABS* 00000000 lib_a-nano-msizer.o 00000000 l df *ABS* 00000000 write.c 00000000 l df *ABS* 00000000 cio.o 00000000 l df *ABS* 00000000 lib2_mul_none.o 00000000 l df *ABS* 00000000 lib_a-abort.o 00000000 l df *ABS* 00000000 lib_a-signal.o 00000000 l df *ABS* 00000000 lib_a-signalr.o 00000000 l df *ABS* 00000000 srai.o 00000000 l df *ABS* 00000000 ciosyscalls.o 00000000 l df *ABS* 00000000 exit.c 00000000 l df *ABS* 00000000 lib_a-errno.o 00009ddc g F .text 00000014 _malloc_usable_size_r 00009ea2 g F .text 0000004e __mspabi_mpyl 00000001 g *ABS* 00000000 IE2 00000061 g *ABS* 00000000 UCA0CTL1 00000022 g *ABS* 00000000 P1DIR 00000067 g *ABS* 00000000 UCA0TXBUF 00000064 g *ABS* 00000000 UCA0MCTL 00008e0c g F .text 00000062 CCXX_SPI_RDREG 00009f66 g F .text 00000024 _kill_r 00000053 g *ABS* 00000000 BCSCTL3 000010f8 g *ABS* 00000000 CALDCO_16MHZ 00000025 g *ABS* 00000000 P1IE 000084a2 g F .text 0000001e init_UART_SPI 00009b46 g F .text 0000004e memmove 00009090 g F .text 0000006e snprintf 00008f1e g F .text 00000040 .hidden udivmodhi4 00009fb0 g F .text 00000006 __errno 0000027e g .data 00000000 __CIOBUF__ 00009e9e g .text 00000000 C$$IO$$ 000001b4 g *ABS* 00000000 ADC10MEM 000002da g O .bss 00000002 errno 00009008 g .text 00000000 .hidden __mspabi_func_epilog_6 0000845a g F .text 00000012 sample_adc 00009f9a w F .text 00000006 getpid 00000024 g *ABS* 00000000 P1IES 00009062 g F .text 0000001e memcpy 00008ff8 g F .text 0000000e .hidden __mspabi_remul 00009458 g F .text 00000290 _svfprintf_r 000083da g F .text 0000006e sys_init 0000012e g *ABS* 00000000 TAIV 0000002a g *ABS* 00000000 P2DIR 00000120 g *ABS* 00000000 WDTCTL 00009efc g F .text 00000064 _raise_r 00008334 g F .text 00000078 tinit 0000829c g F .text 00000004 __crt0_start 00009f8a g F .text 00000006 _getpid_r 000002e0 g .heap 00000000 __HeapLimit 000002e0 g .heap 00000000 __heap_end__ 000082a0 g F .text 0000000e __crt0_init_bss 00009dba g F .text 00000022 _sbrk_r 000082c8 g F .text 0000001e P2_VEC 00000012 g *ABS* 00000000 __bsssize 00008dd8 g F .text 00000034 CCXX_SPI_STROBE 00009012 g .text 00000000 .hidden __mspabi_func_epilog_1 0000901a g .text 00000000 .hidden __mspabi_slli 00009e9e g .text 00000000 _libgloss_cio_hook 0000900e g .text 00000000 .hidden __mspabi_func_epilog_3 00009d62 g F .text 0000005e _realloc_r 0000006e g *ABS* 00000000 UCB0RXBUF 00008e6e g F .text 0000004a CCXX_SPI_WRREG 00009026 g .text 00000000 .hidden __mspabi_srli 00009eee g F .text 0000000e abort 00009df0 g F .text 00000032 _sbrk 0000004a g *ABS* 00000000 ADC10AE0 000001b2 g *ABS* 00000000 ADC10CTL1 000084c0 g F .text 0000015c CCXX_WRITE_SPI_RF_SETTINGS 00000063 g *ABS* 00000000 UCA0BR1 0000935e g F .text 00000010 strtol 00000172 g *ABS* 00000000 TACCR0 00008eb8 g F .text 00000066 CCXX_SPI_BURST_WRREG 000002ca g O .bss 00000001 RSSI_DBM 00000019 g *ABS* 00000000 P3OUT 0000001b g *ABS* 00000000 P3SEL 00009e22 g F .text 0000007e write 0000002e g *ABS* 00000000 P2SEL 00009fa0 w F .text 0000000e kill 0000006b g *ABS* 00000000 UCB0BR1 00009090 g F .text 0000006e sniprintf 000002dc g .noinit 00000000 end 0000936e g F .text 000000f0 __ssputs_r 000002ce g O .bss 00000001 RSSI 00008f5a g F .text 00000008 .hidden __mspabi_remu 00000026 g *ABS* 00000000 P1SEL 0000002d g *ABS* 00000000 P2IE 00009b2a g F .text 0000001e memchr 00009b8e g F .text 000000f6 _free_r 00000062 g *ABS* 00000000 UCA0BR0 00008f62 g F .text 00000090 .hidden udivmodsi4 0000829c g .text 00000000 _start 00009156 g F .text 00000042 strstr 000082e6 g F .text 00000028 TA1_VEC 00000056 g *ABS* 00000000 DCOCTL 00008484 g F .text 0000001e init_UART_232 0000002c g *ABS* 00000000 P2IES 00009f94 g .text 00000000 .hidden __mspabi_srai 00008fea g F .text 0000000e .hidden __mspabi_divul 000000ca g *ABS* 00000000 __romdatacopysize 00000066 g *ABS* 00000000 UCA0RXBUF 00009038 g F .text 0000002e memcmp 00008448 g F .text 00000012 init_adc 00000003 g *ABS* 00000000 IFG2 00000029 g *ABS* 00000000 P2OUT 00009df0 w F .text 00000032 sbrk 00008326 g F .text 0000000e ADC_VEC 00000000 w *ABS* 00000000 __rom_highdatacopysize 0000907e g F .text 00000014 memset 00000069 g *ABS* 00000000 UCB0CTL1 00008778 g F .text 00000672 main 00000018 g *ABS* 00000000 P3IN 00000160 g *ABS* 00000000 TACTL 0000027e g .data 00000000 _CIOBUF_ 00009194 g F .text 000001de _strtol_r 00009c7a g F .text 000000f2 _malloc_r 000002dc g .heap 00000000 __heap_start__ 000002d0 g O .bss 00000002 seconds 00000000 w *ABS* 00000000 __high_bsssize 000010f9 g *ABS* 00000000 CALBC1_16MHZ 00000000 w *ABS* 00000000 __rom_highdatastart 0000006f g *ABS* 00000000 UCB0TXBUF 000083ac g F .text 0000002e delay 00008728 g F .text 00000050 TX_STRING 00009fb6 g *ABS* 00000000 __romdatastart 000090fa g F .text 00000040 sprintf 000002cd g O .bss 00000001 LQI 0000830e g F .text 00000018 RX_VEC 000096d4 g F .text 0000011c _printf_common 00000202 g O .data 00000002 _impure_ptr 0000001a g *ABS* 00000000 P3DIR 0000864c g F .text 000000dc RX_STRING 00009458 g F .text 00000290 _svfiprintf_r 000001b0 g *ABS* 00000000 ADC10CTL0 00000021 g *ABS* 00000000 P1OUT 00000000 w *ABS* 00000000 __high_datastart 00000000 w *ABS* 00000000 __upper_data_init 000002ca g .bss 00000000 __bssstart 0000900a g .text 00000000 .hidden __mspabi_func_epilog_5 000002cc g O .bss 00000001 PKTSTATUS 00000600 g .MSP430.attributes 00000000 __stack 000002ca g .data 00000000 _edata 000002dc g .heap 00000000 _end 00009fae w F .text 00000004 exit 00000057 g *ABS* 00000000 BCSCTL1 000002d2 g O .bss 00000002 flags 00000000 w *ABS* 00000000 __high_bssstart 00000200 g O .data 00000002 __ctype_ptr__ 000090fa g F .text 00000040 siprintf 0000902c g F .text 0000000c atoi 000080db g O .rodata 00000101 _ctype_ 000082c2 g F .text 00000006 __crt0_call_main 00000170 g *ABS* 00000000 TAR 0000861c g F .text 00000030 RX_MODE 00009fae w F .text 00000004 _exit 00008fea g F .text 0000000e __mspabi_divlu 000097e8 g F .text 00000340 _printf_i 0000006a g *ABS* 00000000 UCB0BR0 000002d6 g O .bss 00000002 __malloc_sbrk_start 00000068 g *ABS* 00000000 UCB0CTL0 0000913a g F .text 0000001e strchr 00000200 g .data 00000000 __datastart 000002d8 g O .bss 00000002 __malloc_free_list 000082ae g F .text 00000014 __crt0_movedata 00009010 g .text 00000000 .hidden __mspabi_func_epilog_2 000002d4 g O .bss 00000001 status 000002cb g O .bss 00000001 rx_char 00009006 g .text 00000000 .hidden __mspabi_func_epilog_7 0000900c g .text 00000000 .hidden __mspabi_func_epilog_4 0000846c g F .text 00000018 TX232String 0000002b g *ABS* 00000000 P2IFG 00009f5a g F .text 0000000c raise Disassembly of section __interrupt_vector_4: 0000ffe6 <__interrupt_vector_4>: ffe6: c8 82 interrupt service routine at 0x82c8 Disassembly of section __interrupt_vector_6: 0000ffea <__interrupt_vector_6>: ffea: 26 83 interrupt service routine at 0x8326 Disassembly of section __interrupt_vector_8: 0000ffee <__interrupt_vector_8>: ffee: 0e 83 interrupt service routine at 0x830e Disassembly of section __interrupt_vector_9: 0000fff0 <__interrupt_vector_9>: fff0: e6 82 interrupt service routine at 0x82e6 Disassembly of section .text: 0000829c <__crt0_start>: 829c: 31 40 00 06 mov #1536, r1 ;#0x0600 000082a0 <__crt0_init_bss>: 82a0: 3c 40 ca 02 mov #714, r12 ;#0x02ca 000082a4 <.Loc.76.1>: 82a4: 0d 43 clr r13 ; 000082a6 <.Loc.77.1>: 82a6: 3e 40 12 00 mov #18, r14 ;#0x0012 000082aa <.Loc.81.1>: 82aa: b0 12 7e 90 call #-28546 ;#0x907e 000082ae <__crt0_movedata>: 82ae: 3c 40 00 02 mov #512, r12 ;#0x0200 000082b2 <.Loc.116.1>: 82b2: 3d 40 b6 9f mov #-24650,r13 ;#0x9fb6 000082b6 <.Loc.119.1>: 82b6: 0d 9c cmp r12, r13 ; 000082b8 <.Loc.120.1>: 82b8: 04 24 jz $+10 ;abs 0x82c2 000082ba <.Loc.122.1>: 82ba: 3e 40 ca 00 mov #202, r14 ;#0x00ca 000082be <.Loc.124.1>: 82be: b0 12 46 9b call #-25786 ;#0x9b46 000082c2 <__crt0_call_main>: 82c2: 0c 43 clr r12 ; 000082c4 <.Loc.254.1>: 82c4: b0 12 78 87 call #-30856 ;#0x8778 000082c8 : // Port 2 interripts : the allspice controller is talking to us //interrupt (PORT2_VECTOR) P2_VEC(void) void __interrupt_vec(PORT2_VECTOR) P2_VEC(void) { _disable_interrupts(); //no nesting! 82c8: 32 c2 dint 82ca: 03 43 nop 000082cc <.Loc.54.1>: if((P2IFG & GDO0) == GDO0) 82cc: f2 b0 40 00 bit.b #64, &0x002b ;#0x0040 82d0: 2b 00 82d2: 05 24 jz $+12 ;abs 0x82de 000082d4 <.Loc.56.1>: { flags |= CONTROLLER_RDY; 82d4: a2 d3 d2 02 bis #2, &0x02d2 ;r3 As==10 000082d8 <.Loc.57.1>: LPM3_EXIT; 82d8: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 82dc: 00 00 000082de <.L2>: //We need to grab that byte! } P2IFG=0x00; 82de: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 000082e2 <.Loc.61.1>: _enable_interrupts(); 82e2: 32 d2 eint 000082e4 <.Loc.62.1>: } 82e4: 00 13 reti 000082e6 : /** This is called once every overflow */ //interrupt (TIMERA1_VECTOR) TA1_VEC(void) void __interrupt_vec(TIMERA1_VECTOR) TA1_VEC(void) { 82e6: 0c 12 push r12 ; 000082e8 <.LCFI0>: _disable_interrupts(); //no nesting! 82e8: 32 c2 dint 82ea: 03 43 nop 000082ec <.Loc.72.1>: if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 82ec: 1c 42 2e 01 mov &0x012e,r12 ;0x012e 000082f0 <.Loc.72.1>: 82f0: 3c 90 0a 00 cmp #10, r12 ;#0x000a 82f4: 09 20 jnz $+20 ;abs 0x8308 000082f6 <.Loc.74.1>: { flags |= TIMER_UP; 82f6: 92 d3 d2 02 bis #1, &0x02d2 ;r3 As==01 000082fa <.Loc.75.1>: seconds++; 82fa: 92 53 d0 02 inc &0x02d0 ; 000082fe <.Loc.76.1>: TACTL &= ~TAIFG; //clear the flag 82fe: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008302 <.Loc.77.1>: LPM3_EXIT; 8302: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0 8306: 02 00 00008308 <.L8>: } _enable_interrupts(); 8308: 32 d2 eint 0000830a <.Loc.80.1>: } 830a: 3c 41 pop r12 ; 0000830c <.LCFI1>: 830c: 00 13 reti 0000830e : This is called once for every RS232 character that comes in */ //interrupt (USCIAB0RX_VECTOR) RX_VEC(void) void __interrupt_vec(USCIAB0RX_VECTOR) RX_VEC(void) { _disable_interrupts(); //no nesting! 830e: 32 c2 dint 8310: 03 43 nop 00008312 <.Loc.90.1>: //P1OUT^=LED_GRN; rx_char = UCA0RXBUF; 8312: d2 42 66 00 mov.b &0x0066,&0x02cb ;0x0066 8316: cb 02 00008318 <.Loc.91.1>: flags |= RXCHAR_RDY; 8318: b2 d2 d2 02 bis #8, &0x02d2 ;r2 As==11 0000831c <.Loc.92.1>: LPM3_EXIT; 831c: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 8320: 00 00 00008322 <.Loc.93.1>: _enable_interrupts(); 8322: 32 d2 eint 00008324 <.Loc.94.1>: } 8324: 00 13 reti 00008326 : // Port 2 interripts : the allspice controller is talking to us //interrupt (ADC10_VECTOR) ADC_VEC(void) void __interrupt_vec(ADC10_VECTOR) ADC_VEC(void) { _disable_interrupts(); //no nesting! 8326: 32 c2 dint 8328: 03 43 nop 0000832a <.Loc.105.1>: LPM3_EXIT; 832a: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0 832e: 00 00 00008330 <.Loc.106.1>: _enable_interrupts(); 8330: 32 d2 eint 00008332 <.Loc.107.1>: } 8332: 00 13 reti 00008334 : TAR = 0; TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! }*/ void tinit(unsigned int milliseconds) { 8334: 0a 12 push r10 ; 00008336 <.LCFI2>: TACTL = TASSEL_1; // ACLK, upmode 8336: b2 40 00 01 mov #256, &0x0160 ;#0x0100 833a: 60 01 0000833c <.Loc.127.1>: TACTL &= ~TAIFG; //clear interrupt 833c: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008340 <.Loc.128.1>: TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8340: 0e 4c mov r12, r14 ; 8342: 0f 43 clr r15 ; 8344: 0c 4e mov r14, r12 ; 00008346 <.LVL1>: 8346: 0c 5e add r14, r12 ; 8348: 0d 4f mov r15, r13 ; 834a: 0d 6f addc r15, r13 ; 834c: 0a 4c mov r12, r10 ; 834e: 0a 5e add r14, r10 ; 8350: 0b 4d mov r13, r11 ; 8352: 0b 6f addc r15, r11 ; 8354: 0a 5a rla r10 ; 8356: 0b 6b rlc r11 ; 8358: 0a 5a rla r10 ; 835a: 0b 6b rlc r11 ; 835c: 0a 5a rla r10 ; 835e: 0b 6b rlc r11 ; 8360: 0a 5a rla r10 ; 8362: 0b 6b rlc r11 ; 8364: 0c 4a mov r10, r12 ; 8366: 0d 4b mov r11, r13 ; 8368: 0c 8e sub r14, r12 ; 836a: 0d 7f subc r15, r13 ; 836c: 0c 5c rla r12 ; 836e: 0d 6d rlc r13 ; 8370: 0c 5c rla r12 ; 8372: 0d 6d rlc r13 ; 8374: 0c 5c rla r12 ; 8376: 0d 6d rlc r13 ; 8378: 0c 8e sub r14, r12 ; 837a: 0d 7f subc r15, r13 ; 0000837c <.Loc.128.1>: 837c: 3e 40 e8 03 mov #1000, r14 ;#0x03e8 00008380 <.LVL2>: 8380: 4f 43 clr.b r15 ; 8382: 0c 5c rla r12 ; 8384: 0d 6d rlc r13 ; 8386: 0c 5c rla r12 ; 8388: 0d 6d rlc r13 ; 838a: 0c 5c rla r12 ; 838c: 0d 6d rlc r13 ; 838e: 0c 5c rla r12 ; 8390: 0d 6d rlc r13 ; 8392: 0c 5c rla r12 ; 8394: 0d 6d rlc r13 ; 8396: b0 12 ea 8f call #-28694 ;#0x8fea 0000839a <.Loc.128.1>: 839a: 82 4c 72 01 mov r12, &0x0172 ; 0000839e <.Loc.130.1>: //TACCR0 = 12000; // ~1 second TAR = 0; 839e: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 000083a2 <.Loc.131.1>: TACTL |= MC_UPTO_CCR0 | TAIE; //overflow interrupt enabled, start counting! 83a2: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 83a6: 60 01 000083a8 <.Loc.132.1>: } 83a8: 3a 41 pop r10 ; 000083aa <.LCFI3>: 83aa: 30 41 ret 000083ac : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: 83b0: 4d 43 clr.b r13 ; 000083b2 <.L14>: { __nop(); 83b2: 03 43 nop 000083b4 <.Loc.143.1>: __nop(); 83b4: 03 43 nop 000083b6 <.Loc.144.1>: __nop(); 83b6: 03 43 nop 000083b8 <.Loc.145.1>: __nop(); 83b8: 03 43 nop 000083ba <.Loc.146.1>: __nop(); 83ba: 03 43 nop 000083bc <.Loc.147.1>: __nop(); 83bc: 03 43 nop 000083be <.Loc.148.1>: __nop(); 83be: 03 43 nop 000083c0 <.Loc.149.1>: __nop(); 83c0: 03 43 nop 000083c2 <.Loc.150.1>: __nop(); 83c2: 03 43 nop 000083c4 <.Loc.151.1>: __nop(); 83c4: 03 43 nop 000083c6 <.Loc.152.1>: __nop(); 83c6: 03 43 nop 000083c8 <.Loc.153.1>: __nop(); 83c8: 03 43 nop 000083ca <.Loc.154.1>: __nop(); 83ca: 03 43 nop 000083cc <.Loc.155.1>: __nop(); 83cc: 03 43 nop 000083ce <.Loc.156.1>: __nop(); 83ce: 03 43 nop 000083d0 <.Loc.157.1>: __nop(); 83d0: 03 43 nop 000083d2 <.Loc.140.1>: for (i = 0; i: 83d4: 0d 9c cmp r12, r13 ; 83d6: ed 23 jnz $-36 ;abs 0x83b2 000083d8 <.L12>: } } 83d8: 30 41 ret 000083da : Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 83da: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 83de: 20 01 000083e0 <.Loc.168.1>: WDTCTL = WDT_ARST_1000; //Select ACLK as source 83e0: b2 40 0c 5a mov #23052, &0x0120 ;#0x5a0c 83e4: 20 01 000083e6 <.Loc.169.1>: WDOG(); //Feed the dog 83e6: 1c 42 20 01 mov &0x0120,r12 ;0x0120 83ea: 7c f0 ff 00 and.b #255, r12 ;#0x00ff 83ee: 3c 50 08 5a add #23048, r12 ;#0x5a08 83f2: 82 4c 20 01 mov r12, &0x0120 ; 000083f6 <.Loc.171.1>: P1OUT = P1OUT_INIT; //Init output data of port1 83f6: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 000083fa <.Loc.172.1>: P2OUT = P2OUT_INIT; //Init output data of port2 83fa: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 000083fe <.Loc.173.1>: P3OUT = P3OUT_INIT; 83fe: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 00008402 <.Loc.175.1>: P1SEL = P1SEL_INIT; //Select port or module -function on port1 8402: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 00008406 <.Loc.176.1>: P2SEL = P2SEL_INIT; //Select port or module -function on port2 8406: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 0000840a <.Loc.177.1>: P3SEL = P3SEL_INIT; 840a: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 840e: 1b 00 00008410 <.Loc.179.1>: P1DIR = P1DIR_INIT; //Init port direction register of port1 8410: f2 43 22 00 mov.b #-1, &0x0022 ;r3 As==11 00008414 <.Loc.180.1>: P2DIR = P2DIR_INIT; //Init port direction register of port2 8414: f2 40 3f 00 mov.b #63, &0x002a ;#0x003f 8418: 2a 00 0000841a <.Loc.181.1>: P3DIR = P3DIR_INIT; 841a: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 841e: 1a 00 00008420 <.Loc.183.1>: P1IES = P1IES_INIT; //init port interrupts 8420: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 00008424 <.Loc.184.1>: P2IES = P2IES_INIT; 8424: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 8428: 2c 00 0000842a <.Loc.186.1>: P1IE = P1IE_INIT; 842a: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 0000842e <.Loc.187.1>: P2IE = P2IE_INIT; 842e: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 8432: 2d 00 00008434 <.Loc.189.1>: BCSCTL1 = CALBC1_16MHZ; // Set DCO 8434: d2 42 f9 10 mov.b &0x10f9,&0x0057 ;0x10f9 8438: 57 00 0000843a <.Loc.191.1>: DCOCTL = CALDCO_16MHZ; 843a: d2 42 f8 10 mov.b &0x10f8,&0x0056 ;0x10f8 843e: 56 00 00008440 <.Loc.193.1>: BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 8440: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 8444: 53 00 00008446 <.Loc.194.1>: } 8446: 30 41 ret 00008448 : /**init the ADC10 */ void init_adc() { ADC10AE0 = ADC_IN; 8448: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 0000844c <.Loc.202.1>: ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 844c: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 8450: b0 01 00008452 <.Loc.203.1>: ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8452: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8456: b2 01 00008458 <.Loc.204.1>: } 8458: 30 41 ret 0000845a : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 845a: b2 d0 03 00 bis #3, &0x01b0 ; 845e: b0 01 00008460 <.L22>: while(ADC10CTL1 & ADC10BUSY); 8460: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 8464: fd 23 jnz $-4 ;abs 0x8460 00008466 <.Loc.212.1>: return ADC10MEM; } 8466: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 846a: 30 41 ret 0000846c : void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 846c: 4e 43 clr.b r14 ; 846e: 0e 9d cmp r13, r14 ; 8470: 08 34 jge $+18 ;abs 0x8482 8472: 0d 5c add r12, r13 ; 00008474 <.L27>: { volatile int i; UCA0TXBUF = string[pointer]; 8474: f2 4c 67 00 mov.b @r12+, &0x0067 ; 00008478 <.L26>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8478: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 847c: fd 27 jz $-4 ;abs 0x8478 0000847e <.LBE28>: for( pointer = 0; pointer < length; pointer++) 847e: 0c 9d cmp r13, r12 ; 8480: f9 23 jnz $-12 ;abs 0x8474 00008482 <.L24>: } } 8482: 30 41 ret 00008484 : void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 8484: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 8488: 61 00 0000848a <.Loc.230.1>: //UCA0BR0 = 0x82; UCA0BR1 = 0x6; // 9600 from 16Mhz UCA0BR0 = 0x8A; UCA0BR1 = 0x00; // 115200 from 16Mhz 848a: f2 40 8a ff mov.b #-118, &0x0062 ;#0xff8a 848e: 62 00 00008490 <.Loc.230.1>: 8490: c2 43 63 00 mov.b #0, &0x0063 ;r3 As==00 00008494 <.Loc.236.1>: //UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 8494: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 00008498 <.Loc.237.1>: UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 8498: d2 c3 61 00 bic.b #1, &0x0061 ;r3 As==01 0000849c <.Loc.238.1>: IE2 |= UCA0RXIE; 849c: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 000084a0 <.Loc.239.1>: } 84a0: 30 41 ret 000084a2 : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 84a2: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 000084a6 <.Loc.244.1>: UCB0CTL1 = UCSWRST | UCSSEL1; 84a6: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 84aa: 69 00 000084ac <.Loc.245.1>: UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 84ac: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 84b0: 68 00 000084b2 <.Loc.246.1>: UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 84b2: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 000084b6 <.Loc.247.1>: UCB0BR1 = 0; 84b6: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 000084ba <.Loc.248.1>: UCB0CTL1 &= ~UCSWRST; 84ba: d2 c3 69 00 bic.b #1, &0x0069 ;r3 As==01 000084be <.Loc.250.1>: } 84be: 30 41 ret 000084c0 : void CCXX_WRITE_SPI_RF_SETTINGS() { 84c0: 0a 12 push r10 ; 000084c2 <.LCFI4>: // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 84c2: 3a 40 6e 8e mov #-29074,r10 ;#0x8e6e 84c6: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 84ca: 4c 43 clr.b r12 ; 84cc: 8a 12 call r10 ; 000084ce <.LVL15>: CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 84ce: 7d 40 06 00 mov.b #6, r13 ; 84d2: 6c 43 mov.b #2, r12 ;r3 As==10 84d4: 8a 12 call r10 ; 000084d6 <.LVL16>: CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 84d6: 7d 40 3c 00 mov.b #60, r13 ;#0x003c 84da: 7c 40 06 00 mov.b #6, r12 ; 84de: 8a 12 call r10 ; 000084e0 <.LVL17>: CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 84e0: 6d 42 mov.b #4, r13 ;r2 As==10 84e2: 7c 40 07 00 mov.b #7, r12 ; 84e6: 8a 12 call r10 ; 000084e8 <.LVL18>: CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 84e8: 7d 40 05 00 mov.b #5, r13 ; 84ec: 7c 42 mov.b #8, r12 ;r2 As==11 84ee: 8a 12 call r10 ; 000084f0 <.LVL19>: CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 84f0: 5d 43 mov.b #1, r13 ;r3 As==01 84f2: 7c 40 09 00 mov.b #9, r12 ; 84f6: 8a 12 call r10 ; 000084f8 <.LVL20>: CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 84f8: 7d 40 9a ff mov.b #-102, r13 ;#0xff9a 84fc: 7c 40 0a 00 mov.b #10, r12 ;#0x000a 8500: 8a 12 call r10 ; 00008502 <.LVL21>: CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 8502: 7d 40 0a 00 mov.b #10, r13 ;#0x000a 8506: 7c 40 0b 00 mov.b #11, r12 ;#0x000b 850a: 8a 12 call r10 ; 0000850c <.LVL22>: CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 850c: 4d 43 clr.b r13 ; 850e: 7c 40 0c 00 mov.b #12, r12 ;#0x000c 8512: 8a 12 call r10 ; 00008514 <.LVL23>: CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 8514: 7d 40 5c 00 mov.b #92, r13 ;#0x005c 8518: 7c 40 0d 00 mov.b #13, r12 ;#0x000d 851c: 8a 12 call r10 ; 0000851e <.LVL24>: CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 851e: 7d 40 4f 00 mov.b #79, r13 ;#0x004f 8522: 7c 40 0e 00 mov.b #14, r12 ;#0x000e 8526: 8a 12 call r10 ; 00008528 <.LVL25>: CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 8528: 7d 40 c0 ff mov.b #-64, r13 ;#0xffc0 852c: 7c 40 0f 00 mov.b #15, r12 ;#0x000f 8530: 8a 12 call r10 ; 00008532 <.LVL26>: CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 8532: 7d 40 2d 00 mov.b #45, r13 ;#0x002d 8536: 7c 40 10 00 mov.b #16, r12 ;#0x0010 853a: 8a 12 call r10 ; 0000853c <.LVL27>: CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 853c: 7d 40 3b 00 mov.b #59, r13 ;#0x003b 8540: 7c 40 11 00 mov.b #17, r12 ;#0x0011 8544: 8a 12 call r10 ; 00008546 <.LVL28>: CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 8546: 7d 40 73 00 mov.b #115, r13 ;#0x0073 854a: 7c 40 12 00 mov.b #18, r12 ;#0x0012 854e: 8a 12 call r10 ; 00008550 <.LVL29>: CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 8550: 7d 40 23 00 mov.b #35, r13 ;#0x0023 8554: 7c 40 13 00 mov.b #19, r12 ;#0x0013 8558: 8a 12 call r10 ; 0000855a <.LVL30>: CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 855a: 7d 40 b9 ff mov.b #-71, r13 ;#0xffb9 855e: 7c 40 14 00 mov.b #20, r12 ;#0x0014 8562: 8a 12 call r10 ; 00008564 <.LVL31>: CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 8564: 5d 43 mov.b #1, r13 ;r3 As==01 8566: 7c 40 15 00 mov.b #21, r12 ;#0x0015 856a: 8a 12 call r10 ; 0000856c <.LVL32>: CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 856c: 7d 40 33 00 mov.b #51, r13 ;#0x0033 8570: 7c 40 17 00 mov.b #23, r12 ;#0x0017 8574: 8a 12 call r10 ; 00008576 <.LVL33>: CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 8576: 7d 40 18 00 mov.b #24, r13 ;#0x0018 857a: 4c 4d mov.b r13, r12 ; 857c: 8a 12 call r10 ; 0000857e <.LVL34>: CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 857e: 7d 40 1d 00 mov.b #29, r13 ;#0x001d 8582: 7c 40 19 00 mov.b #25, r12 ;#0x0019 8586: 8a 12 call r10 ; 00008588 <.LVL35>: CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 8588: 7d 40 1c 00 mov.b #28, r13 ;#0x001c 858c: 7c 40 1a 00 mov.b #26, r12 ;#0x001a 8590: 8a 12 call r10 ; 00008592 <.LVL36>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 8592: 7d 40 c7 ff mov.b #-57, r13 ;#0xffc7 8596: 7c 40 1b 00 mov.b #27, r12 ;#0x001b 859a: 8a 12 call r10 ; 0000859c <.LVL37>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 859c: 4d 43 clr.b r13 ; 859e: 7c 40 1c 00 mov.b #28, r12 ;#0x001c 85a2: 8a 12 call r10 ; 000085a4 <.LVL38>: CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 85a4: 7d 40 b0 ff mov.b #-80, r13 ;#0xffb0 85a8: 7c 40 1d 00 mov.b #29, r12 ;#0x001d 85ac: 8a 12 call r10 ; 000085ae <.LVL39>: CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 85ae: 7d 40 b6 ff mov.b #-74, r13 ;#0xffb6 85b2: 7c 40 21 00 mov.b #33, r12 ;#0x0021 85b6: 8a 12 call r10 ; 000085b8 <.LVL40>: CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 85b8: 7d 40 10 00 mov.b #16, r13 ;#0x0010 85bc: 7c 40 22 00 mov.b #34, r12 ;#0x0022 85c0: 8a 12 call r10 ; 000085c2 <.LVL41>: CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 85c2: 7d 40 ea ff mov.b #-22, r13 ;#0xffea 85c6: 7c 40 23 00 mov.b #35, r12 ;#0x0023 85ca: 8a 12 call r10 ; 000085cc <.LVL42>: CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 85cc: 7d 40 0a 00 mov.b #10, r13 ;#0x000a 85d0: 7c 40 24 00 mov.b #36, r12 ;#0x0024 85d4: 8a 12 call r10 ; 000085d6 <.LVL43>: CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 85d6: 4d 43 clr.b r13 ; 85d8: 7c 40 25 00 mov.b #37, r12 ;#0x0025 85dc: 8a 12 call r10 ; 000085de <.LVL44>: CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 85de: 7d 40 11 00 mov.b #17, r13 ;#0x0011 85e2: 7c 40 26 00 mov.b #38, r12 ;#0x0026 85e6: 8a 12 call r10 ; 000085e8 <.LVL45>: CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 85e8: 7d 40 59 00 mov.b #89, r13 ;#0x0059 85ec: 7c 40 29 00 mov.b #41, r12 ;#0x0029 85f0: 8a 12 call r10 ; 000085f2 <.LVL46>: CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 85f2: 7d 40 88 ff mov.b #-120, r13 ;#0xff88 85f6: 7c 40 2c 00 mov.b #44, r12 ;#0x002c 85fa: 8a 12 call r10 ; 000085fc <.LVL47>: CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 85fc: 7d 40 31 00 mov.b #49, r13 ;#0x0031 8600: 7c 40 2d 00 mov.b #45, r12 ;#0x002d 8604: 8a 12 call r10 ; 00008606 <.LVL48>: CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 8606: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 860a: 7c 40 2e 00 mov.b #46, r12 ;#0x002e 860e: 8a 12 call r10 ; 00008610 <.LVL49>: CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 8610: 7d 43 mov.b #-1, r13 ;r3 As==11 8612: 7c 40 3e 00 mov.b #62, r12 ;#0x003e 8616: 8a 12 call r10 ; 00008618 <.LVL50>: } 8618: 3a 41 pop r10 ; 0000861a <.LCFI5>: 861a: 30 41 ret 0000861c : No timeout Interrupt driven! yay! */ void RX_MODE() { 861c: 0a 12 push r10 ; 0000861e <.LCFI6>: 861e: 09 12 push r9 ; 00008620 <.LCFI7>: CCXX_SPI_STROBE(CCxxx0_SIDLE); 8620: 3a 40 d8 8d mov #-29224,r10 ;#0x8dd8 8624: 7c 40 36 00 mov.b #54, r12 ;#0x0036 8628: 8a 12 call r10 ; 0000862a <.LVL51>: while(status!=15) //(15)31 for return to TX on complete, see MCSM1 862a: f2 90 0f 00 cmp.b #15, &0x02d4 ;#0x000f 862e: d4 02 8630: 08 24 jz $+18 ;abs 0x8642 00008632 <.Loc.598.1>: CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8632: 79 40 3d 00 mov.b #61, r9 ;#0x003d 00008636 <.L36>: 8636: 4c 49 mov.b r9, r12 ; 8638: 8a 12 call r10 ; 0000863a <.LVL52>: while(status!=15) //(15)31 for return to TX on complete, see MCSM1 863a: f2 90 0f 00 cmp.b #15, &0x02d4 ;#0x000f 863e: d4 02 8640: fa 23 jnz $-10 ;abs 0x8636 00008642 <.L35>: CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 8642: 7c 40 34 00 mov.b #52, r12 ;#0x0034 8646: 8a 12 call r10 ; 00008648 <.LVL53>: } 8648: 30 40 10 90 br #0x9010 ; 0000864c : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 864c: 0a 12 push r10 ; 0000864e <.LCFI9>: 864e: 09 12 push r9 ; 00008650 <.LCFI10>: 8650: 08 12 push r8 ; 00008652 <.LCFI11>: 8652: 07 12 push r7 ; 00008654 <.LCFI12>: 8654: 06 12 push r6 ; 00008656 <.LCFI13>: 8656: 05 12 push r5 ; 00008658 <.LCFI14>: 8658: 04 12 push r4 ; 0000865a <.LCFI15>: 865a: 21 82 sub #4, r1 ;r2 As==10 0000865c <.LCFI16>: 865c: 04 4c mov r12, r4 ; 865e: 48 4d mov.b r13, r8 ; 00008660 <.LVL55>: //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 8660: 39 40 0c 8e mov #-29172,r9 ;#0x8e0c 8664: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 00008668 <.LVL56>: 8668: 89 12 call r9 ; 0000866a <.LVL57>: 866a: 3c f0 ff 00 and #255, r12 ;#0x00ff 866e: 81 4c 00 00 mov r12, 0(r1) ; 00008672 <.LVL58>: real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 8672: 7c 40 3b 00 mov.b #59, r12 ;#0x003b 00008676 <.LVL59>: 8676: 89 12 call r9 ; 00008678 <.LVL60>: 8678: 3c f0 ff 00 and #255, r12 ;#0x00ff 867c: 81 4c 02 00 mov r12, 2(r1) ; 00008680 <.LVL61>: for(i=0; i < length && i < pkt_length; i++) 8680: 08 93 cmp #0, r8 ;r3 As==00 8682: 4e 24 jz $+158 ;abs 0x8720 00008684 <.Loc.620.1>: 8684: 81 93 00 00 cmp #0, 0(r1) ;r3 As==00 8688: 4d 24 jz $+156 ;abs 0x8724 868a: 05 44 mov r4, r5 ; 0000868c <.Loc.620.1>: 868c: 4a 43 clr.b r10 ; 0000868e <.Loc.622.1>: { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 868e: 77 40 bf ff mov.b #-65, r7 ;#0xffbf 00008692 <.Loc.620.1>: for(i=0; i < length && i < pkt_length; i++) 8692: 2c 41 mov @r1, r12 ; 00008694 <.LVL62>: 8694: 46 4c mov.b r12, r6 ; 8696: 02 3c jmp $+6 ;abs 0x869c 00008698 <.L47>: 8698: 46 9d cmp.b r13, r6 ; 869a: 0b 24 jz $+24 ;abs 0x86b2 0000869c <.L40>: rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 869c: 4c 47 mov.b r7, r12 ; 869e: 89 12 call r9 ; 000086a0 <.LVL65>: 86a0: c5 4c 00 00 mov.b r12, 0(r5) ; 86a4: 15 53 inc r5 ; 000086a6 <.Loc.620.1>: for(i=0; i < length && i < pkt_length; i++) 86a6: 4d 4a mov.b r10, r13 ; 86a8: 5d 53 inc.b r13 ; 86aa: 4a 4d mov.b r13, r10 ; 000086ac <.LVL66>: 86ac: 04 45 mov r5, r4 ; 000086ae <.Loc.620.1>: 86ae: 48 9d cmp.b r13, r8 ; 86b0: f3 23 jnz $-24 ;abs 0x8698 000086b2 <.L39>: //tmpbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 86b2: c4 43 00 00 mov.b #0, 0(r4) ;r3 As==00 000086b6 <.Loc.627.1>: RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 86b6: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 86ba: 89 12 call r9 ; 000086bc <.LVL68>: 86bc: c2 4c ce 02 mov.b r12, &0x02ce ; 000086c0 <.Loc.628.1>: LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 86c0: 7c 40 bf ff mov.b #-65, r12 ;#0xffbf 86c4: 89 12 call r9 ; 000086c6 <.LVL69>: 86c6: c2 4c cd 02 mov.b r12, &0x02cd ; 000086ca <.Loc.629.1>: PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 86ca: 7c 40 38 00 mov.b #56, r12 ;#0x0038 86ce: 89 12 call r9 ; 000086d0 <.LVL70>: 86d0: c2 4c cc 02 mov.b r12, &0x02cc ; 000086d4 <.Loc.632.1>: if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 86d4: 25 41 mov @r1, r5 ; 86d6: 25 53 incd r5 ; 000086d8 <.Loc.632.1>: 86d8: 81 95 02 00 cmp r5, 2(r1) ; 86dc: 03 24 jz $+8 ;abs 0x86e4 000086de <.Loc.633.1>: LQI &= ~bit7; //force it to be INVALID! 86de: f2 f0 7f 00 and.b #127, &0x02cd ;#0x007f 86e2: cd 02 000086e4 <.L41>: if (RSSI >= 128) 86e4: 5c 42 ce 02 mov.b &0x02ce,r12 ;0x02ce 000086e8 <.Loc.635.1>: 86e8: 4c 93 cmp.b #0, r12 ;r3 As==00 86ea: 12 38 jl $+38 ;abs 0x8710 000086ec <.Loc.638.1>: RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; 86ec: 12 c3 clrc 86ee: 0c 10 rrc r12 ; 86f0: 7c 50 b8 ff add.b #-72, r12 ;#0xffb8 86f4: c2 4c ca 02 mov.b r12, &0x02ca ; 000086f8 <.L43>: CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 86f8: 39 40 d8 8d mov #-29224,r9 ;#0x8dd8 86fc: 7c 40 3a 00 mov.b #58, r12 ;#0x003a 8700: 89 12 call r9 ; 00008702 <.LVL71>: CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 8702: 7c 40 36 00 mov.b #54, r12 ;#0x0036 8706: 89 12 call r9 ; 00008708 <.LVL72>: return i; //i = real length } 8708: 4c 4a mov.b r10, r12 ; 870a: 21 52 add #4, r1 ;r2 As==10 0000870c <.LCFI17>: 870c: 30 40 06 90 br #0x9006 ; 00008710 <.L48>: RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8710: 3c 50 01 ff add #-255, r12 ;#0xff01 8714: 0c 11 rra r12 ; 00008716 <.Loc.636.1>: 8716: 7c 50 b8 ff add.b #-72, r12 ;#0xffb8 871a: c2 4c ca 02 mov.b r12, &0x02ca ; 871e: ec 3f jmp $-38 ;abs 0x86f8 00008720 <.L44>: for(i=0; i < length && i < pkt_length; i++) 8720: 0a 48 mov r8, r10 ; 8722: c7 3f jmp $-112 ;abs 0x86b2 00008724 <.L45>: 8724: 2a 41 mov @r1, r10 ; 8726: c5 3f jmp $-116 ;abs 0x86b2 00008728 : /** Transmit a string of bytes. (use burst write) */ void TX_STRING(unsigned char *txstring, unsigned char length) { 8728: 0a 12 push r10 ; 0000872a <.LCFI19>: 872a: 09 12 push r9 ; 0000872c <.LCFI20>: 872c: 08 12 push r8 ; 0000872e <.LCFI21>: 872e: 07 12 push r7 ; 00008730 <.LCFI22>: 8730: 08 4c mov r12, r8 ; 8732: 47 4d mov.b r13, r7 ; 8734: 3a 40 d8 8d mov #-29224,r10 ;#0x8dd8 00008738 <.Loc.655.1>: //unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8738: 79 40 36 00 mov.b #54, r9 ;#0x0036 0000873c <.L50>: 873c: 4c 49 mov.b r9, r12 ; 873e: 8a 12 call r10 ; 00008740 <.LVL78>: }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 8740: f2 b0 70 00 bit.b #112, &0x02d4 ;#0x0070 8744: d4 02 8746: fa 23 jnz $-10 ;abs 0x873c 00008748 <.Loc.662.1>: //CC2500_SPI_WRREG(CCxxx0_TXFIFO, length);//Write the data length first CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8748: 4e 47 mov.b r7, r14 ; 874a: 0d 48 mov r8, r13 ; 874c: 7c 40 7f 00 mov.b #127, r12 ;#0x007f 8750: b0 12 b8 8e call #-29000 ;#0x8eb8 00008754 <.LVL79>: CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8754: 7c 40 35 00 mov.b #53, r12 ;#0x0035 8758: 8a 12 call r10 ; 0000875a <.LVL80>: do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 875a: 79 40 3d 00 mov.b #61, r9 ;#0x003d 875e: 03 3c jmp $+8 ;abs 0x8766 00008760 <.L58>: if(status == 31) //fast RX mode yay break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 8760: 3c b0 70 00 bit #112, r12 ;#0x0070 8764: 07 24 jz $+16 ;abs 0x8774 00008766 <.L52>: CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8766: 4c 49 mov.b r9, r12 ; 8768: 8a 12 call r10 ; 0000876a <.LVL81>: if(status == 31) //fast RX mode yay 876a: 5c 42 d4 02 mov.b &0x02d4,r12 ;0x02d4 0000876e <.Loc.669.1>: 876e: 3c 90 1f 00 cmp #31, r12 ;#0x001f 8772: f6 23 jnz $-18 ;abs 0x8760 00008774 <.L49>: } 8774: 30 40 0c 90 br #0x900c ; 00008778
: { 8778: 0a 12 push r10 ; 0000877a <.LCFI24>: 877a: 09 12 push r9 ; 0000877c <.LCFI25>: 877c: 08 12 push r8 ; 0000877e <.LCFI26>: 877e: 07 12 push r7 ; 00008780 <.LCFI27>: 8780: 06 12 push r6 ; 00008782 <.LCFI28>: 8782: 05 12 push r5 ; 00008784 <.LCFI29>: 8784: 04 12 push r4 ; 00008786 <.LCFI30>: 8786: 31 80 fa 00 sub #250, r1 ;#0x00fa 0000878a <.LCFI31>: sys_init(); //initialize system parameters 878a: b0 12 da 83 call #-31782 ;#0x83da 0000878e <.LBB29>: UCA0CTL1 = UCSSEL_2; // SMCLK 878e: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 8792: 61 00 00008794 <.Loc.230.1>: UCA0BR0 = 0x8A; UCA0BR1 = 0x00; // 115200 from 16Mhz 8794: f2 40 8a ff mov.b #-118, &0x0062 ;#0xff8a 8798: 62 00 0000879a <.Loc.230.1>: 879a: c2 43 63 00 mov.b #0, &0x0063 ;r3 As==00 0000879e <.Loc.236.1>: UCA0MCTL = UCBRS_2; 879e: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 000087a2 <.Loc.237.1>: UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 87a2: d2 c3 61 00 bic.b #1, &0x0061 ;r3 As==01 000087a6 <.Loc.238.1>: IE2 |= UCA0RXIE; 87a6: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 000087aa <.LBB31>: UCB0CTL1 = UCSWRST; 87aa: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 000087ae <.Loc.244.1>: UCB0CTL1 = UCSWRST | UCSSEL1; 87ae: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 87b2: 69 00 000087b4 <.Loc.245.1>: UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 87b4: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 87b8: 68 00 000087ba <.Loc.246.1>: UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 87ba: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 000087be <.Loc.247.1>: UCB0BR1 = 0; 87be: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 000087c2 <.Loc.248.1>: UCB0CTL1 &= ~UCSWRST; 87c2: d2 c3 69 00 bic.b #1, &0x0069 ;r3 As==01 000087c6 <.LBB33>: ADC10AE0 = ADC_IN; 87c6: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 000087ca <.Loc.202.1>: ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 87ca: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 87ce: b0 01 000087d0 <.Loc.203.1>: ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 87d0: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 87d4: b2 01 000087d6 <.LBE33>: P1OUT ^= LED_GRN; 87d6: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 000087da <.Loc.273.1>: delay(0xFFFF); //lil bit O delay 87da: 3c 43 mov #-1, r12 ;r3 As==11 87dc: b0 12 ac 83 call #-31828 ;#0x83ac 000087e0 <.LVL84>: P1OUT ^= LED_GRN; 87e0: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 000087e4 <.Loc.276.1>: memset(rxbuf, 0, 64); //clear the buffer 87e4: 0a 41 mov r1, r10 ; 87e6: 3a 50 6a 00 add #106, r10 ;#0x006a 87ea: 7e 40 40 00 mov.b #64, r14 ;#0x0040 87ee: 4d 43 clr.b r13 ; 87f0: 0c 4a mov r10, r12 ; 87f2: b0 12 7e 90 call #-28546 ;#0x907e 000087f6 <.LVL85>: P3OUT &= ~CSn; //power on reset for radio, strobe CSn 87f6: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 000087fa <.Loc.279.1>: delay(0xFF); 87fa: 7c 40 ff 00 mov.b #255, r12 ;#0x00ff 87fe: b0 12 ac 83 call #-31828 ;#0x83ac 00008802 <.LVL86>: P3OUT |= CSn; 8802: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008806 <.Loc.282.1>: delay(0xFFFF); 8806: 3c 43 mov #-1, r12 ;r3 As==11 8808: b0 12 ac 83 call #-31828 ;#0x83ac 0000880c <.LVL87>: CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 880c: 39 40 d8 8d mov #-29224,r9 ;#0x8dd8 8810: 7c 40 30 00 mov.b #48, r12 ;#0x0030 8814: 89 12 call r9 ; 00008816 <.LVL88>: CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 8816: b0 12 c0 84 call #-31552 ;#0x84c0 0000881a <.LVL89>: CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 881a: 7c 40 36 00 mov.b #54, r12 ;#0x0036 881e: 89 12 call r9 ; 00008820 <.LVL90>: WDOG(); //Feed the dog 8820: 1c 42 20 01 mov &0x0120,r12 ;0x0120 8824: 7c f0 ff 00 and.b #255, r12 ;#0x00ff 8828: 3c 50 08 5a add #23048, r12 ;#0x5a08 882c: 82 4c 20 01 mov r12, &0x0120 ; 00008830 <.Loc.292.1>: i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 8830: 79 40 35 00 mov.b #53, r9 ;#0x0035 00008834 <.L60>: 8834: 4c 49 mov.b r9, r12 ; 8836: b0 12 0c 8e call #-29172 ;#0x8e0c 0000883a <.LVL91>: }while(i != 1); //this loop won't finish if theres a problem with the chip 883a: 5c 93 cmp.b #1, r12 ;r3 As==01 883c: fb 23 jnz $-8 ;abs 0x8834 0000883e <.Loc.298.1>: P1OUT ^= LED_RED; 883e: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 00008842 <.Loc.299.1>: delay(0xFF); //lil bit O delay 8842: 7c 40 ff 00 mov.b #255, r12 ;#0x00ff 00008846 <.LVL92>: 8846: b0 12 ac 83 call #-31828 ;#0x83ac 0000884a <.LVL93>: P1OUT ^= LED_RED; 884a: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 0000884e <.Loc.302.1>: flags = 0; 884e: 82 43 d2 02 mov #0, &0x02d2 ;r3 As==00 00008852 <.Loc.303.1>: P2IFG = 0x00; 8852: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 00008856 <.LBB35>: TACTL = TASSEL_1; // ACLK, upmode 8856: b2 40 00 01 mov #256, &0x0160 ;#0x0100 885a: 60 01 0000885c <.Loc.127.1>: TACTL &= ~TAIFG; //clear interrupt 885c: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 00008860 <.Loc.128.1>: TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8860: b2 40 e0 2e mov #12000, &0x0172 ;#0x2ee0 8864: 72 01 00008866 <.Loc.130.1>: TAR = 0; 8866: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 0000886a <.Loc.131.1>: TACTL |= MC_UPTO_CCR0 | TAIE; //overflow interrupt enabled, start counting! 886a: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 886e: 60 01 00008870 <.LBE35>: seconds = 0; 8870: 82 43 d0 02 mov #0, &0x02d0 ;r3 As==00 00008874 <.Loc.307.1>: TX_STRING("RPI Startup", 11); 8874: 34 40 28 87 mov #-30936,r4 ;#0x8728 8878: 7d 40 0b 00 mov.b #11, r13 ;#0x000b 887c: 3c 40 00 80 mov #-32768,r12 ;#0x8000 8880: 84 12 call r4 ; 00008882 <.LVL96>: P2IFG &= ~GDO0; //reset trashed interrupt state 8882: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8886: 2b 00 00008888 <.Loc.311.1>: _enable_interrupts(); //enable interrupts 8888: 32 d2 eint 0000888a <.Loc.313.1>: RX_MODE(); //put radio into listen mode. 888a: b0 12 1c 86 call #-31204 ;#0x861c 0000888e <.LBB37>: for( pointer = 0; pointer < length; pointer++) 888e: 3d 40 0d 80 mov #-32755,r13 ;#0x800d 00008892 <.LBE37>: RX_MODE(); //put radio into listen mode. 8892: 7c 40 52 00 mov.b #82, r12 ;#0x0052 00008896 <.LBB39>: UCA0TXBUF = string[pointer]; 8896: c2 4c 67 00 mov.b r12, &0x0067 ; 0000889a <.L61>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 889a: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 889e: fd 27 jz $-4 ;abs 0x889a 000088a0 <.LBE39>: for( pointer = 0; pointer < length; pointer++) 88a0: 3d 90 19 80 cmp #-32743,r13 ;#0x8019 88a4: 04 24 jz $+10 ;abs 0x88ae 88a6: 7c 4d mov.b @r13+, r12 ; 000088a8 <.LBB40>: UCA0TXBUF = string[pointer]; 88a8: c2 4c 67 00 mov.b r12, &0x0067 ; 000088ac <.Loc.222.1>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 88ac: f6 3f jmp $-18 ;abs 0x889a 000088ae <.L108>: int loop=0,interval=120; //programmable variables 88ae: 75 40 78 00 mov.b #120, r5 ;#0x0078 000088b2 <.Loc.257.1>: unsigned int interchiplength=0,sample,length=0,i,rs232buflength=0; 88b2: 48 43 clr.b r8 ; 000088b4 <.L62>: WDOG(); //Feed the dog 88b4: 1c 42 20 01 mov &0x0120,r12 ;0x0120 88b8: 7c f0 ff 00 and.b #255, r12 ;#0x00ff 88bc: 3c 50 08 5a add #23048, r12 ;#0x5a08 88c0: 82 4c 20 01 mov r12, &0x0120 ; 000088c4 <.LVL104>: if(flags & RXCHAR_RDY) 88c4: 1c 42 d2 02 mov &0x02d2,r12 ;0x02d2 000088c8 <.LVL105>: 88c8: 7c f2 and.b #8, r12 ;r2 As==11 000088ca <.Loc.321.1>: 88ca: b2 b2 d2 02 bit #8, &0x02d2 ;r2 As==11 88ce: 35 24 jz $+108 ;abs 0x893a 000088d0 <.Loc.323.1>: _disable_interrupts(); 88d0: 32 c2 dint 88d2: 03 43 nop 000088d4 <.LVL106>: flags &= ~RXCHAR_RDY; 88d4: b2 c2 d2 02 bic #8, &0x02d2 ;r2 As==11 000088d8 <.Loc.326.1>: if(rx_char == '\r' || rx_char == '\n'); //don't count a return in the buffer! 88d8: 5d 42 cb 02 mov.b &0x02cb,r13 ;0x02cb 000088dc <.Loc.326.1>: 88dc: 7d 90 0d 00 cmp.b #13, r13 ;#0x000d 88e0: 7d 25 jz $+764 ;abs 0x8bdc 000088e2 <.Loc.326.1>: 88e2: 7d 90 0a 00 cmp.b #10, r13 ;#0x000a 88e6: 07 24 jz $+16 ;abs 0x88f6 000088e8 <.Loc.329.1>: rs232buf[rs232buflength]=rx_char; 88e8: 7c 40 2a 00 mov.b #42, r12 ;#0x002a 88ec: 0c 51 add r1, r12 ; 88ee: 0c 58 add r8, r12 ; 88f0: cc 4d 00 00 mov.b r13, 0(r12) ; 000088f4 <.Loc.330.1>: rs232buflength++; 88f4: 18 53 inc r8 ; 000088f6 <.L66>: if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 88f6: 7c 40 3c 00 mov.b #60, r12 ;#0x003c 88fa: 0c 98 cmp r8, r12 ; 88fc: 1a 2c jc $+54 ;abs 0x8932 000088fe <.Loc.335.1>: P1OUT |= LED_RED; 88fe: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 00008902 <.Loc.336.1>: if(memcmp("Reset",rs232buf,5)==0) 8902: 7e 40 05 00 mov.b #5, r14 ; 8906: 0d 41 mov r1, r13 ; 8908: 3d 50 2a 00 add #42, r13 ;#0x002a 890c: 3c 40 1a 80 mov #-32742,r12 ;#0x801a 8910: b0 12 38 90 call #-28616 ;#0x9038 00008914 <.LVL108>: 8914: 0c 93 cmp #0, r12 ;r3 As==00 8916: 71 25 jz $+740 ;abs 0x8bfa 00008918 <.L68>: TX_STRING(rs232buf,rs232buflength); //Send the string out 8918: 4d 48 mov.b r8, r13 ; 891a: 0c 41 mov r1, r12 ; 891c: 3c 50 2a 00 add #42, r12 ;#0x002a 8920: 84 12 call r4 ; 00008922 <.LVL109>: P2IFG &= ~GDO0; //reset trashed interrupt state 8922: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8926: 2b 00 00008928 <.Loc.343.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 8928: b0 12 1c 86 call #-31204 ;#0x861c 0000892c <.LVL110>: P1OUT &= ~LED_RED; 892c: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008930 <.Loc.344.1>: rs232buflength = 0; 8930: 48 43 clr.b r8 ; 00008932 <.L67>: P1OUT &= ~LED_RED; 8932: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008936 <.Loc.351.1>: _enable_interrupts(); 8936: 32 d2 eint 00008938 <.Loc.324.1>: loop = 1; 8938: 5c 43 mov.b #1, r12 ;r3 As==01 0000893a <.L64>: if(flags & CONTROLLER_RDY) //Someone is sending us something 893a: a2 b3 d2 02 bit #2, &0x02d2 ;r3 As==10 893e: 08 20 jnz $+18 ;abs 0x8950 00008940 <.Loc.439.1>: if(flags & TIMER_UP) //Did the timer expire? report your findings! 8940: 92 b3 d2 02 bit #1, &0x02d2 ;r3 As==01 8944: 26 20 jnz $+78 ;abs 0x8992 00008946 <.Loc.537.1>: if(loop == 0) 8946: 0c 93 cmp #0, r12 ;r3 As==00 8948: b5 23 jnz $-148 ;abs 0x88b4 0000894a <.Loc.538.1>: LPM3; //when we wake up it'll be because of an event 894a: 32 d0 d0 00 bis #208, r2 ;#0x00d0 894e: b2 3f jmp $-154 ;abs 0x88b4 00008950 <.L151>: _disable_interrupts(); 8950: 32 c2 dint 8952: 03 43 nop 00008954 <.LVL113>: P1OUT |= LED_RED; 8954: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 00008958 <.Loc.358.1>: flags &= ~CONTROLLER_RDY; 8958: a2 c3 d2 02 bic #2, &0x02d2 ;r3 As==10 0000895c <.Loc.359.1>: memset(rxbuf, 0, 64); 895c: 7e 40 40 00 mov.b #64, r14 ;#0x0040 8960: 4d 43 clr.b r13 ; 8962: 0c 4a mov r10, r12 ; 8964: b0 12 7e 90 call #-28546 ;#0x907e 00008968 <.LVL114>: length = RX_STRING(rxbuf, 64); 8968: 7d 40 40 00 mov.b #64, r13 ;#0x0040 896c: 0c 4a mov r10, r12 ; 896e: b0 12 4c 86 call #-31156 ;#0x864c 00008972 <.LVL115>: if(LQI & bit7) //CRC ok 8972: c2 93 cd 02 cmp.b #0, &0x02cd ;r3 As==00 8976: 44 39 jl $+650 ;abs 0x8c00 00008978 <.L71>: P2IFG &= ~GDO0; //reset trashed interrupt state 8978: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 897c: 2b 00 0000897e <.Loc.432.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 897e: b0 12 1c 86 call #-31204 ;#0x861c 00008982 <.LVL116>: P1OUT &= ~LED_RED; 8982: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008986 <.Loc.436.1>: P1OUT &= ~LED_GRN; 8986: e2 c3 21 00 bic.b #2, &0x0021 ;r3 As==10 0000898a <.Loc.437.1>: _enable_interrupts(); 898a: 32 d2 eint 0000898c <.Loc.439.1>: if(flags & TIMER_UP) //Did the timer expire? report your findings! 898c: 92 b3 d2 02 bit #1, &0x02d2 ;r3 As==01 8990: 91 27 jz $-220 ;abs 0x88b4 00008992 <.L93>: if(flags & GO_NOW) //report every 20 second by default 8992: a2 b2 d2 02 bit #4, &0x02d2 ;r2 As==10 8996: 0e 21 jnz $+542 ;abs 0x8bb4 00008998 <.L96>: if(((seconds) % interval) == 0 || (flags & GO_NOW)) //report every 60 second by default 8998: 0d 45 mov r5, r13 ; 899a: 1c 42 d0 02 mov &0x02d0,r12 ;0x02d0 899e: b0 12 5a 8f call #-28838 ;#0x8f5a 000089a2 <.Loc.471.1>: 89a2: 0c 93 cmp #0, r12 ;r3 As==00 89a4: 03 24 jz $+8 ;abs 0x89ac 000089a6 <.Loc.471.1>: 89a6: a2 b2 d2 02 bit #4, &0x02d2 ;r2 As==10 89aa: 84 27 jz $-246 ;abs 0x88b4 000089ac <.L97>: flags &= ~(TIMER_UP|GO_NOW); //clear the flag 89ac: b2 f0 fa ff and #-6, &0x02d2 ;#0xfffa 89b0: d2 02 000089b2 <.Loc.476.1>: P1OUT |= LED_RED; 89b2: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 000089b6 <.Loc.478.1>: ADC10CTL1 = INCH_10 + ADC10DIV_4; // Temp Sensor ADC10CLK/5 89b6: b2 40 80 a0 mov #-24448,&0x01b2 ;#0xa080 89ba: b2 01 000089bc <.Loc.479.1>: ADC10CTL0 = SREF_1 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE + ADC10SR; 89bc: b2 40 38 3c mov #15416, &0x01b0 ;#0x3c38 89c0: b0 01 000089c2 <.Loc.480.1>: ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 89c2: b2 d0 03 00 bis #3, &0x01b0 ; 89c6: b0 01 000089c8 <.Loc.482.1>: LPM3; 89c8: 32 d0 d0 00 bis #208, r2 ;#0x00d0 000089cc <.Loc.483.1>: traw = ADC10MEM; 89cc: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 89d0: 0d 43 clr r13 ; 89d2: 81 4c 22 00 mov r12, 34(r1) ; 0x0022 89d6: 81 4d 24 00 mov r13, 36(r1) ; 0x0024 000089da <.Loc.485.1>: ADC10CTL0 &= ~ENC; 89da: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 000089de <.Loc.487.1>: ADC10CTL1 = INCH_11; // AVcc/2 89de: b2 40 00 b0 mov #-20480,&0x01b2 ;#0xb000 89e2: b2 01 000089e4 <.Loc.488.1>: ADC10CTL0 = SREF_1 + ADC10SHT_2 + REFON + ADC10ON + ADC10IE + REF2_5V; 89e4: b2 40 78 30 mov #12408, &0x01b0 ;#0x3078 89e8: b0 01 000089ea <.Loc.489.1>: ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 89ea: b2 d0 03 00 bis #3, &0x01b0 ; 89ee: b0 01 000089f0 <.Loc.491.1>: LPM3; 89f0: 32 d0 d0 00 bis #208, r2 ;#0x00d0 000089f4 <.Loc.492.1>: _disable_interrupts(); 89f4: 32 c2 dint 89f6: 03 43 nop 000089f8 <.Loc.493.1>: vraw = ADC10MEM; 89f8: 1c 42 b4 01 mov &0x01b4,r12 ;0x01b4 89fc: 0d 43 clr r13 ; 89fe: 81 4c 26 00 mov r12, 38(r1) ; 0x0026 8a02: 81 4d 28 00 mov r13, 40(r1) ; 0x0028 00008a06 <.Loc.494.1>: ADC10CTL0 &= ~ENC; 8a06: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 00008a0a <.Loc.495.1>: ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 8a0a: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 8a0e: b0 01 00008a10 <.Loc.501.1>: degC = (((traw - 673) * 4230) / 1024); 8a10: 91 41 22 00 mov 34(r1), 18(r1) ;0x00022, 0x0012 8a14: 12 00 8a16: 91 41 24 00 mov 36(r1), 20(r1) ;0x00024, 0x0014 8a1a: 14 00 00008a1c <.LVL119>: volt = (vraw*25)/512; 8a1c: 1c 41 26 00 mov 38(r1), r12 ;0x00026 8a20: 1d 41 28 00 mov 40(r1), r13 ;0x00028 00008a24 <.LVL120>: length=sprintf(rxbuf, "GND:%s S:%u T:%d V:%d", CALLSIGN, seconds, degC, volt); //send the temperature to the ground 8a24: 19 42 d0 02 mov &0x02d0,r9 ;0x02d0 00008a28 <.Loc.508.1>: volt = (vraw*25)/512; 8a28: 0e 4c mov r12, r14 ; 8a2a: 0e 5c add r12, r14 ; 8a2c: 0f 4d mov r13, r15 ; 8a2e: 0f 6d addc r13, r15 ; 8a30: 0e 5c add r12, r14 ; 8a32: 81 4e 16 00 mov r14, 22(r1) ; 0x0016 8a36: 0f 6d addc r13, r15 ; 8a38: 81 4f 18 00 mov r15, 24(r1) ; 0x0018 8a3c: 1e 41 16 00 mov 22(r1), r14 ;0x00016 8a40: 1f 41 18 00 mov 24(r1), r15 ;0x00018 8a44: 0e 5e rla r14 ; 8a46: 0f 6f rlc r15 ; 8a48: 0e 5e rla r14 ; 8a4a: 0f 6f rlc r15 ; 8a4c: 0e 5e rla r14 ; 8a4e: 0f 6f rlc r15 ; 8a50: 0b 4e mov r14, r11 ; 8a52: 0b 5c add r12, r11 ; 8a54: 81 4b 0a 00 mov r11, 10(r1) ; 0x000a 8a58: 0b 4f mov r15, r11 ; 8a5a: 0b 6d addc r13, r11 ; 8a5c: 81 4b 0c 00 mov r11, 12(r1) ; 0x000c 00008a60 <.Loc.508.1>: 8a60: 0b 93 cmp #0, r11 ;r3 As==00 8a62: 05 34 jge $+12 ;abs 0x8a6e 8a64: b1 50 ff 01 add #511, 10(r1) ;#0x01ff, 0x000a 8a68: 0a 00 8a6a: 81 63 0c 00 adc 12(r1) ; 00008a6e <.L98>: 8a6e: 1c 41 0a 00 mov 10(r1), r12 ;0x0000a 00008a72 <.LVL121>: 8a72: 1d 41 0c 00 mov 12(r1), r13 ;0x0000c 8a76: 0d 11 rra r13 ; 8a78: 0c 10 rrc r12 ; 8a7a: 0d 11 rra r13 ; 8a7c: 0c 10 rrc r12 ; 8a7e: 0d 11 rra r13 ; 8a80: 0c 10 rrc r12 ; 8a82: 0d 11 rra r13 ; 8a84: 0c 10 rrc r12 ; 8a86: 0d 11 rra r13 ; 8a88: 0c 10 rrc r12 ; 8a8a: 0d 11 rra r13 ; 8a8c: 0c 10 rrc r12 ; 8a8e: 0d 11 rra r13 ; 8a90: 0c 10 rrc r12 ; 8a92: 0d 11 rra r13 ; 8a94: 0c 10 rrc r12 ; 8a96: 0d 11 rra r13 ; 8a98: 0c 10 rrc r12 ; 00008a9a <.Loc.508.1>: 8a9a: 81 4c 08 00 mov r12, 8(r1) ; 00008a9e <.Loc.501.1>: degC = (((traw - 673) * 4230) / 1024); 8a9e: 16 41 12 00 mov 18(r1), r6 ;0x00012 8aa2: 36 50 5f fd add #-673, r6 ;#0xfd5f 8aa6: 17 41 14 00 mov 20(r1), r7 ;0x00014 8aaa: 37 63 addc #-1, r7 ;r3 As==11 00008aac <.Loc.501.1>: 8aac: 0c 46 mov r6, r12 ; 8aae: 0d 47 mov r7, r13 ; 8ab0: 0c 5c rla r12 ; 8ab2: 0d 6d rlc r13 ; 8ab4: 0c 5c rla r12 ; 8ab6: 0d 6d rlc r13 ; 8ab8: 0c 5c rla r12 ; 8aba: 0d 6d rlc r13 ; 8abc: 0c 5c rla r12 ; 8abe: 0d 6d rlc r13 ; 8ac0: 0c 5c rla r12 ; 8ac2: 0d 6d rlc r13 ; 8ac4: 0e 4c mov r12, r14 ; 8ac6: 0e 56 add r6, r14 ; 8ac8: 81 4e 1a 00 mov r14, 26(r1) ; 0x001a 8acc: 0b 4d mov r13, r11 ; 8ace: 0b 67 addc r7, r11 ; 8ad0: 81 4b 1c 00 mov r11, 28(r1) ; 0x001c 8ad4: 1c 41 1a 00 mov 26(r1), r12 ;0x0001a 8ad8: 1d 41 1c 00 mov 28(r1), r13 ;0x0001c 8adc: 0c 5c rla r12 ; 8ade: 0d 6d rlc r13 ; 8ae0: 0c 5c rla r12 ; 8ae2: 0d 6d rlc r13 ; 8ae4: 0c 5c rla r12 ; 8ae6: 0d 6d rlc r13 ; 8ae8: 0c 5c rla r12 ; 8aea: 0d 6d rlc r13 ; 8aec: 0e 4c mov r12, r14 ; 8aee: 0e 56 add r6, r14 ; 8af0: 81 4e 1e 00 mov r14, 30(r1) ; 0x001e 8af4: 0b 4d mov r13, r11 ; 8af6: 0b 67 addc r7, r11 ; 8af8: 81 4b 20 00 mov r11, 32(r1) ; 0x0020 8afc: 1c 41 1e 00 mov 30(r1), r12 ;0x0001e 8b00: 1d 41 20 00 mov 32(r1), r13 ;0x00020 8b04: 0c 5c rla r12 ; 8b06: 0d 6d rlc r13 ; 8b08: 0c 5c rla r12 ; 8b0a: 0d 6d rlc r13 ; 8b0c: 0c 86 sub r6, r12 ; 8b0e: 0d 77 subc r7, r13 ; 8b10: 0e 4c mov r12, r14 ; 8b12: 0e 5c add r12, r14 ; 8b14: 81 4e 0e 00 mov r14, 14(r1) ; 0x000e 8b18: 0b 4d mov r13, r11 ; 8b1a: 0b 6d addc r13, r11 ; 8b1c: 81 4b 10 00 mov r11, 16(r1) ; 0x0010 00008b20 <.Loc.501.1>: 8b20: 0b 93 cmp #0, r11 ;r3 As==00 8b22: 05 34 jge $+12 ;abs 0x8b2e 8b24: b1 50 ff 03 add #1023, 14(r1) ;#0x03ff, 0x000e 8b28: 0e 00 8b2a: 81 63 10 00 adc 16(r1) ; 00008b2e <.L100>: 8b2e: 1c 41 0e 00 mov 14(r1), r12 ;0x0000e 8b32: 1d 41 10 00 mov 16(r1), r13 ;0x00010 8b36: 0d 11 rra r13 ; 8b38: 0c 10 rrc r12 ; 8b3a: 0d 11 rra r13 ; 8b3c: 0c 10 rrc r12 ; 8b3e: 0d 11 rra r13 ; 8b40: 0c 10 rrc r12 ; 8b42: 0d 11 rra r13 ; 8b44: 0c 10 rrc r12 ; 8b46: 0d 11 rra r13 ; 8b48: 0c 10 rrc r12 ; 8b4a: 0d 11 rra r13 ; 8b4c: 0c 10 rrc r12 ; 8b4e: 0d 11 rra r13 ; 8b50: 0c 10 rrc r12 ; 8b52: 0d 11 rra r13 ; 8b54: 0c 10 rrc r12 ; 8b56: 0d 11 rra r13 ; 8b58: 0c 10 rrc r12 ; 8b5a: 0d 11 rra r13 ; 8b5c: 0c 10 rrc r12 ; 00008b5e <.Loc.501.1>: 8b5e: 81 4c 06 00 mov r12, 6(r1) ; 00008b62 <.Loc.518.1>: length=sprintf(rxbuf, "GND:%s S:%u T:%d V:%d", CALLSIGN, seconds, degC, volt); //send the temperature to the ground 8b62: 81 49 04 00 mov r9, 4(r1) ; 8b66: b1 40 3c 80 mov #-32708,2(r1) ;#0x803c 8b6a: 02 00 8b6c: b1 40 c5 80 mov #-32571,0(r1) ;#0x80c5 8b70: 00 00 8b72: 0c 4a mov r10, r12 ; 8b74: b0 12 fa 90 call #-28422 ;#0x90fa 00008b78 <.LBB43>: for( pointer = 0; pointer < length; pointer++) 8b78: 0d 4a mov r10, r13 ; 8b7a: 0c 5a add r10, r12 ; 00008b7c <.L102>: UCA0TXBUF = string[pointer]; 8b7c: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008b80 <.L104>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8b80: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8b84: fd 27 jz $-4 ;abs 0x8b80 00008b86 <.LBE45>: for( pointer = 0; pointer < length; pointer++) 8b86: 0c 9d cmp r13, r12 ; 8b88: f9 23 jnz $-12 ;abs 0x8b7c 00008b8a <.LBB46>: UCA0TXBUF = string[pointer]; 8b8a: f2 40 0d 00 mov.b #13, &0x0067 ;#0x000d 8b8e: 67 00 00008b90 <.L103>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8b90: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8b94: fd 27 jz $-4 ;abs 0x8b90 00008b96 <.LBB49>: UCA0TXBUF = string[pointer]; 8b96: f2 40 0a 00 mov.b #10, &0x0067 ;#0x000a 8b9a: 67 00 00008b9c <.L106>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8b9c: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8ba0: fd 27 jz $-4 ;abs 0x8b9c 00008ba2 <.LBE46>: P2IFG &= ~GDO0; //reset trashed interrupt state 8ba2: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8ba6: 2b 00 00008ba8 <.Loc.524.1>: RX_MODE(); //set the radio back to RX mode so we don't miss any packets 8ba8: b0 12 1c 86 call #-31204 ;#0x861c 00008bac <.LVL129>: P1OUT &= ~LED_RED; 8bac: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 00008bb0 <.Loc.534.1>: _enable_interrupts(); 8bb0: 32 d2 eint 00008bb2 <.Loc.537.1>: if(loop == 0) 8bb2: 80 3e jmp $-766 ;abs 0x88b4 00008bb4 <.L153>: _disable_interrupts(); 8bb4: 32 c2 dint 8bb6: 03 43 nop 00008bb8 <.Loc.447.1>: flags &= ~(TIMER_UP|GO_NOW); //clear the flag 8bb8: b2 f0 fa ff and #-6, &0x02d2 ;#0xfffa 8bbc: d2 02 00008bbe <.Loc.448.1>: P1OUT |= LED_GRN; 8bbe: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008bc2 <.Loc.462.1>: length=sprintf(rxbuf, "GND:%s TEST", CALLSIGN); //send the temperature to the ground 8bc2: b1 40 3c 80 mov #-32708,2(r1) ;#0x803c 8bc6: 02 00 8bc8: b1 40 b9 80 mov #-32583,0(r1) ;#0x80b9 8bcc: 00 00 8bce: 0c 4a mov r10, r12 ; 8bd0: b0 12 fa 90 call #-28422 ;#0x90fa 00008bd4 <.LVL131>: P1OUT &= ~LED_GRN; 8bd4: e2 c3 21 00 bic.b #2, &0x0021 ;r3 As==10 00008bd8 <.Loc.469.1>: _enable_interrupts(); 8bd8: 32 d2 eint 8bda: de 3e jmp $-578 ;abs 0x8998 00008bdc <.L65>: if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 8bdc: 08 93 cmp #0, r8 ;r3 As==00 8bde: a9 26 jz $-684 ;abs 0x8932 00008be0 <.Loc.335.1>: P1OUT |= LED_RED; 8be0: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 00008be4 <.Loc.336.1>: if(memcmp("Reset",rs232buf,5)==0) 8be4: 7e 40 05 00 mov.b #5, r14 ; 8be8: 0d 41 mov r1, r13 ; 8bea: 3d 50 2a 00 add #42, r13 ;#0x002a 8bee: 3c 40 1a 80 mov #-32742,r12 ;#0x801a 8bf2: b0 12 38 90 call #-28616 ;#0x9038 00008bf6 <.LVL132>: 8bf6: 0c 93 cmp #0, r12 ;r3 As==00 8bf8: 8f 22 jnz $-736 ;abs 0x8918 00008bfa <.L150>: WDTCTL = 1;//not using the password will trigger a reset immediately 8bfa: 92 43 20 01 mov #1, &0x0120 ;r3 As==01 00008bfe <.L69>: while(1); //Save us WDOG (alternate, takes 2.7 seconds with VLO) 8bfe: ff 3f jmp $+0 ;abs 0x8bfe 00008c00 <.L152>: P1OUT |= LED_GRN; 8c00: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008c04 <.Loc.366.1>: interchiplength = snprintf(interchip,sizeof(interchip),"%s :%ddBm",rxbuf, RSSI_DBM); 8c04: 5b 42 ca 02 mov.b &0x02ca,r11 ;0x02ca 8c08: 8b 11 sxt r11 ; 8c0a: 81 4b 04 00 mov r11, 4(r1) ; 8c0e: 81 4a 02 00 mov r10, 2(r1) ; 8c12: b1 40 20 80 mov #-32736,0(r1) ;#0x8020 8c16: 00 00 8c18: 7d 40 50 00 mov.b #80, r13 ;#0x0050 8c1c: 0c 41 mov r1, r12 ; 8c1e: 3c 50 aa 00 add #170, r12 ;#0x00aa 8c22: b0 12 90 90 call #-28528 ;#0x9090 00008c26 <.LBB50>: for( pointer = 0; pointer < length; pointer++) 8c26: 0d 41 mov r1, r13 ; 8c28: 3d 50 aa 00 add #170, r13 ;#0x00aa 8c2c: 0c 5d add r13, r12 ; 00008c2e <.L72>: UCA0TXBUF = string[pointer]; 8c2e: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008c32 <.L74>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8c32: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8c36: fd 27 jz $-4 ;abs 0x8c32 00008c38 <.LBE52>: for( pointer = 0; pointer < length; pointer++) 8c38: 0c 9d cmp r13, r12 ; 8c3a: f9 23 jnz $-12 ;abs 0x8c2e 00008c3c <.LBE50>: interchiplength = snprintf(interchip,sizeof(interchip)," LQI:%d FE:%d", LQI-128, (signed char)CCXX_SPI_RDREG(CCxxx0_FREQEST)); 8c3c: 59 42 cd 02 mov.b &0x02cd,r9 ;0x02cd 8c40: 39 50 80 ff add #-128, r9 ;#0xff80 00008c44 <.Loc.369.1>: 8c44: 7c 40 32 00 mov.b #50, r12 ;#0x0032 8c48: b0 12 0c 8e call #-29172 ;#0x8e0c 00008c4c <.LVL138>: 8c4c: 8c 11 sxt r12 ; 8c4e: 81 4c 04 00 mov r12, 4(r1) ; 8c52: 81 49 02 00 mov r9, 2(r1) ; 8c56: b1 40 2a 80 mov #-32726,0(r1) ;#0x802a 8c5a: 00 00 8c5c: 7d 40 50 00 mov.b #80, r13 ;#0x0050 8c60: 0c 41 mov r1, r12 ; 8c62: 3c 50 aa 00 add #170, r12 ;#0x00aa 8c66: b0 12 90 90 call #-28528 ;#0x9090 00008c6a <.LBB53>: for( pointer = 0; pointer < length; pointer++) 8c6a: 0d 41 mov r1, r13 ; 8c6c: 3d 50 aa 00 add #170, r13 ;#0x00aa 8c70: 0c 5d add r13, r12 ; 00008c72 <.L73>: UCA0TXBUF = string[pointer]; 8c72: f2 4d 67 00 mov.b @r13+, &0x0067 ; 00008c76 <.L77>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8c76: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8c7a: fd 27 jz $-4 ;abs 0x8c76 00008c7c <.LBE55>: for( pointer = 0; pointer < length; pointer++) 8c7c: 0c 9d cmp r13, r12 ; 8c7e: f9 23 jnz $-12 ;abs 0x8c72 00008c80 <.LBB56>: UCA0TXBUF = string[pointer]; 8c80: f2 40 0d 00 mov.b #13, &0x0067 ;#0x000d 8c84: 67 00 00008c86 <.L76>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8c86: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8c8a: fd 27 jz $-4 ;abs 0x8c86 00008c8c <.LBB59>: UCA0TXBUF = string[pointer]; 8c8c: f2 40 0a 00 mov.b #10, &0x0067 ;#0x000a 8c90: 67 00 00008c92 <.L79>: while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8c92: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 8c96: fd 27 jz $-4 ;abs 0x8c92 00008c98 <.LBE56>: if(!memcmp("GND",rxbuf,3)) //packet addressed to GND - to be recorded! 8c98: fa 90 47 00 cmp.b #71, 0(r10) ;#0x0047 8c9c: 00 00 8c9e: 14 24 jz $+42 ;abs 0x8cc8 00008ca0 <.L82>: if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8ca0: fa 90 52 00 cmp.b #82, 0(r10) ;#0x0052 8ca4: 00 00 8ca6: 26 24 jz $+78 ;abs 0x8cf4 00008ca8 <.L85>: if(memcmp("Pong!",rxbuf,5)==0) //if this is an ack to an outbound packet then we'll light a green light 8ca8: 7e 40 05 00 mov.b #5, r14 ; 8cac: 0d 4a mov r10, r13 ; 8cae: 3c 40 b3 80 mov #-32589,r12 ;#0x80b3 8cb2: b0 12 38 90 call #-28616 ;#0x9038 00008cb6 <.LVL146>: 8cb6: 0c 93 cmp #0, r12 ;r3 As==00 8cb8: 5f 22 jnz $-832 ;abs 0x8978 00008cba <.Loc.424.1>: P1OUT |= LED_GRN; 8cba: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 00008cbe <.Loc.425.1>: delay(0xFFF); 8cbe: 3c 40 ff 0f mov #4095, r12 ;#0x0fff 8cc2: b0 12 ac 83 call #-31828 ;#0x83ac 00008cc6 <.LVL147>: 8cc6: 58 3e jmp $-846 ;abs 0x8978 00008cc8 <.L154>: if(!memcmp("GND",rxbuf,3)) //packet addressed to GND - to be recorded! 8cc8: f1 90 4e 00 cmp.b #78, 107(r1) ;#0x004e, 0x006b 8ccc: 6b 00 8cce: e8 23 jnz $-46 ;abs 0x8ca0 8cd0: f1 90 44 00 cmp.b #68, 108(r1) ;#0x0044, 0x006c 8cd4: 6c 00 8cd6: e4 23 jnz $-54 ;abs 0x8ca0 00008cd8 <.Loc.378.1>: length = sprintf(rxbuf,"ACK"); //Note - never name a node ACK 8cd8: ba 40 41 43 mov #17217, 0(r10) ;#0x4341 8cdc: 00 00 8cde: ba 40 4b 00 mov #75, 2(r10) ;#0x004b 8ce2: 02 00 00008ce4 <.LVL148>: TX_STRING(rxbuf, length); 8ce4: 7d 40 03 00 mov.b #3, r13 ; 8ce8: 0c 4a mov r10, r12 ; 8cea: 84 12 call r4 ; 00008cec <.LVL149>: if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8cec: fa 90 52 00 cmp.b #82, 0(r10) ;#0x0052 8cf0: 00 00 8cf2: da 23 jnz $-74 ;abs 0x8ca8 00008cf4 <.L155>: 8cf4: f1 90 50 00 cmp.b #80, 107(r1) ;#0x0050, 0x006b 8cf8: 6b 00 8cfa: d6 23 jnz $-82 ;abs 0x8ca8 8cfc: f1 90 49 00 cmp.b #73, 108(r1) ;#0x0049, 0x006c 8d00: 6c 00 8d02: d2 23 jnz $-90 ;abs 0x8ca8 00008d04 <.Loc.385.1>: if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 8d04: 3d 40 40 80 mov #-32704,r13 ;#0x8040 8d08: 0c 4a mov r10, r12 ; 8d0a: b0 12 56 91 call #-28330 ;#0x9156 00008d0e <.LVL151>: 8d0e: 0c 93 cmp #0, r12 ;r3 As==00 8d10: 18 24 jz $+50 ;abs 0x8d42 00008d12 <.Loc.387.1>: length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8d12: 7d 40 3d 00 mov.b #61, r13 ;#0x003d 8d16: 0c 4a mov r10, r12 ; 8d18: b0 12 3a 91 call #-28358 ;#0x913a 00008d1c <.LVL152>: 8d1c: 1c 53 inc r12 ; 8d1e: b0 12 2c 90 call #-28628 ;#0x902c 00008d22 <.LVL153>: 8d22: 09 4c mov r12, r9 ; 00008d24 <.LVL154>: if(length > 0) 8d24: 0c 93 cmp #0, r12 ;r3 As==00 8d26: 2b 24 jz $+88 ;abs 0x8d7e 00008d28 <.LVL155>: length = sprintf(rxbuf,"GND:RPI Interval is now %d",interval); 8d28: 81 4c 02 00 mov r12, 2(r1) ; 8d2c: b1 40 49 80 mov #-32695,0(r1) ;#0x8049 8d30: 00 00 8d32: 0c 4a mov r10, r12 ; 8d34: b0 12 fa 90 call #-28422 ;#0x90fa 00008d38 <.L88>: TX_STRING(rxbuf,length); 8d38: 4d 4c mov.b r12, r13 ; 8d3a: 0c 4a mov r10, r12 ; 00008d3c <.LVL157>: 8d3c: 84 12 call r4 ; 00008d3e <.LVL158>: 8d3e: 05 49 mov r9, r5 ; 8d40: 1b 3e jmp $-968 ;abs 0x8978 00008d42 <.L86>: else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 8d42: 3d 40 87 80 mov #-32633,r13 ;#0x8087 8d46: 0c 4a mov r10, r12 ; 8d48: b0 12 56 91 call #-28330 ;#0x9156 00008d4c <.LVL160>: 8d4c: 0c 93 cmp #0, r12 ;r3 As==00 8d4e: 21 24 jz $+68 ;abs 0x8d92 00008d50 <.Loc.400.1>: length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 8d50: 5c 42 cd 02 mov.b &0x02cd,r12 ;0x02cd 8d54: 81 4c 06 00 mov r12, 6(r1) ; 8d58: 5e 42 ca 02 mov.b &0x02ca,r14 ;0x02ca 8d5c: 8e 11 sxt r14 ; 8d5e: 81 4e 04 00 mov r14, 4(r1) ; 8d62: b1 40 3c 80 mov #-32708,2(r1) ;#0x803c 8d66: 02 00 8d68: b1 40 8e 80 mov #-32626,0(r1) ;#0x808e 8d6c: 00 00 8d6e: 0c 4a mov r10, r12 ; 8d70: b0 12 fa 90 call #-28422 ;#0x90fa 00008d74 <.LVL161>: TX_STRING(rxbuf,length); 8d74: 4d 4c mov.b r12, r13 ; 8d76: 0c 4a mov r10, r12 ; 00008d78 <.LVL162>: 8d78: 84 12 call r4 ; 00008d7a <.LVL163>: 8d7a: 30 40 78 89 br #0x8978 ; 00008d7e <.L87>: length = sprintf(rxbuf,"GND:RPI Reporting every %d seconds",interval); 8d7e: 81 45 02 00 mov r5, 2(r1) ; 8d82: b1 40 64 80 mov #-32668,0(r1) ;#0x8064 8d86: 00 00 8d88: 0c 4a mov r10, r12 ; 8d8a: b0 12 fa 90 call #-28422 ;#0x90fa 00008d8e <.LVL165>: 8d8e: 09 45 mov r5, r9 ; 8d90: d3 3f jmp $-88 ;abs 0x8d38 00008d92 <.L89>: else if(strstr( rxbuf, "now" ) != NULL) //report now 8d92: 3d 40 a7 80 mov #-32601,r13 ;#0x80a7 8d96: 0c 4a mov r10, r12 ; 8d98: b0 12 56 91 call #-28330 ;#0x9156 00008d9c <.LVL167>: 8d9c: 0c 93 cmp #0, r12 ;r3 As==00 8d9e: 05 24 jz $+12 ;abs 0x8daa 00008da0 <.Loc.406.1>: flags |= GO_NOW | TIMER_UP; ///set event flags to trigger the reporting 8da0: b2 d0 05 00 bis #5, &0x02d2 ; 8da4: d2 02 8da6: 30 40 78 89 br #0x8978 ; 00008daa <.L90>: else if(strstr( rxbuf, "Reset" ) != NULL) //reboot the processor 8daa: 3d 40 1a 80 mov #-32742,r13 ;#0x801a 8dae: 0c 4a mov r10, r12 ; 8db0: b0 12 56 91 call #-28330 ;#0x9156 00008db4 <.LVL168>: 8db4: 0c 93 cmp #0, r12 ;r3 As==00 8db6: 0d 20 jnz $+28 ;abs 0x8dd2 00008db8 <.Loc.416.1>: length = sprintf(rxbuf,"GND:RPI Pong!"); 8db8: 7e 40 0e 00 mov.b #14, r14 ;#0x000e 8dbc: 3d 40 ab 80 mov #-32597,r13 ;#0x80ab 8dc0: 0c 4a mov r10, r12 ; 8dc2: b0 12 62 90 call #-28574 ;#0x9062 00008dc6 <.LVL169>: TX_STRING(rxbuf, length); 8dc6: 7d 40 0d 00 mov.b #13, r13 ;#0x000d 8dca: 0c 4a mov r10, r12 ; 8dcc: 84 12 call r4 ; 00008dce <.LVL170>: 8dce: 30 40 78 89 br #0x8978 ; 00008dd2 <.L156>: WDTCTL = 1;//not using the password will trigger a reset immediately 8dd2: 92 43 20 01 mov #1, &0x0120 ;r3 As==01 00008dd6 <.L92>: while(1); //Save us WDOG (alternate, takes 2.7 seconds with VLO) 8dd6: ff 3f jmp $+0 ;abs 0x8dd6 00008dd8 : #include "hardware.h" /** Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { 8dd8: 3c f0 ff 00 and #255, r12 ;#0x00ff 00008ddc <.Loc.8.1>: status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8ddc: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008de0 <.L2>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8de0: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8de4: fd 23 jnz $-4 ;abs 0x8de0 00008de6 <.Loc.13.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8de6: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8dea: 1b 00 00008dec <.Loc.15.1>: IFG2 &= ~UCB0RXIFG; 8dec: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008df0 <.Loc.16.1>: UCB0TXBUF = reg; 8df0: c2 4c 6f 00 mov.b r12, &0x006f ; 00008df4 : while (!(IFG2 & UCB0RXIFG)); 8df4: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8df8: fd 27 jz $-4 ;abs 0x8df4 00008dfa <.Loc.18.1>: status = UCB0RXBUF; 8dfa: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8dfe: d4 02 00008e00 <.Loc.20.1>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8e00: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008e04 <.Loc.21.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8e04: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8e08: 1b 00 00008e0a <.Loc.23.1>: } 8e0a: 30 41 ret 00008e0c : /** Read a register from the CCXX */ char CCXX_SPI_RDREG(char reg) { 8e0c: 4d 4c mov.b r12, r13 ; 00008e0e <.LVL2>: unsigned char rx=0; if(reg >= 0x30) 8e0e: 7e 40 2f 00 mov.b #47, r14 ;#0x002f 8e12: 4e 9c cmp.b r12, r14 ; 8e14: 25 2c jc $+76 ;abs 0x8e60 00008e16 <.Loc.33.1>: reg |= 0xC0; 8e16: 7d d0 c0 ff bis.b #-64, r13 ;#0xffc0 8e1a: 3d f0 ff 00 and #255, r13 ;#0x00ff 00008e1e <.LVL3>: else reg |= 0x80; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8e1e: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008e22 <.L11>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e22: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8e26: fd 23 jnz $-4 ;abs 0x8e22 00008e28 <.Loc.42.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8e28: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8e2c: 1b 00 00008e2e <.Loc.44.1>: IFG2 &= ~UCB0RXIFG; 8e2e: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e32 <.Loc.45.1>: UCB0TXBUF = reg; 8e32: c2 4d 6f 00 mov.b r13, &0x006f ; 00008e36 <.L12>: while (!(IFG2 & UCB0RXIFG)); 8e36: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8e3a: fd 27 jz $-4 ;abs 0x8e36 00008e3c <.Loc.47.1>: status = UCB0RXBUF; 8e3c: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8e40: d4 02 00008e42 <.Loc.49.1>: IFG2 &= ~UCB0RXIFG; 8e42: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e46 <.Loc.50.1>: UCB0TXBUF = 0; 8e46: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 00008e4a <.L13>: while (!(IFG2 & UCB0RXIFG)); 8e4a: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8e4e: fd 27 jz $-4 ;abs 0x8e4a 00008e50 <.Loc.52.1>: rx = UCB0RXBUF; 8e50: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008e54 <.LVL5>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8e54: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008e58 <.Loc.55.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8e58: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8e5c: 1b 00 00008e5e <.Loc.56.1>: return rx; } 8e5e: 30 41 ret 00008e60 <.L9>: reg |= 0x80; 8e60: 7d d0 80 ff bis.b #-128, r13 ;#0xff80 8e64: 3d f0 ff 00 and #255, r13 ;#0x00ff 00008e68 <.LVL7>: P3OUT &= ~CSn; //pull CSn low to activate chip 8e68: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008e6c <.Loc.40.1>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e6c: da 3f jmp $-74 ;abs 0x8e22 00008e6e : /** Write a register from the CCXX */ void CCXX_SPI_WRREG(char reg, char byte) { 8e6e: 3c f0 ff 00 and #255, r12 ;#0x00ff 8e72: 3d f0 ff 00 and #255, r13 ;#0x00ff 00008e76 <.Loc.64.1>: unsigned char dummy; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8e76: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008e7a <.L20>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8e7a: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8e7e: fd 23 jnz $-4 ;abs 0x8e7a 00008e80 <.Loc.72.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8e80: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8e84: 1b 00 00008e86 <.Loc.74.1>: IFG2 &= ~UCB0RXIFG; 8e86: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e8a <.Loc.75.1>: UCB0TXBUF = reg; 8e8a: c2 4c 6f 00 mov.b r12, &0x006f ; 00008e8e <.L21>: while (!(IFG2 & UCB0RXIFG)); 8e8e: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8e92: fd 27 jz $-4 ;abs 0x8e8e 00008e94 <.Loc.77.1>: status = UCB0RXBUF; 8e94: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8e98: d4 02 00008e9a <.Loc.82.1>: //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8e9a: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008e9e <.Loc.83.1>: UCB0TXBUF = byte; 8e9e: c2 4d 6f 00 mov.b r13, &0x006f ; 00008ea2 <.L22>: while (!(IFG2 & UCB0RXIFG)); 8ea2: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8ea6: fd 27 jz $-4 ;abs 0x8ea2 00008ea8 <.Loc.85.1>: dummy = UCB0RXBUF; 8ea8: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008eac <.LVL9>: P3OUT |= CSn; //pull CSn high, we're done with the transfer 8eac: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008eb0 <.Loc.88.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8eb0: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8eb4: 1b 00 00008eb6 <.Loc.89.1>: } 8eb6: 30 41 ret 00008eb8 : /** Burst write registers to the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) { 8eb8: 3c f0 ff 00 and #255, r12 ;#0x00ff 8ebc: 3e f0 ff 00 and #255, r14 ;#0x00ff 00008ec0 <.Loc.100.1>: unsigned char dummy; unsigned int index; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8ec0: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 00008ec4 <.L29>: while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8ec4: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8ec8: fd 23 jnz $-4 ;abs 0x8ec4 00008eca <.Loc.104.1>: P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8eca: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8ece: 1b 00 00008ed0 <.Loc.106.1>: IFG2 &= ~UCB0RXIFG; 8ed0: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008ed4 <.Loc.107.1>: UCB0TXBUF = reg; 8ed4: c2 4c 6f 00 mov.b r12, &0x006f ; 00008ed8 <.L30>: while (!(IFG2 & UCB0RXIFG)); 8ed8: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8edc: fd 27 jz $-4 ;abs 0x8ed8 00008ede <.Loc.109.1>: status = UCB0RXBUF; 8ede: d2 42 6e 00 mov.b &0x006e,&0x02d4 ;0x006e 8ee2: d4 02 00008ee4 <.Loc.111.1>: IFG2 &= ~UCB0RXIFG; 8ee4: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008ee8 <.Loc.112.1>: UCB0TXBUF = length; 8ee8: c2 4e 6f 00 mov.b r14, &0x006f ; 00008eec <.L31>: while (!(IFG2 & UCB0RXIFG)); 8eec: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8ef0: fd 27 jz $-4 ;abs 0x8eec 00008ef2 <.Loc.114.1>: dummy = UCB0RXBUF; 8ef2: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008ef6 <.LVL11>: for(index = 0; index < length; index++) 8ef6: 0e 93 cmp #0, r14 ;r3 As==00 8ef8: 0c 24 jz $+26 ;abs 0x8f12 8efa: 0e 5d add r13, r14 ; 00008efc <.L34>: { IFG2 &= ~UCB0RXIFG; 8efc: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 00008f00 <.Loc.119.1>: UCB0TXBUF = buf[index]; 8f00: f2 4d 6f 00 mov.b @r13+, &0x006f ; 00008f04 <.L33>: while (!(IFG2 & UCB0RXIFG)); 8f04: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8f08: fd 27 jz $-4 ;abs 0x8f04 00008f0a <.Loc.121.1>: dummy = UCB0RXBUF; 8f0a: 5c 42 6e 00 mov.b &0x006e,r12 ;0x006e 00008f0e <.LVL14>: for(index = 0; index < length; index++) 8f0e: 0d 9e cmp r14, r13 ; 8f10: f5 23 jnz $-20 ;abs 0x8efc 00008f12 <.L32>: } P3OUT |= CSn; //pull CSn high, we're done with the transfer 8f12: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 00008f16 <.Loc.125.1>: P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8f16: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8f1a: 1b 00 00008f1c <.Loc.126.1>: } 8f1c: 30 41 ret 00008f1e : 8f1e: 0f 4c mov r12, r15 ; 00008f20 : 8f20: 7c 40 11 00 mov.b #17, r12 ;#0x0011 00008f24 <.LVL2>: 8f24: 5b 43 mov.b #1, r11 ;r3 As==01 00008f26 <.L2>: 8f26: 0d 9f cmp r15, r13 ; 8f28: 05 2c jc $+12 ;abs 0x8f34 8f2a: 3c 53 add #-1, r12 ;r3 As==11 00008f2c <.Loc.38.1>: 8f2c: 0c 93 cmp #0, r12 ;r3 As==00 8f2e: 05 24 jz $+12 ;abs 0x8f3a 00008f30 <.Loc.38.1>: 8f30: 0d 93 cmp #0, r13 ;r3 As==00 8f32: 07 34 jge $+16 ;abs 0x8f42 00008f34 <.L10>: 8f34: 4c 43 clr.b r12 ; 00008f36 <.L6>: 8f36: 0b 93 cmp #0, r11 ;r3 As==00 8f38: 07 20 jnz $+16 ;abs 0x8f48 00008f3a <.L4>: 8f3a: 0e 93 cmp #0, r14 ;r3 As==00 8f3c: 01 24 jz $+4 ;abs 0x8f40 8f3e: 0c 4f mov r15, r12 ; 00008f40 <.L1>: 8f40: 30 41 ret 00008f42 <.L5>: 8f42: 0d 5d rla r13 ; 00008f44 <.Loc.41.1>: 8f44: 0b 5b rla r11 ; 8f46: ef 3f jmp $-32 ;abs 0x8f26 00008f48 <.L8>: 8f48: 0f 9d cmp r13, r15 ; 8f4a: 02 28 jnc $+6 ;abs 0x8f50 00008f4c <.Loc.47.1>: 8f4c: 0f 8d sub r13, r15 ; 00008f4e <.Loc.48.1>: 8f4e: 0c db bis r11, r12 ; 00008f50 <.L7>: 8f50: 12 c3 clrc 8f52: 0b 10 rrc r11 ; 00008f54 <.Loc.51.1>: 8f54: 12 c3 clrc 8f56: 0d 10 rrc r13 ; 8f58: ee 3f jmp $-34 ;abs 0x8f36 00008f5a <__mspabi_remu>: 8f5a: 5e 43 mov.b #1, r14 ;r3 As==01 8f5c: 00008f5e : 8f5e: 00008f60 <.LVL36>: 8f60: 30 41 ret 00008f62 : 8f62: 0a 12 push r10 ; 00008f64 <.LCFI0>: 8f64: 09 12 push r9 ; 00008f66 <.LCFI1>: 8f66: 08 12 push r8 ; 00008f68 <.LCFI2>: 8f68: 07 12 push r7 ; 00008f6a <.LCFI3>: 8f6a: 06 12 push r6 ; 00008f6c <.LCFI4>: 8f6c: 05 12 push r5 ; 00008f6e <.LCFI5>: 8f6e: 0a 4c mov r12, r10 ; 8f70: 0b 4d mov r13, r11 ; 00008f72 <.LVL1>: 8f72: 7c 40 21 00 mov.b #33, r12 ;#0x0021 00008f76 <.LVL2>: 8f76: 58 43 mov.b #1, r8 ;r3 As==01 8f78: 49 43 clr.b r9 ; 00008f7a <.Loc.38.1>: 8f7a: 07 4d mov r13, r7 ; 00008f7c <.L2>: 8f7c: 0f 9b cmp r11, r15 ; 8f7e: 04 28 jnc $+10 ;abs 0x8f88 8f80: 07 9f cmp r15, r7 ; 8f82: 07 20 jnz $+16 ;abs 0x8f92 8f84: 0e 9a cmp r10, r14 ; 8f86: 05 2c jc $+12 ;abs 0x8f92 00008f88 <.L15>: 8f88: 3c 53 add #-1, r12 ;r3 As==11 00008f8a <.Loc.38.1>: 8f8a: 0c 93 cmp #0, r12 ;r3 As==00 8f8c: 2c 24 jz $+90 ;abs 0x8fe6 00008f8e <.Loc.38.1>: 8f8e: 0f 93 cmp #0, r15 ;r3 As==00 8f90: 0c 34 jge $+26 ;abs 0x8faa 00008f92 <.L13>: 8f92: 4c 43 clr.b r12 ; 8f94: 0d 4c mov r12, r13 ; 00008f96 <.L8>: 8f96: 07 48 mov r8, r7 ; 8f98: 07 d9 bis r9, r7 ; 8f9a: 07 93 cmp #0, r7 ;r3 As==00 8f9c: 13 20 jnz $+40 ;abs 0x8fc4 00008f9e <.L5>: 8f9e: 81 93 0e 00 cmp #0, 14(r1) ;r3 As==00, 0x000e 8fa2: 02 24 jz $+6 ;abs 0x8fa8 8fa4: 0c 4a mov r10, r12 ; 8fa6: 0d 4b mov r11, r13 ; 00008fa8 <.L1>: 8fa8: 2f 3c jmp $+96 ;abs 0x9008 00008faa <.L6>: 8faa: 05 4e mov r14, r5 ; 8fac: 06 4f mov r15, r6 ; 8fae: 05 5e add r14, r5 ; 8fb0: 06 6f addc r15, r6 ; 8fb2: 0e 45 mov r5, r14 ; 00008fb4 <.LVL7>: 8fb4: 0f 46 mov r6, r15 ; 00008fb6 <.LVL8>: 8fb6: 05 48 mov r8, r5 ; 8fb8: 06 49 mov r9, r6 ; 8fba: 05 58 add r8, r5 ; 8fbc: 06 69 addc r9, r6 ; 8fbe: 08 45 mov r5, r8 ; 00008fc0 <.LVL9>: 8fc0: 09 46 mov r6, r9 ; 00008fc2 <.LVL10>: 8fc2: dc 3f jmp $-70 ;abs 0x8f7c 00008fc4 <.L11>: 8fc4: 0b 9f cmp r15, r11 ; 8fc6: 08 28 jnc $+18 ;abs 0x8fd8 8fc8: 0f 9b cmp r11, r15 ; 8fca: 02 20 jnz $+6 ;abs 0x8fd0 8fcc: 0a 9e cmp r14, r10 ; 8fce: 04 28 jnc $+10 ;abs 0x8fd8 00008fd0 <.L16>: 8fd0: 0a 8e sub r14, r10 ; 8fd2: 0b 7f subc r15, r11 ; 00008fd4 <.Loc.48.1>: 8fd4: 0c d8 bis r8, r12 ; 00008fd6 <.LVL13>: 8fd6: 0d d9 bis r9, r13 ; 00008fd8 <.L9>: 8fd8: 12 c3 clrc 8fda: 09 10 rrc r9 ; 8fdc: 08 10 rrc r8 ; 00008fde <.Loc.51.1>: 8fde: 12 c3 clrc 8fe0: 0f 10 rrc r15 ; 8fe2: 0e 10 rrc r14 ; 8fe4: d8 3f jmp $-78 ;abs 0x8f96 00008fe6 <.L14>: 8fe6: 0d 4c mov r12, r13 ; 8fe8: da 3f jmp $-74 ;abs 0x8f9e 00008fea <__mspabi_divlu>: 8fea: 21 83 decd r1 ; 00008fec <.LCFI19>: 8fec: 81 43 00 00 mov #0, 0(r1) ;r3 As==00 8ff0: 00008ff2 : 8ff2: 62 8f sub.b @r15, r2 ; 00008ff4 <.LVL43>: 8ff4: 21 53 incd r1 ; 00008ff6 <.LCFI20>: 8ff6: 30 41 ret 00008ff8 <__mspabi_remul>: 8ff8: 21 83 decd r1 ; 00008ffa <.LCFI21>: 8ffa: 91 43 00 00 mov #1, 0(r1) ;r3 As==01 8ffe: b0 12 62 8f call #-28830 ;#0x8f62 00009002 <.LVL45>: 9002: 21 53 incd r1 ; 00009004 <.LCFI22>: 9004: 30 41 ret 00009006 <__mspabi_func_epilog_7>: 9006: 34 41 pop r4 ; 00009008 <__mspabi_func_epilog_6>: 9008: 35 41 pop r5 ; 0000900a <__mspabi_func_epilog_5>: 900a: 36 41 pop r6 ; 0000900c <__mspabi_func_epilog_4>: 900c: 37 41 pop r7 ; 0000900e <__mspabi_func_epilog_3>: 900e: 38 41 pop r8 ; 00009010 <__mspabi_func_epilog_2>: 9010: 39 41 pop r9 ; 00009012 <__mspabi_func_epilog_1>: 9012: 3a 41 pop r10 ; 9014: 30 41 ret 00009016 <.L1^B1>: 9016: 3d 53 add #-1, r13 ;r3 As==11 9018: 0c 5c rla r12 ; 0000901a <__mspabi_slli>: 901a: 0d 93 cmp #0, r13 ;r3 As==00 901c: fc 23 jnz $-6 ;abs 0x9016 901e: 30 41 ret 00009020 <.L1^B1>: 9020: 3d 53 add #-1, r13 ;r3 As==11 9022: 12 c3 clrc 9024: 0c 10 rrc r12 ; 00009026 <__mspabi_srli>: 9026: 0d 93 cmp #0, r13 ;r3 As==00 9028: fb 23 jnz $-8 ;abs 0x9020 902a: 30 41 ret 0000902c : 902c: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 9030: 4d 43 clr.b r13 ; 9032: b0 12 5e 93 call #-27810 ;#0x935e 00009036 <.LVL1>: 9036: 30 41 ret 00009038 : 9038: 0a 12 push r10 ; 0000903a <.LCFI0>: 903a: 09 12 push r9 ; 0000903c <.LCFI1>: 903c: 4b 43 clr.b r11 ; 0000903e <.L2>: 903e: 0e 9b cmp r11, r14 ; 9040: 02 20 jnz $+6 ;abs 0x9046 00009042 <.Loc.71.1>: 9042: 4c 43 clr.b r12 ; 00009044 <.LVL3>: 9044: 0d 3c jmp $+28 ;abs 0x9060 00009046 <.L4>: 9046: 0f 4c mov r12, r15 ; 9048: 0f 5b add r11, r15 ; 904a: 6f 4f mov.b @r15, r15 ; 904c: 1b 53 inc r11 ; 0000904e <.LVL5>: 904e: 0a 4d mov r13, r10 ; 9050: 0a 5b add r11, r10 ; 9052: 59 4a ff ff mov.b -1(r10),r9 ; 00009056 <.Loc.64.1>: 9056: ca 9f ff ff cmp.b r15, -1(r10) ; 0xffff 905a: f1 27 jz $-28 ;abs 0x903e 0000905c <.Loc.66.1>: 905c: 0c 4f mov r15, r12 ; 905e: 0c 89 sub r9, r12 ; 00009060 <.L1>: 9060: d7 3f jmp $-80 ;abs 0x9010 00009062 : 9062: 0a 12 push r10 ; 00009064 <.LCFI0>: 9064: 4f 43 clr.b r15 ; 00009066 : 9066: 0e 9f cmp r15, r14 ; 9068: 02 20 jnz $+6 ;abs 0x906e 0000906a <.Loc.111.1>: 906a: 3a 41 pop r10 ; 0000906c <.LCFI1>: 906c: 30 41 ret 0000906e <.L3>: 906e: 0b 4c mov r12, r11 ; 9070: 0b 5f add r15, r11 ; 00009072 <.Loc.67.1>: 9072: 0a 4d mov r13, r10 ; 9074: 0a 5f add r15, r10 ; 00009076 <.Loc.67.1>: 9076: eb 4a 00 00 mov.b @r10, 0(r11) ; 907a: 1f 53 inc r15 ; 0000907c <.LVL4>: 907c: f4 3f jmp $-22 ;abs 0x9066 0000907e : 907e: 0e 5c add r12, r14 ; 00009080 : 9080: 0f 4c mov r12, r15 ; 00009082 <.L2>: 9082: 0f 9e cmp r14, r15 ; 9084: 01 20 jnz $+4 ;abs 0x9088 00009086 <.Loc.104.1>: 9086: 30 41 ret 00009088 <.L3>: 9088: 1f 53 inc r15 ; 0000908a <.LVL4>: 908a: cf 4d ff ff mov.b r13, -1(r15) ; 0xffff 908e: f9 3f jmp $-12 ;abs 0x9082 00009090 : 9090: 0a 12 push r10 ; 00009092 : 9092: 09 12 push r9 ; 00009094 <.LCFI6>: 9094: 31 80 3c 00 sub #60, r1 ;#0x003c 00009098 <.LCFI7>: 9098: 0a 4d mov r13, r10 ; 0000909a <.Loc.100.1>: 909a: 19 42 02 02 mov &0x0202,r9 ;0x0202 0000909e <.Loc.102.1>: 909e: 0d 93 cmp #0, r13 ;r3 As==00 90a0: 07 34 jge $+16 ;abs 0x90b0 000090a2 <.Loc.104.1>: 90a2: b9 40 8b 00 mov #139, 0(r9) ;#0x008b 90a6: 00 00 000090a8 <.Loc.105.1>: 90a8: 3c 43 mov #-1, r12 ;r3 As==11 000090aa <.L10>: 90aa: 31 50 3c 00 add #60, r1 ;#0x003c 000090ae <.LCFI8>: 90ae: b0 3f jmp $-158 ;abs 0x9010 000090b0 <.L11>: 90b0: b1 40 08 02 mov #520, 6(r1) ;#0x0208 90b4: 06 00 000090b6 <.Loc.108.1>: 90b6: 81 4c 00 00 mov r12, 0(r1) ; 000090ba <.Loc.108.1>: 90ba: 81 4c 0a 00 mov r12, 10(r1) ; 0x000a 000090be <.Loc.109.1>: 90be: 0c 4d mov r13, r12 ; 000090c0 <.LVL11>: 90c0: 0d 93 cmp #0, r13 ;r3 As==00 90c2: 01 24 jz $+4 ;abs 0x90c6 000090c4 <.Loc.109.1>: 90c4: 3c 53 add #-1, r12 ;r3 As==11 000090c6 <.L13>: 90c6: 81 4c 04 00 mov r12, 4(r1) ; 000090ca <.Loc.109.1>: 90ca: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 000090ce <.Loc.110.1>: 90ce: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 000090d2 <.LVL12>: 90d2: 0f 41 mov r1, r15 ; 90d4: 3f 50 44 00 add #68, r15 ;#0x0044 90d8: 1e 41 42 00 mov 66(r1), r14 ;0x00042 90dc: 0d 41 mov r1, r13 ; 90de: 0c 49 mov r9, r12 ; 90e0: b0 12 58 94 call #-27560 ;#0x9458 000090e4 <.LVL13>: 90e4: 3c 93 cmp #-1, r12 ;r3 As==11 90e6: 03 34 jge $+8 ;abs 0x90ee 000090e8 <.Loc.119.1>: 90e8: b9 40 8b 00 mov #139, 0(r9) ;#0x008b 90ec: 00 00 000090ee <.L14>: 90ee: 0a 93 cmp #0, r10 ;r3 As==00 90f0: dc 27 jz $-70 ;abs 0x90aa 000090f2 <.Loc.121.1>: 90f2: 2d 41 mov @r1, r13 ; 000090f4 <.Loc.121.1>: 90f4: cd 43 00 00 mov.b #0, 0(r13) ;r3 As==00 000090f8 <.LVL14>: 90f8: d8 3f jmp $-78 ;abs 0x90aa 000090fa : 90fa: 31 80 3c 00 sub #60, r1 ;#0x003c 000090fe : 90fe: 0f 41 mov r1, r15 ; 9100: 3f 50 3e 00 add #62, r15 ;#0x003e 9104: 3e 4f mov @r15+, r14 ; 00009106 <.Loc.634.1>: 9106: b1 40 08 02 mov #520, 6(r1) ;#0x0208 910a: 06 00 0000910c <.Loc.639.1>: 910c: 81 4c 00 00 mov r12, 0(r1) ; 00009110 <.Loc.639.1>: 9110: 81 4c 0a 00 mov r12, 10(r1) ; 0x000a 00009114 <.Loc.640.1>: 9114: b1 40 ff 7f mov #32767, 4(r1) ;#0x7fff 9118: 04 00 0000911a <.Loc.640.1>: 911a: b1 40 ff 7f mov #32767, 12(r1) ;#0x7fff, 0x000c 911e: 0c 00 00009120 <.Loc.641.1>: 9120: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 00009124 <.LVL6>: 9124: 0d 41 mov r1, r13 ; 9126: 1c 42 02 02 mov &0x0202,r12 ;0x0202 0000912a <.LVL7>: 912a: b0 12 58 94 call #-27560 ;#0x9458 0000912e <.LVL8>: 912e: 2d 41 mov @r1, r13 ; 00009130 <.Loc.649.1>: 9130: cd 43 00 00 mov.b #0, 0(r13) ;r3 As==00 00009134 <.LVL9>: 9134: 31 50 3c 00 add #60, r1 ;#0x003c 00009138 <.LCFI3>: 9138: 30 41 ret 0000913a : 913a: 3d f0 ff 00 and #255, r13 ;#0x00ff 0000913e <.LVL2>: 913e: 0e 4c mov r12, r14 ; 00009140 <.L3>: 9140: 0c 4e mov r14, r12 ; 00009142 <.LVL4>: 9142: 7f 4e mov.b @r14+, r15 ; 00009144 <.Loc.118.1>: 9144: 0f 93 cmp #0, r15 ;r3 As==00 9146: 03 24 jz $+8 ;abs 0x914e 00009148 <.Loc.118.1>: 9148: 0f 9d cmp r13, r15 ; 914a: fa 23 jnz $-10 ;abs 0x9140 0000914c <.L1>: 914c: 30 41 ret 0000914e <.L2>: 914e: 0d 93 cmp #0, r13 ;r3 As==00 9150: fd 27 jz $-4 ;abs 0x914c 00009152 <.Loc.122.1>: 9152: 0c 4f mov r15, r12 ; 00009154 <.LVL7>: 9154: fb 3f jmp $-8 ;abs 0x914c 00009156 : 9156: 6e 4d mov.b @r13, r14 ; 00009158 : 9158: cc 93 00 00 cmp.b #0, 0(r12) ;r3 As==00 915c: 04 20 jnz $+10 ;abs 0x9166 0000915e <.Loc.57.1>: 915e: 0e 93 cmp #0, r14 ;r3 As==00 9160: 01 24 jz $+4 ;abs 0x9164 00009162 <.L7>: 9162: 4c 43 clr.b r12 ; 00009164 <.L3>: 9164: 30 41 ret 00009166 <.L6>: 9166: 4e 43 clr.b r14 ; 9168: 07 3c jmp $+16 ;abs 0x9178 0000916a <.L4>: 916a: 0f 4c mov r12, r15 ; 916c: 1f 53 inc r15 ; 0000916e <.LBE2>: 916e: cc 93 01 00 cmp.b #0, 1(r12) ;r3 As==00 9172: f7 27 jz $-16 ;abs 0x9162 00009174 <.LBB3>: 9174: 4e 43 clr.b r14 ; 00009176 <.L5>: 9176: 0c 4f mov r15, r12 ; 00009178 <.L2>: 9178: 0f 4d mov r13, r15 ; 917a: 0f 5e add r14, r15 ; 917c: 6b 4f mov.b @r15, r11 ; 0000917e <.Loc.69.1>: 917e: cf 93 00 00 cmp.b #0, 0(r15) ;r3 As==00 9182: f0 27 jz $-30 ;abs 0x9164 00009184 <.Loc.74.1>: 9184: 0f 4c mov r12, r15 ; 9186: 0f 5e add r14, r15 ; 00009188 <.Loc.74.1>: 9188: cf 9b 00 00 cmp.b r11, 0(r15) ; 918c: ee 23 jnz $-34 ;abs 0x916a 0000918e <.Loc.78.1>: 918e: 1e 53 inc r14 ; 00009190 <.Loc.67.1>: 9190: 0f 4c mov r12, r15 ; 9192: f1 3f jmp $-28 ;abs 0x9176 00009194 <_strtol_r>: 9194: 0a 12 push r10 ; 00009196 <.LCFI0>: 9196: 09 12 push r9 ; 00009198 : 9198: 08 12 push r8 ; 0000919a <.LCFI2>: 919a: 07 12 push r7 ; 0000919c <.LCFI3>: 919c: 06 12 push r6 ; 0000919e <.LCFI4>: 919e: 05 12 push r5 ; 000091a0 <.LCFI5>: 91a0: 04 12 push r4 ; 000091a2 <.LCFI6>: 91a2: 31 80 14 00 sub #20, r1 ;#0x0014 000091a6 <.LCFI7>: 91a6: 81 4c 12 00 mov r12, 18(r1) ; 0x0012 91aa: 81 4d 08 00 mov r13, 8(r1) ; 91ae: 81 4e 0a 00 mov r14, 10(r1) ; 0x000a 91b2: 06 4f mov r15, r6 ; 000091b4 <.LVL1>: 91b4: 91 42 00 02 mov &0x0200,14(r1) ;0x0200, 0x000e 91b8: 0e 00 000091ba <.Loc.140.1>: 91ba: 07 4d mov r13, r7 ; 000091bc <.L2>: 91bc: 0c 47 mov r7, r12 ; 000091be <.LVL3>: 91be: 7a 47 mov.b @r7+, r10 ; 000091c0 <.LVL4>: 91c0: 1d 41 0e 00 mov 14(r1), r13 ;0x0000e 91c4: 0d 5a add r10, r13 ; 000091c6 <.Loc.153.1>: 91c6: fd b2 01 00 bit.b #8, 1(r13) ;r2 As==11 91ca: f8 23 jnz $-14 ;abs 0x91bc 000091cc <.Loc.154.1>: 91cc: 7a 90 2d 00 cmp.b #45, r10 ;#0x002d 91d0: 76 20 jnz $+238 ;abs 0x92be 000091d2 <.LVL5>: 91d2: 6a 47 mov.b @r7, r10 ; 000091d4 <.Loc.156.1>: 91d4: 07 4c mov r12, r7 ; 91d6: 27 53 incd r7 ; 000091d8 <.LVL7>: 91d8: 91 43 02 00 mov #1, 2(r1) ;r3 As==01 000091dc <.L4>: 91dc: 06 93 cmp #0, r6 ;r3 As==00 91de: b9 24 jz $+372 ;abs 0x9352 000091e0 <.Loc.159.1>: 91e0: 36 90 10 00 cmp #16, r6 ;#0x0010 91e4: 0e 20 jnz $+30 ;abs 0x9202 000091e6 <.Loc.159.1>: 91e6: 3a 90 30 00 cmp #48, r10 ;#0x0030 91ea: 0b 20 jnz $+24 ;abs 0x9202 000091ec <.L23>: 91ec: 6c 47 mov.b @r7, r12 ; 91ee: 7c f0 df ff and.b #-33, r12 ;#0xffdf 91f2: 7c 90 58 00 cmp.b #88, r12 ;#0x0058 91f6: a7 20 jnz $+336 ;abs 0x9346 000091f8 <.Loc.161.1>: 91f8: 5a 47 01 00 mov.b 1(r7), r10 ; 000091fc <.Loc.162.1>: 91fc: 27 53 incd r7 ; 000091fe <.LVL10>: 91fe: 76 40 10 00 mov.b #16, r6 ;#0x0010 00009202 <.L8>: 9202: 1e 41 02 00 mov 2(r1), r14 ; 00009206 <.LVL12>: 9206: 0c 4e mov r14, r12 ; 9208: 3c b0 00 80 bit #-32768,r12 ;#0x8000 920c: 0d 7d subc r13, r13 ; 920e: 3d e3 inv r13 ; 9210: 04 4c mov r12, r4 ; 9212: 34 53 add #-1, r4 ;r3 As==11 9214: 05 4d mov r13, r5 ; 9216: 35 60 ff 7f addc #32767, r5 ;#0x7fff 0000921a <.LVL13>: 921a: 0c 46 mov r6, r12 ; 921c: 3c b0 00 80 bit #-32768,r12 ;#0x8000 9220: 0d 7d subc r13, r13 ; 9222: 3d e3 inv r13 ; 9224: 81 4c 04 00 mov r12, 4(r1) ; 9228: 81 4d 06 00 mov r13, 6(r1) ; 0000922c <.Loc.186.1>: 922c: 0e 4c mov r12, r14 ; 922e: 0f 4d mov r13, r15 ; 9230: 0c 44 mov r4, r12 ; 9232: 0d 45 mov r5, r13 ; 9234: b0 12 f8 8f call #-28680 ;#0x8ff8 9238: 81 4c 10 00 mov r12, 16(r1) ; 0x0010 0000923c <.LVL15>: 923c: 1e 41 04 00 mov 4(r1), r14 ; 9240: 1f 41 06 00 mov 6(r1), r15 ; 9244: 0c 44 mov r4, r12 ; 00009246 <.LVL16>: 9246: 0d 45 mov r5, r13 ; 9248: b0 12 ea 8f call #-28694 ;#0x8fea 924c: 0b 4d mov r13, r11 ; 924e: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 00009252 <.LVL18>: 9252: 4c 43 clr.b r12 ; 00009254 <.LVL19>: 9254: 48 43 clr.b r8 ; 9256: 49 43 clr.b r9 ; 00009258 <.L17>: 9258: 1d 41 0e 00 mov 14(r1), r13 ;0x0000e 925c: 0d 5a add r10, r13 ; 925e: 5d 4d 01 00 mov.b 1(r13), r13 ; 00009262 <.Loc.189.1>: 9262: 2d b2 bit #4, r13 ;r2 As==10 9264: 36 24 jz $+110 ;abs 0x92d2 00009266 <.Loc.190.1>: 9266: 3a 50 d0 ff add #-48, r10 ;#0xffd0 0000926a <.L11>: 926a: 0a 96 cmp r6, r10 ; 926c: 44 34 jge $+138 ;abs 0x92f6 0000926e <.Loc.197.1>: 926e: 3c 93 cmp #-1, r12 ;r3 As==11 9270: 24 24 jz $+74 ;abs 0x92ba 00009272 <.Loc.197.1>: 9272: 0b 99 cmp r9, r11 ; 9274: 3e 28 jnc $+126 ;abs 0x92f2 9276: 09 9b cmp r11, r9 ; 9278: 03 20 jnz $+8 ;abs 0x9280 927a: 81 98 0c 00 cmp r8, 12(r1) ; 0x000c 927e: 39 28 jnc $+116 ;abs 0x92f2 00009280 <.L29>: 9280: 18 91 0c 00 cmp 12(r1), r8 ;0x0000c 9284: 05 20 jnz $+12 ;abs 0x9290 9286: 09 9b cmp r11, r9 ; 9288: 03 20 jnz $+8 ;abs 0x9290 0000928a <.Loc.197.1>: 928a: 81 9a 10 00 cmp r10, 16(r1) ; 0x0010 928e: 2e 38 jl $+94 ;abs 0x92ec 00009290 <.L16>: 9290: 0e 48 mov r8, r14 ; 9292: 0f 49 mov r9, r15 ; 9294: 1c 41 04 00 mov 4(r1), r12 ; 9298: 1d 41 06 00 mov 6(r1), r13 ; 929c: 81 4b 00 00 mov r11, 0(r1) ; 92a0: b0 12 a2 9e call #-24926 ;#0x9ea2 000092a4 <.LVL23>: 92a4: 0e 4a mov r10, r14 ; 92a6: 3e b0 00 80 bit #-32768,r14 ;#0x8000 92aa: 0f 7f subc r15, r15 ; 92ac: 3f e3 inv r15 ; 92ae: 08 4e mov r14, r8 ; 92b0: 08 5c add r12, r8 ; 92b2: 09 4f mov r15, r9 ; 92b4: 09 6d addc r13, r9 ; 000092b6 <.LVL24>: 92b6: 5c 43 mov.b #1, r12 ;r3 As==01 92b8: 2b 41 mov @r1, r11 ; 000092ba <.L14>: 92ba: 7a 47 mov.b @r7+, r10 ; 000092bc <.LVL26>: 92bc: cd 3f jmp $-100 ;abs 0x9258 000092be <.L3>: 92be: 7a 90 2b 00 cmp.b #43, r10 ;#0x002b 92c2: 03 24 jz $+8 ;abs 0x92ca 000092c4 <.L53>: 92c4: 81 43 02 00 mov #0, 2(r1) ;r3 As==00 92c8: 89 3f jmp $-236 ;abs 0x91dc 000092ca <.L5>: 92ca: 6a 47 mov.b @r7, r10 ; 000092cc <.Loc.158.1>: 92cc: 07 4c mov r12, r7 ; 92ce: 27 53 incd r7 ; 000092d0 <.LVL30>: 92d0: f9 3f jmp $-12 ;abs 0x92c4 000092d2 <.L10>: 92d2: 7d f0 03 00 and.b #3, r13 ; 000092d6 <.Loc.191.1>: 92d6: 4d 93 cmp.b #0, r13 ;r3 As==00 92d8: 0e 24 jz $+30 ;abs 0x92f6 000092da <.Loc.192.1>: 92da: 5d 93 cmp.b #1, r13 ;r3 As==01 92dc: 04 24 jz $+10 ;abs 0x92e6 92de: 7d 40 57 00 mov.b #87, r13 ;#0x0057 000092e2 <.L13>: 92e2: 0a 8d sub r13, r10 ; 92e4: c2 3f jmp $-122 ;abs 0x926a 000092e6 <.L24>: 92e6: 7d 40 37 00 mov.b #55, r13 ;#0x0037 92ea: fb 3f jmp $-8 ;abs 0x92e2 000092ec <.L26>: 92ec: 18 41 0c 00 mov 12(r1), r8 ;0x0000c 000092f0 <.LVL33>: 92f0: 09 4b mov r11, r9 ; 000092f2 <.L54>: 92f2: 3c 43 mov #-1, r12 ;r3 As==11 000092f4 <.LVL34>: 92f4: e2 3f jmp $-58 ;abs 0x92ba 000092f6 <.L12>: 92f6: 3c 93 cmp #-1, r12 ;r3 As==11 92f8: 0f 20 jnz $+32 ;abs 0x9318 000092fa <.LVL36>: 92fa: 1d 41 12 00 mov 18(r1), r13 ;0x00012 92fe: bd 40 22 00 mov #34, 0(r13) ;#0x0022 9302: 00 00 00009304 <.Loc.206.1>: 9304: 08 44 mov r4, r8 ; 9306: 09 45 mov r5, r9 ; 00009308 <.Loc.210.1>: 9308: 81 93 0a 00 cmp #0, 10(r1) ;r3 As==00, 0x000a 930c: 13 20 jnz $+40 ;abs 0x9334 0000930e <.L37>: 930e: 0c 48 mov r8, r12 ; 00009310 <.LVL38>: 9310: 0d 49 mov r9, r13 ; 9312: 31 50 14 00 add #20, r1 ;#0x0014 00009316 <.LCFI8>: 9316: 77 3e jmp $-784 ;abs 0x9006 00009318 <.L18>: 9318: 81 93 02 00 cmp #0, 2(r1) ;r3 As==00 931c: 06 24 jz $+14 ;abs 0x932a 0000931e <.Loc.209.1>: 931e: 4d 43 clr.b r13 ; 9320: 4e 43 clr.b r14 ; 9322: 0d 88 sub r8, r13 ; 9324: 0e 79 subc r9, r14 ; 9326: 08 4d mov r13, r8 ; 00009328 <.LVL40>: 9328: 09 4e mov r14, r9 ; 0000932a <.L21>: 932a: 81 93 0a 00 cmp #0, 10(r1) ;r3 As==00, 0x000a 932e: ef 27 jz $-32 ;abs 0x930e 00009330 <.Loc.211.1>: 9330: 0c 93 cmp #0, r12 ;r3 As==00 9332: 03 24 jz $+8 ;abs 0x933a 00009334 <.L19>: 9334: 37 53 add #-1, r7 ;r3 As==11 00009336 <.LVL43>: 9336: 81 47 08 00 mov r7, 8(r1) ; 0000933a <.L22>: 933a: 1e 41 0a 00 mov 10(r1), r14 ;0x0000a 933e: 9e 41 08 00 mov 8(r1), 0(r14) ; 9342: 00 00 00009344 <.Loc.212.1>: 9344: e4 3f jmp $-54 ;abs 0x930e 00009346 <.L9>: 9346: 7a 40 30 00 mov.b #48, r10 ;#0x0030 934a: 06 93 cmp #0, r6 ;r3 As==00 934c: 5a 23 jnz $-330 ;abs 0x9202 0000934e <.Loc.166.1>: 934e: 76 42 mov.b #8, r6 ;r2 As==11 00009350 <.LVL46>: 9350: 58 3f jmp $-334 ;abs 0x9202 00009352 <.L6>: 9352: 3a 90 30 00 cmp #48, r10 ;#0x0030 9356: 4a 27 jz $-362 ;abs 0x91ec 00009358 <.Loc.166.1>: 9358: 76 40 0a 00 mov.b #10, r6 ;#0x000a 0000935c <.LVL48>: 935c: 52 3f jmp $-346 ;abs 0x9202 0000935e : 935e: 0f 4e mov r14, r15 ; 9360: 0e 4d mov r13, r14 ; 00009362 <.LVL50>: 9362: 0d 4c mov r12, r13 ; 00009364 <.LVL51>: 9364: 1c 42 02 02 mov &0x0202,r12 ;0x0202 00009368 <.LVL52>: 9368: b0 12 94 91 call #-28268 ;#0x9194 0000936c <.LVL53>: 936c: 30 41 ret 0000936e <__ssputs_r>: 936e: 0a 12 push r10 ; 00009370 <.LCFI0>: 9370: 09 12 push r9 ; 00009372 : 9372: 08 12 push r8 ; 00009374 <.LCFI2>: 9374: 07 12 push r7 ; 00009376 <.LCFI3>: 9376: 06 12 push r6 ; 00009378 <.LCFI4>: 9378: 05 12 push r5 ; 0000937a <.LCFI5>: 937a: 04 12 push r4 ; 0000937c <.LCFI6>: 937c: 21 83 decd r1 ; 0000937e <.LCFI7>: 937e: 06 4c mov r12, r6 ; 9380: 0a 4d mov r13, r10 ; 9382: 04 4e mov r14, r4 ; 9384: 07 4f mov r15, r7 ; 00009386 <.Loc.181.1>: 9386: 18 4d 04 00 mov 4(r13), r8 ; 0000938a <.LVL1>: 938a: 0f 98 cmp r8, r15 ; 938c: 4b 28 jnc $+152 ;abs 0x9424 0000938e <.Loc.184.1>: 938e: 1e 4d 06 00 mov 6(r13), r14 ; 00009392 <.LVL2>: 9392: 3e b0 80 04 bit #1152, r14 ;#0x0480 9396: 44 24 jz $+138 ;abs 0x9420 00009398 <.LBB2>: 9398: 18 4d 0a 00 mov 10(r13),r8 ;0x0000a 0000939c <.LVL3>: 939c: 25 4d mov @r13, r5 ; 939e: 05 88 sub r8, r5 ; 000093a0 <.LVL4>: 93a0: 1c 4d 0c 00 mov 12(r13),r12 ;0x0000c 000093a4 <.LVL5>: 93a4: 09 4c mov r12, r9 ; 93a6: 09 5c add r12, r9 ; 93a8: 09 5c add r12, r9 ; 000093aa <.Loc.196.1>: 93aa: 0c 49 mov r9, r12 ; 93ac: 7d 40 0f 00 mov.b #15, r13 ;#0x000f 000093b0 <.LVL6>: 93b0: 81 4e 00 00 mov r14, 0(r1) ; 93b4: b0 12 26 90 call #-28634 ;#0x9026 000093b8 <.LVL7>: 93b8: 09 5c add r12, r9 ; 93ba: 09 11 rra r9 ; 000093bc <.LVL8>: 93bc: 0c 47 mov r7, r12 ; 93be: 1c 53 inc r12 ; 93c0: 0c 55 add r5, r12 ; 000093c2 <.Loc.197.1>: 93c2: 2e 41 mov @r1, r14 ; 93c4: 09 9c cmp r12, r9 ; 93c6: 01 2c jc $+4 ;abs 0x93ca 000093c8 <.Loc.198.1>: 93c8: 09 4c mov r12, r9 ; 000093ca <.L3>: 93ca: 3e b0 00 04 bit #1024, r14 ;#0x0400 93ce: 36 24 jz $+110 ;abs 0x943c 000093d0 <.Loc.202.1>: 93d0: 0d 49 mov r9, r13 ; 93d2: 0c 46 mov r6, r12 ; 93d4: b0 12 7a 9c call #-25478 ;#0x9c7a 000093d8 <.LVL10>: 93d8: 08 4c mov r12, r8 ; 000093da <.LVL11>: 93da: 0c 93 cmp #0, r12 ;r3 As==00 93dc: 09 20 jnz $+20 ;abs 0x93f0 000093de <.L14>: 93de: b6 40 0c 00 mov #12, 0(r6) ;#0x000c 93e2: 00 00 000093e4 <.L6>: 93e4: ba d0 40 00 bis #64, 6(r10) ;#0x0040 93e8: 06 00 000093ea <.Loc.239.1>: 93ea: 3c 43 mov #-1, r12 ;r3 As==11 000093ec <.L1>: 93ec: 21 53 incd r1 ; 000093ee <.LCFI8>: 93ee: 0b 3e jmp $-1000 ;abs 0x9006 000093f0 <.L5>: 93f0: 0e 45 mov r5, r14 ; 93f2: 1d 4a 0a 00 mov 10(r10),r13 ;0x0000a 93f6: b0 12 62 90 call #-28574 ;#0x9062 000093fa <.LVL14>: 93fa: 1c 4a 06 00 mov 6(r10), r12 ; 93fe: 3c f0 7f fb and #-1153, r12 ;#0xfb7f 9402: 3c d0 80 00 bis #128, r12 ;#0x0080 9406: 8a 4c 06 00 mov r12, 6(r10) ; 0000940a <.L7>: 940a: 8a 48 0a 00 mov r8, 10(r10) ; 0x000a 0000940e <.Loc.224.1>: 940e: 08 55 add r5, r8 ; 00009410 <.LVL15>: 9410: 8a 48 00 00 mov r8, 0(r10) ; 00009414 <.Loc.225.1>: 9414: 8a 49 0c 00 mov r9, 12(r10) ; 0x000c 00009418 <.LVL16>: 9418: 08 47 mov r7, r8 ; 0000941a <.Loc.227.1>: 941a: 09 85 sub r5, r9 ; 0000941c <.LVL17>: 941c: 8a 49 04 00 mov r9, 4(r10) ; 00009420 <.L2>: 9420: 07 98 cmp r8, r7 ; 9422: 01 2c jc $+4 ;abs 0x9426 00009424 <.L10>: 9424: 08 47 mov r7, r8 ; 00009426 <.L8>: 9426: 0e 48 mov r8, r14 ; 9428: 0d 44 mov r4, r13 ; 942a: 2c 4a mov @r10, r12 ; 942c: b0 12 46 9b call #-25786 ;#0x9b46 00009430 <.LVL21>: 9430: 8a 88 04 00 sub r8, 4(r10) ; 00009434 <.Loc.234.1>: 9434: 8a 58 00 00 add r8, 0(r10) ; 00009438 <.Loc.235.1>: 9438: 4c 43 clr.b r12 ; 943a: d8 3f jmp $-78 ;abs 0x93ec 0000943c <.L4>: 943c: 0e 49 mov r9, r14 ; 943e: 0d 48 mov r8, r13 ; 9440: 0c 46 mov r6, r12 ; 9442: b0 12 62 9d call #-25246 ;#0x9d62 00009446 <.LVL23>: 9446: 08 4c mov r12, r8 ; 00009448 <.LVL24>: 9448: 0c 93 cmp #0, r12 ;r3 As==00 944a: df 23 jnz $-64 ;abs 0x940a 0000944c <.Loc.217.1>: 944c: 1d 4a 0a 00 mov 10(r10),r13 ;0x0000a 9450: 0c 46 mov r6, r12 ; 9452: b0 12 8e 9b call #-25714 ;#0x9b8e 00009456 <.LVL25>: 9456: c3 3f jmp $-120 ;abs 0x93de 00009458 <_svfiprintf_r>: 9458: 0a 12 push r10 ; 0000945a <.LCFI20>: 945a: 09 12 push r9 ; 0000945c <.LCFI21>: 945c: 08 12 push r8 ; 0000945e : 945e: 07 12 push r7 ; 00009460 <.LCFI23>: 9460: 06 12 push r6 ; 00009462 <.LCFI24>: 9462: 05 12 push r5 ; 00009464 <.LCFI25>: 9464: 04 12 push r4 ; 00009466 <.LCFI26>: 9466: 31 80 52 00 sub #82, r1 ;#0x0052 0000946a <.LCFI27>: 946a: 07 4c mov r12, r7 ; 946c: 09 4d mov r13, r9 ; 946e: 0a 4e mov r14, r10 ; 9470: 81 4f 04 00 mov r15, 4(r1) ; 00009474 <.Loc.480.1>: 9474: 1d 4d 06 00 mov 6(r13), r13 ; 00009478 <.LVL59>: 9478: 7d f0 80 00 and.b #128, r13 ;#0x0080 0000947c <.Loc.505.1>: 947c: 0d 93 cmp #0, r13 ;r3 As==00 947e: 15 24 jz $+44 ;abs 0x94aa 00009480 <.Loc.505.1>: 9480: 89 93 0a 00 cmp #0, 10(r9) ;r3 As==00, 0x000a 9484: 12 20 jnz $+38 ;abs 0x94aa 00009486 <.Loc.507.1>: 9486: 7d 40 40 00 mov.b #64, r13 ;#0x0040 948a: b0 12 7a 9c call #-25478 ;#0x9c7a 0000948e <.LVL60>: 948e: 89 4c 00 00 mov r12, 0(r9) ; 00009492 <.Loc.507.1>: 9492: 89 4c 0a 00 mov r12, 10(r9) ; 0x000a 00009496 <.Loc.508.1>: 9496: 0c 93 cmp #0, r12 ;r3 As==00 9498: 05 20 jnz $+12 ;abs 0x94a4 0000949a <.Loc.510.1>: 949a: b7 40 0c 00 mov #12, 0(r7) ;#0x000c 949e: 00 00 000094a0 <.L64>: 94a0: 3c 43 mov #-1, r12 ;r3 As==11 94a2: 07 3d jmp $+528 ;abs 0x96b2 000094a4 <.L35>: 94a4: b9 40 40 00 mov #64, 12(r9) ;#0x0040, 0x000c 94a8: 0c 00 000094aa <.L34>: 94aa: 81 43 10 00 mov #0, 16(r1) ;r3 As==00, 0x0010 000094ae <.Loc.519.1>: 94ae: f1 40 20 00 mov.b #32, 19(r1) ;#0x0020, 0x0013 94b2: 13 00 000094b4 <.Loc.520.1>: 94b4: f1 40 30 00 mov.b #48, 20(r1) ;#0x0030, 0x0014 94b8: 14 00 000094ba <.Loc.531.1>: 94ba: 36 40 6e 93 mov #-27794,r6 ;#0x936e 000094be <.Loc.554.1>: 94be: 35 40 2a 9b mov #-25814,r5 ;#0x9b2a 000094c2 <.L63>: 94c2: 0c 4a mov r10, r12 ; 000094c4 <.L38>: 94c4: 04 4c mov r12, r4 ; 000094c6 <.LVL66>: 94c6: 7d 4c mov.b @r12+, r13 ; 000094c8 <.Loc.526.1>: 94c8: 0d 93 cmp #0, r13 ;r3 As==00 94ca: 03 24 jz $+8 ;abs 0x94d2 000094cc <.Loc.526.1>: 94cc: 3d 90 25 00 cmp #37, r13 ;#0x0025 94d0: f9 23 jnz $-12 ;abs 0x94c4 000094d2 <.L37>: 94d2: 0b 44 mov r4, r11 ; 94d4: 0b 8a sub r10, r11 ; 000094d6 <.LVL67>: 94d6: 04 9a cmp r10, r4 ; 94d8: 0d 24 jz $+28 ;abs 0x94f4 000094da <.Loc.531.1>: 94da: 0f 4b mov r11, r15 ; 94dc: 0e 4a mov r10, r14 ; 94de: 0d 49 mov r9, r13 ; 94e0: 0c 47 mov r7, r12 ; 94e2: 81 4b 02 00 mov r11, 2(r1) ; 94e6: 86 12 call r6 ; 000094e8 <.LVL68>: 94e8: 1b 41 02 00 mov 2(r1), r11 ; 94ec: 3c 93 cmp #-1, r12 ;r3 As==11 94ee: db 24 jz $+440 ;abs 0x96a6 000094f0 <.Loc.531.1>: 94f0: 81 5b 10 00 add r11, 16(r1) ; 0x0010 000094f4 <.L39>: 94f4: c4 93 00 00 cmp.b #0, 0(r4) ;r3 As==00 94f8: d6 24 jz $+430 ;abs 0x96a6 000094fa <.Loc.537.1>: 94fa: 0f 44 mov r4, r15 ; 94fc: 1f 53 inc r15 ; 000094fe <.LVL69>: 94fe: 81 43 06 00 mov #0, 6(r1) ;r3 As==00 00009502 <.Loc.540.1>: 9502: 81 43 0c 00 mov #0, 12(r1) ;r3 As==00, 0x000c 00009506 <.Loc.541.1>: 9506: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 0000950a <.Loc.542.1>: 950a: 81 43 0a 00 mov #0, 10(r1) ;r3 As==00, 0x000a 0000950e <.Loc.543.1>: 950e: c1 43 3d 00 mov.b #0, 61(r1) ;r3 As==00, 0x003d 00009512 <.Loc.545.1>: 9512: 81 43 50 00 mov #0, 80(r1) ;r3 As==00, 0x0050 00009516 <.Loc.553.1>: 9516: 74 40 05 00 mov.b #5, r4 ; 0000951a <.L41>: 951a: 0a 4f mov r15, r10 ; 951c: 0e 44 mov r4, r14 ; 951e: 7d 4a mov.b @r10+, r13 ; 9520: 3c 40 de 81 mov #-32290,r12 ;#0x81de 9524: 81 4f 02 00 mov r15, 2(r1) ; 9528: 85 12 call r5 ; 0000952a <.LVL72>: 952a: 0d 4c mov r12, r13 ; 0000952c <.LVL73>: 952c: 1f 41 02 00 mov 2(r1), r15 ; 9530: 0c 93 cmp #0, r12 ;r3 As==00 9532: 23 20 jnz $+72 ;abs 0x957a 00009534 <.Loc.557.1>: 9534: 1d 41 06 00 mov 6(r1), r13 ; 00009538 <.Loc.557.1>: 9538: 3d b0 10 00 bit #16, r13 ;#0x0010 953c: 03 24 jz $+8 ;abs 0x9544 0000953e <.Loc.558.1>: 953e: f1 40 20 00 mov.b #32, 61(r1) ;#0x0020, 0x003d 9542: 3d 00 00009544 <.L43>: 9544: 3d b2 bit #8, r13 ;r2 As==11 9546: 03 24 jz $+8 ;abs 0x954e 00009548 <.Loc.566.1>: 9548: f1 40 2b 00 mov.b #43, 61(r1) ;#0x002b, 0x003d 954c: 3d 00 0000954e <.L44>: 954e: ff 90 2a 00 cmp.b #42, 0(r15) ;#0x002a 9552: 00 00 9554: 1b 24 jz $+56 ;abs 0x958c 9556: 14 41 0c 00 mov 12(r1), r4 ;0x0000c 955a: 0a 4f mov r15, r10 ; 955c: 4c 43 clr.b r12 ; 0000955e <.LVL74>: 955e: 5f 43 mov.b #1, r15 ;r3 As==01 00009560 <.L46>: 9560: 0e 4a mov r10, r14 ; 9562: 7d 4e mov.b @r14+, r13 ; 9564: 3d 50 d0 ff add #-48, r13 ;#0xffd0 00009568 <.Loc.587.1>: 9568: 7b 40 09 00 mov.b #9, r11 ; 956c: 0b 9d cmp r13, r11 ; 956e: 63 2c jc $+200 ;abs 0x9636 9570: 0c 93 cmp #0, r12 ;r3 As==00 9572: 19 24 jz $+52 ;abs 0x95a6 9574: 81 44 0c 00 mov r4, 12(r1) ; 0x000c 9578: 16 3c jmp $+46 ;abs 0x95a6 0000957a <.L42>: 957a: 5c 43 mov.b #1, r12 ;r3 As==01 0000957c <.LVL77>: 957c: 3d 80 de 81 sub #-32290,r13 ;#0x81de 00009580 <.LVL78>: 9580: b0 12 1a 90 call #-28646 ;#0x901a 00009584 <.LVL79>: 9584: 81 dc 06 00 bis r12, 6(r1) ; 00009588 <.Loc.554.1>: 9588: 0f 4a mov r10, r15 ; 958a: c7 3f jmp $-112 ;abs 0x951a 0000958c <.L45>: 958c: 1c 41 04 00 mov 4(r1), r12 ; 00009590 <.LVL81>: 9590: 1c 53 inc r12 ; 9592: 1c c3 bic #1, r12 ;r3 As==01 9594: 0b 4c mov r12, r11 ; 9596: 2b 53 incd r11 ; 9598: 81 4b 04 00 mov r11, 4(r1) ; 959c: 2c 4c mov @r12, r12 ; 0000959e <.Loc.578.1>: 959e: 0c 93 cmp #0, r12 ;r3 As==00 95a0: 42 38 jl $+134 ;abs 0x9626 000095a2 <.Loc.577.1>: 95a2: 81 4c 0c 00 mov r12, 12(r1) ; 0x000c 000095a6 <.L49>: 95a6: fa 90 2e 00 cmp.b #46, 0(r10) ;#0x002e 95aa: 00 00 95ac: 12 20 jnz $+38 ;abs 0x95d2 000095ae <.Loc.594.1>: 95ae: fa 90 2a 00 cmp.b #42, 1(r10) ;#0x002a 95b2: 01 00 95b4: 4d 20 jnz $+156 ;abs 0x9650 000095b6 <.LVL82>: 95b6: 2a 53 incd r10 ; 000095b8 <.LVL83>: 95b8: 1c 41 04 00 mov 4(r1), r12 ; 95bc: 1c 53 inc r12 ; 95be: 1c c3 bic #1, r12 ;r3 As==01 95c0: 0d 4c mov r12, r13 ; 95c2: 2d 53 incd r13 ; 95c4: 81 4d 04 00 mov r13, 4(r1) ; 95c8: 2c 4c mov @r12, r12 ; 000095ca <.Loc.599.1>: 95ca: 0c 93 cmp #0, r12 ;r3 As==00 95cc: 3e 38 jl $+126 ;abs 0x964a 000095ce <.Loc.598.1>: 95ce: 81 4c 08 00 mov r12, 8(r1) ; 000095d2 <.L52>: 95d2: 7e 40 03 00 mov.b #3, r14 ; 95d6: 6d 4a mov.b @r10, r13 ; 95d8: 3c 40 e4 81 mov #-32284,r12 ;#0x81e4 95dc: 85 12 call r5 ; 000095de <.LVL85>: 95de: 0d 4c mov r12, r13 ; 000095e0 <.LVL86>: 95e0: 0c 93 cmp #0, r12 ;r3 As==00 95e2: 09 24 jz $+20 ;abs 0x95f6 000095e4 <.LVL87>: 95e4: 1a 53 inc r10 ; 000095e6 <.LVL88>: 95e6: 7c 40 40 00 mov.b #64, r12 ;#0x0040 000095ea <.LVL89>: 95ea: 3d 80 e4 81 sub #-32284,r13 ;#0x81e4 000095ee <.LVL90>: 95ee: b0 12 1a 90 call #-28646 ;#0x901a 000095f2 <.LVL91>: 95f2: 81 dc 06 00 bis r12, 6(r1) ; 000095f6 <.L58>: 95f6: 7d 4a mov.b @r10+, r13 ; 000095f8 <.LVL93>: 95f8: c1 4d 12 00 mov.b r13, 18(r1) ; 0x0012 000095fc <.Loc.620.1>: 95fc: 7e 40 06 00 mov.b #6, r14 ; 9600: 3c 40 e8 81 mov #-32280,r12 ;#0x81e8 9604: 85 12 call r5 ; 00009606 <.LVL94>: 9606: 0c 93 cmp #0, r12 ;r3 As==00 9608: 58 24 jz $+178 ;abs 0x96ba 0000960a <.Loc.627.1>: 960a: 34 40 00 00 mov #0, r4 ; 960e: 04 93 cmp #0, r4 ;r3 As==00 9610: 3c 20 jnz $+122 ;abs 0x968a 00009612 <.Loc.629.1>: 9612: 1c 41 04 00 mov 4(r1), r12 ; 00009616 <.LVL95>: 9616: 1c 53 inc r12 ; 9618: 1c c3 bic #1, r12 ;r3 As==01 961a: 3c 52 add #8, r12 ;r2 As==11 961c: 81 4c 04 00 mov r12, 4(r1) ; 00009620 <.L61>: 9620: 81 58 10 00 add r8, 16(r1) ; 0x0010 00009624 <.Loc.523.1>: 9624: 4e 3f jmp $-354 ;abs 0x94c2 00009626 <.L47>: 9626: 4e 43 clr.b r14 ; 9628: 0e 8c sub r12, r14 ; 962a: 81 4e 0c 00 mov r14, 12(r1) ; 0x000c 0000962e <.Loc.581.1>: 962e: 2d d3 bis #2, r13 ;r3 As==10 9630: 81 4d 06 00 mov r13, 6(r1) ; 00009634 <.Loc.583.1>: 9634: b8 3f jmp $-142 ;abs 0x95a6 00009636 <.L50>: 9636: 0c 44 mov r4, r12 ; 9638: 0c 5c rla r12 ; 963a: 0c 5c rla r12 ; 963c: 0c 54 add r4, r12 ; 963e: 0c 5c rla r12 ; 00009640 <.Loc.588.1>: 9640: 04 4c mov r12, r4 ; 9642: 04 5d add r13, r4 ; 00009644 <.LVL98>: 9644: 0a 4e mov r14, r10 ; 00009646 <.Loc.588.1>: 9646: 0c 4f mov r15, r12 ; 9648: 8b 3f jmp $-232 ;abs 0x9560 0000964a <.L54>: 964a: b1 43 08 00 mov #-1, 8(r1) ;r3 As==11 964e: c1 3f jmp $-124 ;abs 0x95d2 00009650 <.L53>: 9650: 1a 53 inc r10 ; 00009652 <.LVL101>: 9652: 81 43 08 00 mov #0, 8(r1) ;r3 As==00 00009656 <.Loc.605.1>: 9656: 4c 43 clr.b r12 ; 9658: 04 4c mov r12, r4 ; 0000965a <.Loc.606.1>: 965a: 5f 43 mov.b #1, r15 ;r3 As==01 0000965c <.L55>: 965c: 0e 4a mov r10, r14 ; 965e: 7d 4e mov.b @r14+, r13 ; 9660: 3d 50 d0 ff add #-48, r13 ;#0xffd0 00009664 <.Loc.605.1>: 9664: 7b 40 09 00 mov.b #9, r11 ; 9668: 0b 9d cmp r13, r11 ; 966a: 05 2c jc $+12 ;abs 0x9676 966c: 0c 93 cmp #0, r12 ;r3 As==00 966e: b1 27 jz $-156 ;abs 0x95d2 9670: 81 44 08 00 mov r4, 8(r1) ; 9674: ae 3f jmp $-162 ;abs 0x95d2 00009676 <.L56>: 9676: 0c 44 mov r4, r12 ; 9678: 0c 5c rla r12 ; 967a: 0c 5c rla r12 ; 967c: 0c 54 add r4, r12 ; 967e: 0c 5c rla r12 ; 00009680 <.Loc.606.1>: 9680: 04 4c mov r12, r4 ; 9682: 04 5d add r13, r4 ; 00009684 <.LVL103>: 9684: 0a 4e mov r14, r10 ; 00009686 <.Loc.606.1>: 9686: 0c 4f mov r15, r12 ; 9688: e9 3f jmp $-44 ;abs 0x965c 0000968a <.L60>: 968a: 6c 42 mov.b #4, r12 ;r2 As==10 0000968c <.LVL105>: 968c: 0c 51 add r1, r12 ; 968e: 81 4c 00 00 mov r12, 0(r1) ; 9692: 0f 46 mov r6, r15 ; 9694: 0e 49 mov r9, r14 ; 9696: 0d 41 mov r1, r13 ; 9698: 3d 50 06 00 add #6, r13 ; 969c: 0c 47 mov r7, r12 ; 969e: 84 12 call r4 ; 000096a0 <.L96>: 96a0: 08 4c mov r12, r8 ; 000096a2 <.Loc.643.1>: 96a2: 3c 93 cmp #-1, r12 ;r3 As==11 96a4: bd 23 jnz $-132 ;abs 0x9620 000096a6 <.L40>: 96a6: f9 b0 40 00 bit.b #64, 6(r9) ;#0x0040 96aa: 06 00 96ac: f9 22 jnz $-524 ;abs 0x94a0 000096ae <.Loc.654.1>: 96ae: 1c 41 10 00 mov 16(r1), r12 ;0x00010 000096b2 <.L33>: 96b2: 31 50 52 00 add #82, r1 ;#0x0052 000096b6 <.LCFI28>: 96b6: 30 40 06 90 br #0x9006 ; 000096ba <.L59>: 96ba: 6d 42 mov.b #4, r13 ;r2 As==10 96bc: 0d 51 add r1, r13 ; 96be: 81 4d 00 00 mov r13, 0(r1) ; 96c2: 0f 46 mov r6, r15 ; 96c4: 0e 49 mov r9, r14 ; 96c6: 0d 41 mov r1, r13 ; 96c8: 3d 50 06 00 add #6, r13 ; 96cc: 0c 47 mov r7, r12 ; 000096ce <.LVL111>: 96ce: b0 12 e8 97 call #-26648 ;#0x97e8 000096d2 <.LVL112>: 96d2: e6 3f jmp $-50 ;abs 0x96a0 000096d4 <_printf_common>: 96d4: 0a 12 push r10 ; 000096d6 <.LCFI0>: 96d6: 09 12 push r9 ; 000096d8 <.LCFI1>: 96d8: 08 12 push r8 ; 000096da <.LCFI2>: 96da: 07 12 push r7 ; 000096dc <.LCFI3>: 96dc: 06 12 push r6 ; 000096de <.LCFI4>: 96de: 05 12 push r5 ; 000096e0 <.LCFI5>: 96e0: 04 12 push r4 ; 000096e2 <.LCFI6>: 96e2: 21 83 decd r1 ; 000096e4 <.LCFI7>: 96e4: 07 4c mov r12, r7 ; 96e6: 0a 4d mov r13, r10 ; 000096e8 : 96e8: 08 4e mov r14, r8 ; 96ea: 06 4f mov r15, r6 ; 96ec: 15 41 12 00 mov 18(r1), r5 ;0x00012 000096f0 <.Loc.56.1>: 96f0: 1d 4d 04 00 mov 4(r13), r13 ; 000096f4 <.LVL1>: 96f4: 1c 4a 08 00 mov 8(r10), r12 ; 000096f8 <.LVL2>: 96f8: 0c 9d cmp r13, r12 ; 96fa: 01 34 jge $+4 ;abs 0x96fe 96fc: 0c 4d mov r13, r12 ; 000096fe <.L2>: 96fe: 88 4c 00 00 mov r12, 0(r8) ; 00009702 <.Loc.73.1>: 9702: ca 93 37 00 cmp.b #0, 55(r10) ;r3 As==00, 0x0037 9706: 03 24 jz $+8 ;abs 0x970e 00009708 <.Loc.74.1>: 9708: 1c 53 inc r12 ; 970a: 88 4c 00 00 mov r12, 0(r8) ; 0000970e <.L3>: 970e: fa b0 20 00 bit.b #32, 0(r10) ;#0x0020 9712: 00 00 9714: 02 24 jz $+6 ;abs 0x971a 00009716 <.Loc.77.1>: 9716: a8 53 00 00 incd 0(r8) ; 0000971a <.L4>: 971a: 29 4a mov @r10, r9 ; 971c: 79 f0 06 00 and.b #6, r9 ; 00009720 <.Loc.80.1>: 9720: ba b0 06 00 bit #6, 0(r10) ; 9724: 00 00 9726: 09 20 jnz $+20 ;abs 0x973a 00009728 <.LBB2>: 9728: 04 4a mov r10, r4 ; 972a: 34 50 0d 00 add #13, r4 ;#0x000d 972e: 5b 43 mov.b #1, r11 ;r3 As==01 00009730 <.L5>: 9730: 1c 4a 06 00 mov 6(r10), r12 ; 9734: 2c 88 sub @r8, r12 ; 9736: 09 9c cmp r12, r9 ; 9738: 31 38 jl $+100 ;abs 0x979c 0000973a <.L11>: 973a: 5d 4a 37 00 mov.b 55(r10),r13 ;0x00037 973e: 0c 43 clr r12 ; 9740: 0c 8d sub r13, r12 ; 9742: 7d 40 0f 00 mov.b #15, r13 ;#0x000f 9746: b0 12 26 90 call #-28634 ;#0x9026 974a: 0f 4c mov r12, r15 ; 0000974c <.LVL7>: 974c: fa b0 20 00 bit.b #32, 0(r10) ;#0x0020 9750: 00 00 9752: 34 20 jnz $+106 ;abs 0x97bc 00009754 <.L7>: 9754: 0e 4a mov r10, r14 ; 9756: 3e 50 37 00 add #55, r14 ;#0x0037 975a: 0d 46 mov r6, r13 ; 975c: 0c 47 mov r7, r12 ; 975e: 85 12 call r5 ; 00009760 <.LVL9>: 9760: 3c 93 cmp #-1, r12 ;r3 As==11 9762: 26 24 jz $+78 ;abs 0x97b0 00009764 <.Loc.94.1>: 9764: 19 4a 06 00 mov 6(r10), r9 ; 00009768 <.Loc.95.1>: 9768: 2c 48 mov @r8, r12 ; 0000976a <.LVL10>: 976a: 2d 4a mov @r10, r13 ; 976c: 7d f0 06 00 and.b #6, r13 ; 00009770 <.Loc.96.1>: 9770: 2d 92 cmp #4, r13 ;r2 As==10 9772: 03 20 jnz $+8 ;abs 0x977a 00009774 <.Loc.95.1>: 9774: 09 8c sub r12, r9 ; 00009776 <.LVL11>: 9776: 09 93 cmp #0, r9 ;r3 As==00 9778: 01 34 jge $+4 ;abs 0x977c 0000977a <.L18>: 977a: 49 43 clr.b r9 ; 0000977c <.L13>: 977c: 1c 4a 04 00 mov 4(r10), r12 ; 00009780 <.Loc.99.1>: 9780: 1d 4a 08 00 mov 8(r10), r13 ; 00009784 <.Loc.99.1>: 9784: 0d 9c cmp r12, r13 ; 9786: 02 34 jge $+6 ;abs 0x978c 00009788 <.Loc.100.1>: 9788: 0c 8d sub r13, r12 ; 0000978a <.Loc.100.1>: 978a: 09 5c add r12, r9 ; 0000978c <.L15>: 978c: 48 43 clr.b r8 ; 0000978e <.LVL15>: 978e: 3a 50 0e 00 add #14, r10 ;#0x000e 00009792 <.LVL16>: 9792: 54 43 mov.b #1, r4 ;r3 As==01 00009794 <.L16>: 9794: 09 98 cmp r8, r9 ; 9796: 1f 20 jnz $+64 ;abs 0x97d6 00009798 <.LBE3>: 9798: 4c 43 clr.b r12 ; 979a: 0b 3c jmp $+24 ;abs 0x97b2 0000979c <.L10>: 979c: 0f 4b mov r11, r15 ; 979e: 0e 44 mov r4, r14 ; 97a0: 0d 46 mov r6, r13 ; 97a2: 0c 47 mov r7, r12 ; 97a4: 81 4b 00 00 mov r11, 0(r1) ; 97a8: 85 12 call r5 ; 000097aa <.LVL19>: 97aa: 2b 41 mov @r1, r11 ; 97ac: 3c 93 cmp #-1, r12 ;r3 As==11 97ae: 04 20 jnz $+10 ;abs 0x97b8 000097b0 <.L12>: 97b0: 3c 43 mov #-1, r12 ;r3 As==11 000097b2 <.L1>: 97b2: 21 53 incd r1 ; 000097b4 <.LCFI8>: 97b4: 30 40 06 90 br #0x9006 ; 000097b8 <.L8>: 97b8: 19 53 inc r9 ; 97ba: ba 3f jmp $-138 ;abs 0x9730 000097bc <.L6>: 97bc: 0c 4a mov r10, r12 ; 97be: 0c 5f add r15, r12 ; 97c0: fc 40 30 00 mov.b #48, 55(r12) ;#0x0030, 0x0037 97c4: 37 00 000097c6 <.LVL24>: 97c6: 0c 4f mov r15, r12 ; 97c8: 1c 53 inc r12 ; 97ca: 0c 5a add r10, r12 ; 97cc: 2f 53 incd r15 ; 000097ce <.LVL25>: 97ce: dc 4a 39 00 mov.b 57(r10),55(r12) ;0x00039, 0x0037 97d2: 37 00 97d4: bf 3f jmp $-128 ;abs 0x9754 000097d6 <.L17>: 97d6: 0f 44 mov r4, r15 ; 97d8: 0e 4a mov r10, r14 ; 97da: 0d 46 mov r6, r13 ; 97dc: 0c 47 mov r7, r12 ; 97de: 85 12 call r5 ; 000097e0 <.LVL27>: 97e0: 3c 93 cmp #-1, r12 ;r3 As==11 97e2: e6 27 jz $-50 ;abs 0x97b0 000097e4 <.Loc.102.1>: 97e4: 18 53 inc r8 ; 97e6: d6 3f jmp $-82 ;abs 0x9794 000097e8 <_printf_i>: 97e8: 0a 12 push r10 ; 000097ea <.LCFI10>: 97ea: 09 12 push r9 ; 000097ec <.LCFI11>: 97ec: 08 12 push r8 ; 000097ee <.LCFI12>: 97ee: 07 12 push r7 ; 000097f0 : 97f0: 06 12 push r6 ; 000097f2 <.LCFI14>: 97f2: 05 12 push r5 ; 000097f4 <.LCFI15>: 97f4: 04 12 push r4 ; 000097f6 <.LCFI16>: 97f6: 31 80 14 00 sub #20, r1 ;#0x0014 000097fa <.LCFI17>: 97fa: 81 4c 08 00 mov r12, 8(r1) ; 97fe: 0a 4d mov r13, r10 ; 9800: 04 4e mov r14, r4 ; 9802: 81 4f 0a 00 mov r15, 10(r1) ; 0x000a 9806: 1d 41 24 00 mov 36(r1), r13 ;0x00024 0000980a <.LVL30>: 980a: 0b 4a mov r10, r11 ; 980c: 3b 50 37 00 add #55, r11 ;#0x0037 00009810 <.LVL31>: 9810: 5c 4a 0c 00 mov.b 12(r10),r12 ;0x0000c 00009814 <.LVL32>: 9814: 76 40 78 00 mov.b #120, r6 ;#0x0078 9818: 56 9a 0c 00 cmp.b 12(r10),r6 ;0x0000c 981c: 09 28 jnc $+20 ;abs 0x9830 981e: 77 40 62 00 mov.b #98, r7 ;#0x0062 9822: 47 9c cmp.b r12, r7 ; 9824: 0b 28 jnc $+24 ;abs 0x983c 9826: 0c 93 cmp #0, r12 ;r3 As==00 9828: 33 25 jz $+616 ;abs 0x9a90 982a: 3c 90 58 00 cmp #88, r12 ;#0x0058 982e: e8 24 jz $+466 ;abs 0x9a00 00009830 <.L30>: 9830: 07 4a mov r10, r7 ; 9832: 37 50 36 00 add #54, r7 ;#0x0036 00009836 <.LVL34>: 9836: ca 4c 36 00 mov.b r12, 54(r10) ; 0x0036 983a: 31 3c jmp $+100 ;abs 0x989e 0000983c <.L31>: 983c: 4e 4c mov.b r12, r14 ; 983e: 7e 50 9d ff add.b #-99, r14 ;#0xff9d 9842: 78 40 15 00 mov.b #21, r8 ;#0x0015 9846: 48 9e cmp.b r14, r8 ; 9848: f3 2b jnc $-24 ;abs 0x9830 984a: 3e f0 ff 00 and #255, r14 ;#0x00ff 984e: 0e 5e rla r14 ; 9850: 3e 50 5a 98 add #-26534,r14 ;#0x985a 9854: 2e 4e mov @r14, r14 ; 9856: 00 4e br r14 ; ... 0000985a <.L35>: 985a: 86 98 a4 98 cmp r8, -26460(r6); 0x98a4 985e: 30 98 cmp @r8+, r0 ; 9860: 30 98 cmp @r8+, r0 ; 9862: 30 98 cmp @r8+, r0 ; 9864: 30 98 cmp @r8+, r0 ; 9866: a4 98 30 98 cmp @r8, -26576(r4); 0x9830 986a: 30 98 cmp @r8+, r0 ; 986c: 30 98 cmp @r8+, r0 ; 986e: 30 98 cmp @r8+, r0 ; 9870: 66 9a cmp.b @r10, r6 ; 9872: f8 98 44 9a cmp.b @r8+, -26044(r8); 0x9a44 9876: 30 98 cmp @r8+, r0 ; 9878: 30 98 cmp @r8+, r0 ; 987a: 9e 9a 30 98 cmp -26576(r10),-26376(r14);0xffff9830, 0x98f8 987e: f8 98 9880: 30 98 cmp @r8+, r0 ; 9882: 30 98 cmp @r8+, r0 ; 9884: 4a 9a cmp.b r10, r10 ; 00009886 <.L41>: 9886: 2c 4d mov @r13, r12 ; 9888: 1c 53 inc r12 ; 988a: 1c c3 bic #1, r12 ;r3 As==01 988c: 09 4c mov r12, r9 ; 988e: 29 53 incd r9 ; 9890: 8d 49 00 00 mov r9, 0(r13) ; 00009894 <.Loc.124.1>: 9894: 07 4a mov r10, r7 ; 9896: 37 50 36 00 add #54, r7 ;#0x0036 0000989a <.LVL36>: 989a: ea 4c 36 00 mov.b @r12, 54(r10) ; 0x0036 0000989e <.L97>: 989e: 9a 43 08 00 mov #1, 8(r10) ;r3 As==01 98a2: 11 3d jmp $+548 ;abs 0x9ac6 000098a4 <.L40>: 98a4: 2c 4d mov @r13, r12 ; 98a6: 1c 53 inc r12 ; 98a8: 1c c3 bic #1, r12 ;r3 As==01 000098aa <.Loc.129.1>: 98aa: 2e 4a mov @r10, r14 ; 98ac: 7e f0 80 00 and.b #128, r14 ;#0x0080 98b0: 0e 93 cmp #0, r14 ;r3 As==00 98b2: 17 24 jz $+48 ;abs 0x98e2 98b4: 0e 4c mov r12, r14 ; 98b6: 2e 52 add #4, r14 ;r2 As==10 98b8: 8d 4e 00 00 mov r14, 0(r13) ; 98bc: 28 4c mov @r12, r8 ; 98be: 19 4c 02 00 mov 2(r12), r9 ; 000098c2 <.L44>: 98c2: 09 93 cmp #0, r9 ;r3 As==00 98c4: 09 34 jge $+20 ;abs 0x98d8 000098c6 <.Loc.132.1>: 98c6: 46 43 clr.b r6 ; 98c8: 47 43 clr.b r7 ; 98ca: 06 88 sub r8, r6 ; 98cc: 07 79 subc r9, r7 ; 98ce: 08 46 mov r6, r8 ; 000098d0 <.LVL40>: 98d0: 09 47 mov r7, r9 ; 000098d2 <.LVL41>: 98d2: fa 40 2d 00 mov.b #45, 55(r10) ;#0x002d, 0x0037 98d6: 37 00 000098d8 <.L73>: 98d8: 35 40 ef 81 mov #-32273,r5 ;#0x81ef 000098dc <.LBB8>: 98dc: 76 40 0a 00 mov.b #10, r6 ;#0x000a 98e0: 22 3c jmp $+70 ;abs 0x9926 000098e2 <.L43>: 98e2: 0f 4c mov r12, r15 ; 000098e4 <.LVL43>: 98e4: 2f 53 incd r15 ; 98e6: 8d 4f 00 00 mov r15, 0(r13) ; 98ea: 2c 4c mov @r12, r12 ; 98ec: 08 4c mov r12, r8 ; 98ee: 38 b0 00 80 bit #-32768,r8 ;#0x8000 98f2: 09 79 subc r9, r9 ; 98f4: 39 e3 inv r9 ; 98f6: e5 3f jmp $-52 ;abs 0x98c2 000098f8 <.L36>: 98f8: 2f 4a mov @r10, r15 ; 000098fa <.LVL45>: 98fa: 2e 4d mov @r13, r14 ; 98fc: 1e 53 inc r14 ; 98fe: 1e c3 bic #1, r14 ;r3 As==01 9900: 3f b0 80 00 bit #128, r15 ;#0x0080 9904: 77 24 jz $+240 ;abs 0x99f4 9906: 07 4e mov r14, r7 ; 9908: 27 52 add #4, r7 ;r2 As==10 990a: 8d 47 00 00 mov r7, 0(r13) ; 990e: 28 4e mov @r14, r8 ; 9910: 19 4e 02 00 mov 2(r14), r9 ; 00009914 <.L48>: 9914: 35 40 ef 81 mov #-32273,r5 ;#0x81ef 00009918 <.LBB9>: 9918: 3c 90 6f 00 cmp #111, r12 ;#0x006f 991c: a2 24 jz $+326 ;abs 0x9a62 0000991e <.Loc.140.1>: 991e: 76 40 0a 00 mov.b #10, r6 ;#0x000a 00009922 <.L50>: 9922: ca 43 37 00 mov.b #0, 55(r10) ;r3 As==00, 0x0037 00009926 <.L45>: 9926: 1c 4a 02 00 mov 2(r10), r12 ; 0000992a <.Loc.179.1>: 992a: 8a 4c 04 00 mov r12, 4(r10) ; 0000992e <.Loc.179.1>: 992e: 0c 93 cmp #0, r12 ;r3 As==00 9930: 02 38 jl $+6 ;abs 0x9936 00009932 <.Loc.180.1>: 9932: aa c2 00 00 bic #4, 0(r10) ;r2 As==10 00009936 <.L56>: 9936: 0d 48 mov r8, r13 ; 00009938 <.LVL49>: 9938: 0d d9 bis r9, r13 ; 0000993a <.Loc.135.1>: 993a: 07 4b mov r11, r7 ; 0000993c <.Loc.187.1>: 993c: 0d 93 cmp #0, r13 ;r3 As==00 993e: 02 20 jnz $+6 ;abs 0x9944 00009940 <.LVL50>: 9940: 0c 93 cmp #0, r12 ;r3 As==00 9942: 35 24 jz $+108 ;abs 0x99ae 00009944 <.L57>: 9944: 0c 46 mov r6, r12 ; 9946: 3c b0 00 80 bit #-32768,r12 ;#0x8000 994a: 0d 7d subc r13, r13 ; 994c: 3d e3 inv r13 ; 994e: 81 4c 04 00 mov r12, 4(r1) ; 9952: 81 4d 06 00 mov r13, 6(r1) ; 00009956 <.Loc.194.1>: 9956: 81 4d 10 00 mov r13, 16(r1) ; 0x0010 0000995a <.L90>: 995a: 37 53 add #-1, r7 ;r3 As==11 0000995c <.Loc.191.1>: 995c: 1e 41 04 00 mov 4(r1), r14 ; 9960: 1f 41 06 00 mov 6(r1), r15 ; 9964: 0c 48 mov r8, r12 ; 9966: 0d 49 mov r9, r13 ; 9968: 81 4b 02 00 mov r11, 2(r1) ; 996c: b0 12 f8 8f call #-28680 ;#0x8ff8 00009970 <.Loc.191.1>: 9970: 0c 55 add r5, r12 ; 00009972 <.Loc.191.1>: 9972: e7 4c 00 00 mov.b @r12, 0(r7) ; 00009976 <.Loc.192.1>: 9976: 81 48 0e 00 mov r8, 14(r1) ; 0x000e 997a: 81 49 0c 00 mov r9, 12(r1) ; 0x000c 0000997e <.Loc.192.1>: 997e: 1e 41 04 00 mov 4(r1), r14 ; 9982: 1f 41 06 00 mov 6(r1), r15 ; 9986: 0c 48 mov r8, r12 ; 9988: 0d 49 mov r9, r13 ; 998a: b0 12 ea 8f call #-28694 ;#0x8fea 998e: 08 4c mov r12, r8 ; 00009990 <.LVL54>: 9990: 09 4d mov r13, r9 ; 00009992 <.LVL55>: 9992: 1b 41 02 00 mov 2(r1), r11 ; 9996: 91 91 06 00 cmp 6(r1), 12(r1) ; 0x000c 999a: 0c 00 999c: 08 28 jnc $+18 ;abs 0x99ae 999e: 91 91 0c 00 cmp 12(r1), 16(r1) ;0x0000c, 0x0010 99a2: 10 00 99a4: da 23 jnz $-74 ;abs 0x995a 99a6: 91 91 04 00 cmp 4(r1), 14(r1) ; 0x000e 99aa: 0e 00 99ac: d6 2f jc $-82 ;abs 0x995a 000099ae <.L58>: 99ae: 36 92 cmp #8, r6 ;r2 As==11 99b0: 0b 20 jnz $+24 ;abs 0x99c8 000099b2 <.Loc.198.1>: 99b2: da b3 00 00 bit.b #1, 0(r10) ;r3 As==01 99b6: 08 24 jz $+18 ;abs 0x99c8 000099b8 <.Loc.198.1>: 99b8: 9a 9a 02 00 cmp 2(r10), 8(r10) ; 99bc: 08 00 99be: 04 38 jl $+10 ;abs 0x99c8 000099c0 <.LVL56>: 99c0: f7 40 30 00 mov.b #48, -1(r7) ;#0x0030, 0xffff 99c4: ff ff 99c6: 37 53 add #-1, r7 ;r3 As==11 000099c8 <.L61>: 99c8: 0b 87 sub r7, r11 ; 99ca: 8a 4b 08 00 mov r11, 8(r10) ; 000099ce <.L62>: 99ce: 91 41 0a 00 mov 10(r1), 0(r1) ;0x0000a 99d2: 00 00 99d4: 0f 44 mov r4, r15 ; 99d6: 0e 41 mov r1, r14 ; 99d8: 3e 50 12 00 add #18, r14 ;#0x0012 99dc: 0d 4a mov r10, r13 ; 99de: 1c 41 08 00 mov 8(r1), r12 ; 99e2: b0 12 d4 96 call #-26924 ;#0x96d4 000099e6 <.LVL59>: 99e6: 3c 93 cmp #-1, r12 ;r3 As==11 99e8: 71 20 jnz $+228 ;abs 0x9acc 000099ea <.L68>: 99ea: 3c 43 mov #-1, r12 ;r3 As==11 000099ec <.L29>: 99ec: 31 50 14 00 add #20, r1 ;#0x0014 000099f0 <.LCFI18>: 99f0: 30 40 06 90 br #0x9006 ; 000099f4 <.L47>: 99f4: 36 4e mov @r14+, r6 ; 99f6: 08 46 mov r6, r8 ; 99f8: 09 43 clr r9 ; 000099fa <.LBB10>: 99fa: 8d 4e 00 00 mov r14, 0(r13) ; 99fe: 8a 3f jmp $-234 ;abs 0x9914 00009a00 <.L33>: 9a00: ca 4c 39 00 mov.b r12, 57(r10) ; 0x0039 00009a04 <.LBE10>: 9a04: 35 40 ef 81 mov #-32273,r5 ;#0x81ef 00009a08 <.L51>: 9a08: 2c 4a mov @r10, r12 ; 9a0a: 2e 4d mov @r13, r14 ; 9a0c: 1e 53 inc r14 ; 9a0e: 1e c3 bic #1, r14 ;r3 As==01 9a10: 3c b0 80 00 bit #128, r12 ;#0x0080 9a14: 20 24 jz $+66 ;abs 0x9a56 9a16: 07 4e mov r14, r7 ; 9a18: 27 52 add #4, r7 ;r2 As==10 9a1a: 8d 47 00 00 mov r7, 0(r13) ; 9a1e: 28 4e mov @r14, r8 ; 9a20: 19 4e 02 00 mov 2(r14), r9 ; 00009a24 <.L53>: 9a24: 1c b3 bit #1, r12 ;r3 As==01 9a26: 04 24 jz $+10 ;abs 0x9a30 00009a28 <.Loc.164.1>: 9a28: 3c d0 20 00 bis #32, r12 ;#0x0020 9a2c: 8a 4c 00 00 mov r12, 0(r10) ; 00009a30 <.L55>: 9a30: 0c 48 mov r8, r12 ; 9a32: 0c d9 bis r9, r12 ; 9a34: 0c 93 cmp #0, r12 ;r3 As==00 9a36: 03 20 jnz $+8 ;abs 0x9a3e 00009a38 <.Loc.168.1>: 9a38: ba f0 df ff and #-33, 0(r10) ;#0xffdf 9a3c: 00 00 00009a3e <.L75>: 9a3e: 76 40 10 00 mov.b #16, r6 ;#0x0010 9a42: 6f 3f jmp $-288 ;abs 0x9922 00009a44 <.L38>: 9a44: ba d0 20 00 bis #32, 0(r10) ;#0x0020 9a48: 00 00 00009a4a <.L34>: 9a4a: fa 40 78 00 mov.b #120, 57(r10) ;#0x0078, 0x0039 9a4e: 39 00 00009a50 <.Loc.159.1>: 9a50: 35 40 00 82 mov #-32256,r5 ;#0x8200 9a54: d9 3f jmp $-76 ;abs 0x9a08 00009a56 <.L52>: 9a56: 3f 4e mov @r14+, r15 ; 00009a58 <.LVL68>: 9a58: 08 4f mov r15, r8 ; 9a5a: 09 43 clr r9 ; 00009a5c <.Loc.161.1>: 9a5c: 8d 4e 00 00 mov r14, 0(r13) ; 9a60: e1 3f jmp $-60 ;abs 0x9a24 00009a62 <.L74>: 9a62: 76 42 mov.b #8, r6 ;r2 As==11 9a64: 5e 3f jmp $-322 ;abs 0x9922 00009a66 <.L39>: 9a66: 29 4a mov @r10, r9 ; 9a68: 1e 4a 0a 00 mov 10(r10),r14 ;0x0000a 9a6c: 2c 4d mov @r13, r12 ; 9a6e: 0f 4c mov r12, r15 ; 00009a70 <.LVL71>: 9a70: 2f 53 incd r15 ; 00009a72 <.Loc.205.1>: 9a72: 8d 4f 00 00 mov r15, 0(r13) ; 00009a76 <.Loc.205.1>: 9a76: 2c 4c mov @r12, r12 ; 00009a78 <.Loc.204.1>: 9a78: 39 b0 80 00 bit #128, r9 ;#0x0080 9a7c: 0d 24 jz $+28 ;abs 0x9a98 00009a7e <.Loc.205.1>: 9a7e: 06 4e mov r14, r6 ; 9a80: 36 b0 00 80 bit #-32768,r6 ;#0x8000 9a84: 07 77 subc r7, r7 ; 9a86: 37 e3 inv r7 ; 9a88: 8c 46 00 00 mov r6, 0(r12) ; 9a8c: 8c 47 02 00 mov r7, 2(r12) ; 00009a90 <.L32>: 9a90: 8a 43 08 00 mov #0, 8(r10) ;r3 As==00 00009a94 <.LBE11>: 9a94: 07 4b mov r11, r7 ; 00009a96 <.LBB12>: 9a96: 9b 3f jmp $-200 ;abs 0x99ce 00009a98 <.L63>: 9a98: 8c 4e 00 00 mov r14, 0(r12) ; 00009a9c <.LVL74>: 9a9c: f9 3f jmp $-12 ;abs 0x9a90 00009a9e <.L37>: 9a9e: 2c 4d mov @r13, r12 ; 9aa0: 07 4c mov r12, r7 ; 9aa2: 27 53 incd r7 ; 9aa4: 8d 47 00 00 mov r7, 0(r13) ; 9aa8: 27 4c mov @r12, r7 ; 00009aaa <.LVL76>: 9aaa: 1e 4a 02 00 mov 2(r10), r14 ; 9aae: 4d 43 clr.b r13 ; 00009ab0 <.LVL77>: 9ab0: 0c 47 mov r7, r12 ; 9ab2: b0 12 2a 9b call #-25814 ;#0x9b2a 00009ab6 <.LVL78>: 9ab6: 0c 93 cmp #0, r12 ;r3 As==00 9ab8: 03 24 jz $+8 ;abs 0x9ac0 00009aba <.Loc.222.1>: 9aba: 0c 87 sub r7, r12 ; 00009abc <.LVL79>: 9abc: 8a 4c 02 00 mov r12, 2(r10) ; 00009ac0 <.L65>: 9ac0: 9a 4a 02 00 mov 2(r10), 8(r10) ; 9ac4: 08 00 00009ac6 <.L42>: 9ac6: ca 43 37 00 mov.b #0, 55(r10) ;r3 As==00, 0x0037 00009aca <.Loc.233.1>: 9aca: 81 3f jmp $-252 ;abs 0x99ce 00009acc <.L66>: 9acc: 1f 4a 08 00 mov 8(r10), r15 ; 9ad0: 0e 47 mov r7, r14 ; 9ad2: 0d 44 mov r4, r13 ; 9ad4: 1c 41 08 00 mov 8(r1), r12 ; 00009ad8 <.LVL82>: 9ad8: 18 41 0a 00 mov 10(r1), r8 ;0x0000a 9adc: 88 12 call r8 ; 00009ade <.LVL83>: 9ade: 3c 93 cmp #-1, r12 ;r3 As==11 9ae0: 84 27 jz $-246 ;abs 0x99ea 00009ae2 <.Loc.241.1>: 9ae2: ea b3 00 00 bit.b #2, 0(r10) ;r3 As==10 9ae6: 1a 20 jnz $+54 ;abs 0x9b1c 00009ae8 <.L72>: 9ae8: 1d 41 12 00 mov 18(r1), r13 ;0x00012 9aec: 1c 4a 06 00 mov 6(r10), r12 ; 9af0: 0c 9d cmp r13, r12 ; 9af2: 7c 37 jge $-262 ;abs 0x99ec 9af4: 0c 4d mov r13, r12 ; 9af6: 7a 3f jmp $-266 ;abs 0x99ec 00009af8 <.L71>: 9af8: 0f 47 mov r7, r15 ; 9afa: 0e 48 mov r8, r14 ; 9afc: 0d 44 mov r4, r13 ; 9afe: 1c 41 08 00 mov 8(r1), r12 ; 9b02: 16 41 0a 00 mov 10(r1), r6 ;0x0000a 9b06: 86 12 call r6 ; 00009b08 <.LVL86>: 9b08: 3c 93 cmp #-1, r12 ;r3 As==11 9b0a: 6f 27 jz $-288 ;abs 0x99ea 00009b0c <.Loc.244.1>: 9b0c: 19 53 inc r9 ; 00009b0e <.L69>: 9b0e: 1c 4a 06 00 mov 6(r10), r12 ; 9b12: 1c 81 12 00 sub 18(r1), r12 ;0x00012 9b16: 09 9c cmp r12, r9 ; 9b18: ef 3b jl $-32 ;abs 0x9af8 9b1a: e6 3f jmp $-50 ;abs 0x9ae8 00009b1c <.L77>: 9b1c: 49 43 clr.b r9 ; 9b1e: 08 4a mov r10, r8 ; 9b20: 38 50 0d 00 add #13, r8 ;#0x000d 9b24: 57 43 mov.b #1, r7 ;r3 As==01 00009b26 <.LVL89>: 9b26: f3 3f jmp $-24 ;abs 0x9b0e 00009b28 : ... 00009b2a : 9b2a: 3d f0 ff 00 and #255, r13 ;#0x00ff 00009b2e <.LVL2>: 9b2e: 0f 4c mov r12, r15 ; 9b30: 0e 5c add r12, r14 ; 00009b32 <.L2>: 9b32: 0c 4f mov r15, r12 ; 00009b34 <.LVL4>: 9b34: 0f 9e cmp r14, r15 ; 9b36: 02 20 jnz $+6 ;abs 0x9b3c 00009b38 <.Loc.133.1>: 9b38: 4c 43 clr.b r12 ; 00009b3a <.LVL5>: 9b3a: 04 3c jmp $+10 ;abs 0x9b44 00009b3c <.L4>: 9b3c: 1f 53 inc r15 ; 00009b3e <.Loc.128.1>: 9b3e: cc 9d 00 00 cmp.b r13, 0(r12) ; 9b42: f7 23 jnz $-16 ;abs 0x9b32 00009b44 <.L1>: 9b44: 30 41 ret 00009b46 : 9b46: 0a 12 push r10 ; 00009b48 : 9b48: 09 12 push r9 ; 00009b4a <.LCFI1>: 9b4a: 0d 9c cmp r12, r13 ; 9b4c: 1e 2c jc $+62 ;abs 0x9b8a 00009b4e <.Loc.69.1>: 9b4e: 0a 4d mov r13, r10 ; 9b50: 0a 5e add r14, r10 ; 00009b52 <.Loc.69.1>: 9b52: 0c 9a cmp r10, r12 ; 9b54: 1a 2c jc $+54 ;abs 0x9b8a 00009b56 <.LVL2>: 9b56: 09 4e mov r14, r9 ; 9b58: 39 e3 inv r9 ; 00009b5a <.Loc.74.1>: 9b5a: 4d 43 clr.b r13 ; 00009b5c <.L3>: 9b5c: 3d 53 add #-1, r13 ;r3 As==11 00009b5e <.LVL4>: 9b5e: 09 9d cmp r13, r9 ; 9b60: 02 20 jnz $+6 ;abs 0x9b66 00009b62 <.L10>: 9b62: 30 40 10 90 br #0x9010 ; 00009b66 <.L4>: 9b66: 0f 4e mov r14, r15 ; 9b68: 0f 5d add r13, r15 ; 9b6a: 0f 5c add r12, r15 ; 9b6c: 0b 4a mov r10, r11 ; 9b6e: 0b 5d add r13, r11 ; 00009b70 <.LVL7>: 9b70: ef 4b 00 00 mov.b @r11, 0(r15) ; 9b74: f3 3f jmp $-24 ;abs 0x9b5c 00009b76 <.L6>: 9b76: 0b 4d mov r13, r11 ; 9b78: 0b 5f add r15, r11 ; 00009b7a <.Loc.83.1>: 9b7a: 0a 4c mov r12, r10 ; 9b7c: 0a 5f add r15, r10 ; 9b7e: ea 4b 00 00 mov.b @r11, 0(r10) ; 9b82: 1f 53 inc r15 ; 00009b84 <.L5>: 9b84: 0e 9f cmp r15, r14 ; 9b86: f7 23 jnz $-16 ;abs 0x9b76 9b88: ec 3f jmp $-38 ;abs 0x9b62 00009b8a <.L9>: 9b8a: 4f 43 clr.b r15 ; 9b8c: fb 3f jmp $-8 ;abs 0x9b84 00009b8e <_free_r>: 9b8e: 0a 12 push r10 ; 00009b90 <.LCFI0>: 9b90: 09 12 push r9 ; 00009b92 <.LCFI1>: 9b92: 08 12 push r8 ; 00009b94 : 9b94: 07 12 push r7 ; 00009b96 <.LCFI3>: 9b96: 0d 93 cmp #0, r13 ;r3 As==00 9b98: 27 24 jz $+80 ;abs 0x9be8 00009b9a <.LBB4>: 9b9a: 0e 4d mov r13, r14 ; 9b9c: 3e 50 fc ff add #-4, r14 ;#0xfffc 00009ba0 <.LVL2>: 9ba0: 1f 4d fc ff mov -4(r13),r15 ; 00009ba4 <.Loc.193.1>: 9ba4: 8d 93 fe ff cmp #0, -2(r13) ;r3 As==00, 0xfffe 9ba8: 01 34 jge $+4 ;abs 0x9bac 00009baa <.Loc.193.1>: 9baa: 0e 5f add r15, r14 ; 00009bac <.L4>: 9bac: 1d 42 d8 02 mov &0x02d8,r13 ;0x02d8 00009bb0 <.LVL4>: 9bb0: 0d 93 cmp #0, r13 ;r3 As==00 9bb2: 03 20 jnz $+8 ;abs 0x9bba 00009bb4 <.L8>: 9bb4: 8e 4d 04 00 mov r13, 4(r14) ; 9bb8: 15 3c jmp $+44 ;abs 0x9be4 00009bba <.L6>: 9bba: 0e 9d cmp r13, r14 ; 9bbc: 17 2c jc $+48 ;abs 0x9bec 00009bbe <.Loc.359.1>: 9bbe: 2a 4e mov @r14, r10 ; 9bc0: 1b 4e 02 00 mov 2(r14), r11 ; 00009bc4 <.Loc.359.1>: 9bc4: 0c 4e mov r14, r12 ; 00009bc6 <.LVL7>: 9bc6: 0c 5a add r10, r12 ; 00009bc8 <.Loc.359.1>: 9bc8: 0d 9c cmp r12, r13 ; 9bca: f4 23 jnz $-22 ;abs 0x9bb4 00009bcc <.Loc.363.1>: 9bcc: 08 4a mov r10, r8 ; 9bce: 09 4b mov r11, r9 ; 9bd0: 28 5d add @r13, r8 ; 9bd2: 19 6d 02 00 addc 2(r13), r9 ; 9bd6: 8e 48 00 00 mov r8, 0(r14) ; 9bda: 8e 49 02 00 mov r9, 2(r14) ; 00009bde <.Loc.364.1>: 9bde: 9e 4d 04 00 mov 4(r13), 4(r14) ; 9be2: 04 00 00009be4 <.L9>: 9be4: 82 4e d8 02 mov r14, &0x02d8 ; 00009be8 <.L1>: 9be8: 30 40 0c 90 br #0x900c ; 00009bec <.L7>: 9bec: 0f 4d mov r13, r15 ; 00009bee <.Loc.381.1>: 9bee: 1d 4d 04 00 mov 4(r13), r13 ; 00009bf2 <.LVL10>: 9bf2: 0d 93 cmp #0, r13 ;r3 As==00 9bf4: 02 24 jz $+6 ;abs 0x9bfa 00009bf6 <.Loc.382.1>: 9bf6: 0e 9d cmp r13, r14 ; 9bf8: f9 2f jc $-12 ;abs 0x9bec 00009bfa <.L10>: 9bfa: 29 4f mov @r15, r9 ; 9bfc: 17 4f 02 00 mov 2(r15), r7 ; 00009c00 <.Loc.387.1>: 9c00: 08 4f mov r15, r8 ; 9c02: 08 59 add r9, r8 ; 00009c04 <.Loc.387.1>: 9c04: 08 9e cmp r14, r8 ; 9c06: 1a 20 jnz $+54 ;abs 0x9c3c 00009c08 <.Loc.391.1>: 9c08: 0a 49 mov r9, r10 ; 9c0a: 2a 5e add @r14, r10 ; 9c0c: 1b 4e 02 00 mov 2(r14), r11 ; 9c10: 0b 67 addc r7, r11 ; 9c12: 8f 4a 00 00 mov r10, 0(r15) ; 9c16: 8f 4b 02 00 mov r11, 2(r15) ; 00009c1a <.Loc.394.1>: 9c1a: 0c 4f mov r15, r12 ; 00009c1c <.LVL11>: 9c1c: 0c 5a add r10, r12 ; 00009c1e <.Loc.394.1>: 9c1e: 0d 9c cmp r12, r13 ; 9c20: e3 23 jnz $-56 ;abs 0x9be8 00009c22 <.Loc.396.1>: 9c22: 08 4a mov r10, r8 ; 9c24: 09 4b mov r11, r9 ; 9c26: 28 5d add @r13, r8 ; 9c28: 19 6d 02 00 addc 2(r13), r9 ; 9c2c: 8f 48 00 00 mov r8, 0(r15) ; 9c30: 8f 49 02 00 mov r9, 2(r15) ; 00009c34 <.Loc.397.1>: 9c34: 9f 4d 04 00 mov 4(r13), 4(r15) ; 9c38: 04 00 9c3a: d6 3f jmp $-82 ;abs 0x9be8 00009c3c <.L11>: 9c3c: 0e 98 cmp r8, r14 ; 9c3e: 04 2c jc $+10 ;abs 0x9c48 00009c40 <.Loc.404.1>: 9c40: bc 40 0c 00 mov #12, 0(r12) ;#0x000c 9c44: 00 00 00009c46 <.Loc.405.1>: 9c46: d0 3f jmp $-94 ;abs 0x9be8 00009c48 <.L13>: 9c48: 2a 4e mov @r14, r10 ; 9c4a: 1b 4e 02 00 mov 2(r14), r11 ; 00009c4e <.Loc.409.1>: 9c4e: 0c 4e mov r14, r12 ; 00009c50 <.LVL13>: 9c50: 0c 5a add r10, r12 ; 00009c52 <.Loc.409.1>: 9c52: 0d 9c cmp r12, r13 ; 9c54: 0f 20 jnz $+32 ;abs 0x9c74 00009c56 <.Loc.413.1>: 9c56: 08 4a mov r10, r8 ; 9c58: 09 4b mov r11, r9 ; 9c5a: 28 5d add @r13, r8 ; 9c5c: 19 6d 02 00 addc 2(r13), r9 ; 9c60: 8e 48 00 00 mov r8, 0(r14) ; 9c64: 8e 49 02 00 mov r9, 2(r14) ; 00009c68 <.Loc.414.1>: 9c68: 9e 4d 04 00 mov 4(r13), 4(r14) ; 9c6c: 04 00 00009c6e <.L20>: 9c6e: 8f 4e 04 00 mov r14, 4(r15) ; 00009c72 <.Loc.424.1>: 9c72: ba 3f jmp $-138 ;abs 0x9be8 00009c74 <.L14>: 9c74: 8e 4d 04 00 mov r13, 4(r14) ; 9c78: fa 3f jmp $-10 ;abs 0x9c6e 00009c7a <_malloc_r>: 9c7a: 0a 12 push r10 ; 00009c7c <.LCFI0>: 9c7c: 09 12 push r9 ; 00009c7e <.LCFI1>: 9c7e: 08 12 push r8 ; 00009c80 <.LCFI2>: 9c80: 07 12 push r7 ; 00009c82 <.LCFI3>: 9c82: 08 4c mov r12, r8 ; 00009c84 : 9c84: 09 4d mov r13, r9 ; 9c86: 19 53 inc r9 ; 00009c88 <.Loc.247.1>: 9c88: 19 c3 bic #1, r9 ;r3 As==01 00009c8a <.LVL1>: 9c8a: 39 50 0a 00 add #10, r9 ;#0x000a 00009c8e <.LVL2>: 9c8e: 39 90 0c 00 cmp #12, r9 ;#0x000c 9c92: 02 2c jc $+6 ;abs 0x9c98 9c94: 79 40 0c 00 mov.b #12, r9 ;#0x000c 00009c98 <.L2>: 9c98: 09 9d cmp r13, r9 ; 9c9a: 06 2c jc $+14 ;abs 0x9ca8 00009c9c <.L13>: 9c9c: b8 40 0c 00 mov #12, 0(r8) ;#0x000c 9ca0: 00 00 00009ca2 <.Loc.255.1>: 9ca2: 4c 43 clr.b r12 ; 00009ca4 <.L1>: 9ca4: 30 40 0c 90 br #0x900c ; 00009ca8 <.L3>: 9ca8: 1c 42 d8 02 mov &0x02d8,r12 ;0x02d8 00009cac <.LVL6>: 9cac: 0a 4c mov r12, r10 ; 00009cae <.L5>: 9cae: 0a 93 cmp #0, r10 ;r3 As==00 9cb0: 1b 20 jnz $+56 ;abs 0x9ce8 00009cb2 <.LBB5>: 9cb2: 37 40 ba 9d mov #-25158,r7 ;#0x9dba 00009cb6 <.Loc.214.1>: 9cb6: 82 93 d6 02 cmp #0, &0x02d6 ;r3 As==00 9cba: 05 20 jnz $+12 ;abs 0x9cc6 00009cbc <.Loc.214.1>: 9cbc: 0d 4a mov r10, r13 ; 9cbe: 0c 48 mov r8, r12 ; 00009cc0 <.LVL9>: 9cc0: 87 12 call r7 ; 00009cc2 <.LVL10>: 9cc2: 82 4c d6 02 mov r12, &0x02d6 ; 00009cc6 <.L17>: 9cc6: 0d 49 mov r9, r13 ; 9cc8: 0c 48 mov r8, r12 ; 9cca: 87 12 call r7 ; 00009ccc <.LVL11>: 9ccc: 3c 93 cmp #-1, r12 ;r3 As==11 9cce: e6 27 jz $-50 ;abs 0x9c9c 00009cd0 <.Loc.222.1>: 9cd0: 0a 4c mov r12, r10 ; 9cd2: 1a 53 inc r10 ; 9cd4: 1a c3 bic #1, r10 ;r3 As==01 00009cd6 <.LVL12>: 9cd6: 0c 9a cmp r10, r12 ; 9cd8: 19 24 jz $+52 ;abs 0x9d0c 00009cda <.Loc.227.1>: 9cda: 0d 4a mov r10, r13 ; 9cdc: 0d 8c sub r12, r13 ; 9cde: 0c 48 mov r8, r12 ; 00009ce0 <.LVL13>: 9ce0: 87 12 call r7 ; 00009ce2 <.LVL14>: 9ce2: 3c 93 cmp #-1, r12 ;r3 As==11 9ce4: 13 20 jnz $+40 ;abs 0x9d0c 9ce6: da 3f jmp $-74 ;abs 0x9c9c 00009ce8 <.L10>: 9ce8: 2d 4a mov @r10, r13 ; 9cea: 0d 89 sub r9, r13 ; 00009cec <.LVL16>: 9cec: 0d 93 cmp #0, r13 ;r3 As==00 9cee: 35 38 jl $+108 ;abs 0x9d5a 00009cf0 <.Loc.268.1>: 9cf0: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 9cf4: 0e 9d cmp r13, r14 ; 9cf6: 11 2c jc $+36 ;abs 0x9d1a 00009cf8 <.Loc.272.1>: 9cf8: 0e 4d mov r13, r14 ; 9cfa: 3e b0 00 80 bit #-32768,r14 ;#0x8000 9cfe: 0f 7f subc r15, r15 ; 9d00: 3f e3 inv r15 ; 9d02: 8a 4e 00 00 mov r14, 0(r10) ; 9d06: 8a 4f 02 00 mov r15, 2(r10) ; 00009d0a <.Loc.273.1>: 9d0a: 0a 5d add r13, r10 ; 00009d0c <.L14>: 9d0c: 0c 49 mov r9, r12 ; 9d0e: 0d 43 clr r13 ; 9d10: 8a 4c 00 00 mov r12, 0(r10) ; 9d14: 8a 4d 02 00 mov r13, 2(r10) ; 9d18: 06 3c jmp $+14 ;abs 0x9d26 00009d1a <.L7>: 9d1a: 1d 4a 04 00 mov 4(r10), r13 ; 00009d1e <.LVL19>: 9d1e: 0c 9a cmp r10, r12 ; 9d20: 19 20 jnz $+52 ;abs 0x9d54 00009d22 <.Loc.282.1>: 9d22: 82 4d d8 02 mov r13, &0x02d8 ; 00009d26 <.L8>: 9d26: 0d 4a mov r10, r13 ; 9d28: 2d 52 add #4, r13 ;r2 As==10 00009d2a <.LVL21>: 9d2a: 0c 4a mov r10, r12 ; 9d2c: 3c 50 0b 00 add #11, r12 ;#0x000b 9d30: 3c f0 f8 ff and #-8, r12 ;#0xfff8 00009d34 <.LVL22>: 9d34: 0e 4c mov r12, r14 ; 9d36: 0e 8d sub r13, r14 ; 00009d38 <.LVL23>: 9d38: 0c 9d cmp r13, r12 ; 9d3a: b4 27 jz $-150 ;abs 0x9ca4 00009d3c <.Loc.318.1>: 9d3c: 0a 5e add r14, r10 ; 00009d3e <.LVL24>: 9d3e: 0d 8c sub r12, r13 ; 00009d40 <.LVL25>: 9d40: 0e 4d mov r13, r14 ; 9d42: 3e b0 00 80 bit #-32768,r14 ;#0x8000 9d46: 0f 7f subc r15, r15 ; 9d48: 3f e3 inv r15 ; 00009d4a <.LVL26>: 9d4a: 8a 4e 00 00 mov r14, 0(r10) ; 9d4e: 8a 4f 02 00 mov r15, 2(r10) ; 9d52: a8 3f jmp $-174 ;abs 0x9ca4 00009d54 <.L9>: 9d54: 8c 4d 04 00 mov r13, 4(r12) ; 9d58: e6 3f jmp $-50 ;abs 0x9d26 00009d5a <.L6>: 9d5a: 0c 4a mov r10, r12 ; 9d5c: 1a 4a 04 00 mov 4(r10), r10 ; 00009d60 <.LVL29>: 9d60: a6 3f jmp $-178 ;abs 0x9cae 00009d62 <_realloc_r>: 9d62: 0a 12 push r10 ; 00009d64 <.LCFI0>: 9d64: 09 12 push r9 ; 00009d66 <.LCFI1>: 9d66: 08 12 push r8 ; 00009d68 <.LCFI2>: 9d68: 07 12 push r7 ; 00009d6a <.LCFI3>: 9d6a: 07 4c mov r12, r7 ; 00009d6c : 9d6c: 08 4d mov r13, r8 ; 9d6e: 09 4e mov r14, r9 ; 00009d70 <.Loc.451.1>: 9d70: 0d 93 cmp #0, r13 ;r3 As==00 9d72: 07 20 jnz $+16 ;abs 0x9d82 00009d74 <.Loc.454.1>: 9d74: 0d 4e mov r14, r13 ; 00009d76 <.LVL1>: 9d76: b0 12 7a 9c call #-25478 ;#0x9c7a 00009d7a <.LVL2>: 9d7a: 0a 4c mov r12, r10 ; 00009d7c <.L1>: 9d7c: 0c 4a mov r10, r12 ; 9d7e: 30 40 0c 90 br #0x900c ; 00009d82 <.L2>: 9d82: 0e 93 cmp #0, r14 ;r3 As==00 9d84: 04 20 jnz $+10 ;abs 0x9d8e 00009d86 <.Loc.458.1>: 9d86: b0 12 8e 9b call #-25714 ;#0x9b8e 00009d8a <.LVL3>: 9d8a: 0a 49 mov r9, r10 ; 9d8c: f7 3f jmp $-16 ;abs 0x9d7c 00009d8e <.L4>: 9d8e: b0 12 dc 9d call #-25124 ;#0x9ddc 00009d92 <.LVL4>: 9d92: 0c 99 cmp r9, r12 ; 9d94: 10 2c jc $+34 ;abs 0x9db6 00009d96 <.Loc.467.1>: 9d96: 0d 49 mov r9, r13 ; 9d98: 0c 47 mov r7, r12 ; 9d9a: b0 12 7a 9c call #-25478 ;#0x9c7a 00009d9e <.LVL5>: 9d9e: 0a 4c mov r12, r10 ; 00009da0 <.LVL6>: 9da0: 0c 93 cmp #0, r12 ;r3 As==00 9da2: ec 27 jz $-38 ;abs 0x9d7c 00009da4 <.Loc.470.1>: 9da4: 0e 49 mov r9, r14 ; 9da6: 0d 48 mov r8, r13 ; 9da8: b0 12 62 90 call #-28574 ;#0x9062 00009dac <.LVL7>: 9dac: 0d 48 mov r8, r13 ; 9dae: 0c 47 mov r7, r12 ; 9db0: b0 12 8e 9b call #-25714 ;#0x9b8e 00009db4 <.LVL8>: 9db4: e3 3f jmp $-56 ;abs 0x9d7c 00009db6 <.L5>: 9db6: 0a 48 mov r8, r10 ; 9db8: e1 3f jmp $-60 ;abs 0x9d7c 00009dba <_sbrk_r>: 9dba: 0a 12 push r10 ; 00009dbc <.LCFI0>: 9dbc: 0a 4c mov r12, r10 ; 9dbe: 0c 4d mov r13, r12 ; 00009dc0 : 9dc0: 82 43 da 02 mov #0, &0x02da ;r3 As==00 00009dc4 <.Loc.58.1>: 9dc4: b0 12 f0 9d call #-25104 ;#0x9df0 00009dc8 <.LVL2>: 9dc8: 3c 93 cmp #-1, r12 ;r3 As==11 9dca: 06 20 jnz $+14 ;abs 0x9dd8 00009dcc <.Loc.58.1>: 9dcc: 1d 42 da 02 mov &0x02da,r13 ;0x02da 00009dd0 <.Loc.58.1>: 9dd0: 0d 93 cmp #0, r13 ;r3 As==00 9dd2: 02 24 jz $+6 ;abs 0x9dd8 00009dd4 <.Loc.59.1>: 9dd4: 8a 4d 00 00 mov r13, 0(r10) ; 00009dd8 <.L1>: 9dd8: 3a 41 pop r10 ; 00009dda <.LCFI1>: 9dda: 30 41 ret 00009ddc <_malloc_usable_size_r>: 9ddc: 1e 4d fc ff mov -4(r13),r14 ; 00009de0 <.Loc.530.1>: 9de0: 0c 4e mov r14, r12 ; 00009de2 <.LVL3>: 9de2: 3c 50 fc ff add #-4, r12 ;#0xfffc 00009de6 <.Loc.530.1>: 9de6: 0e 93 cmp #0, r14 ;r3 As==00 9de8: 02 34 jge $+6 ;abs 0x9dee 00009dea <.LVL4>: 9dea: 0d 5c add r12, r13 ; 00009dec <.LVL5>: 9dec: 2c 5d add @r13, r12 ; 00009dee <.L1>: 9dee: 30 41 ret 00009df0 <_sbrk>: 9df0: 21 83 decd r1 ; 00009df2 <.LCFI0>: 9df2: 0d 4c mov r12, r13 ; 00009df4 <.Loc.17.1>: 9df4: 1c 42 7c 02 mov &0x027c,r12 ;0x027c 00009df8 <.LVL1>: 9df8: 4e 43 clr.b r14 ; 9dfa: 0e 51 add r1, r14 ; 9dfc: 81 4e 00 00 mov r14, 0(r1) ; 00009e00 <.Loc.22.1>: 9e00: 0d 5c add r12, r13 ; 00009e02 <.LVL2>: 9e02: 0e 41 mov r1, r14 ; 9e04: 0e 9d cmp r13, r14 ; 9e06: 09 2c jc $+20 ;abs 0x9e1a 00009e08 <.LBB7>: 9e08: 7e 40 1a 00 mov.b #26, r14 ;#0x001a 9e0c: 3d 40 11 82 mov #-32239,r13 ;#0x8211 9e10: 5c 43 mov.b #1, r12 ;r3 As==01 00009e12 <.LVL4>: 9e12: b0 12 22 9e call #-25054 ;#0x9e22 00009e16 <.LVL5>: 9e16: b0 12 ee 9e call #-24850 ;#0x9eee 00009e1a <.L2>: 9e1a: 82 4d 7c 02 mov r13, &0x027c ; 00009e1e <.Loc.30.1>: 9e1e: 21 53 incd r1 ; 00009e20 <.LCFI1>: 9e20: 30 41 ret 00009e22 : 9e22: 0a 12 push r10 ; 00009e24 <.LCFI0>: 9e24: 09 12 push r9 ; 00009e26 <.LCFI1>: 9e26: 08 12 push r8 ; 00009e28 <.LCFI2>: 9e28: 07 12 push r7 ; 00009e2a <.LCFI3>: 9e2a: 06 12 push r6 ; 00009e2c <.LCFI4>: 9e2c: 05 12 push r5 ; 00009e2e <.LCFI5>: 9e2e: 04 12 push r4 ; 00009e30 <.LCFI6>: 9e30: 21 83 decd r1 ; 00009e32 <.LCFI7>: 9e32: 06 4c mov r12, r6 ; 9e34: 81 4d 00 00 mov r13, 0(r1) ; 9e38: 0a 4e mov r14, r10 ; 00009e3a <.LBB5>: 9e3a: 7d 42 mov.b #8, r13 ;r2 As==11 00009e3c <.LVL2>: 9e3c: b0 12 94 9f call #-24684 ;#0x9f94 00009e40 <.LVL3>: 9e40: 47 4c mov.b r12, r7 ; 00009e42 <.LBE5>: 9e42: 45 43 clr.b r5 ; 00009e44 <.LBB10>: 9e44: 39 40 7e 02 mov #638, r9 ;#0x027e 00009e48 <.Loc.28.1>: 9e48: 04 49 mov r9, r4 ; 9e4a: 34 50 0b 00 add #11, r4 ;#0x000b 00009e4e <.L2>: 9e4e: 4c 43 clr.b r12 ; 9e50: 0c 9a cmp r10, r12 ; 9e52: 04 38 jl $+10 ;abs 0x9e5c 00009e54 <.Loc.60.1>: 9e54: 0c 45 mov r5, r12 ; 9e56: 21 53 incd r1 ; 00009e58 <.LCFI8>: 9e58: 30 40 06 90 br #0x9006 ; 00009e5c <.L4>: 9e5c: 08 4a mov r10, r8 ; 9e5e: 7c 40 40 00 mov.b #64, r12 ;#0x0040 9e62: 0c 9a cmp r10, r12 ; 9e64: 01 34 jge $+4 ;abs 0x9e68 00009e66 <.LVL7>: 9e66: 08 4c mov r12, r8 ; 00009e68 <.L3>: 9e68: 4c 48 mov.b r8, r12 ; 9e6a: c9 4c 00 00 mov.b r12, 0(r9) ; 00009e6e <.Loc.22.1>: 9e6e: c2 43 7f 02 mov.b #0, &0x027f ;r3 As==00 00009e72 <.Loc.23.1>: 9e72: f2 40 f3 ff mov.b #-13, &0x0280 ;#0xfff3 9e76: 80 02 00009e78 <.Loc.24.1>: 9e78: c9 46 03 00 mov.b r6, 3(r9) ; 00009e7c <.Loc.25.1>: 9e7c: c9 47 04 00 mov.b r7, 4(r9) ; 00009e80 <.Loc.26.1>: 9e80: c9 4c 05 00 mov.b r12, 5(r9) ; 00009e84 <.Loc.27.1>: 9e84: c2 43 84 02 mov.b #0, &0x0284 ;r3 As==00 00009e88 <.Loc.28.1>: 9e88: 0e 48 mov r8, r14 ; 9e8a: 2d 41 mov @r1, r13 ; 9e8c: 0d 55 add r5, r13 ; 00009e8e <.LVL9>: 9e8e: 0c 44 mov r4, r12 ; 9e90: b0 12 62 90 call #-28574 ;#0x9062 00009e94 <.LVL10>: 9e94: b0 12 9e 9e call #-24930 ;#0x9e9e 00009e98 <.LBE11>: 9e98: 05 58 add r8, r5 ; 00009e9a <.LVL12>: 9e9a: 0a 88 sub r8, r10 ; 00009e9c <.LVL13>: 9e9c: d8 3f jmp $-78 ;abs 0x9e4e 00009e9e : 9e9e: 03 43 nop 00009ea0 : 9ea0: 30 41 ret 00009ea2 <__mspabi_mpyl>: 9ea2: 0a 12 push r10 ; 00009ea4 <.LCFI0>: 9ea4: 09 12 push r9 ; 00009ea6 <.LCFI1>: 9ea6: 08 12 push r8 ; 00009ea8 <.LCFI2>: 9ea8: 07 12 push r7 ; 00009eaa <.LCFI3>: 9eaa: 06 12 push r6 ; 00009eac <.LCFI4>: 9eac: 0a 4c mov r12, r10 ; 9eae: 0b 4d mov r13, r11 ; 00009eb0 <.LVL1>: 9eb0: 78 40 21 00 mov.b #33, r8 ;#0x0021 00009eb4 <.Loc.30.1>: 9eb4: 4c 43 clr.b r12 ; 00009eb6 <.LVL2>: 9eb6: 4d 43 clr.b r13 ; 00009eb8 <.L2>: 9eb8: 09 4e mov r14, r9 ; 9eba: 09 df bis r15, r9 ; 9ebc: 09 93 cmp #0, r9 ;r3 As==00 9ebe: 05 24 jz $+12 ;abs 0x9eca 9ec0: 49 48 mov.b r8, r9 ; 9ec2: 79 53 add.b #-1, r9 ;r3 As==11 9ec4: 48 49 mov.b r9, r8 ; 00009ec6 <.LVL4>: 9ec6: 49 93 cmp.b #0, r9 ;r3 As==00 9ec8: 02 20 jnz $+6 ;abs 0x9ece 00009eca <.L1>: 9eca: 30 40 0a 90 br #0x900a ; 00009ece <.L6>: 9ece: 09 4e mov r14, r9 ; 9ed0: 59 f3 and.b #1, r9 ;r3 As==01 00009ed2 <.Loc.36.1>: 9ed2: 09 93 cmp #0, r9 ;r3 As==00 9ed4: 02 24 jz $+6 ;abs 0x9eda 00009ed6 <.Loc.37.1>: 9ed6: 0c 5a add r10, r12 ; 00009ed8 <.LVL5>: 9ed8: 0d 6b addc r11, r13 ; 00009eda <.L3>: 9eda: 06 4a mov r10, r6 ; 9edc: 07 4b mov r11, r7 ; 9ede: 06 5a add r10, r6 ; 9ee0: 07 6b addc r11, r7 ; 9ee2: 0a 46 mov r6, r10 ; 00009ee4 <.LVL7>: 9ee4: 0b 47 mov r7, r11 ; 00009ee6 <.LVL8>: 9ee6: 12 c3 clrc 9ee8: 0f 10 rrc r15 ; 9eea: 0e 10 rrc r14 ; 00009eec <.LVL9>: 9eec: e5 3f jmp $-52 ;abs 0x9eb8 00009eee : 9eee: 00009ef0 : 9ef0: 06 00 mova @r0, r6 ; 9ef2: b0 12 5a 9f call #-24742 ;#0x9f5a 00009ef6 <.LVL0>: 9ef6: 5c 43 mov.b #1, r12 ;r3 As==01 9ef8: b0 12 ae 9f call #-24658 ;#0x9fae 00009efc <_raise_r>: 9efc: 0a 12 push r10 ; 00009efe <.LCFI7>: 9efe: 09 12 push r9 ; 00009f00 <.LCFI8>: 9f00: 09 4c mov r12, r9 ; 9f02: 0a 4d mov r13, r10 ; 00009f04 <.Loc.149.1>: 9f04: 7c 40 1f 00 mov.b #31, r12 ;#0x001f 00009f08 <.LVL16>: 9f08: 0c 9d cmp r13, r12 ; 9f0a: 06 2c jc $+14 ;abs 0x9f18 00009f0c <.Loc.153.1>: 9f0c: b9 40 16 00 mov #22, 0(r9) ;#0x0016 9f10: 00 00 00009f12 <.Loc.154.1>: 9f12: 3c 43 mov #-1, r12 ;r3 As==11 00009f14 <.L16>: 9f14: 30 40 10 90 br #0x9010 ; 00009f18 <.L17>: 9f18: 1c 49 22 00 mov 34(r9), r12 ;0x00022 00009f1c <.Loc.157.1>: 9f1c: 0c 93 cmp #0, r12 ;r3 As==00 9f1e: 05 24 jz $+12 ;abs 0x9f2a 00009f20 <.Loc.160.1>: 9f20: 0d 5d rla r13 ; 9f22: 0c 5d add r13, r12 ; 00009f24 <.Loc.160.1>: 9f24: 2d 4c mov @r12, r13 ; 00009f26 <.LVL18>: 9f26: 0d 93 cmp #0, r13 ;r3 As==00 9f28: 09 20 jnz $+20 ;abs 0x9f3c 00009f2a <.L19>: 9f2a: 0c 49 mov r9, r12 ; 9f2c: b0 12 8a 9f call #-24694 ;#0x9f8a 00009f30 <.LVL20>: 9f30: 0e 4a mov r10, r14 ; 9f32: 0d 4c mov r12, r13 ; 9f34: 0c 49 mov r9, r12 ; 9f36: b0 12 66 9f call #-24730 ;#0x9f66 00009f3a <.LVL21>: 9f3a: ec 3f jmp $-38 ;abs 0x9f14 00009f3c <.L20>: 9f3c: 1d 93 cmp #1, r13 ;r3 As==01 9f3e: 0b 24 jz $+24 ;abs 0x9f56 00009f40 <.Loc.166.1>: 9f40: 3d 93 cmp #-1, r13 ;r3 As==11 9f42: 05 20 jnz $+12 ;abs 0x9f4e 00009f44 <.Loc.168.1>: 9f44: b9 40 16 00 mov #22, 0(r9) ;#0x0016 9f48: 00 00 00009f4a <.Loc.169.1>: 9f4a: 5c 43 mov.b #1, r12 ;r3 As==01 9f4c: e3 3f jmp $-56 ;abs 0x9f14 00009f4e <.L21>: 9f4e: 8c 43 00 00 mov #0, 0(r12) ;r3 As==00 00009f52 <.Loc.174.1>: 9f52: 0c 4a mov r10, r12 ; 9f54: 8d 12 call r13 ; 00009f56 <.L22>: 9f56: 4c 43 clr.b r12 ; 9f58: dd 3f jmp $-68 ;abs 0x9f14 00009f5a : 9f5a: 0d 4c mov r12, r13 ; 9f5c: 1c 42 02 02 mov &0x0202,r12 ;0x0202 00009f60 : 9f60: b0 12 fc 9e call #-24836 ;#0x9efc 00009f64 <.LVL35>: 9f64: 30 41 ret 00009f66 <_kill_r>: 9f66: 0a 12 push r10 ; 00009f68 <.LCFI0>: 9f68: 0a 4c mov r12, r10 ; 9f6a: 0c 4d mov r13, r12 ; 00009f6c <.LVL1>: 9f6c: 0d 4e mov r14, r13 ; 00009f6e <.LVL2>: 9f6e: 82 43 da 02 mov #0, &0x02da ;r3 As==00 00009f72 <.Loc.61.1>: 9f72: b0 12 a0 9f call #-24672 ;#0x9fa0 00009f76 <.LVL3>: 9f76: 3c 93 cmp #-1, r12 ;r3 As==11 9f78: 06 20 jnz $+14 ;abs 0x9f86 00009f7a <.Loc.61.1>: 9f7a: 1d 42 da 02 mov &0x02da,r13 ;0x02da 00009f7e <.Loc.61.1>: 9f7e: 0d 93 cmp #0, r13 ;r3 As==00 9f80: 02 24 jz $+6 ;abs 0x9f86 00009f82 <.Loc.62.1>: 9f82: 8a 4d 00 00 mov r13, 0(r10) ; 00009f86 <.L1>: 9f86: 3a 41 pop r10 ; 00009f88 <.LCFI1>: 9f88: 30 41 ret 00009f8a <_getpid_r>: 9f8a: b0 12 9a 9f call #-24678 ;#0x9f9a 00009f8e <.LVL6>: 9f8e: 30 41 ret 00009f90 : 9f90: 3d 53 add #-1, r13 ;r3 As==11 9f92: 0c 11 rra r12 ; 00009f94 <__mspabi_srai>: 9f94: 0d 93 cmp #0, r13 ;r3 As==00 9f96: fc 23 jnz $-6 ;abs 0x9f90 9f98: 30 41 ret 00009f9a : 9f9a: 3c 40 2a 00 mov #42, r12 ;#0x002a 00009f9e <.Loc.57.1>: 9f9e: 30 41 ret 00009fa0 : 9fa0: b0 12 b0 9f call #-24656 ;#0x9fb0 9fa4: bc 40 58 00 mov #88, 0(r12) ;#0x0058 9fa8: 00 00 9faa: 3c 43 mov #-1, r12 ;r3 As==11 9fac: 30 41 ret 00009fae <_exit>: 9fae: ff 3f jmp $+0 ;abs 0x9fae 00009fb0 <__errno>: 9fb0: 00009fb2 : 9fb2: 02 02 mova @r2, r2 ; 9fb4: 30 41 ret