rf_mon.elf: file format elf32-msp430 SYMBOL TABLE: 00008000 l d .text 00000000 .text 000097b8 l d .rodata 00000000 .rodata 00000200 l d .bss 00000000 .bss 0000020e l d .noinit 00000000 .noinit 0000ffe0 l d .vectors 00000000 .vectors 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 00008464 l .text 00000000 __br_unexpected_ 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 strchr.c 00000000 l df *ABS* 00000000 memcmp.c 00000000 l df *ABS* 00000000 memcpy.c 00000000 l df *ABS* 00000000 memset.c 00000000 l df *ABS* 00000000 strstr.c 00000000 l df *ABS* 00000000 atoi.c 00000000 l df *ABS* 00000000 sprintf.c 00008dac l F .text 00000022 append 00000202 l O .bss 00000002 available_ 00000200 l O .bss 00000002 destination_ 00008dce l F .text 0000003c call_vuprintf 00000000 l df *ABS* 00000000 vuprintf.c 00008e68 l F .text 00000198 print_field 00000000 l df *ABS* 00000000 strncmp.c 00000057 g *ABS* 00000000 __BCSCTL1 00000174 g *ABS* 00000000 __TACCR1 00000000 g *ABS* 00000000 __data_size 00008464 w .text 00000000 __isr_14 00000128 g *ABS* 00000000 __FCTL1 000089b4 g F .text 0000005e CCXX_SPI_RDREG 00000024 g *ABS* 00000000 __P1IES 0000004b g *ABS* 00000000 __ADC10AE1 00000069 g *ABS* 00000000 __UCB0CTL1 00008e40 g F .text 00000016 vsprintf 00008464 w .text 00000000 __isr_4 00000002 g *ABS* 00000000 __IFG1 00000060 g *ABS* 00000000 __UCA0CTL0 0000865a g F .text 00000020 init_UART_SPI 0000012e g *ABS* 00000000 __TAIV 00008e26 g F .text 0000001a snprintf 00000000 g .vectors 00000000 _efartext 00008ad4 g F .text 00000000 __udivhi3 00000001 g *ABS* 00000000 __IE2 0000002b g *ABS* 00000000 __P2IFG 0000001a g *ABS* 00000000 __P3DIR 0000988c g *ABS* 00000000 _etext 00000190 g *ABS* 00000000 __TBR 000010f8 g *ABS* 00000000 __CALDCO_16MHZ 0000001d g *ABS* 00000000 __P4OUT 00008608 g F .text 00000012 sample_adc 0000000e g *ABS* 00000000 __bss_size 000010fd g *ABS* 00000000 __CALBC1_8MHZ 00008000 w .text 00000000 __watchdog_support 0000845e w .text 00000000 __stop_progExec__ 00008b68 g F .text 000000fa memcpy 0000002d g *ABS* 00000000 __P2IE 0000859e g F .text 00000058 sys_init 00000192 g *ABS* 00000000 __TBCCR0 00008464 w .text 00000000 __isr_11 00000186 g *ABS* 00000000 __TBCCTL2 00008af6 g F .text 00000000 __udivsi3 00000025 g *ABS* 00000000 __P1IE 0000006b g *ABS* 00000000 __UCB0BR1 000084e6 g F .text 0000008a tinit 00008e56 g F .text 00000012 vsnprintf 00000049 g *ABS* 00000000 __ADC10DTC1 00000066 g *ABS* 00000000 __UCA0RXBUF 00000061 g *ABS* 00000000 __UCA0CTL1 00009778 g .text 00000000 __udivmoddi4 00008468 g F .text 00000024 P2_VEC 0000897c g F .text 00000038 CCXX_SPI_STROBE 00000182 g *ABS* 00000000 __TBCCTL0 0000006d g *ABS* 00000000 __UCB0STAT 000084d8 g .text 00000000 __isr_5 00000063 g *ABS* 00000000 __UCA0BR1 0000974a g F .text 00000000 __umoddi3 0000988c g *ABS* 00000000 __data_load_start 00008464 g .text 00000000 __dtors_end 00000053 g *ABS* 00000000 __BCSCTL3 000001bc g *ABS* 00000000 __ADC10SA 00000166 g *ABS* 00000000 __TACCTL2 00008a12 g F .text 0000004e CCXX_SPI_WRREG 00009724 g F .text 00000000 __udivdi3 00000065 g *ABS* 00000000 __UCA0STAT 00008464 w .text 00000000 __isr_2 0000867a g F .text 0000019e CCXX_WRITE_SPI_RF_SETTINGS 00000160 g *ABS* 00000000 __TACTL 0000012c g *ABS* 00000000 __FCTL3 00008464 w .text 00000000 __isr_10 0000002e g *ABS* 00000000 __P2SEL 00000180 g *ABS* 00000000 __TBCTL 000010f9 g *ABS* 00000000 __CALBC1_16MHZ 000000c3 g *ABS* 00000000 __OA1CTL1 00000023 g *ABS* 00000000 __P1IFG 000010fb g *ABS* 00000000 __CALBC1_12MHZ 00008a60 g F .text 00000074 CCXX_SPI_BURST_WRREG 00000204 g O .bss 00000001 RSSI_DBM 0000004a g *ABS* 00000000 __ADC10AE0 0000011a g *ABS* 00000000 __UCB0I2CSA 00000172 g *ABS* 00000000 __TACCR0 00000056 g *ABS* 00000000 __DCOCTL 00000003 g *ABS* 00000000 __IFG2 0000020e g O .noinit 00000002 __wdt_clear_value 0000001b g *ABS* 00000000 __P3SEL 000084bc g .text 00000000 __isr_7 0000ffe0 g O .vectors 00000020 __ivtbl_16 0000006c g *ABS* 00000000 __UCB0I2CIE 0000006a g *ABS* 00000000 __UCB0BR0 00008b2c g F .text 00000000 __umodsi3 00000028 g *ABS* 00000000 __P2IN 00000118 g *ABS* 00000000 __UCB0I2COA 00000184 g *ABS* 00000000 __TBCCTL1 000001b4 g *ABS* 00000000 __ADC10MEM 00008aee g F .text 00000000 __umodhi3 00008464 w .text 00000000 __isr_0 00000205 g O .bss 00000001 RSSI 00000029 g *ABS* 00000000 __P2OUT 0000012a g *ABS* 00000000 __FCTL2 00000064 g *ABS* 00000000 __UCA0MCTL 00008028 w .text 00000000 __do_clear_bss 00000021 g *ABS* 00000000 __P1OUT 0000002c g *ABS* 00000000 __P2IES 00000026 g *ABS* 00000000 __P1SEL 00008ccc g F .text 00000056 strstr 0000848c g F .text 00000030 TA1_VEC 00008638 g F .text 00000022 init_UART_232 0000969e g F .text 00000028 strncmp 00008af6 g .text 00000000 __ext_udivmod32 00000027 g *ABS* 00000000 __P1REN 000000c0 g *ABS* 00000000 __OA0CTL0 000097b6 w .text 00000000 _unexpected_ 0000848c g .text 00000000 __isr_8 00008468 g .text 00000000 __isr_3 00009000 g F .text 0000069e vuprintf 00008b48 g F .text 00000020 memcmp 000085f6 g F .text 00000012 init_adc 000010fc g *ABS* 00000000 __CALDCO_8MHZ 00008ad4 g .text 00000000 __ext_udivmod16 00008000 w .text 00000000 _reset_vector__ 00008464 g .text 00000000 __ctors_start 000096c6 g .text 00000000 __xabi_udivmod64 00008464 w .text 00000000 __isr_12 000010fa g *ABS* 00000000 __CALDCO_12MHZ 00000018 g *ABS* 00000000 __P3IN 00008010 w .text 00000000 __do_copy_data 000084d8 g F .text 0000000e ADC_VEC 00000200 g .bss 00000000 __bss_start 00008c62 g F .text 0000006a memset 0000803e g F .text 00000420 main 00000176 g *ABS* 00000000 __TACCR2 000000c2 g *ABS* 00000000 __OA1CTL0 00008464 w .text 00000000 __isr_13 00000170 g *ABS* 00000000 __TAR 0000001e g *ABS* 00000000 __P4DIR 00000206 g O .bss 00000002 seconds 00000162 g *ABS* 00000000 __TACCTL0 00010000 g .vectors 00000000 _vectors_end 0000002a g *ABS* 00000000 __P2DIR 00008570 g F .text 0000002e delay 00000068 g *ABS* 00000000 __UCB0CTL0 00008930 g F .text 0000004c TX_STRING 0000002f g *ABS* 00000000 __P2REN 00008e0a g F .text 0000001c sprintf 00000208 g O .bss 00000001 LQI 000084bc g F .text 0000001c RX_VEC 0000006e g *ABS* 00000000 __UCB0RXBUF 000001b0 g *ABS* 00000000 __ADC10CTL0 00008464 w .text 00000000 __isr_9 0000005e g *ABS* 00000000 __UCA0IRTCTL 00008842 g F .text 000000ee RX_STRING 000010fe g *ABS* 00000000 __CALDCO_1MHZ 00000067 g *ABS* 00000000 __UCA0TXBUF 0000800c w .text 00000000 __init_stack 0000005d g *ABS* 00000000 __UCA0ABCTL 00000019 g *ABS* 00000000 __P3OUT 000000c1 g *ABS* 00000000 __OA0CTL1 00000209 g O .bss 00000001 PKTSTATUS 00008464 g .text 00000000 __dtors_start 00008464 w .text 00000000 __isr_6 00008464 g .text 00000000 __ctors_end 00000062 g *ABS* 00000000 __UCA0BR0 00000600 g *ABS* 00000000 __stack 00008464 w .text 00000000 __isr_1 00000200 g .rodata 00000000 _edata 00000210 g *ABS* 00000000 _end 00000194 g *ABS* 00000000 __TBCCR1 00000048 g *ABS* 00000000 __ADC10DTC0 0000011e g *ABS* 00000000 __TBIV 000001b2 g *ABS* 00000000 __ADC10CTL1 0000020a g O .bss 00000002 flags 00000058 g *ABS* 00000000 __BCSCTL2 0000845e w .text 00000000 _endless_loop__ 0000001f g *ABS* 00000000 __P4SEL 00000196 g *ABS* 00000000 __TBCCR2 00008d22 g F .text 0000008a atoi 00000022 g *ABS* 00000000 __P1DIR 00008818 g F .text 0000002a RX_MODE 0000005f g *ABS* 00000000 __UCA0IRRCTL 00000010 g *ABS* 00000000 __P3REN 00000164 g *ABS* 00000000 __TACCTL1 0000006f g *ABS* 00000000 __UCB0TXBUF 000010ff g *ABS* 00000000 __CALBC1_1MHZ 00008010 w .text 00000000 __low_level_init 00008b36 g F .text 00000012 strchr 00000011 g *ABS* 00000000 __P4REN 00000200 g .rodata 00000000 __data_start 00000120 g *ABS* 00000000 __WDTCTL 00000000 g *ABS* 00000000 __IE1 00000020 g *ABS* 00000000 __P1IN 0000001c g *ABS* 00000000 __P4IN 0000020c g O .bss 00000001 status 0000020d g O .bss 00000001 rx_char 0000861a g F .text 0000001e TX232String Disassembly of section .text: 00008000 <__watchdog_support>: 8000: 55 42 20 01 mov.b &0x0120,r5 8004: 35 d0 08 5a bis #23048, r5 ;#0x5a08 8008: 82 45 0e 02 mov r5, &0x020e 0000800c <__init_stack>: 800c: 31 40 00 06 mov #1536, r1 ;#0x0600 00008010 <__do_copy_data>: 8010: 3f 40 00 00 mov #0, r15 ;#0x0000 8014: 0f 93 tst r15 8016: 08 24 jz $+18 ;abs 0x8028 8018: 92 42 0e 02 mov &0x020e,&0x0120 801c: 20 01 801e: 2f 83 decd r15 8020: 9f 4f 8c 98 mov -26484(r15),512(r15);0x988c(r15), 0x0200(r15) 8024: 00 02 8026: f8 23 jnz $-14 ;abs 0x8018 00008028 <__do_clear_bss>: 8028: 3f 40 0e 00 mov #14, r15 ;#0x000e 802c: 0f 93 tst r15 802e: 07 24 jz $+16 ;abs 0x803e 8030: 92 42 0e 02 mov &0x020e,&0x0120 8034: 20 01 8036: 1f 83 dec r15 8038: cf 43 00 02 mov.b #0, 512(r15);r3 As==00, 0x0200(r15) 803c: f9 23 jnz $-12 ;abs 0x8030 0000803e
: /** Main function. */ int main(void) { 803e: 31 50 28 ff add #-216, r1 ;#0xff28 int loop=0,interval=120; //programmable variables int degC, volt; volatile long traw,vraw; sys_init(); //initialize system parameters 8042: b0 12 9e 85 call #0x859e } } void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 8046: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 804a: 61 00 UCA0BR0 = 0x82; // 9600 from 16Mhz 804c: f2 40 82 ff mov.b #-126, &0x0062 ;#0xff82 8050: 62 00 UCA0BR1 = 0x6; 8052: f2 40 06 00 mov.b #6, &0x0063 ;#0x0006 8056: 63 00 //UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 8058: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 805c: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe 8060: 61 00 IE2 |= UCA0RXIE; 8062: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 } void init_UART_SPI() { UCB0CTL1 = UCSWRST; 8066: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 806a: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 806e: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8070: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 8074: 68 00 UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 8076: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 807a: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 807e: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 8082: 69 00 /**init the ADC10 */ void init_adc() { ADC10AE0 = ADC_IN; 8084: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 8088: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 808c: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 808e: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8092: b2 01 init_UART_232(); init_UART_SPI(); //get the UART into SPI mode such that we can talk to the radio init_adc(); //turn on the ADC P1OUT ^= LED_GRN; 8094: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 delay(0xFFFF); //lil bit O delay 8098: 3f 43 mov #-1, r15 ;r3 As==11 809a: b0 12 70 85 call #0x8570 P1OUT ^= LED_GRN; 809e: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 memset(rxbuf, 0, 64); //clear the buffer 80a2: 3d 40 40 00 mov #64, r13 ;#0x0040 80a6: 0e 43 clr r14 80a8: 0f 41 mov r1, r15 80aa: 3f 52 add #8, r15 ;r2 As==11 80ac: b0 12 62 8c call #0x8c62 P3OUT &= ~CSn; //power on reset for radio, strobe CSn 80b0: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 80b4: 19 00 delay(0xFF); 80b6: 3f 40 ff 00 mov #255, r15 ;#0x00ff 80ba: b0 12 70 85 call #0x8570 P3OUT |= CSn; 80be: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 delay(0xFFFF); 80c2: 3f 43 mov #-1, r15 ;r3 As==11 80c4: b0 12 70 85 call #0x8570 CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 80c8: 7f 40 30 00 mov.b #48, r15 ;#0x0030 80cc: b0 12 7c 89 call #0x897c CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 80d0: b0 12 7a 86 call #0x867a CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 80d4: 7f 40 36 00 mov.b #54, r15 ;#0x0036 80d8: b0 12 7c 89 call #0x897c do{ i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 80dc: 7f 40 35 00 mov.b #53, r15 ;#0x0035 80e0: b0 12 b4 89 call #0x89b4 }while(i != 1); //this loop won't finish if theres a problem with the chip 80e4: 5f 93 cmp.b #1, r15 ;r3 As==01 80e6: fa 23 jnz $-10 ;abs 0x80dc //P1SEL |= bit4; P1OUT ^= LED_RED; 80e8: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 delay(0xFF); //lil bit O delay 80ec: 3f 40 ff 00 mov #255, r15 ;#0x00ff 80f0: b0 12 70 85 call #0x8570 P1OUT ^= LED_RED; 80f4: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 flags = 0; 80f8: 82 43 0a 02 mov #0, &0x020a ;r3 As==00 P2IFG = 0x00; 80fc: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { TACCTL0 = CCIE; // TACCR0 interrupt enabled 8100: b2 40 10 00 mov #16, &0x0162 ;#0x0010 8104: 62 01 TACTL = TASSEL_1; // ACLK, upmode 8106: b2 40 00 01 mov #256, &0x0160 ;#0x0100 810a: 60 01 TACTL &= ~TAIFG; //clear interrupt 810c: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 8110: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8112: b2 40 e0 2e mov #12000, &0x0172 ;#0x2ee0 8116: 72 01 //TACCR0 = 12000; // ~1 second TAR = 0; 8118: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 811c: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8120: 60 01 P1OUT ^= LED_RED; flags = 0; P2IFG = 0x00; tinit(1000); //start generating interrupts every second! seconds = 0; 8122: 82 43 06 02 mov #0, &0x0206 ;r3 As==00 eint(); //enable interrupts 8126: 32 d2 eint RX_MODE(); //put radio into listen mode. 8128: b0 12 18 88 call #0x8818 int main(void) { unsigned int interchiplength=0,sample,length=0,i,rs232buflength=0; char interchip[80],rs232buf[64],rxbuf[64], *result; //receive buffer int loop=0,interval=120; //programmable variables 812c: 36 40 78 00 mov #120, r6 ;#0x0078 /** Main function. */ int main(void) { unsigned int interchiplength=0,sample,length=0,i,rs232buflength=0; 8130: 07 43 clr r7 8132: 05 41 mov r1, r5 8134: 35 50 88 00 add #136, r5 ;#0x0088 while (1) //main loop, never ends... { loop = 0; if(flags & RXCHAR_RDY) 8138: b2 b2 0a 02 bit #8, &0x020a ;r2 As==11 813c: 34 24 jz $+106 ;abs 0x81a6 { dint(); 813e: 32 c2 dint 8140: 03 43 nop loop = 1; flags &= ~RXCHAR_RDY; 8142: b2 f0 f7 ff and #-9, &0x020a ;#0xfff7 8146: 0a 02 if(rx_char == '\r' || rx_char == '\n'); //don't count a return in the buffer! 8148: 5f 42 0d 02 mov.b &0x020d,r15 814c: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d 8150: 0a 24 jz $+22 ;abs 0x8166 8152: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 8156: 07 24 jz $+16 ;abs 0x8166 else //Normal characters are nice { rs232buf[rs232buflength]=rx_char; 8158: 3e 40 48 00 mov #72, r14 ;#0x0048 815c: 0e 51 add r1, r14 815e: 0e 57 add r7, r14 8160: ce 4f 00 00 mov.b r15, 0(r14) ;0x0000(r14) rs232buflength++; 8164: 17 53 inc r7 } if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 8166: 37 90 3d 00 cmp #61, r7 ;#0x003d 816a: 06 2c jc $+14 ;abs 0x8178 816c: f2 90 0d 00 cmp.b #13, &0x020d ;#0x000d 8170: 0d 02 8172: 13 20 jnz $+40 ;abs 0x819a 8174: 07 93 tst r7 8176: 11 24 jz $+36 ;abs 0x819a { P1OUT |= LED_RED; 8178: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 TX_STRING(rs232buf,rs232buflength); //Send the string out 817c: 4e 47 mov.b r7, r14 817e: 0f 41 mov r1, r15 8180: 3f 50 48 00 add #72, r15 ;#0x0048 8184: b0 12 30 89 call #0x8930 P2IFG &= ~GDO0; //reset trashed interrupt state 8188: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 818c: 2b 00 RX_MODE(); //set the radio back to RX mode so we don't miss any packets 818e: b0 12 18 88 call #0x8818 rs232buflength = 0; P1OUT &= ~LED_RED; 8192: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 8196: 21 00 { P1OUT |= LED_RED; TX_STRING(rs232buf,rs232buflength); //Send the string out P2IFG &= ~GDO0; //reset trashed interrupt state RX_MODE(); //set the radio back to RX mode so we don't miss any packets rs232buflength = 0; 8198: 07 43 clr r7 P1OUT &= ~LED_RED; } //////////////////////////// P1OUT &= ~LED_RED; 819a: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 819e: 21 00 eint(); 81a0: 32 d2 eint { loop = 0; if(flags & RXCHAR_RDY) { dint(); loop = 1; 81a2: 1d 43 mov #1, r13 ;r3 As==01 81a4: 01 3c jmp $+4 ;abs 0x81a8 while (1) //main loop, never ends... { loop = 0; 81a6: 0d 43 clr r13 //////////////////////////// P1OUT &= ~LED_RED; eint(); } if(flags & CONTROLLER_RDY) //Someone is sending us something 81a8: a2 b3 0a 02 bit #2, &0x020a ;r3 As==10 81ac: d8 24 jz $+434 ;abs 0x835e { dint(); 81ae: 32 c2 dint 81b0: 03 43 nop loop = 1; P1OUT |= LED_RED; 81b2: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 flags &= ~CONTROLLER_RDY; 81b6: b2 f0 fd ff and #-3, &0x020a ;#0xfffd 81ba: 0a 02 memset(rxbuf, 0, 64); 81bc: 3d 40 40 00 mov #64, r13 ;#0x0040 81c0: 0e 43 clr r14 81c2: 0f 41 mov r1, r15 81c4: 3f 52 add #8, r15 ;r2 As==11 81c6: b0 12 62 8c call #0x8c62 length = RX_STRING(rxbuf, 64); 81ca: 7e 40 40 00 mov.b #64, r14 ;#0x0040 81ce: 0f 41 mov r1, r15 81d0: 3f 52 add #8, r15 ;r2 As==11 81d2: b0 12 42 88 call #0x8842 if(LQI & bit7) //CRC ok 81d6: c2 93 08 02 tst.b &0x0208 81da: b4 34 jge $+362 ;abs 0x8344 { P1OUT |= LED_GRN; 81dc: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 interchiplength = sprintf(interchip,"%s \e[32m:%ddBm\e[30m",rxbuf, RSSI_DBM); 81e0: 5f 42 04 02 mov.b &0x0204,r15 81e4: 8f 11 sxt r15 81e6: 0f 12 push r15 81e8: 3f 40 0a 00 mov #10, r15 ;#0x000a 81ec: 0f 51 add r1, r15 81ee: 0f 12 push r15 81f0: 30 12 b8 97 push #-26696 ;#0x97b8 81f4: 05 12 push r5 81f6: b0 12 0a 8e call #0x8e0a 81fa: 31 52 add #8, r1 ;r2 As==11 } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 81fc: 1f 93 cmp #1, r15 ;r3 As==01 81fe: 02 34 jge $+6 ;abs 0x8204 8200: 30 40 56 84 br #0x8456 } /** Main function. */ int main(void) 8204: 0d 45 mov r5, r13 8206: 0c 45 mov r5, r12 8208: 0c 5f add r15, r12 { int pointer; for( pointer = 0; pointer < length; pointer++) { volatile int i; UCA0TXBUF = string[pointer]; 820a: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 820e: 5f 42 03 00 mov.b &0x0003,r15 8212: 2f f3 and #2, r15 ;r3 As==10 8214: fc 27 jz $-6 ;abs 0x820e 8216: 1d 53 inc r13 } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 8218: 0d 9c cmp r12, r13 821a: f7 23 jnz $-16 ;abs 0x820a 821c: 30 40 56 84 br #0x8456 { volatile int i; UCA0TXBUF = string[pointer]; 8220: e2 4e 67 00 mov.b @r14, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8224: 5f 42 03 00 mov.b &0x0003,r15 8228: 2f f3 and #2, r15 ;r3 As==10 822a: fc 27 jz $-6 ;abs 0x8224 822c: 1e 53 inc r14 } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 822e: 3e 90 84 98 cmp #-26492,r14 ;#0x9884 8232: f6 23 jnz $-18 ;abs 0x8220 { P1OUT |= LED_GRN; interchiplength = sprintf(interchip,"%s \e[32m:%ddBm\e[30m",rxbuf, RSSI_DBM); TX232String(interchip,interchiplength); TX232String("\r\n",2); if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8234: 3d 40 03 00 mov #3, r13 ;#0x0003 8238: 0e 41 mov r1, r14 823a: 3e 52 add #8, r14 ;r2 As==11 823c: 3f 40 cc 97 mov #-26676,r15 ;#0x97cc 8240: b0 12 48 8b call #0x8b48 8244: 0f 93 tst r15 8246: 6e 20 jnz $+222 ;abs 0x8324 { if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 8248: 3e 40 d0 97 mov #-26672,r14 ;#0x97d0 824c: 0f 41 mov r1, r15 824e: 3f 52 add #8, r15 ;r2 As==11 8250: b0 12 cc 8c call #0x8ccc 8254: 0f 93 tst r15 8256: 2a 24 jz $+86 ;abs 0x82ac { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8258: 3e 40 3d 00 mov #61, r14 ;#0x003d 825c: 0f 41 mov r1, r15 825e: 3f 52 add #8, r15 ;r2 As==11 8260: b0 12 36 8b call #0x8b36 8264: 1f 53 inc r15 8266: b0 12 22 8d call #0x8d22 826a: 04 4f mov r15, r4 if(length > 0) 826c: 0f 93 tst r15 826e: 0d 24 jz $+28 ;abs 0x828a { interval = length; length = sprintf(rxbuf,"\e[32mGND:MON Interval is now %d\e[30m",interval); 8270: 0f 12 push r15 8272: 30 12 d9 97 push #-26663 ;#0x97d9 8276: 3f 40 0c 00 mov #12, r15 ;#0x000c 827a: 0f 51 add r1, r15 827c: 0f 12 push r15 827e: b0 12 0a 8e call #0x8e0a 8282: 31 50 06 00 add #6, r1 ;#0x0006 8286: 06 44 mov r4, r6 8288: 0b 3c jmp $+24 ;abs 0x82a0 } else length = sprintf(rxbuf,"\e[32mGND:MON Reporting every %d seconds\e[30m",interval); 828a: 06 12 push r6 828c: 30 12 fe 97 push #-26626 ;#0x97fe 8290: 3f 40 0c 00 mov #12, r15 ;#0x000c 8294: 0f 51 add r1, r15 8296: 0f 12 push r15 8298: b0 12 0a 8e call #0x8e0a 829c: 31 50 06 00 add #6, r1 ;#0x0006 TX_STRING(rxbuf,length); 82a0: 4e 4f mov.b r15, r14 82a2: 0f 41 mov r1, r15 82a4: 3f 52 add #8, r15 ;r2 As==11 82a6: b0 12 30 89 call #0x8930 82aa: 4c 3c jmp $+154 ;abs 0x8344 } else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 82ac: 3e 40 2b 98 mov #-26581,r14 ;#0x982b 82b0: 0f 41 mov r1, r15 82b2: 3f 52 add #8, r15 ;r2 As==11 82b4: b0 12 cc 8c call #0x8ccc 82b8: 0f 93 tst r15 82ba: 19 24 jz $+52 ;abs 0x82ee { length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 82bc: 5f 42 08 02 mov.b &0x0208,r15 82c0: 0f 12 push r15 82c2: 5f 42 04 02 mov.b &0x0204,r15 82c6: 8f 11 sxt r15 82c8: 0f 12 push r15 82ca: 30 12 cc 97 push #-26676 ;#0x97cc 82ce: 30 12 32 98 push #-26574 ;#0x9832 82d2: 3f 40 10 00 mov #16, r15 ;#0x0010 82d6: 0f 51 add r1, r15 82d8: 0f 12 push r15 82da: b0 12 0a 8e call #0x8e0a 82de: 31 50 0a 00 add #10, r1 ;#0x000a TX_STRING(rxbuf,length); 82e2: 4e 4f mov.b r15, r14 82e4: 0f 41 mov r1, r15 82e6: 3f 52 add #8, r15 ;r2 As==11 82e8: b0 12 30 89 call #0x8930 82ec: 2b 3c jmp $+88 ;abs 0x8344 } else if(strstr( rxbuf, "now" ) != NULL) //report now 82ee: 3e 40 4b 98 mov #-26549,r14 ;#0x984b 82f2: 0f 41 mov r1, r15 82f4: 3f 52 add #8, r15 ;r2 As==11 82f6: b0 12 cc 8c call #0x8ccc 82fa: 0f 93 tst r15 82fc: 04 24 jz $+10 ;abs 0x8306 { flags |= GO_NOW | TIMER_UP; ///set event flags to trigger the reporting 82fe: b2 d0 05 00 bis #5, &0x020a ;#0x0005 8302: 0a 02 8304: 1f 3c jmp $+64 ;abs 0x8344 } else //command not recognized, give a pong to ack reception { length = sprintf(rxbuf,"\e[34mGND:MON Pong!\e[30m"); 8306: 3d 40 18 00 mov #24, r13 ;#0x0018 830a: 3e 40 4f 98 mov #-26545,r14 ;#0x984f 830e: 0f 41 mov r1, r15 8310: 3f 52 add #8, r15 ;r2 As==11 8312: b0 12 68 8b call #0x8b68 TX_STRING(rxbuf, length); 8316: 7e 40 17 00 mov.b #23, r14 ;#0x0017 831a: 0f 41 mov r1, r15 831c: 3f 52 add #8, r15 ;r2 As==11 831e: b0 12 30 89 call #0x8930 8322: 10 3c jmp $+34 ;abs 0x8344 } } else { if(memcmp("Pong!",rxbuf,5)==0) //if this is an ack to an outbound packet then we'll light a green light 8324: 3d 40 05 00 mov #5, r13 ;#0x0005 8328: 0e 41 mov r1, r14 832a: 3e 52 add #8, r14 ;r2 As==11 832c: 3f 40 67 98 mov #-26521,r15 ;#0x9867 8330: b0 12 48 8b call #0x8b48 8334: 0f 93 tst r15 8336: 06 20 jnz $+14 ;abs 0x8344 { P1OUT |= LED_GRN; 8338: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 delay(0xFFF); 833c: 3f 40 ff 0f mov #4095, r15 ;#0x0fff 8340: b0 12 70 85 call #0x8570 } } } P2IFG &= ~GDO0; //reset trashed interrupt state 8344: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8348: 2b 00 RX_MODE(); //set the radio back to RX mode so we don't miss any packets 834a: b0 12 18 88 call #0x8818 //turn off LEDs P1OUT &= ~LED_RED; 834e: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 8352: 21 00 P1OUT &= ~LED_GRN; 8354: f2 f0 fd ff and.b #-3, &0x0021 ;#0xfffd 8358: 21 00 eint(); 835a: 32 d2 eint eint(); } if(flags & CONTROLLER_RDY) //Someone is sending us something { dint(); loop = 1; 835c: 1d 43 mov #1, r13 ;r3 As==01 //turn off LEDs P1OUT &= ~LED_RED; P1OUT &= ~LED_GRN; eint(); } if(flags & TIMER_UP) //Did the timer expire? report your findings! 835e: 92 b3 0a 02 bit #1, &0x020a ;r3 As==01 8362: 71 24 jz $+228 ;abs 0x8446 { loop = 1; //if(((seconds) % interval) == 0 || (flags & GO_NOW)) //report every 20 second by default if(flags & GO_NOW) //report every 20 second by default 8364: a2 b2 0a 02 bit #4, &0x020a ;r2 As==10 8368: 17 24 jz $+48 ;abs 0x8398 { dint(); 836a: 32 c2 dint 836c: 03 43 nop flags &= ~(TIMER_UP|GO_NOW); //clear the flag 836e: b2 f0 fa ff and #-6, &0x020a ;#0xfffa 8372: 0a 02 P1OUT |= LED_GRN; 8374: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 //temp = ((((514.244326148061 + (-106.716137594835 * log2(Rtherm))) + (9.09261076978411 * (pow2(log2(Rtherm) , 2)))) + (-0.436174532680972 * (pow2(log2(Rtherm) , 3)))) + (8.77185324401251E-03 * (pow2(log2(Rtherm) , 4)))); //ipart = temp*100; //integer part, not imaginary part //ipart=0; //length=sprintf(rxbuf, "GND:%s %d:%d,%d", CALLSIGN, seconds, ipart, sample); //send the temperature to the ground length=sprintf(rxbuf, "GND:%s TEST", CALLSIGN); //send the temperature to the ground 8378: 30 12 cc 97 push #-26676 ;#0x97cc 837c: 30 12 6d 98 push #-26515 ;#0x986d 8380: 3f 40 0c 00 mov #12, r15 ;#0x000c 8384: 0f 51 add r1, r15 8386: 0f 12 push r15 8388: b0 12 0a 8e call #0x8e0a 838c: 31 50 06 00 add #6, r1 ;#0x0006 //TX_STRING(rxbuf,length); //P2IFG &= ~GDO0; //clear our soiled GDO0 register //RX_MODE(); P1OUT &= ~LED_GRN; 8390: f2 f0 fd ff and.b #-3, &0x0021 ;#0xfffd 8394: 21 00 eint(); 8396: 32 d2 eint } if(((seconds) % interval) == 0 || (flags & GO_NOW)) //report every 60 second by default 8398: 1f 42 06 02 mov &0x0206,r15 839c: 0e 46 mov r6, r14 839e: b0 12 ee 8a call #0x8aee 83a2: 0f 93 tst r15 83a4: 05 24 jz $+12 ;abs 0x83b0 83a6: a2 b2 0a 02 bit #4, &0x020a ;r2 As==10 83aa: 02 20 jnz $+6 ;abs 0x83b0 83ac: 30 40 38 81 br #0x8138 //if(flags & GO_NOW) //report every 60 second by default { flags &= ~(TIMER_UP|GO_NOW); //clear the flag 83b0: b2 f0 fa ff and #-6, &0x020a ;#0xfffa 83b4: 0a 02 P1OUT |= LED_RED; 83b6: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 ADC10CTL1 = INCH_10 + ADC10DIV_4; // Temp Sensor ADC10CLK/5 83ba: b2 40 80 a0 mov #-24448,&0x01b2 ;#0xa080 83be: b2 01 ADC10CTL0 = SREF_1 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE + ADC10SR; 83c0: b2 40 38 3c mov #15416, &0x01b0 ;#0x3c38 83c4: b0 01 for( degC = 240; degC > 0; degC-- ); // delay to allow reference to settle ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 83c6: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 83ca: b0 01 LPM3; 83cc: 32 d0 d0 00 bis #208, r2 ;#0x00d0 traw = ADC10MEM; 83d0: 1a 42 b4 01 mov &0x01b4,r10 83d4: 0b 43 clr r11 83d6: 81 4a 04 00 mov r10, 4(r1) ;0x0004(r1) 83da: 81 4b 06 00 mov r11, 6(r1) ;0x0006(r1) ADC10CTL0 &= ~ENC; 83de: b2 f0 fd ff and #-3, &0x01b0 ;#0xfffd 83e2: b0 01 ADC10CTL1 = INCH_11; // AVcc/2 83e4: b2 40 00 b0 mov #-20480,&0x01b2 ;#0xb000 83e8: b2 01 ADC10CTL0 = SREF_1 + ADC10SHT_2 + REFON + ADC10ON + ADC10IE + REF2_5V; 83ea: b2 40 78 30 mov #12408, &0x01b0 ;#0x3078 83ee: b0 01 for( degC = 240; degC > 0; degC-- ); // delay to allow reference to settle ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 83f0: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 83f4: b0 01 LPM3; 83f6: 32 d0 d0 00 bis #208, r2 ;#0x00d0 dint(); 83fa: 32 c2 dint 83fc: 03 43 nop vraw = ADC10MEM; 83fe: 18 42 b4 01 mov &0x01b4,r8 8402: 09 43 clr r9 8404: 81 48 00 00 mov r8, 0(r1) ;0x0000(r1) 8408: 81 49 02 00 mov r9, 2(r1) ;0x0002(r1) ADC10CTL0 &= ~ENC; 840c: b2 f0 fd ff and #-3, &0x01b0 ;#0xfffd 8410: b0 01 ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 8412: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 8416: b0 01 // oC = ((A10/1024)*1500mV)-986mV)*1/3.55mV = A10*423/1024 - 278 // the temperature is transmitted as an integer where 32.1 = 321 // hence 4230 instead of 423 degC = (((traw - 673) * 4230) / 1024); 8418: 1c 41 04 00 mov 4(r1), r12 ;0x0004(r1) 841c: 1d 41 06 00 mov 6(r1), r13 ;0x0006(r1) //{ // degC += CAL_OFFSET_TEMP; // } volt = (vraw*25)/512; 8420: 2c 41 mov @r1, r12 8422: 1d 41 02 00 mov 2(r1), r13 ;0x0002(r1) /* Code to report temperature and voltage length=sprintf(rxbuf, "GND:%s S:%u T:%d V:%d", CALLSIGN, seconds, degC, volt); //send the temperature to the ground TX232String(rxbuf,length); TX232String("\r\n",2);*/ TX_STRING("CAR temp",8); 8426: 7e 42 mov.b #8, r14 ;r2 As==11 8428: 3f 40 79 98 mov #-26503,r15 ;#0x9879 842c: b0 12 30 89 call #0x8930 P2IFG &= ~GDO0; //reset trashed interrupt state 8430: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8434: 2b 00 RX_MODE(); //set the radio back to RX mode so we don't miss any packets 8436: b0 12 18 88 call #0x8818 //TX_STRING(rxbuf,length); //P2IFG &= ~GDO0; //clear our soiled GDO0 register //RX_MODE(); P1OUT &= ~LED_RED; 843a: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 843e: 21 00 eint(); 8440: 32 d2 eint 8442: 30 40 38 81 br #0x8138 } } if(loop == 0) 8446: 0d 93 tst r13 8448: 02 24 jz $+6 ;abs 0x844e 844a: 30 40 38 81 br #0x8138 LPM3; //when we wake up it'll be because of an event 844e: 32 d0 d0 00 bis #208, r2 ;#0x00d0 8452: 30 40 38 81 br #0x8138 8456: 3e 40 82 98 mov #-26494,r14 ;#0x9882 845a: 30 40 20 82 br #0x8220 0000845e <__stop_progExec__>: 845e: 32 d0 f0 00 bis #240, r2 ;#0x00f0 8462: fd 3f jmp $-4 ;abs 0x845e 00008464 <__ctors_end>: 8464: 30 40 b6 97 br #0x97b6 00008468 : This interrupt is caused by external pin events on handshake lines */ // Port 2 interripts : the allspice controller is talking to us interrupt (PORT2_VECTOR) P2_VEC(void) { 8468: 0f 12 push r15 dint(); //no nesting! 846a: 32 c2 dint 846c: 03 43 nop if((P2IFG & GDO0) == GDO0) 846e: 5f 42 2b 00 mov.b &0x002b,r15 8472: 3f f0 40 00 and #64, r15 ;#0x0040 8476: 05 24 jz $+12 ;abs 0x8482 { flags |= CONTROLLER_RDY; 8478: a2 d3 0a 02 bis #2, &0x020a ;r3 As==10 LPM3_EXIT; 847c: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8480: 02 00 //We need to grab that byte! } P2IFG=0x00; 8482: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 eint(); 8486: 32 d2 eint } 8488: 3f 41 pop r15 848a: 00 13 reti 0000848c : /** This is called once every overflow */ interrupt (TIMERA1_VECTOR) TA1_VEC(void) { 848c: 0f 12 push r15 dint(); //no nesting! 848e: 32 c2 dint 8490: 03 43 nop if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 8492: 1f 42 2e 01 mov &0x012e,r15 8496: 3f 90 0a 00 cmp #10, r15 ;#0x000a 849a: 03 24 jz $+8 ;abs 0x84a2 flags |= TIMER_UP; seconds++; TACTL &= ~TAIFG; //clear the flag LPM3_EXIT; } eint(); 849c: 32 d2 eint } 849e: 3f 41 pop r15 84a0: 00 13 reti { dint(); //no nesting! if(TAIV == 0x0A) //reading this bit will clear the interrupt flags { flags |= TIMER_UP; 84a2: 92 d3 0a 02 bis #1, &0x020a ;r3 As==01 seconds++; 84a6: 92 53 06 02 inc &0x0206 TACTL &= ~TAIFG; //clear the flag 84aa: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 84ae: 60 01 LPM3_EXIT; 84b0: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 84b4: 02 00 } eint(); 84b6: 32 d2 eint } 84b8: 3f 41 pop r15 84ba: 00 13 reti 000084bc : /** This is called once for every RS232 character that comes in */ interrupt (USCIAB0RX_VECTOR) RX_VEC(void) { 84bc: 0f 12 push r15 dint(); //no nesting! 84be: 32 c2 dint 84c0: 03 43 nop //P1OUT^=LED_GRN; rx_char = UCA0RXBUF; 84c2: d2 42 66 00 mov.b &0x0066,&0x020d 84c6: 0d 02 flags |= RXCHAR_RDY; 84c8: b2 d2 0a 02 bis #8, &0x020a ;r2 As==11 LPM3_EXIT; 84cc: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 84d0: 02 00 eint(); 84d2: 32 d2 eint } 84d4: 3f 41 pop r15 84d6: 00 13 reti 000084d8 : */ // Port 2 interripts : the allspice controller is talking to us interrupt (ADC10_VECTOR) ADC_VEC(void) { dint(); //no nesting! 84d8: 32 c2 dint 84da: 03 43 nop LPM3_EXIT; 84dc: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 84e0: 00 00 eint(); 84e2: 32 d2 eint } 84e4: 00 13 reti 000084e6 : /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { 84e6: 0b 12 push r11 84e8: 0a 12 push r10 TACCTL0 = CCIE; // TACCR0 interrupt enabled 84ea: b2 40 10 00 mov #16, &0x0162 ;#0x0010 84ee: 62 01 TACTL = TASSEL_1; // ACLK, upmode 84f0: b2 40 00 01 mov #256, &0x0160 ;#0x0100 84f4: 60 01 TACTL &= ~TAIFG; //clear interrupt 84f6: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 84fa: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 84fc: 0c 43 clr r12 84fe: 0e 4f mov r15, r14 8500: 0f 4c mov r12, r15 8502: 0e 5e rla r14 8504: 0f 6f rlc r15 8506: 0e 5e rla r14 8508: 0f 6f rlc r15 850a: 0e 5e rla r14 850c: 0f 6f rlc r15 850e: 0e 5e rla r14 8510: 0f 6f rlc r15 8512: 0e 5e rla r14 8514: 0f 6f rlc r15 8516: 0c 4e mov r14, r12 8518: 0d 4f mov r15, r13 851a: 0c 5c rla r12 851c: 0d 6d rlc r13 851e: 0c 5c rla r12 8520: 0d 6d rlc r13 8522: 0e 5c add r12, r14 8524: 0f 6d addc r13, r15 8526: 0c 4e mov r14, r12 8528: 0d 4f mov r15, r13 852a: 0c 5c rla r12 852c: 0d 6d rlc r13 852e: 0c 5c rla r12 8530: 0d 6d rlc r13 8532: 0a 4e mov r14, r10 8534: 0b 4f mov r15, r11 8536: 0a 5c add r12, r10 8538: 0b 6d addc r13, r11 853a: 0e 4a mov r10, r14 853c: 0f 4b mov r11, r15 853e: 0e 5e rla r14 8540: 0f 6f rlc r15 8542: 0e 5e rla r14 8544: 0f 6f rlc r15 8546: 0e 5e rla r14 8548: 0f 6f rlc r15 854a: 0e 5e rla r14 854c: 0f 6f rlc r15 854e: 3c 40 e8 03 mov #1000, r12 ;#0x03e8 8552: 0d 43 clr r13 8554: 0e 8a sub r10, r14 8556: 0f 7b subc r11, r15 8558: b0 12 f6 8a call #0x8af6 855c: 82 4e 72 01 mov r14, &0x0172 //TACCR0 = 12000; // ~1 second TAR = 0; 8560: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 8564: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8568: 60 01 } 856a: 3a 41 pop r10 856c: 3b 41 pop r11 856e: 30 41 ret 00008570 : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 859e: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 85a2: 20 01 P1OUT = P1OUT_INIT; //Init output data of port1 85a4: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 P2OUT = P2OUT_INIT; //Init output data of port2 85a8: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 P3OUT = P3OUT_INIT; 85ac: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 P1SEL = P1SEL_INIT; //Select port or module -function on port1 85b0: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 P2SEL = P2SEL_INIT; //Select port or module -function on port2 85b4: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 P3SEL = P3SEL_INIT; 85b8: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 85bc: 1b 00 P1DIR = P1DIR_INIT; //Init port direction register of port1 85be: f2 43 22 00 mov.b #-1, &0x0022 ;r3 As==11 P2DIR = P2DIR_INIT; //Init port direction register of port2 85c2: f2 40 3f 00 mov.b #63, &0x002a ;#0x003f 85c6: 2a 00 P3DIR = P3DIR_INIT; 85c8: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 85cc: 1a 00 P1IES = P1IES_INIT; //init port interrupts 85ce: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 P2IES = P2IES_INIT; 85d2: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 85d6: 2c 00 P1IE = P1IE_INIT; 85d8: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 P2IE = P2IE_INIT; 85dc: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 85e0: 2d 00 BCSCTL1 = CALBC1_16MHZ; // Set DCO 85e2: d2 42 f9 10 mov.b &0x10f9,&0x0057 85e6: 57 00 DCOCTL = CALDCO_16MHZ; 85e8: d2 42 f8 10 mov.b &0x10f8,&0x0056 85ec: 56 00 BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 85ee: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 85f2: 53 00 } 85f4: 30 41 ret 000085f6 : /**init the ADC10 */ void init_adc() { ADC10AE0 = ADC_IN; 85f6: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 85fa: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 85fe: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8600: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8604: b2 01 } 8606: 30 41 ret 00008608 : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 8608: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 860c: b0 01 while(ADC10CTL1 & ADC10BUSY); 860e: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 8612: fd 23 jnz $-4 ;abs 0x860e return ADC10MEM; 8614: 1f 42 b4 01 mov &0x01b4,r15 } 8618: 30 41 ret 0000861a : void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 861a: 1e 93 cmp #1, r14 ;r3 As==01 861c: 0c 38 jl $+26 ;abs 0x8636 861e: 0c 43 clr r12 ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start while(ADC10CTL1 & ADC10BUSY); return ADC10MEM; } void TX232String( char* string, int length ) 8620: 0d 4f mov r15, r13 8622: 0d 5c add r12, r13 { int pointer; for( pointer = 0; pointer < length; pointer++) { volatile int i; UCA0TXBUF = string[pointer]; 8624: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8628: 5d 42 03 00 mov.b &0x0003,r13 862c: 2d f3 and #2, r13 ;r3 As==10 862e: fc 27 jz $-6 ;abs 0x8628 } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 8630: 1c 53 inc r12 8632: 0c 9e cmp r14, r12 8634: f5 23 jnz $-20 ;abs 0x8620 8636: 30 41 ret 00008638 : } } void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 8638: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 863c: 61 00 UCA0BR0 = 0x82; // 9600 from 16Mhz 863e: f2 40 82 ff mov.b #-126, &0x0062 ;#0xff82 8642: 62 00 UCA0BR1 = 0x6; 8644: f2 40 06 00 mov.b #6, &0x0063 ;#0x0006 8648: 63 00 //UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 864a: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 864e: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe 8652: 61 00 IE2 |= UCA0RXIE; 8654: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 } 8658: 30 41 ret 0000865a : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 865a: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 865e: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8662: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8664: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 8668: 68 00 UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 866a: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 866e: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 8672: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 8676: 69 00 } 8678: 30 41 ret 0000867a : void CCXX_WRITE_SPI_RF_SETTINGS() { // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 867a: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 867e: 4f 43 clr.b r15 8680: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 8684: 7e 40 06 00 mov.b #6, r14 ;#0x0006 8688: 6f 43 mov.b #2, r15 ;r3 As==10 868a: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 868e: 7e 40 3c 00 mov.b #60, r14 ;#0x003c 8692: 7f 40 06 00 mov.b #6, r15 ;#0x0006 8696: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 869a: 6e 42 mov.b #4, r14 ;r2 As==10 869c: 7f 40 07 00 mov.b #7, r15 ;#0x0007 86a0: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 86a4: 7e 40 05 00 mov.b #5, r14 ;#0x0005 86a8: 7f 42 mov.b #8, r15 ;r2 As==11 86aa: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 86ae: 5e 43 mov.b #1, r14 ;r3 As==01 86b0: 7f 40 09 00 mov.b #9, r15 ;#0x0009 86b4: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 86b8: 7e 40 9a ff mov.b #-102, r14 ;#0xff9a 86bc: 7f 40 0a 00 mov.b #10, r15 ;#0x000a 86c0: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 86c4: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 86c8: 7f 40 0b 00 mov.b #11, r15 ;#0x000b 86cc: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 86d0: 4e 43 clr.b r14 86d2: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 86d6: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 86da: 7e 40 5c 00 mov.b #92, r14 ;#0x005c 86de: 7f 40 0d 00 mov.b #13, r15 ;#0x000d 86e2: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 86e6: 7e 40 4f 00 mov.b #79, r14 ;#0x004f 86ea: 7f 40 0e 00 mov.b #14, r15 ;#0x000e 86ee: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 86f2: 7e 40 c0 ff mov.b #-64, r14 ;#0xffc0 86f6: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 86fa: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 86fe: 7e 40 2d 00 mov.b #45, r14 ;#0x002d 8702: 7f 40 10 00 mov.b #16, r15 ;#0x0010 8706: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 870a: 7e 40 3b 00 mov.b #59, r14 ;#0x003b 870e: 7f 40 11 00 mov.b #17, r15 ;#0x0011 8712: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 8716: 7e 40 73 00 mov.b #115, r14 ;#0x0073 871a: 7f 40 12 00 mov.b #18, r15 ;#0x0012 871e: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 8722: 7e 40 23 00 mov.b #35, r14 ;#0x0023 8726: 7f 40 13 00 mov.b #19, r15 ;#0x0013 872a: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 872e: 7e 40 b9 ff mov.b #-71, r14 ;#0xffb9 8732: 7f 40 14 00 mov.b #20, r15 ;#0x0014 8736: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 873a: 5e 43 mov.b #1, r14 ;r3 As==01 873c: 7f 40 15 00 mov.b #21, r15 ;#0x0015 8740: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 8744: 7e 40 33 00 mov.b #51, r14 ;#0x0033 8748: 7f 40 17 00 mov.b #23, r15 ;#0x0017 874c: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 8750: 7e 40 18 00 mov.b #24, r14 ;#0x0018 8754: 7f 40 18 00 mov.b #24, r15 ;#0x0018 8758: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 875c: 7e 40 1d 00 mov.b #29, r14 ;#0x001d 8760: 7f 40 19 00 mov.b #25, r15 ;#0x0019 8764: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 8768: 7e 40 1c 00 mov.b #28, r14 ;#0x001c 876c: 7f 40 1a 00 mov.b #26, r15 ;#0x001a 8770: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 8774: 7e 40 c7 ff mov.b #-57, r14 ;#0xffc7 8778: 7f 40 1b 00 mov.b #27, r15 ;#0x001b 877c: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 8780: 4e 43 clr.b r14 8782: 7f 40 1c 00 mov.b #28, r15 ;#0x001c 8786: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 878a: 7e 40 b0 ff mov.b #-80, r14 ;#0xffb0 878e: 7f 40 1d 00 mov.b #29, r15 ;#0x001d 8792: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 8796: 7e 40 b6 ff mov.b #-74, r14 ;#0xffb6 879a: 7f 40 21 00 mov.b #33, r15 ;#0x0021 879e: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 87a2: 7e 40 10 00 mov.b #16, r14 ;#0x0010 87a6: 7f 40 22 00 mov.b #34, r15 ;#0x0022 87aa: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 87ae: 7e 40 ea ff mov.b #-22, r14 ;#0xffea 87b2: 7f 40 23 00 mov.b #35, r15 ;#0x0023 87b6: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 87ba: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 87be: 7f 40 24 00 mov.b #36, r15 ;#0x0024 87c2: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 87c6: 4e 43 clr.b r14 87c8: 7f 40 25 00 mov.b #37, r15 ;#0x0025 87cc: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 87d0: 7e 40 11 00 mov.b #17, r14 ;#0x0011 87d4: 7f 40 26 00 mov.b #38, r15 ;#0x0026 87d8: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 87dc: 7e 40 59 00 mov.b #89, r14 ;#0x0059 87e0: 7f 40 29 00 mov.b #41, r15 ;#0x0029 87e4: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 87e8: 7e 40 88 ff mov.b #-120, r14 ;#0xff88 87ec: 7f 40 2c 00 mov.b #44, r15 ;#0x002c 87f0: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 87f4: 7e 40 31 00 mov.b #49, r14 ;#0x0031 87f8: 7f 40 2d 00 mov.b #45, r15 ;#0x002d 87fc: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 8800: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8804: 7f 40 2e 00 mov.b #46, r15 ;#0x002e 8808: b0 12 12 8a call #0x8a12 CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 880c: 7e 43 mov.b #-1, r14 ;r3 As==11 880e: 7f 40 3e 00 mov.b #62, r15 ;#0x003e 8812: b0 12 12 8a call #0x8a12 } 8816: 30 41 ret 00008818 : Interrupt driven! yay! */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); 8818: 7f 40 36 00 mov.b #54, r15 ;#0x0036 881c: b0 12 7c 89 call #0x897c while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8820: f2 90 0f 00 cmp.b #15, &0x020c ;#0x000f 8824: 0c 02 8826: 08 24 jz $+18 ;abs 0x8838 CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8828: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 882c: b0 12 7c 89 call #0x897c */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8830: f2 90 0f 00 cmp.b #15, &0x020c ;#0x000f 8834: 0c 02 8836: f8 23 jnz $-14 ;abs 0x8828 CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 8838: 7f 40 34 00 mov.b #52, r15 ;#0x0034 883c: b0 12 7c 89 call #0x897c } 8840: 30 41 ret 00008842 : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 8842: 0b 12 push r11 8844: 0a 12 push r10 8846: 09 12 push r9 8848: 08 12 push r8 884a: 07 12 push r7 884c: 06 12 push r6 884e: 07 4f mov r15, r7 8850: 48 4e mov.b r14, r8 //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 8852: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8856: b0 12 b4 89 call #0x89b4 885a: 49 4f mov.b r15, r9 real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 885c: 7f 40 3b 00 mov.b #59, r15 ;#0x003b 8860: b0 12 b4 89 call #0x89b4 8864: 46 4f mov.b r15, r6 for(i=0; i < length && i < pkt_length; i++) 8866: 48 93 tst.b r8 8868: 59 24 jz $+180 ;abs 0x891c 886a: 49 93 tst.b r9 886c: 5b 24 jz $+184 ;abs 0x8924 886e: 0a 47 mov r7, r10 8870: 4b 43 clr.b r11 8872: 03 3c jmp $+8 ;abs 0x887a 8874: 1a 53 inc r10 8876: 49 9b cmp.b r11, r9 8878: 41 24 jz $+132 ;abs 0x88fc { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 887a: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 887e: b0 12 b4 89 call #0x89b4 8882: ca 4f 00 00 mov.b r15, 0(r10) ;0x0000(r10) //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8886: 5b 53 inc.b r11 8888: 4b 98 cmp.b r8, r11 888a: f4 23 jnz $-22 ;abs 0x8874 888c: 4e 4b mov.b r11, r14 888e: 4a 49 mov.b r9, r10 { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte //tmpbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 8890: 0e 57 add r7, r14 8892: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 8896: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 889a: b0 12 b4 89 call #0x89b4 889e: c2 4f 05 02 mov.b r15, &0x0205 LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 88a2: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 88a6: b0 12 b4 89 call #0x89b4 88aa: c2 4f 08 02 mov.b r15, &0x0208 PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 88ae: 7f 40 38 00 mov.b #56, r15 ;#0x0038 88b2: b0 12 b4 89 call #0x89b4 88b6: c2 4f 09 02 mov.b r15, &0x0209 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 88ba: 4e 46 mov.b r6, r14 88bc: 2a 53 incd r10 88be: 0e 9a cmp r10, r14 88c0: 03 24 jz $+8 ;abs 0x88c8 LQI &= ~bit7; //force it to be INVALID! 88c2: f2 f0 7f 00 and.b #127, &0x0208 ;#0x007f 88c6: 08 02 if (RSSI >= 128) 88c8: 5e 42 05 02 mov.b &0x0205,r14 88cc: 4e 93 tst.b r14 88ce: 1a 38 jl $+54 ;abs 0x8904 RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; 88d0: 12 c3 clrc 88d2: 4e 10 rrc.b r14 88d4: 7e 50 b8 ff add.b #-72, r14 ;#0xffb8 88d8: c2 4e 04 02 mov.b r14, &0x0204 CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 88dc: 7f 40 3a 00 mov.b #58, r15 ;#0x003a 88e0: b0 12 7c 89 call #0x897c CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 88e4: 7f 40 36 00 mov.b #54, r15 ;#0x0036 88e8: b0 12 7c 89 call #0x897c return i; //i = real length } 88ec: 4f 4b mov.b r11, r15 88ee: 36 41 pop r6 88f0: 37 41 pop r7 88f2: 38 41 pop r8 88f4: 39 41 pop r9 88f6: 3a 41 pop r10 88f8: 3b 41 pop r11 88fa: 30 41 ret //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 88fc: 4a 49 mov.b r9, r10 88fe: 0e 4a mov r10, r14 8900: 4b 49 mov.b r9, r11 8902: c6 3f jmp $-114 ;abs 0x8890 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8904: 4e 4e mov.b r14, r14 8906: 0f 4e mov r14, r15 8908: 3f 50 00 ff add #-256, r15 ;#0xff00 890c: 0f 93 tst r15 890e: 0e 38 jl $+30 ;abs 0x892c 8910: 0f 11 rra r15 8912: 7f 50 b8 ff add.b #-72, r15 ;#0xffb8 8916: c2 4f 04 02 mov.b r15, &0x0204 891a: e0 3f jmp $-62 ;abs 0x88dc //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 891c: 4b 43 clr.b r11 891e: 0e 43 clr r14 8920: 4a 49 mov.b r9, r10 8922: b6 3f jmp $-146 ;abs 0x8890 8924: 4b 43 clr.b r11 8926: 0e 43 clr r14 8928: 0a 43 clr r10 892a: b2 3f jmp $-154 ;abs 0x8890 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 892c: 1f 53 inc r15 892e: f0 3f jmp $-30 ;abs 0x8910 00008930 : /** Transmit a string of bytes. (use burst write) */ void TX_STRING(unsigned char *txstring, unsigned char length) { 8930: 0b 12 push r11 8932: 0a 12 push r10 8934: 0b 4f mov r15, r11 8936: 4a 4e mov.b r14, r10 //unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8938: 7f 40 36 00 mov.b #54, r15 ;#0x0036 893c: b0 12 7c 89 call #0x897c }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 8940: 5f 42 0c 02 mov.b &0x020c,r15 8944: 3f b0 70 00 bit #112, r15 ;#0x0070 8948: f7 23 jnz $-16 ;abs 0x8938 //CC2500_SPI_WRREG(CCxxx0_TXFIFO, length);//Write the data length first CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 894a: 4d 4a mov.b r10, r13 894c: 0e 4b mov r11, r14 894e: 7f 40 7f 00 mov.b #127, r15 ;#0x007f 8952: b0 12 60 8a call #0x8a60 CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8956: 7f 40 35 00 mov.b #53, r15 ;#0x0035 895a: b0 12 7c 89 call #0x897c do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 895e: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8962: b0 12 7c 89 call #0x897c if(status == 31) //fast RX mode yay 8966: 5f 42 0c 02 mov.b &0x020c,r15 896a: 7f 90 1f 00 cmp.b #31, r15 ;#0x001f 896e: 03 24 jz $+8 ;abs 0x8976 break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 8970: 3f b0 70 00 bit #112, r15 ;#0x0070 8974: f4 23 jnz $-22 ;abs 0x895e } 8976: 3a 41 pop r10 8978: 3b 41 pop r11 897a: 30 41 ret 0000897c : Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 897c: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8980: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8982: 5e 42 18 00 mov.b &0x0018,r14 8986: 2e f2 and #4, r14 ;r2 As==10 8988: fc 23 jnz $-6 ;abs 0x8982 P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 898a: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 898e: 1b 00 IFG2 &= ~UCB0RXIFG; 8990: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8994: 03 00 UCB0TXBUF = reg; 8996: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 899a: 5f 42 03 00 mov.b &0x0003,r15 899e: 2f f2 and #4, r15 ;r2 As==10 89a0: fc 27 jz $-6 ;abs 0x899a status = UCB0RXBUF; 89a2: d2 42 6e 00 mov.b &0x006e,&0x020c 89a6: 0c 02 P3OUT |= CSn; //pull CSn high, we're done with the transfer 89a8: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 89ac: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 89b0: 1b 00 } 89b2: 30 41 ret 000089b4 : */ char CCXX_SPI_RDREG(char reg) { unsigned char rx=0; if(reg >= 0x30) 89b4: 7f 90 30 00 cmp.b #48, r15 ;#0x0030 89b8: 29 38 jl $+84 ;abs 0x8a0c reg |= 0xC0; 89ba: 7f d0 c0 ff bis.b #-64, r15 ;#0xffc0 else reg |= 0x80; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 89be: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 89c2: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 89c4: 5e 42 18 00 mov.b &0x0018,r14 89c8: 2e f2 and #4, r14 ;r2 As==10 89ca: fc 23 jnz $-6 ;abs 0x89c4 P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 89cc: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 89d0: 1b 00 IFG2 &= ~UCB0RXIFG; 89d2: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 89d6: 03 00 UCB0TXBUF = reg; 89d8: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 89dc: 5f 42 03 00 mov.b &0x0003,r15 89e0: 2f f2 and #4, r15 ;r2 As==10 89e2: fc 27 jz $-6 ;abs 0x89dc status = UCB0RXBUF; 89e4: d2 42 6e 00 mov.b &0x006e,&0x020c 89e8: 0c 02 IFG2 &= ~UCB0RXIFG; 89ea: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 89ee: 03 00 UCB0TXBUF = 0; 89f0: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 while (!(IFG2 & UCB0RXIFG)); 89f4: 5f 42 03 00 mov.b &0x0003,r15 89f8: 2f f2 and #4, r15 ;r2 As==10 89fa: fc 27 jz $-6 ;abs 0x89f4 rx = UCB0RXBUF; 89fc: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8a00: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8a04: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8a08: 1b 00 return rx; } 8a0a: 30 41 ret { unsigned char rx=0; if(reg >= 0x30) reg |= 0xC0; else reg |= 0x80; 8a0c: 7f d0 80 ff bis.b #-128, r15 ;#0xff80 8a10: d6 3f jmp $-82 ;abs 0x89be 00008a12 : { unsigned char dummy; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8a12: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8a16: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8a18: 5d 42 18 00 mov.b &0x0018,r13 8a1c: 2d f2 and #4, r13 ;r2 As==10 8a1e: fc 23 jnz $-6 ;abs 0x8a18 P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8a20: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8a24: 1b 00 IFG2 &= ~UCB0RXIFG; 8a26: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8a2a: 03 00 UCB0TXBUF = reg; 8a2c: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a30: 5f 42 03 00 mov.b &0x0003,r15 8a34: 2f f2 and #4, r15 ;r2 As==10 8a36: fc 27 jz $-6 ;abs 0x8a30 status = UCB0RXBUF; 8a38: d2 42 6e 00 mov.b &0x006e,&0x020c 8a3c: 0c 02 //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8a3e: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8a42: 03 00 UCB0TXBUF = byte; 8a44: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a48: 5f 42 03 00 mov.b &0x0003,r15 8a4c: 2f f2 and #4, r15 ;r2 As==10 8a4e: fc 27 jz $-6 ;abs 0x8a48 dummy = UCB0RXBUF; 8a50: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8a54: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8a58: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8a5c: 1b 00 } 8a5e: 30 41 ret 00008a60 : { unsigned char dummy; unsigned int index; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8a60: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8a64: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8a66: 5c 42 18 00 mov.b &0x0018,r12 8a6a: 2c f2 and #4, r12 ;r2 As==10 8a6c: fc 23 jnz $-6 ;abs 0x8a66 P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8a6e: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8a72: 1b 00 IFG2 &= ~UCB0RXIFG; 8a74: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8a78: 03 00 UCB0TXBUF = reg; 8a7a: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a7e: 5f 42 03 00 mov.b &0x0003,r15 8a82: 2f f2 and #4, r15 ;r2 As==10 8a84: fc 27 jz $-6 ;abs 0x8a7e status = UCB0RXBUF; 8a86: d2 42 6e 00 mov.b &0x006e,&0x020c 8a8a: 0c 02 IFG2 &= ~UCB0RXIFG; 8a8c: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8a90: 03 00 UCB0TXBUF = length; 8a92: c2 4d 6f 00 mov.b r13, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a96: 5f 42 03 00 mov.b &0x0003,r15 8a9a: 2f f2 and #4, r15 ;r2 As==10 8a9c: fc 27 jz $-6 ;abs 0x8a96 dummy = UCB0RXBUF; 8a9e: 5f 42 6e 00 mov.b &0x006e,r15 for(index = 0; index < length; index++) 8aa2: 8d 11 sxt r13 8aa4: 11 24 jz $+36 ;abs 0x8ac8 8aa6: 0c 43 clr r12 { IFG2 &= ~UCB0RXIFG; 8aa8: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8aac: 03 00 } /** Burst write registers to the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) 8aae: 0f 4e mov r14, r15 8ab0: 0f 5c add r12, r15 dummy = UCB0RXBUF; for(index = 0; index < length; index++) { IFG2 &= ~UCB0RXIFG; UCB0TXBUF = buf[index]; 8ab2: e2 4f 6f 00 mov.b @r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8ab6: 5f 42 03 00 mov.b &0x0003,r15 8aba: 2f f2 and #4, r15 ;r2 As==10 8abc: fc 27 jz $-6 ;abs 0x8ab6 dummy = UCB0RXBUF; 8abe: 5f 42 6e 00 mov.b &0x006e,r15 IFG2 &= ~UCB0RXIFG; UCB0TXBUF = length; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; for(index = 0; index < length; index++) 8ac2: 1c 53 inc r12 8ac4: 0c 9d cmp r13, r12 8ac6: f0 2b jnc $-30 ;abs 0x8aa8 UCB0TXBUF = buf[index]; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; } P3OUT |= CSn; //pull CSn high, we're done with the transfer 8ac8: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8acc: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8ad0: 1b 00 } 8ad2: 30 41 ret 00008ad4 <__udivhi3>: 8ad4: 7c 40 10 00 mov.b #16, r12 ;#0x0010 8ad8: 0d 4e mov r14, r13 8ada: 0e 43 clr r14 8adc: 0f 5f rla r15 8ade: 0e 6e rlc r14 8ae0: 0e 9d cmp r13, r14 8ae2: 02 28 jnc $+6 ;abs 0x8ae8 8ae4: 0e 8d sub r13, r14 8ae6: 1f d3 bis #1, r15 ;r3 As==01 8ae8: 1c 83 dec r12 8aea: f8 23 jnz $-14 ;abs 0x8adc 8aec: 30 41 ret 00008aee <__umodhi3>: 8aee: b0 12 d4 8a call #0x8ad4 8af2: 0f 4e mov r14, r15 8af4: 30 41 ret 00008af6 <__udivsi3>: 8af6: 0b 12 push r11 8af8: 0a 12 push r10 8afa: 09 12 push r9 8afc: 79 40 20 00 mov.b #32, r9 ;#0x0020 8b00: 0a 4c mov r12, r10 8b02: 0b 4d mov r13, r11 8b04: 0c 43 clr r12 8b06: 0d 43 clr r13 8b08: 0e 5e rla r14 8b0a: 0f 6f rlc r15 8b0c: 0c 6c rlc r12 8b0e: 0d 6d rlc r13 8b10: 0d 9b cmp r11, r13 8b12: 06 28 jnc $+14 ;abs 0x8b20 8b14: 02 20 jnz $+6 ;abs 0x8b1a 8b16: 0c 9a cmp r10, r12 8b18: 03 28 jnc $+8 ;abs 0x8b20 8b1a: 0c 8a sub r10, r12 8b1c: 0d 7b subc r11, r13 8b1e: 1e d3 bis #1, r14 ;r3 As==01 8b20: 19 83 dec r9 8b22: f2 23 jnz $-26 ;abs 0x8b08 8b24: 39 41 pop r9 8b26: 3a 41 pop r10 8b28: 3b 41 pop r11 8b2a: 30 41 ret 00008b2c <__umodsi3>: 8b2c: b0 12 f6 8a call #0x8af6 8b30: 0e 4c mov r12, r14 8b32: 0f 4d mov r13, r15 8b34: 30 41 ret 00008b36 : 8b36: 6d 4f mov.b @r15, r13 8b38: 4d 9e cmp.b r14, r13 8b3a: 05 24 jz $+12 ;abs 0x8b46 8b3c: 4d 93 tst.b r13 8b3e: 02 24 jz $+6 ;abs 0x8b44 8b40: 1f 53 inc r15 8b42: f9 3f jmp $-12 ;abs 0x8b36 8b44: 0f 43 clr r15 8b46: 30 41 ret 00008b48 : 8b48: 0b 12 push r11 8b4a: 0d 93 tst r13 8b4c: 0a 24 jz $+22 ;abs 0x8b62 8b4e: 7b 4f mov.b @r15+, r11 8b50: 7c 4e mov.b @r14+, r12 8b52: 4b 9c cmp.b r12, r11 8b54: 04 24 jz $+10 ;abs 0x8b5e 8b56: 4f 4b mov.b r11, r15 8b58: 4e 4c mov.b r12, r14 8b5a: 0f 8e sub r14, r15 8b5c: 03 3c jmp $+8 ;abs 0x8b64 8b5e: 3d 53 add #-1, r13 ;r3 As==11 8b60: f4 3f jmp $-22 ;abs 0x8b4a 8b62: 0f 43 clr r15 8b64: 3b 41 pop r11 8b66: 30 41 ret 00008b68 : 8b68: 0b 12 push r11 8b6a: 0a 12 push r10 8b6c: 09 12 push r9 8b6e: 08 12 push r8 8b70: 07 12 push r7 8b72: 0d 93 tst r13 8b74: 70 24 jz $+226 ;abs 0x8c56 8b76: 0f 9e cmp r14, r15 8b78: 6e 24 jz $+222 ;abs 0x8c56 8b7a: 34 2c jc $+106 ;abs 0x8be4 8b7c: 0c 4e mov r14, r12 8b7e: 0c df bis r15, r12 8b80: 1c f3 and #1, r12 ;r3 As==01 8b82: 1b 24 jz $+56 ;abs 0x8bba 8b84: 0c 4e mov r14, r12 8b86: 0c ef xor r15, r12 8b88: 1c f3 and #1, r12 ;r3 As==01 8b8a: 07 20 jnz $+16 ;abs 0x8b9a 8b8c: 2d 93 cmp #2, r13 ;r3 As==10 8b8e: 07 28 jnc $+16 ;abs 0x8b9e 8b90: 0b 4e mov r14, r11 8b92: 1b f3 and #1, r11 ;r3 As==01 8b94: 2c 43 mov #2, r12 ;r3 As==10 8b96: 0c 8b sub r11, r12 8b98: 03 3c jmp $+8 ;abs 0x8ba0 8b9a: 0c 4d mov r13, r12 8b9c: 01 3c jmp $+4 ;abs 0x8ba0 8b9e: 1c 43 mov #1, r12 ;r3 As==01 8ba0: 0d 8c sub r12, r13 8ba2: 0a 4c mov r12, r10 8ba4: 09 4e mov r14, r9 8ba6: 0b 4f mov r15, r11 8ba8: fb 49 00 00 mov.b @r9+, 0(r11) ;0x0000(r11) 8bac: 1b 53 inc r11 8bae: 3a 53 add #-1, r10 ;r3 As==11 8bb0: fb 23 jnz $-8 ;abs 0x8ba8 8bb2: 0a 4f mov r15, r10 8bb4: 0a 5c add r12, r10 8bb6: 0e 5c add r12, r14 8bb8: 01 3c jmp $+4 ;abs 0x8bbc 8bba: 0a 4f mov r15, r10 8bbc: 0b 4d mov r13, r11 8bbe: 12 c3 clrc 8bc0: 0b 10 rrc r11 8bc2: 0b 24 jz $+24 ;abs 0x8bda 8bc4: 09 4b mov r11, r9 8bc6: 08 4e mov r14, r8 8bc8: 0c 4a mov r10, r12 8bca: bc 48 00 00 mov @r8+, 0(r12) ;0x0000(r12) 8bce: 2c 53 incd r12 8bd0: 39 53 add #-1, r9 ;r3 As==11 8bd2: fb 23 jnz $-8 ;abs 0x8bca 8bd4: 0b 5b rla r11 8bd6: 0e 5b add r11, r14 8bd8: 0a 5b add r11, r10 8bda: 1d f3 and #1, r13 ;r3 As==01 8bdc: 3c 24 jz $+122 ;abs 0x8c56 8bde: ea 4e 00 00 mov.b @r14, 0(r10) ;0x0000(r10) 8be2: 39 3c jmp $+116 ;abs 0x8c56 8be4: 0e 5d add r13, r14 8be6: 0c 4f mov r15, r12 8be8: 0c 5d add r13, r12 8bea: 0b 4c mov r12, r11 8bec: 0b de bis r14, r11 8bee: 1b f3 and #1, r11 ;r3 As==01 8bf0: 1b 24 jz $+56 ;abs 0x8c28 8bf2: 0b 4c mov r12, r11 8bf4: 0b ee xor r14, r11 8bf6: 1b f3 and #1, r11 ;r3 As==01 8bf8: 06 20 jnz $+14 ;abs 0x8c06 8bfa: 3d 90 03 00 cmp #3, r13 ;#0x0003 8bfe: 03 28 jnc $+8 ;abs 0x8c06 8c00: 0b 4e mov r14, r11 8c02: 1b f3 and #1, r11 ;r3 As==01 8c04: 01 3c jmp $+4 ;abs 0x8c08 8c06: 0b 4d mov r13, r11 8c08: 0d 8b sub r11, r13 8c0a: 09 4e mov r14, r9 8c0c: 0a 4c mov r12, r10 8c0e: 08 4b mov r11, r8 8c10: 08 8c sub r12, r8 8c12: 3a 53 add #-1, r10 ;r3 As==11 8c14: 39 53 add #-1, r9 ;r3 As==11 8c16: ea 49 00 00 mov.b @r9, 0(r10) ;0x0000(r10) 8c1a: 07 4a mov r10, r7 8c1c: 07 58 add r8, r7 8c1e: f9 23 jnz $-12 ;abs 0x8c12 8c20: 3b e3 inv r11 8c22: 1b 53 inc r11 8c24: 0c 5b add r11, r12 8c26: 0e 5b add r11, r14 8c28: 0b 4d mov r13, r11 8c2a: 12 c3 clrc 8c2c: 0b 10 rrc r11 8c2e: 0e 24 jz $+30 ;abs 0x8c4c 8c30: 0a 4b mov r11, r10 8c32: 08 4e mov r14, r8 8c34: 09 4c mov r12, r9 8c36: 28 83 decd r8 8c38: 29 83 decd r9 8c3a: a9 48 00 00 mov @r8, 0(r9) ;0x0000(r9) 8c3e: 3a 53 add #-1, r10 ;r3 As==11 8c40: fa 23 jnz $-10 ;abs 0x8c36 8c42: 0a 8b sub r11, r10 8c44: 0b 4a mov r10, r11 8c46: 0b 5b rla r11 8c48: 0e 5b add r11, r14 8c4a: 0c 5b add r11, r12 8c4c: 1d f3 and #1, r13 ;r3 As==01 8c4e: 03 24 jz $+8 ;abs 0x8c56 8c50: dc 4e ff ff mov.b -1(r14),-1(r12) ;0xffff(r14), 0xffff(r12) 8c54: ff ff 8c56: 37 41 pop r7 8c58: 38 41 pop r8 8c5a: 39 41 pop r9 8c5c: 3a 41 pop r10 8c5e: 3b 41 pop r11 8c60: 30 41 ret 00008c62 : 8c62: 0b 12 push r11 8c64: 0a 12 push r10 8c66: 09 12 push r9 8c68: 08 12 push r8 8c6a: 3d 90 06 00 cmp #6, r13 ;#0x0006 8c6e: 09 2c jc $+20 ;abs 0x8c82 8c70: 0c 4f mov r15, r12 8c72: 04 3c jmp $+10 ;abs 0x8c7c 8c74: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 8c78: 1c 53 inc r12 8c7a: 3d 53 add #-1, r13 ;r3 As==11 8c7c: 0d 93 tst r13 8c7e: fa 23 jnz $-10 ;abs 0x8c74 8c80: 20 3c jmp $+66 ;abs 0x8cc2 8c82: 4e 4e mov.b r14, r14 8c84: 4b 4e mov.b r14, r11 8c86: 0b 93 tst r11 8c88: 03 24 jz $+8 ;abs 0x8c90 8c8a: 0c 4b mov r11, r12 8c8c: 8c 10 swpb r12 8c8e: 0b dc bis r12, r11 8c90: 1f b3 bit #1, r15 ;r3 As==01 8c92: 06 24 jz $+14 ;abs 0x8ca0 8c94: 3d 53 add #-1, r13 ;r3 As==11 8c96: cf 4e 00 00 mov.b r14, 0(r15) ;0x0000(r15) 8c9a: 09 4f mov r15, r9 8c9c: 19 53 inc r9 8c9e: 01 3c jmp $+4 ;abs 0x8ca2 8ca0: 09 4f mov r15, r9 8ca2: 0c 4d mov r13, r12 8ca4: 12 c3 clrc 8ca6: 0c 10 rrc r12 8ca8: 0a 49 mov r9, r10 8caa: 08 4c mov r12, r8 8cac: 8a 4b 00 00 mov r11, 0(r10) ;0x0000(r10) 8cb0: 2a 53 incd r10 8cb2: 38 53 add #-1, r8 ;r3 As==11 8cb4: fb 23 jnz $-8 ;abs 0x8cac 8cb6: 0c 5c rla r12 8cb8: 0c 59 add r9, r12 8cba: 1d f3 and #1, r13 ;r3 As==01 8cbc: 02 24 jz $+6 ;abs 0x8cc2 8cbe: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 8cc2: 38 41 pop r8 8cc4: 39 41 pop r9 8cc6: 3a 41 pop r10 8cc8: 3b 41 pop r11 8cca: 30 41 ret 00008ccc : 8ccc: 0b 12 push r11 8cce: 0a 12 push r10 8cd0: 09 12 push r9 8cd2: 08 12 push r8 8cd4: 07 12 push r7 8cd6: 0b 4f mov r15, r11 8cd8: 69 4e mov.b @r14, r9 8cda: 49 93 tst.b r9 8cdc: 1b 24 jz $+56 ;abs 0x8d14 8cde: 0a 4e mov r14, r10 8ce0: 1a 53 inc r10 8ce2: 0d 4e mov r14, r13 8ce4: 1d 53 inc r13 8ce6: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 8cea: fc 23 jnz $-6 ;abs 0x8ce4 8cec: 07 4d mov r13, r7 8cee: 07 8a sub r10, r7 8cf0: 01 3c jmp $+4 ;abs 0x8cf4 8cf2: 0b 48 mov r8, r11 8cf4: 6f 4b mov.b @r11, r15 8cf6: 4f 93 tst.b r15 8cf8: 0c 24 jz $+26 ;abs 0x8d12 8cfa: 08 4b mov r11, r8 8cfc: 18 53 inc r8 8cfe: 4f 99 cmp.b r9, r15 8d00: f8 23 jnz $-14 ;abs 0x8cf2 8d02: 0d 47 mov r7, r13 8d04: 0e 4a mov r10, r14 8d06: 0f 48 mov r8, r15 8d08: b0 12 9e 96 call #0x969e 8d0c: 0f 93 tst r15 8d0e: f1 23 jnz $-28 ;abs 0x8cf2 8d10: 01 3c jmp $+4 ;abs 0x8d14 8d12: 0b 43 clr r11 8d14: 0f 4b mov r11, r15 8d16: 37 41 pop r7 8d18: 38 41 pop r8 8d1a: 39 41 pop r9 8d1c: 3a 41 pop r10 8d1e: 3b 41 pop r11 8d20: 30 41 ret 00008d22 : 8d22: 0b 12 push r11 8d24: 0e 4f mov r15, r14 8d26: 01 3c jmp $+4 ;abs 0x8d2a 8d28: 1e 53 inc r14 8d2a: 6f 4e mov.b @r14, r15 8d2c: 7f 90 20 00 cmp.b #32, r15 ;#0x0020 8d30: fb 27 jz $-8 ;abs 0x8d28 8d32: 7f 90 09 00 cmp.b #9, r15 ;#0x0009 8d36: f8 27 jz $-14 ;abs 0x8d28 8d38: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 8d3c: f5 27 jz $-20 ;abs 0x8d28 8d3e: 7f 90 0c 00 cmp.b #12, r15 ;#0x000c 8d42: f2 27 jz $-26 ;abs 0x8d28 8d44: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d 8d48: ef 27 jz $-32 ;abs 0x8d28 8d4a: 7f 90 0b 00 cmp.b #11, r15 ;#0x000b 8d4e: ec 27 jz $-38 ;abs 0x8d28 8d50: 7f 90 2d 00 cmp.b #45, r15 ;#0x002d 8d54: 03 20 jnz $+8 ;abs 0x8d5c 8d56: 1e 53 inc r14 8d58: 1b 43 mov #1, r11 ;r3 As==01 8d5a: 05 3c jmp $+12 ;abs 0x8d66 8d5c: 7f 90 2b 00 cmp.b #43, r15 ;#0x002b 8d60: 01 20 jnz $+4 ;abs 0x8d64 8d62: 1e 53 inc r14 8d64: 0b 43 clr r11 8d66: 6f 4e mov.b @r14, r15 8d68: 8f 11 sxt r15 8d6a: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8d6e: 3f 90 0a 00 cmp #10, r15 ;#0x000a 8d72: 19 2c jc $+52 ;abs 0x8da6 8d74: 0d 43 clr r13 8d76: 7c 4e mov.b @r14+, r12 8d78: 8c 11 sxt r12 8d7a: 0f 4c mov r12, r15 8d7c: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8d80: 0f 5d add r13, r15 8d82: 6d 4e mov.b @r14, r13 8d84: 8d 11 sxt r13 8d86: 3d 50 d0 ff add #-48, r13 ;#0xffd0 8d8a: 3d 90 0a 00 cmp #10, r13 ;#0x000a 8d8e: 06 2c jc $+14 ;abs 0x8d9c 8d90: 0f 5f rla r15 8d92: 0d 4f mov r15, r13 8d94: 0d 5d rla r13 8d96: 0d 5d rla r13 8d98: 0d 5f add r15, r13 8d9a: ed 3f jmp $-36 ;abs 0x8d76 8d9c: 0b 93 tst r11 8d9e: 04 24 jz $+10 ;abs 0x8da8 8da0: 3f e3 inv r15 8da2: 1f 53 inc r15 8da4: 01 3c jmp $+4 ;abs 0x8da8 8da6: 0f 43 clr r15 8da8: 3b 41 pop r11 8daa: 30 41 ret 00008dac : 8dac: 1e 42 02 02 mov &0x0202,r14 8db0: 1e 93 cmp #1, r14 ;r3 As==01 8db2: 0b 38 jl $+24 ;abs 0x8dca 8db4: 1d 42 00 02 mov &0x0200,r13 8db8: cd 4f 00 00 mov.b r15, 0(r13) ;0x0000(r13) 8dbc: 1d 53 inc r13 8dbe: 82 4d 00 02 mov r13, &0x0200 8dc2: 3e 53 add #-1, r14 ;r3 As==11 8dc4: 82 4e 02 02 mov r14, &0x0202 8dc8: 30 41 ret 8dca: 3f 43 mov #-1, r15 ;r3 As==11 8dcc: 30 41 ret 00008dce : 8dce: 0b 12 push r11 8dd0: 0a 12 push r10 8dd2: 21 83 decd r1 8dd4: 81 4e 00 00 mov r14, 0(r1) ;0x0000(r1) 8dd8: 1a 42 00 02 mov &0x0200,r10 8ddc: 1b 42 02 02 mov &0x0202,r11 8de0: 0d 4e mov r14, r13 8de2: 0e 4f mov r15, r14 8de4: 3f 40 ac 8d mov #-29268,r15 ;#0x8dac 8de8: b0 12 00 90 call #0x9000 8dec: 0f 9b cmp r11, r15 8dee: 05 38 jl $+12 ;abs 0x8dfa 8df0: 0e 4a mov r10, r14 8df2: 0e 5b add r11, r14 8df4: ce 43 ff ff mov.b #0, -1(r14) ;r3 As==00, 0xffff(r14) 8df8: 04 3c jmp $+10 ;abs 0x8e02 8dfa: 1e 42 00 02 mov &0x0200,r14 8dfe: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) 8e02: 21 53 incd r1 8e04: 3a 41 pop r10 8e06: 3b 41 pop r11 8e08: 30 41 ret 00008e0a : 8e0a: 92 41 02 00 mov 2(r1), &0x0200 ;0x0002(r1) 8e0e: 00 02 8e10: b2 40 ff 7f mov #32767, &0x0202 ;#0x7fff 8e14: 02 02 8e16: 0e 41 mov r1, r14 8e18: 3e 50 06 00 add #6, r14 ;#0x0006 8e1c: 1f 41 04 00 mov 4(r1), r15 ;0x0004(r1) 8e20: b0 12 ce 8d call #0x8dce 8e24: 30 41 ret 00008e26 : 8e26: 92 41 02 00 mov 2(r1), &0x0200 ;0x0002(r1) 8e2a: 00 02 8e2c: 92 41 04 00 mov 4(r1), &0x0202 ;0x0004(r1) 8e30: 02 02 8e32: 0e 41 mov r1, r14 8e34: 3e 52 add #8, r14 ;r2 As==11 8e36: 1f 41 06 00 mov 6(r1), r15 ;0x0006(r1) 8e3a: b0 12 ce 8d call #0x8dce 8e3e: 30 41 ret 00008e40 : 8e40: 0c 4e mov r14, r12 8e42: 82 4f 00 02 mov r15, &0x0200 8e46: b2 40 ff 7f mov #32767, &0x0202 ;#0x7fff 8e4a: 02 02 8e4c: 0e 4d mov r13, r14 8e4e: 0f 4c mov r12, r15 8e50: b0 12 ce 8d call #0x8dce 8e54: 30 41 ret 00008e56 : 8e56: 82 4f 00 02 mov r15, &0x0200 8e5a: 82 4e 02 02 mov r14, &0x0202 8e5e: 0e 4c mov r12, r14 8e60: 0f 4d mov r13, r15 8e62: b0 12 ce 8d call #0x8dce 8e66: 30 41 ret 00008e68 : 8e68: 0b 12 push r11 8e6a: 0a 12 push r10 8e6c: 09 12 push r9 8e6e: 08 12 push r8 8e70: 07 12 push r7 8e72: 06 12 push r6 8e74: 05 12 push r5 8e76: 04 12 push r4 8e78: 31 82 sub #8, r1 ;r2 As==11 8e7a: 08 4f mov r15, r8 8e7c: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 8e80: 09 4d mov r13, r9 8e82: 1f 41 1a 00 mov 26(r1), r15 ;0x001a(r1) 8e86: 1d 41 1c 00 mov 28(r1), r13 ;0x001c(r1) 8e8a: 4c 4d mov.b r13, r12 8e8c: 04 4d mov r13, r4 8e8e: 84 10 swpb r4 8e90: 45 44 mov.b r4, r5 8e92: 4e 4f mov.b r15, r14 8e94: 7e b0 40 00 bit.b #64, r14 ;#0x0040 8e98: 11 24 jz $+36 ;abs 0x8ebc 8e9a: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) 8e9e: 00 00 8ea0: 0e 4f mov r15, r14 8ea2: 8e 10 swpb r14 8ea4: 5e f3 and.b #1, r14 ;r3 As==01 8ea6: 03 24 jz $+8 ;abs 0x8eae 8ea8: 7e 40 58 00 mov.b #88, r14 ;#0x0058 8eac: 02 3c jmp $+6 ;abs 0x8eb2 8eae: 7e 40 78 00 mov.b #120, r14 ;#0x0078 8eb2: c1 4e 01 00 mov.b r14, 1(r1) ;0x0001(r1) 8eb6: 0c 41 mov r1, r12 8eb8: 2c 53 incd r12 8eba: 0f 3c jmp $+32 ;abs 0x8eda 8ebc: 7e f0 20 00 and.b #32, r14 ;#0x0020 8ec0: 04 24 jz $+10 ;abs 0x8eca 8ec2: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) 8ec6: 00 00 8ec8: 04 3c jmp $+10 ;abs 0x8ed2 8eca: 4c 93 tst.b r12 8ecc: 05 24 jz $+12 ;abs 0x8ed8 8ece: c1 4d 00 00 mov.b r13, 0(r1) ;0x0000(r1) 8ed2: 0c 41 mov r1, r12 8ed4: 1c 53 inc r12 8ed6: 01 3c jmp $+4 ;abs 0x8eda 8ed8: 0c 41 mov r1, r12 8eda: 0a 4c mov r12, r10 8edc: 8c 10 swpb r12 8ede: 8c 11 sxt r12 8ee0: 8c 10 swpb r12 8ee2: 8c 11 sxt r12 8ee4: 0b 4c mov r12, r11 8ee6: 06 41 mov r1, r6 8ee8: 0c 41 mov r1, r12 8eea: 8c 10 swpb r12 8eec: 8c 11 sxt r12 8eee: 8c 10 swpb r12 8ef0: 8c 11 sxt r12 8ef2: 07 4c mov r12, r7 8ef4: 0a 86 sub r6, r10 8ef6: 0b 77 subc r7, r11 8ef8: 0e 4f mov r15, r14 8efa: 8e 10 swpb r14 8efc: c1 4e 02 00 mov.b r14, 2(r1) ;0x0002(r1) 8f00: 6e f2 and.b #4, r14 ;r2 As==10 8f02: 02 24 jz $+6 ;abs 0x8f08 8f04: 07 45 mov r5, r7 8f06: 01 3c jmp $+4 ;abs 0x8f0a 8f08: 37 43 mov #-1, r7 ;r3 As==11 8f0a: 4f 4f mov.b r15, r15 8f0c: 7f b0 10 00 bit.b #16, r15 ;#0x0010 8f10: 3c 20 jnz $+122 ;abs 0x8f8a 8f12: 1d 41 04 00 mov 4(r1), r13 ;0x0004(r1) 8f16: 3d 53 add #-1, r13 ;r3 As==11 8f18: 1d 53 inc r13 8f1a: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 8f1e: fc 23 jnz $-6 ;abs 0x8f18 8f20: 1d 81 04 00 sub 4(r1), r13 ;0x0004(r1) 8f24: 09 9a cmp r10, r9 8f26: 02 28 jnc $+6 ;abs 0x8f2c 8f28: 09 8a sub r10, r9 8f2a: 01 3c jmp $+4 ;abs 0x8f2e 8f2c: 09 43 clr r9 8f2e: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) 8f32: 05 24 jz $+12 ;abs 0x8f3e 8f34: 09 95 cmp r5, r9 8f36: 02 28 jnc $+6 ;abs 0x8f3c 8f38: 09 85 sub r5, r9 8f3a: 01 3c jmp $+4 ;abs 0x8f3e 8f3c: 09 43 clr r9 8f3e: 05 4d mov r13, r5 8f40: 07 9d cmp r13, r7 8f42: 01 2c jc $+4 ;abs 0x8f46 8f44: 05 47 mov r7, r5 8f46: 4f 93 tst.b r15 8f48: 0d 38 jl $+28 ;abs 0x8f64 8f4a: f1 40 20 00 mov.b #32, 6(r1) ;#0x0020, 0x0006(r1) 8f4e: 06 00 8f50: 06 43 clr r6 8f52: 0b 43 clr r11 8f54: 0e 3c jmp $+30 ;abs 0x8f72 8f56: 0f 41 mov r1, r15 8f58: 0f 56 add r6, r15 8f5a: 6f 4f mov.b @r15, r15 8f5c: 8f 11 sxt r15 8f5e: 16 53 inc r6 8f60: 88 12 call r8 8f62: 01 3c jmp $+4 ;abs 0x8f66 8f64: 06 43 clr r6 8f66: 06 9a cmp r10, r6 8f68: f6 3b jl $-18 ;abs 0x8f56 8f6a: 0b 4a mov r10, r11 8f6c: f1 40 30 00 mov.b #48, 6(r1) ;#0x0030, 0x0006(r1) 8f70: 06 00 8f72: 05 8b sub r11, r5 8f74: 05 3c jmp $+12 ;abs 0x8f80 8f76: 5f 41 06 00 mov.b 6(r1), r15 ;0x0006(r1) 8f7a: 8f 11 sxt r15 8f7c: 88 12 call r8 8f7e: 1b 53 inc r11 8f80: 0f 45 mov r5, r15 8f82: 0f 5b add r11, r15 8f84: 0f 99 cmp r9, r15 8f86: f7 2b jnc $-16 ;abs 0x8f76 8f88: 0a 3c jmp $+22 ;abs 0x8f9e 8f8a: 06 43 clr r6 8f8c: 0b 43 clr r11 8f8e: 07 3c jmp $+16 ;abs 0x8f9e 8f90: 1b 53 inc r11 8f92: 0f 41 mov r1, r15 8f94: 0f 56 add r6, r15 8f96: 6f 4f mov.b @r15, r15 8f98: 8f 11 sxt r15 8f9a: 16 53 inc r6 8f9c: 88 12 call r8 8f9e: 06 9a cmp r10, r6 8fa0: f7 3b jl $-16 ;abs 0x8f90 8fa2: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) 8fa6: 02 24 jz $+6 ;abs 0x8fac 8fa8: 4a 44 mov.b r4, r10 8faa: 08 3c jmp $+18 ;abs 0x8fbc 8fac: 1a 41 04 00 mov 4(r1), r10 ;0x0004(r1) 8fb0: 0a 8b sub r11, r10 8fb2: 0d 3c jmp $+28 ;abs 0x8fce 8fb4: 3f 40 30 00 mov #48, r15 ;#0x0030 8fb8: 88 12 call r8 8fba: 7a 53 add.b #-1, r10 ;r3 As==11 8fbc: 4a 93 tst.b r10 8fbe: fa 23 jnz $-10 ;abs 0x8fb4 8fc0: 44 44 mov.b r4, r4 8fc2: 0b 54 add r4, r11 8fc4: f3 3f jmp $-24 ;abs 0x8fac 8fc6: 37 53 add #-1, r7 ;r3 As==11 8fc8: 8f 11 sxt r15 8fca: 88 12 call r8 8fcc: 1b 53 inc r11 8fce: 0f 4a mov r10, r15 8fd0: 0f 5b add r11, r15 8fd2: 6f 4f mov.b @r15, r15 8fd4: 4f 93 tst.b r15 8fd6: 07 24 jz $+16 ;abs 0x8fe6 8fd8: 07 93 tst r7 8fda: f5 23 jnz $-20 ;abs 0x8fc6 8fdc: 04 3c jmp $+10 ;abs 0x8fe6 8fde: 3f 40 20 00 mov #32, r15 ;#0x0020 8fe2: 88 12 call r8 8fe4: 1b 53 inc r11 8fe6: 0b 99 cmp r9, r11 8fe8: fa 2b jnc $-10 ;abs 0x8fde 8fea: 0f 4b mov r11, r15 8fec: 31 52 add #8, r1 ;r2 As==11 8fee: 34 41 pop r4 8ff0: 35 41 pop r5 8ff2: 36 41 pop r6 8ff4: 37 41 pop r7 8ff6: 38 41 pop r8 8ff8: 39 41 pop r9 8ffa: 3a 41 pop r10 8ffc: 3b 41 pop r11 8ffe: 30 41 ret 00009000 : 9000: 0b 12 push r11 9002: 0a 12 push r10 9004: 09 12 push r9 9006: 08 12 push r8 9008: 07 12 push r7 900a: 06 12 push r6 900c: 05 12 push r5 900e: 04 12 push r4 9010: 31 50 b6 ff add #-74, r1 ;#0xffb6 9014: 81 4f 3a 00 mov r15, 58(r1) ;0x003a(r1) 9018: 06 4e mov r14, r6 901a: 05 4d mov r13, r5 901c: 81 4e 3e 00 mov r14, 62(r1) ;0x003e(r1) 9020: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) 9024: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9028: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) 902c: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 9030: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) 9034: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) 9038: 07 43 clr r7 903a: 81 43 2c 00 mov #0, 44(r1) ;r3 As==00, 0x002c(r1) 903e: 0e 41 mov r1, r14 9040: 3e 50 1c 00 add #28, r14 ;#0x001c 9044: 81 4e 1c 00 mov r14, 28(r1) ;0x001c(r1) 9048: 30 40 7a 96 br #0x967a 904c: 0f 46 mov r6, r15 904e: 1f 53 inc r15 9050: 81 4f 40 00 mov r15, 64(r1) ;0x0040(r1) 9054: 07 93 tst r7 9056: 1e 20 jnz $+62 ;abs 0x9094 9058: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 905c: 13 20 jnz $+40 ;abs 0x9084 905e: 81 43 00 00 mov #0, 0(r1) ;r3 As==00, 0x0000(r1) 9062: 81 43 02 00 mov #0, 2(r1) ;r3 As==00, 0x0002(r1) 9066: 81 46 3e 00 mov r6, 62(r1) ;0x003e(r1) 906a: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) 906e: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9072: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) 9076: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 907a: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) 907e: 30 40 70 96 br #0x9670 9082: 05 47 mov r7, r5 9084: 8e 11 sxt r14 9086: 0f 4e mov r14, r15 9088: 91 12 3c 00 call 60(r1) ;0x003c(r1) 908c: 91 53 2c 00 inc 44(r1) ;0x002c(r1) 9090: 30 40 56 96 br #0x9656 9094: 7e 90 63 00 cmp.b #99, r14 ;#0x0063 9098: c5 24 jz $+396 ;abs 0x9224 909a: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 909e: 27 34 jge $+80 ;abs 0x90ee 90a0: 7e 90 30 00 cmp.b #48, r14 ;#0x0030 90a4: 94 24 jz $+298 ;abs 0x91ce 90a6: 7e 90 31 00 cmp.b #49, r14 ;#0x0031 90aa: 1a 34 jge $+54 ;abs 0x90e0 90ac: 7e 90 2a 00 cmp.b #42, r14 ;#0x002a 90b0: 77 24 jz $+240 ;abs 0x91a0 90b2: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b 90b6: 0a 34 jge $+22 ;abs 0x90cc 90b8: 7e 90 23 00 cmp.b #35, r14 ;#0x0023 90bc: 42 24 jz $+134 ;abs 0x9142 90be: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 90c2: e0 27 jz $-62 ;abs 0x9084 90c4: 7e 90 20 00 cmp.b #32, r14 ;#0x0020 90c8: 32 20 jnz $+102 ;abs 0x912e 90ca: 56 3c jmp $+174 ;abs 0x9178 90cc: 7e 90 2d 00 cmp.b #45, r14 ;#0x002d 90d0: 49 24 jz $+148 ;abs 0x9164 90d2: 7e 90 2e 00 cmp.b #46, r14 ;#0x002e 90d6: 5b 24 jz $+184 ;abs 0x918e 90d8: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b 90dc: 28 20 jnz $+82 ;abs 0x912e 90de: 47 3c jmp $+144 ;abs 0x916e 90e0: 7e 90 3a 00 cmp.b #58, r14 ;#0x003a 90e4: 8c 38 jl $+282 ;abs 0x91fe 90e6: 7e 90 58 00 cmp.b #88, r14 ;#0x0058 90ea: 21 20 jnz $+68 ;abs 0x912e 90ec: e9 3c jmp $+468 ;abs 0x92c0 90ee: 7e 90 6f 00 cmp.b #111, r14 ;#0x006f 90f2: 24 24 jz $+74 ;abs 0x913c 90f4: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 90f8: 0a 34 jge $+22 ;abs 0x910e 90fa: 7e 90 69 00 cmp.b #105, r14 ;#0x0069 90fe: e3 24 jz $+456 ;abs 0x92c6 9100: 7e 90 6c 00 cmp.b #108, r14 ;#0x006c 9104: 22 24 jz $+70 ;abs 0x914a 9106: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 910a: 11 20 jnz $+36 ;abs 0x912e 910c: dc 3c jmp $+442 ;abs 0x92c6 910e: 7e 90 73 00 cmp.b #115, r14 ;#0x0073 9112: 98 24 jz $+306 ;abs 0x9244 9114: 7e 90 74 00 cmp.b #116, r14 ;#0x0074 9118: 04 34 jge $+10 ;abs 0x9122 911a: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 911e: 07 20 jnz $+16 ;abs 0x912e 9120: b8 3c jmp $+370 ;abs 0x9292 9122: 7e 90 75 00 cmp.b #117, r14 ;#0x0075 9126: d1 24 jz $+420 ;abs 0x92ca 9128: 7e 90 78 00 cmp.b #120, r14 ;#0x0078 912c: d2 24 jz $+422 ;abs 0x92d2 912e: 19 41 3e 00 mov 62(r1), r9 ;0x003e(r1) 9132: 18 41 2c 00 mov 44(r1), r8 ;0x002c(r1) 9136: 08 89 sub r9, r8 9138: 30 40 44 96 br #0x9644 913c: b1 42 28 00 mov #8, 40(r1) ;r2 As==11, 0x0028(r1) 9140: cb 3c jmp $+408 ;abs 0x92d8 9142: f1 d2 00 00 bis.b #8, 0(r1) ;r2 As==11, 0x0000(r1) 9146: 30 40 74 96 br #0x9674 914a: 69 41 mov.b @r1, r9 914c: 59 f3 and.b #1, r9 ;r3 As==01 914e: 6e 41 mov.b @r1, r14 9150: 04 24 jz $+10 ;abs 0x915a 9152: 7e f0 fe ff and.b #-2, r14 ;#0xfffe 9156: 6e d3 bis.b #2, r14 ;r3 As==10 9158: 01 3c jmp $+4 ;abs 0x915c 915a: 5e d3 bis.b #1, r14 ;r3 As==01 915c: c1 4e 00 00 mov.b r14, 0(r1) ;0x0000(r1) 9160: 30 40 74 96 br #0x9674 9164: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) 9168: 00 00 916a: 30 40 74 96 br #0x9674 916e: f1 40 2b 00 mov.b #43, 2(r1) ;#0x002b, 0x0002(r1) 9172: 02 00 9174: 30 40 74 96 br #0x9674 9178: f1 90 2b 00 cmp.b #43, 2(r1) ;#0x002b, 0x0002(r1) 917c: 02 00 917e: 02 20 jnz $+6 ;abs 0x9184 9180: 30 40 74 96 br #0x9674 9184: f1 40 20 00 mov.b #32, 2(r1) ;#0x0020, 0x0002(r1) 9188: 02 00 918a: 30 40 74 96 br #0x9674 918e: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9192: 02 24 jz $+6 ;abs 0x9198 9194: 30 40 5a 96 br #0x965a 9198: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 919c: 30 40 74 96 br #0x9674 91a0: 0e 45 mov r5, r14 91a2: 2e 53 incd r14 91a4: 2a 45 mov @r5, r10 91a6: 0a 93 tst r10 91a8: 03 38 jl $+8 ;abs 0x91b0 91aa: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 91ae: 0d 3c jmp $+28 ;abs 0x91ca 91b0: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 91b4: 02 24 jz $+6 ;abs 0x91ba 91b6: 30 40 6a 96 br #0x966a 91ba: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) 91be: 00 00 91c0: 3a e3 inv r10 91c2: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 91c6: 91 53 26 00 inc 38(r1) ;0x0026(r1) 91ca: 05 4e mov r14, r5 91cc: 27 3c jmp $+80 ;abs 0x921c 91ce: 81 93 26 00 tst 38(r1) ;0x0026(r1) 91d2: 15 20 jnz $+44 ;abs 0x91fe 91d4: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 91d8: 12 20 jnz $+38 ;abs 0x91fe 91da: 69 41 mov.b @r1, r9 91dc: 79 f0 10 00 and.b #16, r9 ;#0x0010 91e0: 5e 43 mov.b #1, r14 ;r3 As==01 91e2: 01 24 jz $+4 ;abs 0x91e6 91e4: 4e 43 clr.b r14 91e6: 4e 4e mov.b r14, r14 91e8: 0e 11 rra r14 91ea: 0e 43 clr r14 91ec: 4e 10 rrc.b r14 91ee: 6a 41 mov.b @r1, r10 91f0: 7a f0 7f 00 and.b #127, r10 ;#0x007f 91f4: 4a de bis.b r14, r10 91f6: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) 91fa: 30 40 74 96 br #0x9674 91fe: 1a 41 26 00 mov 38(r1), r10 ;0x0026(r1) 9202: 0a 5a rla r10 9204: 0c 4a mov r10, r12 9206: 0c 5c rla r12 9208: 0c 5c rla r12 920a: 0a 5c add r12, r10 920c: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 9210: b1 50 d0 ff add #-48, 38(r1) ;#0xffd0, 0x0026(r1) 9214: 26 00 9216: 8e 11 sxt r14 9218: 81 5e 26 00 add r14, 38(r1) ;0x0026(r1) 921c: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) 9220: 30 40 74 96 br #0x9674 9224: 07 45 mov r5, r7 9226: 27 53 incd r7 9228: 6e 45 mov.b @r5, r14 922a: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 922e: 03 20 jnz $+8 ;abs 0x9236 9230: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9234: 26 27 jz $-434 ;abs 0x9082 9236: c1 4e 04 00 mov.b r14, 4(r1) ;0x0004(r1) 923a: c1 43 05 00 mov.b #0, 5(r1) ;r3 As==00, 0x0005(r1) 923e: 0e 41 mov r1, r14 9240: 2e 52 add #4, r14 ;r2 As==10 9242: 03 3c jmp $+8 ;abs 0x924a 9244: 07 45 mov r5, r7 9246: 27 53 incd r7 9248: 2e 45 mov @r5, r14 924a: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 924e: 07 24 jz $+16 ;abs 0x925e 9250: e1 d2 01 00 bis.b #4, 1(r1) ;r2 As==10, 0x0001(r1) 9254: 1f 41 26 00 mov 38(r1), r15 ;0x0026(r1) 9258: c1 4f 03 00 mov.b r15, 3(r1) ;0x0003(r1) 925c: 06 3c jmp $+14 ;abs 0x926a 925e: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9262: 03 24 jz $+8 ;abs 0x926a 9264: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 9268: 30 00 926a: 0e 93 tst r14 926c: 02 20 jnz $+6 ;abs 0x9272 926e: 3e 40 85 98 mov #-26491,r14 ;#0x9885 9272: 11 12 04 00 push 4(r1) ;0x0004(r1) 9276: 11 12 04 00 push 4(r1) ;0x0004(r1) 927a: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) 927e: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) 9282: b0 12 68 8e call #0x8e68 9286: 21 52 add #4, r1 ;r2 As==10 9288: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) 928c: 05 47 mov r7, r5 928e: 30 40 56 96 br #0x9656 9292: 07 45 mov r5, r7 9294: 27 53 incd r7 9296: 29 45 mov @r5, r9 9298: 81 49 1e 00 mov r9, 30(r1) ;0x001e(r1) 929c: 5e 43 mov.b #1, r14 ;r3 As==01 929e: 09 93 tst r9 92a0: 01 20 jnz $+4 ;abs 0x92a4 92a2: 4e 43 clr.b r14 92a4: 4e 5e rla.b r14 92a6: 4e 5e rla.b r14 92a8: 4e 5e rla.b r14 92aa: 6a 41 mov.b @r1, r10 92ac: 7a f0 f7 ff and.b #-9, r10 ;#0xfff7 92b0: 4a de bis.b r14, r10 92b2: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) 92b6: 05 47 mov r7, r5 92b8: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) 92bc: 28 00 92be: 53 3c jmp $+168 ;abs 0x9366 92c0: d1 d3 01 00 bis.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 92c4: 06 3c jmp $+14 ;abs 0x92d2 92c6: e1 d2 00 00 bis.b #4, 0(r1) ;r2 As==10, 0x0000(r1) 92ca: b1 40 0a 00 mov #10, 40(r1) ;#0x000a, 0x0028(r1) 92ce: 28 00 92d0: 03 3c jmp $+8 ;abs 0x92d8 92d2: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) 92d6: 28 00 92d8: 6b 41 mov.b @r1, r11 92da: 6b b3 bit.b #2, r11 ;r3 As==10 92dc: 24 24 jz $+74 ;abs 0x9326 92de: 0c 45 mov r5, r12 92e0: 3c 52 add #8, r12 ;r2 As==11 92e2: 28 45 mov @r5, r8 92e4: 17 45 02 00 mov 2(r5), r7 ;0x0002(r5) 92e8: 16 45 04 00 mov 4(r5), r6 ;0x0004(r5) 92ec: 1b 45 06 00 mov 6(r5), r11 ;0x0006(r5) 92f0: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) 92f4: 81 47 20 00 mov r7, 32(r1) ;0x0020(r1) 92f8: 81 46 22 00 mov r6, 34(r1) ;0x0022(r1) 92fc: 81 4b 24 00 mov r11, 36(r1) ;0x0024(r1) 9300: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 9304: 08 93 tst r8 9306: 06 20 jnz $+14 ;abs 0x9314 9308: 07 93 tst r7 930a: 04 20 jnz $+10 ;abs 0x9314 930c: 06 93 tst r6 930e: 02 20 jnz $+6 ;abs 0x9314 9310: 0b 93 tst r11 9312: 02 24 jz $+6 ;abs 0x9318 9314: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9318: 0b 5b rla r11 931a: 0b 43 clr r11 931c: 0b 6b rlc r11 931e: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) 9322: 05 4c mov r12, r5 9324: 20 3c jmp $+66 ;abs 0x9366 9326: 5b f3 and.b #1, r11 ;r3 As==01 9328: 07 45 mov r5, r7 932a: 0d 24 jz $+28 ;abs 0x9346 932c: 27 52 add #4, r7 ;r2 As==10 932e: 28 45 mov @r5, r8 9330: 1b 45 02 00 mov 2(r5), r11 ;0x0002(r5) 9334: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) 9338: 81 4b 20 00 mov r11, 32(r1) ;0x0020(r1) 933c: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 9340: 08 93 tst r8 9342: 09 20 jnz $+20 ;abs 0x9356 9344: 06 3c jmp $+14 ;abs 0x9352 9346: 27 53 incd r7 9348: 2b 45 mov @r5, r11 934a: 81 4b 1e 00 mov r11, 30(r1) ;0x001e(r1) 934e: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 9352: 0b 93 tst r11 9354: 02 24 jz $+6 ;abs 0x935a 9356: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 935a: 0b 5b rla r11 935c: 0b 43 clr r11 935e: 0b 6b rlc r11 9360: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) 9364: 05 47 mov r7, r5 9366: f1 b2 00 00 bit.b #8, 0(r1) ;r2 As==11, 0x0000(r1) 936a: 12 24 jz $+38 ;abs 0x9390 936c: c1 93 2b 00 tst.b 43(r1) ;0x002b(r1) 9370: 0f 20 jnz $+32 ;abs 0x9390 9372: 68 41 mov.b @r1, r8 9374: b1 90 10 00 cmp #16, 40(r1) ;#0x0010, 0x0028(r1) 9378: 28 00 937a: 03 20 jnz $+8 ;abs 0x9382 937c: 78 d0 40 00 bis.b #64, r8 ;#0x0040 9380: 05 3c jmp $+12 ;abs 0x938c 9382: b1 92 28 00 cmp #8, 40(r1) ;r2 As==11, 0x0028(r1) 9386: 04 20 jnz $+10 ;abs 0x9390 9388: 78 d0 20 00 bis.b #32, r8 ;#0x0020 938c: c1 48 00 00 mov.b r8, 0(r1) ;0x0000(r1) 9390: 68 41 mov.b @r1, r8 9392: 68 b2 bit.b #4, r8 ;r2 As==10 9394: 30 24 jz $+98 ;abs 0x93f6 9396: c1 93 2f 00 tst.b 47(r1) ;0x002f(r1) 939a: 2d 24 jz $+92 ;abs 0x93f6 939c: f1 40 2d 00 mov.b #45, 2(r1) ;#0x002d, 0x0002(r1) 93a0: 02 00 93a2: 68 b3 bit.b #2, r8 ;r3 As==10 93a4: 11 24 jz $+36 ;abs 0x93c8 93a6: b1 e3 1e 00 xor #-1, 30(r1) ;r3 As==11, 0x001e(r1) 93aa: b1 e3 20 00 xor #-1, 32(r1) ;r3 As==11, 0x0020(r1) 93ae: b1 e3 22 00 xor #-1, 34(r1) ;r3 As==11, 0x0022(r1) 93b2: b1 e3 24 00 xor #-1, 36(r1) ;r3 As==11, 0x0024(r1) 93b6: 91 53 1e 00 inc 30(r1) ;0x001e(r1) 93ba: 81 63 20 00 adc 32(r1) ;0x0020(r1) 93be: 81 63 22 00 adc 34(r1) ;0x0022(r1) 93c2: 81 63 24 00 adc 36(r1) ;0x0024(r1) 93c6: 17 3c jmp $+48 ;abs 0x93f6 93c8: 58 b3 bit.b #1, r8 ;r3 As==01 93ca: 0f 24 jz $+32 ;abs 0x93ea 93cc: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) 93d0: 1b 41 20 00 mov 32(r1), r11 ;0x0020(r1) 93d4: 3a e3 inv r10 93d6: 3b e3 inv r11 93d8: 0e 4a mov r10, r14 93da: 0f 4b mov r11, r15 93dc: 1e 53 inc r14 93de: 0f 63 adc r15 93e0: 81 4e 1e 00 mov r14, 30(r1) ;0x001e(r1) 93e4: 81 4f 20 00 mov r15, 32(r1) ;0x0020(r1) 93e8: 06 3c jmp $+14 ;abs 0x93f6 93ea: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) 93ee: 3a e3 inv r10 93f0: 1a 53 inc r10 93f2: 81 4a 1e 00 mov r10, 30(r1) ;0x001e(r1) 93f6: c1 43 1b 00 mov.b #0, 27(r1) ;r3 As==00, 0x001b(r1) 93fa: 68 b3 bit.b #2, r8 ;r3 As==10 93fc: 6a 24 jz $+214 ;abs 0x94d2 93fe: 16 41 1e 00 mov 30(r1), r6 ;0x001e(r1) 9402: 91 41 20 00 mov 32(r1), 60(r1) ;0x0020(r1), 0x003c(r1) 9406: 3c 00 9408: 18 41 22 00 mov 34(r1), r8 ;0x0022(r1) 940c: 14 41 24 00 mov 36(r1), r4 ;0x0024(r1) 9410: 07 41 mov r1, r7 9412: 37 50 1a 00 add #26, r7 ;#0x001a 9416: 09 46 mov r6, r9 9418: 91 41 28 00 mov 40(r1), 50(r1) ;0x0028(r1), 0x0032(r1) 941c: 32 00 941e: 1b 41 28 00 mov 40(r1), r11 ;0x0028(r1) 9422: 8b 10 swpb r11 9424: 8b 11 sxt r11 9426: 8b 10 swpb r11 9428: 8b 11 sxt r11 942a: 81 4b 34 00 mov r11, 52(r1) ;0x0034(r1) 942e: 81 4b 36 00 mov r11, 54(r1) ;0x0036(r1) 9432: 81 4b 38 00 mov r11, 56(r1) ;0x0038(r1) 9436: 11 12 3a 00 push 58(r1) ;0x003a(r1) 943a: 11 12 3a 00 push 58(r1) ;0x003a(r1) 943e: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9442: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9446: 0c 49 mov r9, r12 9448: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 944c: 0e 48 mov r8, r14 944e: 0f 44 mov r4, r15 9450: b0 12 4a 97 call #0x974a 9454: 31 52 add #8, r1 ;r2 As==11 9456: 0b 4c mov r12, r11 9458: 3c 90 0a 00 cmp #10, r12 ;#0x000a 945c: 05 34 jge $+12 ;abs 0x9468 945e: 7b 50 30 00 add.b #48, r11 ;#0x0030 9462: c7 4b 00 00 mov.b r11, 0(r7) ;0x0000(r7) 9466: 0c 3c jmp $+26 ;abs 0x9480 9468: 4b 4c mov.b r12, r11 946a: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 946e: 03 24 jz $+8 ;abs 0x9476 9470: 7a 40 37 00 mov.b #55, r10 ;#0x0037 9474: 02 3c jmp $+6 ;abs 0x947a 9476: 7a 40 57 00 mov.b #87, r10 ;#0x0057 947a: 4a 5b add.b r11, r10 947c: c7 4a 00 00 mov.b r10, 0(r7) ;0x0000(r7) 9480: 06 47 mov r7, r6 9482: 36 53 add #-1, r6 ;r3 As==11 9484: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9488: 11 12 3a 00 push 58(r1) ;0x003a(r1) 948c: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9490: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9494: 0c 49 mov r9, r12 9496: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 949a: 0e 48 mov r8, r14 949c: 0f 44 mov r4, r15 949e: b0 12 24 97 call #0x9724 94a2: 31 52 add #8, r1 ;r2 As==11 94a4: 09 4c mov r12, r9 94a6: 81 4d 3c 00 mov r13, 60(r1) ;0x003c(r1) 94aa: 08 4e mov r14, r8 94ac: 04 4f mov r15, r4 94ae: 37 53 add #-1, r7 ;r3 As==11 94b0: 0c 93 tst r12 94b2: b2 23 jnz $-154 ;abs 0x9418 94b4: 0d 93 tst r13 94b6: b0 23 jnz $-158 ;abs 0x9418 94b8: 0e 93 tst r14 94ba: ae 23 jnz $-162 ;abs 0x9418 94bc: 0f 93 tst r15 94be: ac 23 jnz $-166 ;abs 0x9418 94c0: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 94c4: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 94c8: 81 43 22 00 mov #0, 34(r1) ;r3 As==00, 0x0022(r1) 94cc: 81 43 24 00 mov #0, 36(r1) ;r3 As==00, 0x0024(r1) 94d0: 6c 3c jmp $+218 ;abs 0x95aa 94d2: 58 b3 bit.b #1, r8 ;r3 As==01 94d4: 3e 24 jz $+126 ;abs 0x9552 94d6: 14 41 1e 00 mov 30(r1), r4 ;0x001e(r1) 94da: 17 41 20 00 mov 32(r1), r7 ;0x0020(r1) 94de: 08 41 mov r1, r8 94e0: 38 50 1a 00 add #26, r8 ;#0x001a 94e4: 19 41 28 00 mov 40(r1), r9 ;0x0028(r1) 94e8: 89 10 swpb r9 94ea: 89 11 sxt r9 94ec: 89 10 swpb r9 94ee: 89 11 sxt r9 94f0: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) 94f4: 0d 49 mov r9, r13 94f6: 0e 44 mov r4, r14 94f8: 0f 47 mov r7, r15 94fa: b0 12 2c 8b call #0x8b2c 94fe: 0b 4e mov r14, r11 9500: 3e 90 0a 00 cmp #10, r14 ;#0x000a 9504: 05 34 jge $+12 ;abs 0x9510 9506: 7b 50 30 00 add.b #48, r11 ;#0x0030 950a: c8 4b 00 00 mov.b r11, 0(r8) ;0x0000(r8) 950e: 0c 3c jmp $+26 ;abs 0x9528 9510: 4b 4e mov.b r14, r11 9512: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 9516: 03 24 jz $+8 ;abs 0x951e 9518: 7a 40 37 00 mov.b #55, r10 ;#0x0037 951c: 02 3c jmp $+6 ;abs 0x9522 951e: 7a 40 57 00 mov.b #87, r10 ;#0x0057 9522: 4a 5b add.b r11, r10 9524: c8 4a 00 00 mov.b r10, 0(r8) ;0x0000(r8) 9528: 06 48 mov r8, r6 952a: 36 53 add #-1, r6 ;r3 As==11 952c: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) 9530: 0d 49 mov r9, r13 9532: 0e 44 mov r4, r14 9534: 0f 47 mov r7, r15 9536: b0 12 f6 8a call #0x8af6 953a: 04 4e mov r14, r4 953c: 07 4f mov r15, r7 953e: 38 53 add #-1, r8 ;r3 As==11 9540: 0e 93 tst r14 9542: d0 23 jnz $-94 ;abs 0x94e4 9544: 0f 93 tst r15 9546: ce 23 jnz $-98 ;abs 0x94e4 9548: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 954c: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 9550: 2c 3c jmp $+90 ;abs 0x95aa 9552: 17 41 1e 00 mov 30(r1), r7 ;0x001e(r1) 9556: 08 41 mov r1, r8 9558: 38 50 1a 00 add #26, r8 ;#0x001a 955c: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) 9560: 0f 47 mov r7, r15 9562: b0 12 ee 8a call #0x8aee 9566: 0d 4f mov r15, r13 9568: 3f 90 0a 00 cmp #10, r15 ;#0x000a 956c: 05 34 jge $+12 ;abs 0x9578 956e: 7d 50 30 00 add.b #48, r13 ;#0x0030 9572: c8 4d 00 00 mov.b r13, 0(r8) ;0x0000(r8) 9576: 0c 3c jmp $+26 ;abs 0x9590 9578: 4d 4f mov.b r15, r13 957a: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 957e: 03 24 jz $+8 ;abs 0x9586 9580: 7c 40 37 00 mov.b #55, r12 ;#0x0037 9584: 02 3c jmp $+6 ;abs 0x958a 9586: 7c 40 57 00 mov.b #87, r12 ;#0x0057 958a: 4c 5d add.b r13, r12 958c: c8 4c 00 00 mov.b r12, 0(r8) ;0x0000(r8) 9590: 06 48 mov r8, r6 9592: 36 53 add #-1, r6 ;r3 As==11 9594: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) 9598: 0f 47 mov r7, r15 959a: b0 12 d4 8a call #0x8ad4 959e: 07 4f mov r15, r7 95a0: 38 53 add #-1, r8 ;r3 As==11 95a2: 0f 93 tst r15 95a4: db 23 jnz $-72 ;abs 0x955c 95a6: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 95aa: b1 90 0a 00 cmp #10, 40(r1) ;#0x000a, 0x0028(r1) 95ae: 28 00 95b0: 02 24 jz $+6 ;abs 0x95b6 95b2: c1 43 02 00 mov.b #0, 2(r1) ;r3 As==00, 0x0002(r1) 95b6: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 95ba: 2a 24 jz $+86 ;abs 0x9610 95bc: 0f 41 mov r1, r15 95be: 3f 50 1c 00 add #28, r15 ;#0x001c 95c2: 81 4f 42 00 mov r15, 66(r1) ;0x0042(r1) 95c6: 1a 41 1c 00 mov 28(r1), r10 ;0x001c(r1) 95ca: 8a 10 swpb r10 95cc: 8a 11 sxt r10 95ce: 8a 10 swpb r10 95d0: 8a 11 sxt r10 95d2: 81 4a 44 00 mov r10, 68(r1) ;0x0044(r1) 95d6: 81 46 46 00 mov r6, 70(r1) ;0x0046(r1) 95da: 0a 46 mov r6, r10 95dc: 8a 10 swpb r10 95de: 8a 11 sxt r10 95e0: 8a 10 swpb r10 95e2: 8a 11 sxt r10 95e4: 81 4a 48 00 mov r10, 72(r1) ;0x0048(r1) 95e8: 1c 41 42 00 mov 66(r1), r12 ;0x0042(r1) 95ec: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 95f0: 1c 81 46 00 sub 70(r1), r12 ;0x0046(r1) 95f4: 1d 71 48 00 subc 72(r1), r13 ;0x0048(r1) 95f8: 2c 83 decd r12 95fa: 1c 91 26 00 cmp 38(r1), r12 ;0x0026(r1) 95fe: 0e 2c jc $+30 ;abs 0x961c 9600: e1 d3 01 00 bis.b #2, 1(r1) ;r3 As==10, 0x0001(r1) 9604: 5e 41 26 00 mov.b 38(r1), r14 ;0x0026(r1) 9608: 4e 8c sub.b r12, r14 960a: c1 4e 03 00 mov.b r14, 3(r1) ;0x0003(r1) 960e: 06 3c jmp $+14 ;abs 0x961c 9610: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9614: 03 24 jz $+8 ;abs 0x961c 9616: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 961a: 30 00 961c: 11 12 04 00 push 4(r1) ;0x0004(r1) 9620: 11 12 04 00 push 4(r1) ;0x0004(r1) 9624: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) 9628: 0e 46 mov r6, r14 962a: 1e 53 inc r14 962c: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) 9630: b0 12 68 8e call #0x8e68 9634: 21 52 add #4, r1 ;r2 As==10 9636: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) 963a: 0d 3c jmp $+28 ;abs 0x9656 963c: 7f 49 mov.b @r9+, r15 963e: 8f 11 sxt r15 9640: 91 12 3c 00 call 60(r1) ;0x003c(r1) 9644: 0e 49 mov r9, r14 9646: 0e 58 add r8, r14 9648: 19 91 40 00 cmp 64(r1), r9 ;0x0040(r1) 964c: f7 2b jnc $-16 ;abs 0x963c 964e: 81 49 3e 00 mov r9, 62(r1) ;0x003e(r1) 9652: 81 4e 2c 00 mov r14, 44(r1) ;0x002c(r1) 9656: 07 43 clr r7 9658: 0e 3c jmp $+30 ;abs 0x9676 965a: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 965e: 30 00 9660: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 9664: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 9668: 03 3c jmp $+8 ;abs 0x9670 966a: 05 4e mov r14, r5 966c: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) 9670: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) 9674: 17 43 mov #1, r7 ;r3 As==01 9676: 16 41 40 00 mov 64(r1), r6 ;0x0040(r1) 967a: 6e 46 mov.b @r6, r14 967c: 4e 93 tst.b r14 967e: 02 24 jz $+6 ;abs 0x9684 9680: 30 40 4c 90 br #0x904c 9684: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 9688: 31 50 4a 00 add #74, r1 ;#0x004a 968c: 34 41 pop r4 968e: 35 41 pop r5 9690: 36 41 pop r6 9692: 37 41 pop r7 9694: 38 41 pop r8 9696: 39 41 pop r9 9698: 3a 41 pop r10 969a: 3b 41 pop r11 969c: 30 41 ret 0000969e : 969e: 0b 12 push r11 96a0: 0d 93 tst r13 96a2: 0e 24 jz $+30 ;abs 0x96c0 96a4: 6c 4f mov.b @r15, r12 96a6: 7b 4e mov.b @r14+, r11 96a8: 4c 9b cmp.b r11, r12 96aa: 05 24 jz $+12 ;abs 0x96b6 96ac: 4f 4c mov.b r12, r15 96ae: 5e 4e ff ff mov.b -1(r14),r14 ;0xffff(r14) 96b2: 0f 8e sub r14, r15 96b4: 06 3c jmp $+14 ;abs 0x96c2 96b6: 1f 53 inc r15 96b8: 4c 93 tst.b r12 96ba: 02 24 jz $+6 ;abs 0x96c0 96bc: 3d 53 add #-1, r13 ;r3 As==11 96be: f0 3f jmp $-30 ;abs 0x96a0 96c0: 0f 43 clr r15 96c2: 3b 41 pop r11 96c4: 30 41 ret 000096c6 <__xabi_udivmod64>: 96c6: 07 12 push r7 96c8: 06 12 push r6 96ca: 05 12 push r5 96cc: 04 12 push r4 96ce: 30 12 40 00 push #64 ;#0x0040 96d2: 04 48 mov r8, r4 96d4: 05 49 mov r9, r5 96d6: 06 4a mov r10, r6 96d8: 07 4b mov r11, r7 96da: 08 43 clr r8 96dc: 09 43 clr r9 96de: 0a 43 clr r10 96e0: 0b 43 clr r11 96e2: 0c 5c rla r12 96e4: 0d 6d rlc r13 96e6: 0e 6e rlc r14 96e8: 0f 6f rlc r15 96ea: 08 68 rlc r8 96ec: 09 69 rlc r9 96ee: 0a 6a rlc r10 96f0: 0b 6b rlc r11 96f2: 0b 97 cmp r7, r11 96f4: 0e 28 jnc $+30 ;abs 0x9712 96f6: 08 20 jnz $+18 ;abs 0x9708 96f8: 0a 96 cmp r6, r10 96fa: 0b 28 jnc $+24 ;abs 0x9712 96fc: 05 20 jnz $+12 ;abs 0x9708 96fe: 09 95 cmp r5, r9 9700: 08 28 jnc $+18 ;abs 0x9712 9702: 02 20 jnz $+6 ;abs 0x9708 9704: 08 94 cmp r4, r8 9706: 05 28 jnc $+12 ;abs 0x9712 9708: 08 84 sub r4, r8 970a: 09 75 subc r5, r9 970c: 0a 76 subc r6, r10 970e: 0b 77 subc r7, r11 9710: 1c d3 bis #1, r12 ;r3 As==01 9712: 91 83 00 00 dec 0(r1) ;0x0000(r1) 9716: e5 23 jnz $-52 ;abs 0x96e2 9718: 21 53 incd r1 971a: 34 41 pop r4 971c: 35 41 pop r5 971e: 36 41 pop r6 9720: 37 41 pop r7 9722: 30 41 ret 00009724 <__udivdi3>: 9724: 0b 12 push r11 9726: 0a 12 push r10 9728: 09 12 push r9 972a: 08 12 push r8 972c: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) 9730: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) 9734: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) 9738: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) 973c: b0 12 c6 96 call #0x96c6 9740: 38 41 pop r8 9742: 39 41 pop r9 9744: 3a 41 pop r10 9746: 3b 41 pop r11 9748: 30 41 ret 0000974a <__umoddi3>: 974a: 0b 12 push r11 974c: 0a 12 push r10 974e: 09 12 push r9 9750: 08 12 push r8 9752: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) 9756: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) 975a: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) 975e: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) 9762: b0 12 c6 96 call #0x96c6 9766: 0c 48 mov r8, r12 9768: 0d 49 mov r9, r13 976a: 0e 4a mov r10, r14 976c: 0f 4b mov r11, r15 976e: 38 41 pop r8 9770: 39 41 pop r9 9772: 3a 41 pop r10 9774: 3b 41 pop r11 9776: 30 41 ret 00009778 <__udivmoddi4>: 9778: 0b 12 push r11 977a: 0a 12 push r10 977c: 09 12 push r9 977e: 08 12 push r8 9780: 07 12 push r7 9782: 18 41 0c 00 mov 12(r1), r8 ;0x000c(r1) 9786: 19 41 0e 00 mov 14(r1), r9 ;0x000e(r1) 978a: 1a 41 10 00 mov 16(r1), r10 ;0x0010(r1) 978e: 1b 41 12 00 mov 18(r1), r11 ;0x0012(r1) 9792: b0 12 c6 96 call #0x96c6 9796: 17 41 14 00 mov 20(r1), r7 ;0x0014(r1) 979a: 87 48 00 00 mov r8, 0(r7) ;0x0000(r7) 979e: 87 49 02 00 mov r9, 2(r7) ;0x0002(r7) 97a2: 87 4a 04 00 mov r10, 4(r7) ;0x0004(r7) 97a6: 87 4b 06 00 mov r11, 6(r7) ;0x0006(r7) 97aa: 37 41 pop r7 97ac: 38 41 pop r8 97ae: 39 41 pop r9 97b0: 3a 41 pop r10 97b2: 3b 41 pop r11 97b4: 30 41 ret 000097b6 <_unexpected_>: 97b6: 00 13 reti Disassembly of section .vectors: 0000ffe0 <__ivtbl_16>: ffe0: 64 84 64 84 64 84 68 84 64 84 d8 84 64 84 bc 84 d.d.d.h.d...d... fff0: 8c 84 64 84 64 84 64 84 64 84 64 84 64 84 00 80 ..d.d.d.d.d.d...