rc_controller.elf: file format elf32-msp430 SYMBOL TABLE: 00008000 l d .text 00000000 .text 00009896 l d .rodata 00000000 .rodata 00000200 l d .bss 00000000 .bss 00000214 l d .noinit 00000000 .noinit 0000ffe0 l d .vectors 00000000 .vectors 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 000085e4 l .text 00000000 __br_unexpected_ 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 strchr.c 00000000 l df *ABS* 00000000 memcmp.c 00000000 l df *ABS* 00000000 memset.c 00000000 l df *ABS* 00000000 strstr.c 00000000 l df *ABS* 00000000 atoi.c 00000000 l df *ABS* 00000000 sprintf.c 00008e8a l F .text 00000022 append 00000204 l O .bss 00000002 available_ 00000202 l O .bss 00000002 destination_ 00008eac l F .text 0000003c call_vuprintf 00000000 l df *ABS* 00000000 vuprintf.c 00008f46 l F .text 00000198 print_field 00000000 l df *ABS* 00000000 strncmp.c 00000057 g *ABS* 00000000 __BCSCTL1 00000174 g *ABS* 00000000 __TACCR1 00000000 g *ABS* 00000000 __data_size 000085e4 w .text 00000000 __isr_14 00000128 g *ABS* 00000000 __FCTL1 00000024 g *ABS* 00000000 __P1IES 0000004b g *ABS* 00000000 __ADC10AE1 00000069 g *ABS* 00000000 __UCB0CTL1 00008f1e g F .text 00000016 vsprintf 000085e4 w .text 00000000 __isr_4 00000002 g *ABS* 00000000 __IFG1 00000060 g *ABS* 00000000 __UCA0CTL0 00008782 g F .text 0000003a sample_adc_chan 00000206 g O .bss 00000001 status_1100 0000012e g *ABS* 00000000 __TAIV 00008f04 g F .text 0000001a snprintf 00000200 g O .bss 00000001 currentCarStatus 00000207 g O .bss 00000001 inputEventByte 00000000 g .vectors 00000000 _efartext 00008cac g F .text 00000000 __udivhi3 00000001 g *ABS* 00000000 __IE2 00000208 g O .bss 00000001 LQI_1100 0000002b g *ABS* 00000000 __P2IFG 000089ea g F .text 0000010a RX_STRING_1100 0000001a g *ABS* 00000000 __P3DIR 0000995c g *ABS* 00000000 _etext 00000190 g *ABS* 00000000 __TBR 000010f8 g *ABS* 00000000 __CALDCO_16MHZ 0000001d g *ABS* 00000000 __P4OUT 00008770 g F .text 00000012 sample_adc 00008be6 g F .text 00000050 CC1100_SPI_WRREG 00000014 g *ABS* 00000000 __bss_size 000010fd g *ABS* 00000000 __CALBC1_8MHZ 00008000 w .text 00000000 __watchdog_support 000085de w .text 00000000 __stop_progExec__ 000087fc g F .text 00000020 init_B_UART_SPI 0000002d g *ABS* 00000000 __P2IE 000086f6 g F .text 00000066 sys_init 00000192 g *ABS* 00000000 __TBCCR0 000085e4 w .text 00000000 __isr_11 00000186 g *ABS* 00000000 __TBCCTL2 00008cce g F .text 00000000 __udivsi3 00000025 g *ABS* 00000000 __P1IE 0000006b g *ABS* 00000000 __UCB0BR1 0000863e g F .text 0000008a tinit 00008f34 g F .text 00000012 vsnprintf 00000049 g *ABS* 00000000 __ADC10DTC1 00000066 g *ABS* 00000000 __UCA0RXBUF 00000061 g *ABS* 00000000 __UCA0CTL1 00009856 g .text 00000000 __udivmoddi4 00000182 g *ABS* 00000000 __TBCCTL0 0000006d g *ABS* 00000000 __UCB0STAT 000085e8 g .text 00000000 __isr_5 00000063 g *ABS* 00000000 __UCA0BR1 00009828 g F .text 00000000 __umoddi3 0000995c g *ABS* 00000000 __data_load_start 000085e4 g .text 00000000 __dtors_end 00008af4 g F .text 00000058 TX_1100_STRING 00000053 g *ABS* 00000000 __BCSCTL3 000001bc g *ABS* 00000000 __ADC10SA 00000166 g *ABS* 00000000 __TACCTL2 00009802 g F .text 00000000 __udivdi3 00000065 g *ABS* 00000000 __UCA0STAT 000085e4 w .text 00000000 __isr_2 00000209 g O .bss 00000001 RSSI_1100 00000160 g *ABS* 00000000 __TACTL 0000012c g *ABS* 00000000 __FCTL3 000085e4 w .text 00000000 __isr_10 0000002e g *ABS* 00000000 __P2SEL 00000180 g *ABS* 00000000 __TBCTL 000010f9 g *ABS* 00000000 __CALBC1_16MHZ 00000023 g *ABS* 00000000 __P1IFG 000010fb g *ABS* 00000000 __CALBC1_12MHZ 0000004a g *ABS* 00000000 __ADC10AE0 0000011a g *ABS* 00000000 __UCB0I2CSA 00000172 g *ABS* 00000000 __TACCR0 00000056 g *ABS* 00000000 __DCOCTL 00000003 g *ABS* 00000000 __IFG2 00000214 g O .noinit 00000002 __wdt_clear_value 0000001b g *ABS* 00000000 __P3SEL 00008620 g .text 00000000 __isr_7 0000ffe0 g O .vectors 00000020 __ivtbl_16 0000006c g *ABS* 00000000 __UCB0I2CIE 0000006a g *ABS* 00000000 __UCB0BR0 00008d04 g F .text 00000000 __umodsi3 00000028 g *ABS* 00000000 __P2IN 00000118 g *ABS* 00000000 __UCB0I2COA 00000184 g *ABS* 00000000 __TBCCTL1 000001b4 g *ABS* 00000000 __ADC10MEM 00008cc6 g F .text 00000000 __umodhi3 000085e4 w .text 00000000 __isr_0 00000029 g *ABS* 00000000 __P2OUT 0000012a g *ABS* 00000000 __FCTL2 00000064 g *ABS* 00000000 __UCA0MCTL 00008028 w .text 00000000 __do_clear_bss 00000021 g *ABS* 00000000 __P1OUT 0000002c g *ABS* 00000000 __P2IES 00000026 g *ABS* 00000000 __P1SEL 00008daa g F .text 00000056 strstr 000085f0 g F .text 00000030 TA1_VEC 0000977c g F .text 00000028 strncmp 00008cce g .text 00000000 __ext_udivmod32 00000027 g *ABS* 00000000 __P1REN 00009894 w .text 00000000 _unexpected_ 000085f0 g .text 00000000 __isr_8 0000020a g O .bss 00000001 PKTSTATUS_1100 000085e4 w .text 00000000 __isr_3 000090de g F .text 0000069e vuprintf 00008d20 g F .text 00000020 memcmp 0000875c g F .text 00000014 init_adc 00008c36 g F .text 00000076 CC1100_SPI_BURST_WRREG 000010fc g *ABS* 00000000 __CALDCO_8MHZ 00008cac g .text 00000000 __ext_udivmod16 00008000 w .text 00000000 _reset_vector__ 000085e4 g .text 00000000 __ctors_start 000097a4 g .text 00000000 __xabi_udivmod64 000085e4 w .text 00000000 __isr_12 000010fa g *ABS* 00000000 __CALDCO_12MHZ 00008b86 g F .text 00000060 CC1100_SPI_RDREG 00000018 g *ABS* 00000000 __P3IN 00008010 w .text 00000000 __do_copy_data 000085e8 g F .text 00000008 ADC_VEC 00000200 g .bss 00000000 __bss_start 00008d40 g F .text 0000006a memset 0000803e g F .text 000005a0 main 00000176 g *ABS* 00000000 __TACCR2 000085e4 w .text 00000000 __isr_13 00000170 g *ABS* 00000000 __TAR 0000001e g *ABS* 00000000 __P4DIR 0000020c g O .bss 00000002 seconds 00000162 g *ABS* 00000000 __TACCTL0 00010000 g .vectors 00000000 _vectors_end 0000002a g *ABS* 00000000 __P2DIR 0000020e g O .bss 00000001 RSSI_DBM_1100 000086c8 g F .text 0000002e delay 00000068 g *ABS* 00000000 __UCB0CTL0 0000002f g *ABS* 00000000 __P2REN 00008ee8 g F .text 0000001c sprintf 00008620 g F .text 0000001e RX_VEC 0000006e g *ABS* 00000000 __UCB0RXBUF 000001b0 g *ABS* 00000000 __ADC10CTL0 000085e4 w .text 00000000 __isr_9 0000005e g *ABS* 00000000 __UCA0IRTCTL 0000881c g F .text 000001a2 CC1100_WRITE_SPI_RF_SETTINGS 000010fe g *ABS* 00000000 __CALDCO_1MHZ 00000067 g *ABS* 00000000 __UCA0TXBUF 0000800c w .text 00000000 __init_stack 0000005d g *ABS* 00000000 __UCA0ABCTL 00000019 g *ABS* 00000000 __P3OUT 000085e4 g .text 00000000 __dtors_start 000085e4 w .text 00000000 __isr_6 000085e4 g .text 00000000 __ctors_end 00000062 g *ABS* 00000000 __UCA0BR0 00000600 g *ABS* 00000000 __stack 000085e4 w .text 00000000 __isr_1 00000200 g .rodata 00000000 _edata 00000216 g *ABS* 00000000 _end 00000194 g *ABS* 00000000 __TBCCR1 00000048 g *ABS* 00000000 __ADC10DTC0 0000011e g *ABS* 00000000 __TBIV 000001b2 g *ABS* 00000000 __ADC10CTL1 000089be g F .text 0000002c RX_MODE_1100 00000210 g O .bss 00000002 flags 00000058 g *ABS* 00000000 __BCSCTL2 000085de w .text 00000000 _endless_loop__ 0000001f g *ABS* 00000000 __P4SEL 00000196 g *ABS* 00000000 __TBCCR2 00008e00 g F .text 0000008a atoi 00000022 g *ABS* 00000000 __P1DIR 000087da g F .text 00000022 init_A_UART_232 0000005f g *ABS* 00000000 __UCA0IRRCTL 00000010 g *ABS* 00000000 __P3REN 00000164 g *ABS* 00000000 __TACCTL1 0000006f g *ABS* 00000000 __UCB0TXBUF 000010ff g *ABS* 00000000 __CALBC1_1MHZ 00008010 w .text 00000000 __low_level_init 00008d0e g F .text 00000012 strchr 00000011 g *ABS* 00000000 __P4REN 00000200 g .rodata 00000000 __data_start 00000120 g *ABS* 00000000 __WDTCTL 00000000 g *ABS* 00000000 __IE1 00000020 g *ABS* 00000000 __P1IN 0000001c g *ABS* 00000000 __P4IN 00000212 g O .bss 00000001 rx_char 000087bc g F .text 0000001e TX232String 00008b4c g F .text 0000003a CC1100_SPI_STROBE Disassembly of section .text: 00008000 <__watchdog_support>: 8000: 55 42 20 01 mov.b &0x0120,r5 8004: 35 d0 08 5a bis #23048, r5 ;#0x5a08 8008: 82 45 14 02 mov r5, &0x0214 0000800c <__init_stack>: 800c: 31 40 00 06 mov #1536, r1 ;#0x0600 00008010 <__do_copy_data>: 8010: 3f 40 00 00 mov #0, r15 ;#0x0000 8014: 0f 93 tst r15 8016: 08 24 jz $+18 ;abs 0x8028 8018: 92 42 14 02 mov &0x0214,&0x0120 801c: 20 01 801e: 2f 83 decd r15 8020: 9f 4f 5c 99 mov -26276(r15),512(r15);0x995c(r15), 0x0200(r15) 8024: 00 02 8026: f8 23 jnz $-14 ;abs 0x8018 00008028 <__do_clear_bss>: 8028: 3f 40 14 00 mov #20, r15 ;#0x0014 802c: 0f 93 tst r15 802e: 07 24 jz $+16 ;abs 0x803e 8030: 92 42 14 02 mov &0x0214,&0x0120 8034: 20 01 8036: 1f 83 dec r15 8038: cf 43 00 02 mov.b #0, 512(r15);r3 As==00, 0x0200(r15) 803c: f9 23 jnz $-12 ;abs 0x8030 0000803e
: /** Main function. */ int main(void) { 803e: 31 50 7e ff add #-130, r1 ;#0xff7e volatile long traw, BS1_raw, BS2_raw, XR_raw, XL_raw, YR_raw, YL_raw; int interval=2; //set report interval x seconds ///Go for system initialization sys_init(); //initialize pins interrupts and clocks 8042: b0 12 f6 86 call #0x86f6 IE2 |= UCA0RXIE; } void init_B_UART_SPI() { UCB0CTL1 = UCSWRST; 8046: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 804a: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 804e: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8050: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 8054: 68 00 UCB0BR0 = 2; 8056: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 805a: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 805e: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 8062: 69 00 } } void init_A_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 8064: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 8068: 61 00 UCA0BR0 = 0x82; // 9600 from 16Mhz 806a: f2 40 82 ff mov.b #-126, &0x0062 ;#0xff82 806e: 62 00 UCA0BR1 = 0x6; 8070: f2 40 06 00 mov.b #6, &0x0063 ;#0x0006 8074: 63 00 //UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 8076: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 807a: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe 807e: 61 00 IE2 |= UCA0RXIE; 8080: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 /**init the ADC10 */ void init_adc() { //ADC10AE0 = (ADC_IN_YR | ADC_IN_XR | ADC_IN_YL | ADC_IN_XL | ADC_IN_BS1 | ADC_IN_BS2); //Configure input buffers for analog operation ADC10AE0 = (bit0 | bit1 | bit2 | bit4 | bit6 | bit7); 8084: f2 40 d7 ff mov.b #-41, &0x004a ;#0xffd7 8088: 4a 00 ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 808a: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 808e: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8090: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8094: b2 01 init_B_UART_SPI(); //get the UART into SPI mode such that we can talk to the CC1100 init_A_UART_232(); //get the UART into UART mode such that we can talk to the FTDI chip init_adc(); //turn on the ADC P1OUT ^= LED_GRN; 8096: f2 e0 10 00 xor.b #16, &0x0021 ;#0x0010 809a: 21 00 delay(0xFFFF); //Blink green LED to show system initialization is good 809c: 3f 43 mov #-1, r15 ;r3 As==11 809e: b0 12 c8 86 call #0x86c8 P1OUT ^= LED_GRN; 80a2: f2 e0 10 00 xor.b #16, &0x0021 ;#0x0010 80a6: 21 00 ///Go for radio initialization memset(CC1100_buffer, '\0', 64); //clear the buffer 80a8: 3d 40 40 00 mov #64, r13 ;#0x0040 80ac: 0e 43 clr r14 80ae: 0f 41 mov r1, r15 80b0: 3f 50 1c 00 add #28, r15 ;#0x001c 80b4: b0 12 40 8d call #0x8d40 P1OUT ^= LED_GRN; TX_1100_STRING("RDC 1100 Startup", 16); P1OUT ^= LED_GRN; }*/ delay(0xFFF); 80b8: 3f 40 ff 0f mov #4095, r15 ;#0x0fff 80bc: b0 12 c8 86 call #0x86c8 80c0: 3e 40 96 98 mov #-26474,r14 ;#0x9896 { int pointer; for( pointer = 0; pointer < length; pointer++) { volatile int i; UCA0TXBUF = string[pointer]; 80c4: e2 4e 67 00 mov.b @r14, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 80c8: 5f 42 03 00 mov.b &0x0003,r15 80cc: 2f f3 and #2, r15 ;r3 As==10 80ce: fc 27 jz $-6 ;abs 0x80c8 80d0: 1e 53 inc r14 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 80d2: 3e 90 a6 98 cmp #-26458,r14 ;#0x98a6 80d6: f6 23 jnz $-18 ;abs 0x80c4 80d8: 3e 40 a7 98 mov #-26457,r14 ;#0x98a7 80dc: 0d 43 clr r13 { volatile int i; UCA0TXBUF = string[pointer]; 80de: e2 4e 67 00 mov.b @r14, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 80e2: 5f 42 03 00 mov.b &0x0003,r15 80e6: 2f f3 and #2, r15 ;r3 As==10 80e8: fc 27 jz $-6 ;abs 0x80e2 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 80ea: 1d 53 inc r13 80ec: 1e 53 inc r14 80ee: 2d 93 cmp #2, r13 ;r3 As==10 80f0: f6 23 jnz $-18 ;abs 0x80de TX232String("RDC 1100 Startup", 16); // Report radio startup over the serial port TX232String("\r\n",2); //Blink out red LED to verify radio success P1OUT ^= LED_RED; 80f2: f2 e2 21 00 xor.b #8, &0x0021 ;r2 As==11 delay(0xFF); //lil bit O delay 80f6: 3f 40 ff 00 mov #255, r15 ;#0x00ff 80fa: b0 12 c8 86 call #0x86c8 P1OUT ^= LED_RED; 80fe: f2 e2 21 00 xor.b #8, &0x0021 ;r2 As==11 flags = 0; //clear out program loop flags 8102: 82 43 10 02 mov #0, &0x0210 ;r3 As==00 /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { TACCTL0 = CCIE; // TACCR0 interrupt enabled 8106: b2 40 10 00 mov #16, &0x0162 ;#0x0010 810a: 62 01 TACTL = TASSEL_1; // ACLK, upmode 810c: b2 40 00 01 mov #256, &0x0160 ;#0x0100 8110: 60 01 TACTL &= ~TAIFG; //clear interrupt 8112: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 8116: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8118: b2 40 e0 2e mov #12000, &0x0172 ;#0x2ee0 811c: 72 01 //TACCR0 = 12000; // ~1 second TAR = 0; 811e: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 8122: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8126: 60 01 delay(0xFF); //lil bit O delay P1OUT ^= LED_RED; flags = 0; //clear out program loop flags tinit(1000); //start generating an interrupts every 1000mS seconds = 0; 8128: 82 43 0c 02 mov #0, &0x020c ;r3 As==00 //Reset pending interrupt flags before enabling interrupt vectors ///P4IFG = 0x00; P1IFG = 0x00; 812c: c2 43 23 00 mov.b #0, &0x0023 ;r3 As==00 eint(); //enable interrupts 8130: 32 d2 eint unsigned char loop; int degC, volt, ibat, vbat; volatile long traw, BS1_raw, BS2_raw, XR_raw, XL_raw, YR_raw, YL_raw; int interval=2; //set report interval x seconds 8132: a1 43 80 00 mov #2, 128(r1) ;r3 As==10, 0x0080(r1) /** Main function. */ int main(void) { unsigned int sample,length=0,i,outputWord=0x0000,rs232buflength=0; 8136: 81 43 7c 00 mov #0, 124(r1) ;r3 As==00, 0x007c(r1) */ while (1) //main loop, never ends... { loop = 0; //Clear loop counter. This is incremented by each event possibility. if(flags & RXCHAR_RDY) 813a: b2 b0 10 00 bit #16, &0x0210 ;#0x0010 813e: 10 02 8140: 26 24 jz $+78 ;abs 0x818e { dint(); 8142: 32 c2 dint 8144: 03 43 nop loop = 1; flags &= ~RXCHAR_RDY; 8146: b2 f0 ef ff and #-17, &0x0210 ;#0xffef 814a: 10 02 if(rx_char == '\r' || rx_char == '\n'); //don't count a return in the buffer! 814c: 5f 42 12 02 mov.b &0x0212,r15 8150: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d 8154: 05 24 jz $+12 ;abs 0x8160 8156: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 815a: 02 24 jz $+6 ;abs 0x8160 else //Normal characters are nice { rs232buf[rs232buflength]=rx_char; rs232buflength++; 815c: 91 53 7c 00 inc 124(r1) ;0x007c(r1) } if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 8160: b1 90 3d 00 cmp #61, 124(r1) ;#0x003d, 0x007c(r1) 8164: 7c 00 8166: 06 2c jc $+14 ;abs 0x8174 8168: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d 816c: 0a 20 jnz $+22 ;abs 0x8182 816e: 81 93 7c 00 tst 124(r1) ;0x007c(r1) 8172: 07 24 jz $+16 ;abs 0x8182 { P1OUT |= LED_RED; 8174: f2 d2 21 00 bis.b #8, &0x0021 ;r2 As==11 //TX_STRING(rs232buf,rs232buflength); //Send the string out //P2IFG &= ~GDO0; //reset trashed interrupt state //RX_MODE(); //set the radio back to RX mode so we don't miss any packets rs232buflength = 0; P1OUT &= ~LED_RED; 8178: f2 f0 f7 ff and.b #-9, &0x0021 ;#0xfff7 817c: 21 00 { P1OUT |= LED_RED; //TX_STRING(rs232buf,rs232buflength); //Send the string out //P2IFG &= ~GDO0; //reset trashed interrupt state //RX_MODE(); //set the radio back to RX mode so we don't miss any packets rs232buflength = 0; 817e: 81 43 7c 00 mov #0, 124(r1) ;r3 As==00, 0x007c(r1) P1OUT &= ~LED_RED; } //////////////////////////// P1OUT &= ~LED_RED; 8182: f2 f0 f7 ff and.b #-9, &0x0021 ;#0xfff7 8186: 21 00 eint(); 8188: 32 d2 eint { loop = 0; //Clear loop counter. This is incremented by each event possibility. if(flags & RXCHAR_RDY) { dint(); loop = 1; 818a: 5d 43 mov.b #1, r13 ;r3 As==01 818c: 01 3c jmp $+4 ;abs 0x8190 RX_MODE_1100(); //put CC1100 into listen mode, interrupts are now active */ while (1) //main loop, never ends... { loop = 0; //Clear loop counter. This is incremented by each event possibility. 818e: 4d 43 clr.b r13 P1OUT &= ~LED_RED; eint(); } if(flags & CC1100_RDY) //Incoming packet on the CC2500 8190: a2 b3 10 02 bit #2, &0x0210 ;r3 As==10 8194: d5 24 jz $+428 ;abs 0x8340 { dint(); //Disable interrupt vectors while we are playing with the radio 8196: 32 c2 dint 8198: 03 43 nop loop = 1; P1OUT |= LED_RED; 819a: f2 d2 21 00 bis.b #8, &0x0021 ;r2 As==11 flags &= ~CC1100_RDY; 819e: b2 f0 fd ff and #-3, &0x0210 ;#0xfffd 81a2: 10 02 length = RX_STRING_1100(CC1100_buffer, 64); //Get the packet from the radio and put it into the buffer 81a4: 7e 40 40 00 mov.b #64, r14 ;#0x0040 81a8: 0f 41 mov r1, r15 81aa: 3f 50 1c 00 add #28, r15 ;#0x001c 81ae: b0 12 ea 89 call #0x89ea 81b2: 4a 4f mov.b r15, r10 81b4: 8a 11 sxt r10 ///P4IFG &= ~GDO0_1100; //reset trashed interrupt state RX_MODE_1100(); //set the radio back to RX mode so we don't miss any packets 81b6: b0 12 be 89 call #0x89be if(LQI_1100 & bit7) //CRC ok 81ba: 58 42 08 02 mov.b &0x0208,r8 81be: 48 93 tst.b r8 81c0: b2 34 jge $+358 ;abs 0x8326 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 81c2: 1a 93 cmp #1, r10 ;r3 As==01 81c4: 02 34 jge $+6 ;abs 0x81ca 81c6: 30 40 d6 85 br #0x85d6 81ca: 0c 43 clr r12 { volatile int i; UCA0TXBUF = string[pointer]; 81cc: 3f 40 1c 00 mov #28, r15 ;#0x001c 81d0: 0f 51 add r1, r15 81d2: 0f 5c add r12, r15 81d4: e2 4f 67 00 mov.b @r15, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 81d8: 5f 42 03 00 mov.b &0x0003,r15 81dc: 2f f3 and #2, r15 ;r3 As==10 81de: fc 27 jz $-6 ;abs 0x81d8 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 81e0: 1c 53 inc r12 81e2: 0c 9a cmp r10, r12 81e4: f3 3b jl $-24 ;abs 0x81cc 81e6: 30 40 d6 85 br #0x85d6 { volatile int i; UCA0TXBUF = string[pointer]; 81ea: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 81ee: 5f 42 03 00 mov.b &0x0003,r15 81f2: 2f f3 and #2, r15 ;r3 As==10 81f4: fc 27 jz $-6 ;abs 0x81ee 81f6: 1d 53 inc r13 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 81f8: 3d 90 a9 98 cmp #-26455,r13 ;#0x98a9 81fc: f6 23 jnz $-18 ;abs 0x81ea if(LQI_1100 & bit7) //CRC ok { TX232String(CC1100_buffer,length); //Forward the packet out the serial port TX232String("\r\n",2); //P1OUT |= LED_GRN; if(!memcmp(CALLSIGN,CC1100_buffer,3)) //packet addressed to us 81fe: 3d 40 03 00 mov #3, r13 ;#0x0003 8202: 0e 41 mov r1, r14 8204: 3e 50 1c 00 add #28, r14 ;#0x001c 8208: 3f 40 aa 98 mov #-26454,r15 ;#0x98aa 820c: b0 12 20 8d call #0x8d20 8210: 0f 93 tst r15 8212: 89 20 jnz $+276 ;abs 0x8326 { if(strstr( CC1100_buffer, "interval" ) != NULL) //its an interval query 8214: 3e 40 ae 98 mov #-26450,r14 ;#0x98ae 8218: 0f 41 mov r1, r15 821a: 3f 50 1c 00 add #28, r15 ;#0x001c 821e: b0 12 aa 8d call #0x8daa 8222: 0f 93 tst r15 8224: 30 24 jz $+98 ;abs 0x8286 { length = atoi(strchr(CC1100_buffer, '=' )+1); //The new interval should follow the equals sign 8226: 3e 40 3d 00 mov #61, r14 ;#0x003d 822a: 0f 41 mov r1, r15 822c: 3f 50 1c 00 add #28, r15 ;#0x001c 8230: b0 12 0e 8d call #0x8d0e 8234: 1f 53 inc r15 8236: b0 12 00 8e call #0x8e00 823a: 0a 4f mov r15, r10 if(length > 0) 823c: 0f 93 tst r15 823e: 0f 24 jz $+32 ;abs 0x825e { interval = length; length = snprintf(CC1100_buffer,64,"GND:RDC Interval is now %d",interval); 8240: 0f 12 push r15 8242: 30 12 b7 98 push #-26441 ;#0x98b7 8246: 30 12 40 00 push #64 ;#0x0040 824a: 3f 40 22 00 mov #34, r15 ;#0x0022 824e: 0f 51 add r1, r15 8250: 0f 12 push r15 8252: b0 12 04 8f call #0x8f04 8256: 31 52 add #8, r1 ;r2 As==11 8258: 81 4a 80 00 mov r10, 128(r1) ;0x0080(r1) 825c: 0d 3c jmp $+28 ;abs 0x8278 } else length = snprintf(CC1100_buffer,64,"GND:RDC Reporting every %d seconds",interval); 825e: 11 12 82 00 push 130(r1) ;0x0082(r1) 8262: 30 12 d2 98 push #-26414 ;#0x98d2 8266: 30 12 40 00 push #64 ;#0x0040 826a: 3f 40 22 00 mov #34, r15 ;#0x0022 826e: 0f 51 add r1, r15 8270: 0f 12 push r15 8272: b0 12 04 8f call #0x8f04 8276: 31 52 add #8, r1 ;r2 As==11 TX_1100_STRING(CC1100_buffer,length); 8278: 4e 4f mov.b r15, r14 827a: 0f 41 mov r1, r15 827c: 3f 50 1c 00 add #28, r15 ;#0x001c 8280: b0 12 f4 8a call #0x8af4 8284: 4e 3c jmp $+158 ;abs 0x8322 } else if(strstr( CC1100_buffer, "status" ) != NULL) //This a status inquiery 8286: 3e 40 f5 98 mov #-26379,r14 ;#0x98f5 828a: 0f 41 mov r1, r15 828c: 3f 50 1c 00 add #28, r15 ;#0x001c 8290: b0 12 aa 8d call #0x8daa 8294: 0f 93 tst r15 8296: 19 24 jz $+52 ;abs 0x82ca { length = snprintf(CC1100_buffer,64,"GND:RDC R:%ddBm L:%u", RSSI_DBM_1100, LQI_1100); //Report the recieved signal strength and link quality of the last packet 8298: 4f 48 mov.b r8, r15 829a: 0f 12 push r15 829c: 5f 42 0e 02 mov.b &0x020e,r15 82a0: 8f 11 sxt r15 82a2: 0f 12 push r15 82a4: 30 12 fc 98 push #-26372 ;#0x98fc 82a8: 30 12 40 00 push #64 ;#0x0040 82ac: 3f 40 24 00 mov #36, r15 ;#0x0024 82b0: 0f 51 add r1, r15 82b2: 0f 12 push r15 82b4: b0 12 04 8f call #0x8f04 82b8: 31 50 0a 00 add #10, r1 ;#0x000a TX_1100_STRING(CC1100_buffer,length); 82bc: 4e 4f mov.b r15, r14 82be: 0f 41 mov r1, r15 82c0: 3f 50 1c 00 add #28, r15 ;#0x001c 82c4: b0 12 f4 8a call #0x8af4 82c8: 2c 3c jmp $+90 ;abs 0x8322 } else if(strstr( CC1100_buffer, "now" ) != NULL) //report now 82ca: 3e 40 11 99 mov #-26351,r14 ;#0x9911 82ce: 0f 41 mov r1, r15 82d0: 3f 50 1c 00 add #28, r15 ;#0x001c 82d4: b0 12 aa 8d call #0x8daa 82d8: 0f 93 tst r15 82da: 04 24 jz $+10 ;abs 0x82e4 { flags |= GO_NOW | TIMER_UP; //Manually act as if the interval timer has expired 82dc: b2 d0 09 00 bis #9, &0x0210 ;#0x0009 82e0: 10 02 82e2: 1f 3c jmp $+64 ;abs 0x8322 } else if(strstr( CC1100_buffer, " reboot" ) != NULL) //report now 82e4: 3e 40 15 99 mov #-26347,r14 ;#0x9915 82e8: 0f 41 mov r1, r15 82ea: 3f 50 1c 00 add #28, r15 ;#0x001c 82ee: b0 12 aa 8d call #0x8daa 82f2: 0f 93 tst r15 82f4: 04 24 jz $+10 ;abs 0x82fe { WDTCTL = WDTCNTCL|WDTPW; 82f6: b2 40 08 5a mov #23048, &0x0120 ;#0x5a08 82fa: 20 01 82fc: ff 3f jmp $+0 ;abs 0x82fc while(1); //reboot in 32ms } else //command not recognized, give a pong to ack reception { length = snprintf(CC1100_buffer,64,"GND:RDC Pong!"); 82fe: 30 12 1d 99 push #-26339 ;#0x991d 8302: 30 12 40 00 push #64 ;#0x0040 8306: 3f 40 20 00 mov #32, r15 ;#0x0020 830a: 0f 51 add r1, r15 830c: 0f 12 push r15 830e: b0 12 04 8f call #0x8f04 8312: 31 50 06 00 add #6, r1 ;#0x0006 TX_1100_STRING(CC1100_buffer, length); 8316: 4e 4f mov.b r15, r14 8318: 0f 41 mov r1, r15 831a: 3f 50 1c 00 add #28, r15 ;#0x001c 831e: b0 12 f4 8a call #0x8af4 } ///P4IFG &= ~GDO0_1100; //reset trashed interrupt state RX_MODE_1100(); //set the radio back to RX mode so we don't miss any packets 8322: b0 12 be 89 call #0x89be //P4IFG &= ~GDO0_2500; //reset trashed interrupt state //RX_MODE_2500(); //set the radio back to RX mode so we don't miss any packets //turn off LEDs P1OUT &= ~(LED_RED | LED_GRN); 8326: f2 f0 e7 ff and.b #-25, &0x0021 ;#0xffe7 832a: 21 00 memset(CC1100_buffer, 0, 64); 832c: 3d 40 40 00 mov #64, r13 ;#0x0040 8330: 0e 43 clr r14 8332: 0f 41 mov r1, r15 8334: 3f 50 1c 00 add #28, r15 ;#0x001c 8338: b0 12 40 8d call #0x8d40 eint(); //Turn vectors back on 833c: 32 d2 eint } if(flags & CC1100_RDY) //Incoming packet on the CC2500 { dint(); //Disable interrupt vectors while we are playing with the radio loop = 1; 833e: 5d 43 mov.b #1, r13 ;r3 As==01 //turn off LEDs P1OUT &= ~(LED_RED | LED_GRN); memset(CC1100_buffer, 0, 64); eint(); //Turn vectors back on } if(flags & TIMER_UP) //Did the timer expire? Act on it 8340: 92 b3 10 02 bit #1, &0x0210 ;r3 As==01 8344: 02 20 jnz $+6 ;abs 0x834a 8346: 30 40 c0 85 br #0x85c0 { //(100 / 764) = 0.1309 loop = 1; if(((seconds) % interval) == 0 || (flags & GO_NOW)) //report every 20 second by default 834a: 1f 42 0c 02 mov &0x020c,r15 834e: 1e 41 80 00 mov 128(r1),r14 ;0x0080(r1) 8352: b0 12 c6 8c call #0x8cc6 8356: 0f 93 tst r15 8358: 05 24 jz $+12 ;abs 0x8364 835a: b2 b2 10 02 bit #8, &0x0210 ;r2 As==11 835e: 02 20 jnz $+6 ;abs 0x8364 8360: 30 40 3a 81 br #0x813a { flags &= ~(TIMER_UP|GO_NOW); //clear the flag 8364: b2 f0 f6 ff and #-10, &0x0210 ;#0xfff6 8368: 10 02 ADC10CTL1 = INCH_10 + ADC10DIV_4; // Temp Sensor ADC10CLK/5 836a: b2 40 80 a0 mov #-24448,&0x01b2 ;#0xa080 836e: b2 01 ADC10CTL0 = SREF_1 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE + ADC10SR; 8370: b2 40 38 3c mov #15416, &0x01b0 ;#0x3c38 8374: b0 01 for( degC = 240; degC > 0; degC-- ); // delay to allow reference to settle ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 8376: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 837a: b0 01 LPM3; 837c: 32 d0 d0 00 bis #208, r2 ;#0x00d0 traw = ADC10MEM; 8380: 91 42 b4 01 mov &0x01b4,96(r1) ;0x0060(r1) 8384: 60 00 8386: 81 43 62 00 mov #0, 98(r1) ;r3 As==00, 0x0062(r1) 838a: 91 41 60 00 mov 96(r1), 24(r1) ;0x0060(r1), 0x0018(r1) 838e: 18 00 8390: 91 41 62 00 mov 98(r1), 26(r1) ;0x0062(r1), 0x001a(r1) 8394: 1a 00 ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 8396: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 839a: b0 01 dint(); 839c: 32 c2 dint 839e: 03 43 nop degC = (((traw - 673) * 4230) / 1024); 83a0: 91 41 18 00 mov 24(r1), 92(r1) ;0x0018(r1), 0x005c(r1) 83a4: 5c 00 83a6: 91 41 1a 00 mov 26(r1), 94(r1) ;0x001a(r1), 0x005e(r1) 83aa: 5e 00 BS1_raw = sample_adc_chan(ADC_IN_BS1); 83ac: 3f 40 00 20 mov #8192, r15 ;#0x2000 83b0: b0 12 82 87 call #0x8782 83b4: 81 4f 64 00 mov r15, 100(r1) ;0x0064(r1) 83b8: 8f 10 swpb r15 83ba: 8f 11 sxt r15 83bc: 8f 10 swpb r15 83be: 8f 11 sxt r15 83c0: 81 4f 66 00 mov r15, 102(r1) ;0x0066(r1) 83c4: 91 41 64 00 mov 100(r1),20(r1) ;0x0064(r1), 0x0014(r1) 83c8: 14 00 83ca: 91 41 66 00 mov 102(r1),22(r1) ;0x0066(r1), 0x0016(r1) 83ce: 16 00 BS2_raw = sample_adc_chan(ADC_IN_BS2); 83d0: 3f 40 00 40 mov #16384, r15 ;#0x4000 83d4: b0 12 82 87 call #0x8782 83d8: 81 4f 68 00 mov r15, 104(r1) ;0x0068(r1) 83dc: 8f 10 swpb r15 83de: 8f 11 sxt r15 83e0: 8f 10 swpb r15 83e2: 8f 11 sxt r15 83e4: 81 4f 6a 00 mov r15, 106(r1) ;0x006a(r1) 83e8: 91 41 68 00 mov 104(r1),16(r1) ;0x0068(r1), 0x0010(r1) 83ec: 10 00 83ee: 91 41 6a 00 mov 106(r1),18(r1) ;0x006a(r1), 0x0012(r1) 83f2: 12 00 YL_raw = sample_adc_chan(ADC_IN_YL); 83f4: 3f 40 00 60 mov #24576, r15 ;#0x6000 83f8: b0 12 82 87 call #0x8782 83fc: 81 4f 6c 00 mov r15, 108(r1) ;0x006c(r1) 8400: 8f 10 swpb r15 8402: 8f 11 sxt r15 8404: 8f 10 swpb r15 8406: 8f 11 sxt r15 8408: 81 4f 6e 00 mov r15, 110(r1) ;0x006e(r1) 840c: 91 41 6c 00 mov 108(r1),0(r1) ;0x006c(r1), 0x0000(r1) 8410: 00 00 8412: 91 41 6e 00 mov 110(r1),2(r1) ;0x006e(r1), 0x0002(r1) 8416: 02 00 XL_raw = sample_adc_chan(ADC_IN_XL); 8418: 3f 40 00 70 mov #28672, r15 ;#0x7000 841c: b0 12 82 87 call #0x8782 8420: 81 4f 70 00 mov r15, 112(r1) ;0x0070(r1) 8424: 8f 10 swpb r15 8426: 8f 11 sxt r15 8428: 8f 10 swpb r15 842a: 8f 11 sxt r15 842c: 81 4f 72 00 mov r15, 114(r1) ;0x0072(r1) 8430: 91 41 70 00 mov 112(r1),8(r1) ;0x0070(r1), 0x0008(r1) 8434: 08 00 8436: 91 41 72 00 mov 114(r1),10(r1) ;0x0072(r1), 0x000a(r1) 843a: 0a 00 YR_raw = sample_adc_chan(ADC_IN_YR); 843c: 0f 43 clr r15 843e: b0 12 82 87 call #0x8782 8442: 81 4f 74 00 mov r15, 116(r1) ;0x0074(r1) 8446: 8f 10 swpb r15 8448: 8f 11 sxt r15 844a: 8f 10 swpb r15 844c: 8f 11 sxt r15 844e: 81 4f 76 00 mov r15, 118(r1) ;0x0076(r1) 8452: 91 41 74 00 mov 116(r1),4(r1) ;0x0074(r1), 0x0004(r1) 8456: 04 00 8458: 91 41 76 00 mov 118(r1),6(r1) ;0x0076(r1), 0x0006(r1) 845c: 06 00 XR_raw = sample_adc_chan(ADC_IN_XR); 845e: 3f 40 00 10 mov #4096, r15 ;#0x1000 8462: b0 12 82 87 call #0x8782 8466: 81 4f 78 00 mov r15, 120(r1) ;0x0078(r1) 846a: 8f 10 swpb r15 846c: 8f 11 sxt r15 846e: 8f 10 swpb r15 8470: 8f 11 sxt r15 8472: 81 4f 7a 00 mov r15, 122(r1) ;0x007a(r1) 8476: 91 41 78 00 mov 120(r1),12(r1) ;0x0078(r1), 0x000c(r1) 847a: 0c 00 847c: 91 41 7a 00 mov 122(r1),14(r1) ;0x007a(r1), 0x000e(r1) 8480: 0e 00 length=snprintf(CC1100_buffer,64, "GND:%s S:%u T:%d %lu %lu %lu-%lu %lu-%lu ", CALLSIGN, seconds, degC, BS1_raw, BS2_raw, YL_raw, XL_raw, YR_raw, XR_raw); //send the temperature to the ground 8482: 1e 41 0c 00 mov 12(r1), r14 ;0x000c(r1) 8486: 1f 41 0e 00 mov 14(r1), r15 ;0x000e(r1) 848a: 14 41 04 00 mov 4(r1), r4 ;0x0004(r1) 848e: 15 41 06 00 mov 6(r1), r5 ;0x0006(r1) 8492: 16 41 08 00 mov 8(r1), r6 ;0x0008(r1) 8496: 17 41 0a 00 mov 10(r1), r7 ;0x000a(r1) 849a: 28 41 mov @r1, r8 849c: 19 41 02 00 mov 2(r1), r9 ;0x0002(r1) 84a0: 1a 41 10 00 mov 16(r1), r10 ;0x0010(r1) 84a4: 1b 41 12 00 mov 18(r1), r11 ;0x0012(r1) 84a8: 1c 41 14 00 mov 20(r1), r12 ;0x0014(r1) 84ac: 1d 41 16 00 mov 22(r1), r13 ;0x0016(r1) 84b0: 91 42 0c 02 mov &0x020c,126(r1) ;0x007e(r1) 84b4: 7e 00 84b6: 0f 12 push r15 84b8: 0e 12 push r14 84ba: 05 12 push r5 84bc: 04 12 push r4 84be: 07 12 push r7 84c0: 06 12 push r6 84c2: 09 12 push r9 84c4: 08 12 push r8 84c6: 0b 12 push r11 84c8: 0a 12 push r10 84ca: 0d 12 push r13 84cc: 0c 12 push r12 LPM3; traw = ADC10MEM; ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power dint(); degC = (((traw - 673) * 4230) / 1024); 84ce: 1c 41 74 00 mov 116(r1),r12 ;0x0074(r1) 84d2: 1d 41 76 00 mov 118(r1),r13 ;0x0076(r1) 84d6: 0c 5c rla r12 84d8: 0d 6d rlc r13 84da: 0c 5c rla r12 84dc: 0d 6d rlc r13 84de: 0c 5c rla r12 84e0: 0d 6d rlc r13 84e2: 0c 5c rla r12 84e4: 0d 6d rlc r13 84e6: 0a 4c mov r12, r10 84e8: 0b 4d mov r13, r11 84ea: 0a 5a rla r10 84ec: 0b 6b rlc r11 84ee: 0a 5a rla r10 84f0: 0b 6b rlc r11 84f2: 0a 5a rla r10 84f4: 0b 6b rlc r11 84f6: 0a 5a rla r10 84f8: 0b 6b rlc r11 84fa: 0a 5a rla r10 84fc: 0b 6b rlc r11 84fe: 0c 5a add r10, r12 8500: 0d 6b addc r11, r13 8502: 1c 51 74 00 add 116(r1),r12 ;0x0074(r1) 8506: 1d 61 76 00 addc 118(r1),r13 ;0x0076(r1) 850a: 0c 5c rla r12 850c: 0d 6d rlc r13 850e: 0c 5c rla r12 8510: 0d 6d rlc r13 8512: 1c 81 74 00 sub 116(r1),r12 ;0x0074(r1) 8516: 1d 71 76 00 subc 118(r1),r13 ;0x0076(r1) 851a: 0c 5c rla r12 851c: 0d 6d rlc r13 851e: 0a 4c mov r12, r10 8520: 0b 4d mov r13, r11 8522: 3a 50 ba 8f add #-28742,r10 ;#0x8fba 8526: 3b 60 d4 ff addc #-44, r11 ;#0xffd4 852a: 0b 93 tst r11 852c: 06 34 jge $+14 ;abs 0x853a 852e: 0a 4c mov r12, r10 8530: 0b 4d mov r13, r11 8532: 3a 50 b9 93 add #-27719,r10 ;#0x93b9 8536: 3b 60 d4 ff addc #-44, r11 ;#0xffd4 853a: 0c 4a mov r10, r12 853c: 0d 4b mov r11, r13 853e: 0c 4a mov r10, r12 8540: 8c 10 swpb r12 8542: 8d 10 swpb r13 8544: 4c ed xor.b r13, r12 8546: 0c ed xor r13, r12 8548: 8d 11 sxt r13 854a: 0d 11 rra r13 854c: 0c 10 rrc r12 854e: 0d 11 rra r13 8550: 0c 10 rrc r12 XL_raw = sample_adc_chan(ADC_IN_XL); YR_raw = sample_adc_chan(ADC_IN_YR); XR_raw = sample_adc_chan(ADC_IN_XR); length=snprintf(CC1100_buffer,64, "GND:%s S:%u T:%d %lu %lu %lu-%lu %lu-%lu ", CALLSIGN, seconds, degC, BS1_raw, BS2_raw, YL_raw, XL_raw, YR_raw, XR_raw); //send the temperature to the ground 8552: 0c 12 push r12 8554: 11 12 9a 00 push 154(r1) ;0x009a(r1) 8558: 30 12 aa 98 push #-26454 ;#0x98aa 855c: 30 12 2b 99 push #-26325 ;#0x992b 8560: 30 12 40 00 push #64 ;#0x0040 8564: 3f 40 3e 00 mov #62, r15 ;#0x003e 8568: 0f 51 add r1, r15 856a: 0f 12 push r15 856c: b0 12 04 8f call #0x8f04 8570: 31 50 24 00 add #36, r1 ;#0x0024 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 8574: 1f 93 cmp #1, r15 ;r3 As==01 8576: 2c 38 jl $+90 ;abs 0x85d0 8578: 0c 43 clr r12 { volatile int i; UCA0TXBUF = string[pointer]; 857a: 3e 40 1c 00 mov #28, r14 ;#0x001c 857e: 0e 51 add r1, r14 8580: 0e 5c add r12, r14 8582: e2 4e 67 00 mov.b @r14, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 8586: 5e 42 03 00 mov.b &0x0003,r14 858a: 2e f3 and #2, r14 ;r3 As==10 858c: fc 27 jz $-6 ;abs 0x8586 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 858e: 1c 53 inc r12 8590: 0c 9f cmp r15, r12 8592: f3 23 jnz $-24 ;abs 0x857a 8594: 1d 3c jmp $+60 ;abs 0x85d0 { volatile int i; UCA0TXBUF = string[pointer]; 8596: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 859a: 5f 42 03 00 mov.b &0x0003,r15 859e: 2f f3 and #2, r15 ;r3 As==10 85a0: fc 27 jz $-6 ;abs 0x859a 85a2: 1d 53 inc r13 */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 85a4: 3d 90 a9 98 cmp #-26455,r13 ;#0x98a9 85a8: f6 23 jnz $-18 ;abs 0x8596 TX232String(CC1100_buffer,length); TX232String("\r\n",2); ///P4IFG &= ~GDO0_1100; //reset trashed interrupt state ///RX_MODE_1100(); //set the radio back to RX mode so we don't miss any packets memset(CC1100_buffer, 0, 64); 85aa: 3d 40 40 00 mov #64, r13 ;#0x0040 85ae: 0e 43 clr r14 85b0: 0f 41 mov r1, r15 85b2: 3f 50 1c 00 add #28, r15 ;#0x001c 85b6: b0 12 40 8d call #0x8d40 eint(); 85ba: 32 d2 eint 85bc: 30 40 3a 81 br #0x813a } } if(loop == 0) //If we got around the entire loop without any pending events then there is nothing left to do, go to sleep 85c0: 4d 93 tst.b r13 85c2: 02 24 jz $+6 ;abs 0x85c8 85c4: 30 40 3a 81 br #0x813a LPM3; //when we wake up it'll be because of an interrupt triggered event 85c8: 32 d0 d0 00 bis #208, r2 ;#0x00d0 85cc: 30 40 3a 81 br #0x813a } /** Main function. */ int main(void) 85d0: 3d 40 a7 98 mov #-26457,r13 ;#0x98a7 85d4: e0 3f jmp $-62 ;abs 0x8596 85d6: 3d 40 a7 98 mov #-26457,r13 ;#0x98a7 85da: 30 40 ea 81 br #0x81ea 000085de <__stop_progExec__>: 85de: 32 d0 f0 00 bis #240, r2 ;#0x00f0 85e2: fd 3f jmp $-4 ;abs 0x85de 000085e4 <__ctors_end>: 85e4: 30 40 94 98 br #0x9894 000085e8 : */ // ADC interupt is called upon a successful conversion interrupt (ADC10_VECTOR) ADC_VEC(void) { LPM3_EXIT; 85e8: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 85ec: 00 00 } 85ee: 00 13 reti 000085f0 : /** This is called once every timer overflow */ interrupt (TIMERA1_VECTOR) TA1_VEC(void) { 85f0: 0f 12 push r15 dint(); //no nesting! 85f2: 32 c2 dint 85f4: 03 43 nop if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 85f6: 1f 42 2e 01 mov &0x012e,r15 85fa: 3f 90 0a 00 cmp #10, r15 ;#0x000a 85fe: 03 24 jz $+8 ;abs 0x8606 flags |= TIMER_UP; seconds++; TACTL &= ~TAIFG; //clear the flag LPM3_EXIT; } eint(); 8600: 32 d2 eint } 8602: 3f 41 pop r15 8604: 00 13 reti dint(); //no nesting! if(TAIV == 0x0A) //reading this bit will clear the interrupt flags { //P1OUT ^= LED_RED; flags |= TIMER_UP; 8606: 92 d3 10 02 bis #1, &0x0210 ;r3 As==01 seconds++; 860a: 92 53 0c 02 inc &0x020c TACTL &= ~TAIFG; //clear the flag 860e: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 8612: 60 01 LPM3_EXIT; 8614: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8618: 02 00 } eint(); 861a: 32 d2 eint } 861c: 3f 41 pop r15 861e: 00 13 reti 00008620 : /** This is called once for every RS232 character that comes in */ interrupt (USCIAB0RX_VECTOR) RX_VEC(void) { 8620: 0f 12 push r15 dint(); //no nesting! 8622: 32 c2 dint 8624: 03 43 nop //P1OUT^=LED_GRN; rx_char = UCA0RXBUF; 8626: d2 42 66 00 mov.b &0x0066,&0x0212 862a: 12 02 flags |= RXCHAR_RDY; 862c: b2 d0 10 00 bis #16, &0x0210 ;#0x0010 8630: 10 02 LPM3_EXIT; 8632: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8636: 02 00 eint(); 8638: 32 d2 eint } 863a: 3f 41 pop r15 863c: 00 13 reti 0000863e : /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { 863e: 0b 12 push r11 8640: 0a 12 push r10 TACCTL0 = CCIE; // TACCR0 interrupt enabled 8642: b2 40 10 00 mov #16, &0x0162 ;#0x0010 8646: 62 01 TACTL = TASSEL_1; // ACLK, upmode 8648: b2 40 00 01 mov #256, &0x0160 ;#0x0100 864c: 60 01 TACTL &= ~TAIFG; //clear interrupt 864e: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 8652: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8654: 0c 43 clr r12 8656: 0e 4f mov r15, r14 8658: 0f 4c mov r12, r15 865a: 0e 5e rla r14 865c: 0f 6f rlc r15 865e: 0e 5e rla r14 8660: 0f 6f rlc r15 8662: 0e 5e rla r14 8664: 0f 6f rlc r15 8666: 0e 5e rla r14 8668: 0f 6f rlc r15 866a: 0e 5e rla r14 866c: 0f 6f rlc r15 866e: 0c 4e mov r14, r12 8670: 0d 4f mov r15, r13 8672: 0c 5c rla r12 8674: 0d 6d rlc r13 8676: 0c 5c rla r12 8678: 0d 6d rlc r13 867a: 0e 5c add r12, r14 867c: 0f 6d addc r13, r15 867e: 0c 4e mov r14, r12 8680: 0d 4f mov r15, r13 8682: 0c 5c rla r12 8684: 0d 6d rlc r13 8686: 0c 5c rla r12 8688: 0d 6d rlc r13 868a: 0a 4e mov r14, r10 868c: 0b 4f mov r15, r11 868e: 0a 5c add r12, r10 8690: 0b 6d addc r13, r11 8692: 0e 4a mov r10, r14 8694: 0f 4b mov r11, r15 8696: 0e 5e rla r14 8698: 0f 6f rlc r15 869a: 0e 5e rla r14 869c: 0f 6f rlc r15 869e: 0e 5e rla r14 86a0: 0f 6f rlc r15 86a2: 0e 5e rla r14 86a4: 0f 6f rlc r15 86a6: 3c 40 e8 03 mov #1000, r12 ;#0x03e8 86aa: 0d 43 clr r13 86ac: 0e 8a sub r10, r14 86ae: 0f 7b subc r11, r15 86b0: b0 12 ce 8c call #0x8cce 86b4: 82 4e 72 01 mov r14, &0x0172 //TACCR0 = 12000; // ~1 second TAR = 0; 86b8: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 86bc: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 86c0: 60 01 } 86c2: 3a 41 pop r10 86c4: 3b 41 pop r11 86c6: 30 41 ret 000086c8 : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 86f6: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 86fa: 20 01 P1OUT = P1OUT_INIT; //Init output data of port1 86fc: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 P2OUT = P2OUT_INIT; //Init output data of port2 8700: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 P3OUT = P3OUT_INIT; 8704: c2 43 19 00 mov.b #0, &0x0019 ;r3 As==00 P4OUT = P4OUT_INIT; 8708: f2 40 21 00 mov.b #33, &0x001d ;#0x0021 870c: 1d 00 P1SEL = P1SEL_INIT; //Select port or module -function on port1 870e: f2 40 40 00 mov.b #64, &0x0026 ;#0x0040 8712: 26 00 P2SEL = P2SEL_INIT; //Select port or module -function on port2 8714: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 P3SEL = P3SEL_INIT; 8718: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 871c: 1b 00 P4SEL = P4SEL_INIT; 871e: c2 43 1f 00 mov.b #0, &0x001f ;r3 As==00 P1DIR = P1DIR_INIT; //Init port direction register of port1 8722: f2 43 22 00 mov.b #-1, &0x0022 ;r3 As==11 P2DIR = P2DIR_INIT; //Init port direction register of port2 8726: f2 40 e8 ff mov.b #-24, &0x002a ;#0xffe8 872a: 2a 00 P3DIR = P3DIR_INIT; 872c: f2 40 1b 00 mov.b #27, &0x001a ;#0x001b 8730: 1a 00 P4DIR = P4DIR_INIT; 8732: f2 40 67 00 mov.b #103, &0x001e ;#0x0067 8736: 1e 00 P1IES = P1IES_INIT; //init port interrupts 8738: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 P2IES = P2IES_INIT; 873c: c2 43 2c 00 mov.b #0, &0x002c ;r3 As==00 P1IE = P1IE_INIT; 8740: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 P2IE = P2IE_INIT; 8744: c2 43 2d 00 mov.b #0, &0x002d ;r3 As==00 //P1REN = P1REN_INIT; BCSCTL1 = CALBC1_16MHZ; // Set DCO 8748: d2 42 f9 10 mov.b &0x10f9,&0x0057 874c: 57 00 DCOCTL = CALDCO_16MHZ; 874e: d2 42 f8 10 mov.b &0x10f8,&0x0056 8752: 56 00 BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 8754: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 8758: 53 00 } 875a: 30 41 ret 0000875c : /**init the ADC10 */ void init_adc() { //ADC10AE0 = (ADC_IN_YR | ADC_IN_XR | ADC_IN_YL | ADC_IN_XL | ADC_IN_BS1 | ADC_IN_BS2); //Configure input buffers for analog operation ADC10AE0 = (bit0 | bit1 | bit2 | bit4 | bit6 | bit7); 875c: f2 40 d7 ff mov.b #-41, &0x004a ;#0xffd7 8760: 4a 00 ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 8762: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 8766: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8768: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 876c: b2 01 } 876e: 30 41 ret 00008770 : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 8770: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8774: b0 01 while(ADC10CTL1 & ADC10BUSY); 8776: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 877a: fd 23 jnz $-4 ;abs 0x8776 return ADC10MEM; 877c: 1f 42 b4 01 mov &0x01b4,r15 } 8780: 30 41 ret 00008782 : int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel 8782: b2 f0 fd ff and #-3, &0x01b0 ;#0xfffd 8786: b0 01 if(chan == INCH_TEMP) ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor 8788: 1e 42 b0 01 mov &0x01b0,r14 } int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel if(chan == INCH_TEMP) 878c: 3f 90 00 a0 cmp #-24576,r15 ;#0xa000 8790: 10 24 jz $+34 ;abs 0x87b2 ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor else ADC10CTL0 &= ~SREF_VREF_AVSS; //set the ref to VCC for the external sensors 8792: 3e f0 ff df and #-8193, r14 ;#0xdfff 8796: 82 4e b0 01 mov r14, &0x01b0 ADC10CTL1 = ADC10SSEL_ACLK | chan; //ACLK sourced, A2 input 879a: 3f d2 bis #8, r15 ;r2 As==11 879c: 82 4f b2 01 mov r15, &0x01b2 ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 87a0: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 87a4: b0 01 while(ADC10CTL1 & ADC10BUSY); 87a6: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 87aa: fd 23 jnz $-4 ;abs 0x87a6 return ADC10MEM; 87ac: 1f 42 b4 01 mov &0x01b4,r15 } 87b0: 30 41 ret int sample_adc_chan(int chan) { ADC10CTL0 &= ~ENC; // have to disable ADC10 to change channel if(chan == INCH_TEMP) ADC10CTL0 |= SREF_VREF_AVSS; //set the ref to 1.5V for the temp sensor 87b2: 3e d0 00 20 bis #8192, r14 ;#0x2000 87b6: 82 4e b0 01 mov r14, &0x01b0 87ba: ef 3f jmp $-32 ;abs 0x879a 000087bc : */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 87bc: 1e 93 cmp #1, r14 ;r3 As==01 87be: 0c 38 jl $+26 ;abs 0x87d8 87c0: 0c 43 clr r12 If CTS# is logic 1 it is indicating the external device cannot accept motre data. the FTxxx will stop transmitting within 0~3 characters, depending on what is in the buffer. This potential 3 character overrun does occasionally present problems. Customers shoud be made aware the FTxxx is a USB device and not a "normal" RS232 device as seen on a PC. As such the device operates on a packet basis as opposed to a byte basis. */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... 87c2: 0d 4f mov r15, r13 87c4: 0d 5c add r12, r13 { int pointer; for( pointer = 0; pointer < length; pointer++) { volatile int i; UCA0TXBUF = string[pointer]; 87c6: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 87ca: 5d 42 03 00 mov.b &0x0003,r13 87ce: 2d f3 and #2, r13 ;r3 As==10 87d0: fc 27 jz $-6 ;abs 0x87ca */ void TX232String( char* string, int length ) //At some point this could become DMA driven to save CPU time... { int pointer; for( pointer = 0; pointer < length; pointer++) 87d2: 1c 53 inc r12 87d4: 0c 9e cmp r14, r12 87d6: f5 23 jnz $-20 ;abs 0x87c2 87d8: 30 41 ret 000087da : } } void init_A_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 87da: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 87de: 61 00 UCA0BR0 = 0x82; // 9600 from 16Mhz 87e0: f2 40 82 ff mov.b #-126, &0x0062 ;#0xff82 87e4: 62 00 UCA0BR1 = 0x6; 87e6: f2 40 06 00 mov.b #6, &0x0063 ;#0x0006 87ea: 63 00 //UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 87ec: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 87f0: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe 87f4: 61 00 IE2 |= UCA0RXIE; 87f6: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 } 87fa: 30 41 ret 000087fc : void init_B_UART_SPI() { UCB0CTL1 = UCSWRST; 87fc: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 8800: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8804: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8806: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 880a: 68 00 UCB0BR0 = 2; 880c: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 8810: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 8814: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 8818: 69 00 } 881a: 30 41 ret 0000881c : Configure the CC1100 chip */ void CC1100_WRITE_SPI_RF_SETTINGS() { // Write register settings CC1100_SPI_WRREG(CCxxx0_IOCFG2, CC1100_IOCFG2); // GDO2 output pin config. 881c: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8820: 4f 43 clr.b r15 8822: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_IOCFG0, CC1100_IOCFG0); // GDO0 output pin config. 8826: 7e 40 06 00 mov.b #6, r14 ;#0x0006 882a: 6f 43 mov.b #2, r15 ;r3 As==10 882c: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_PKTLEN, CC1100_PKTLEN); // Packet length. 8830: 7e 43 mov.b #-1, r14 ;r3 As==11 8832: 7f 40 06 00 mov.b #6, r15 ;#0x0006 8836: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_PKTCTRL1, CC1100_PKTCTRL1); // Packet automation control. 883a: 6e 42 mov.b #4, r14 ;r2 As==10 883c: 7f 40 07 00 mov.b #7, r15 ;#0x0007 8840: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_PKTCTRL0, CC1100_PKTCTRL0); // Packet automation control. 8844: 7e 40 05 00 mov.b #5, r14 ;#0x0005 8848: 7f 42 mov.b #8, r15 ;r2 As==11 884a: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_ADDR, CC1100_ADDR); // Device address. 884e: 4e 43 clr.b r14 8850: 7f 40 09 00 mov.b #9, r15 ;#0x0009 8854: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_CHANNR, CC1100_CHANNR); // Channel number. 8858: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 885c: 7f 40 0a 00 mov.b #10, r15 ;#0x000a 8860: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FSCTRL1, CC1100_FSCTRL1); // Freq synthesizer control. 8864: 7e 40 06 00 mov.b #6, r14 ;#0x0006 8868: 7f 40 0b 00 mov.b #11, r15 ;#0x000b 886c: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FSCTRL0, CC1100_FSCTRL0); // Freq synthesizer control. 8870: 4e 43 clr.b r14 8872: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 8876: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FREQ2, CC1100_FREQ2); // Freq control word, high byte 887a: 7e 40 23 00 mov.b #35, r14 ;#0x0023 887e: 7f 40 0d 00 mov.b #13, r15 ;#0x000d 8882: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FREQ1, CC1100_FREQ1); // Freq control word, mid byte. 8886: 7e 40 31 00 mov.b #49, r14 ;#0x0031 888a: 7f 40 0e 00 mov.b #14, r15 ;#0x000e 888e: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FREQ0, CC1100_FREQ0); // Freq control word, low byte. 8892: 7e 40 3b 00 mov.b #59, r14 ;#0x003b 8896: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 889a: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_MDMCFG4, CC1100_MDMCFG4); // Modem configuration. 889e: 7e 40 f5 ff mov.b #-11, r14 ;#0xfff5 88a2: 7f 40 10 00 mov.b #16, r15 ;#0x0010 88a6: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_MDMCFG3, CC1100_MDMCFG3); // Modem configuration. 88aa: 7e 40 83 ff mov.b #-125, r14 ;#0xff83 88ae: 7f 40 11 00 mov.b #17, r15 ;#0x0011 88b2: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_MDMCFG2, CC1100_MDMCFG2); // Modem configuration. 88b6: 7e 40 03 00 mov.b #3, r14 ;#0x0003 88ba: 7f 40 12 00 mov.b #18, r15 ;#0x0012 88be: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_MDMCFG1, CC1100_MDMCFG1); // Modem configuration. 88c2: 7e 40 22 00 mov.b #34, r14 ;#0x0022 88c6: 7f 40 13 00 mov.b #19, r15 ;#0x0013 88ca: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_MDMCFG0, CC1100_MDMCFG0); // Modem configuration. 88ce: 7e 40 f8 ff mov.b #-8, r14 ;#0xfff8 88d2: 7f 40 14 00 mov.b #20, r15 ;#0x0014 88d6: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_DEVIATN, CC1100_DEVIATN); // Modem dev (when FSK mod en) 88da: 7e 40 15 00 mov.b #21, r14 ;#0x0015 88de: 7f 40 15 00 mov.b #21, r15 ;#0x0015 88e2: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_MCSM1 , CC1100_MCSM1 ); //MainRadio Cntrl State Machine 88e6: 7e 40 30 00 mov.b #48, r14 ;#0x0030 88ea: 7f 40 17 00 mov.b #23, r15 ;#0x0017 88ee: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_MCSM0 , CC1100_MCSM0 ); //MainRadio Cntrl State Machine 88f2: 7e 40 18 00 mov.b #24, r14 ;#0x0018 88f6: 7f 40 18 00 mov.b #24, r15 ;#0x0018 88fa: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FOCCFG, CC1100_FOCCFG); // Freq Offset Compens. Config 88fe: 7e 40 16 00 mov.b #22, r14 ;#0x0016 8902: 7f 40 19 00 mov.b #25, r15 ;#0x0019 8906: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_BSCFG, CC1100_BSCFG); // Bit synchronization config. 890a: 7e 40 6c 00 mov.b #108, r14 ;#0x006c 890e: 7f 40 1a 00 mov.b #26, r15 ;#0x001a 8912: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_AGCCTRL2, CC1100_AGCCTRL2); // AGC control. 8916: 7e 40 03 00 mov.b #3, r14 ;#0x0003 891a: 7f 40 1b 00 mov.b #27, r15 ;#0x001b 891e: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_AGCCTRL1, CC1100_AGCCTRL1); // AGC control. 8922: 7e 40 40 00 mov.b #64, r14 ;#0x0040 8926: 7f 40 1c 00 mov.b #28, r15 ;#0x001c 892a: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_AGCCTRL0, CC1100_AGCCTRL0); // AGC control. 892e: 7e 40 91 ff mov.b #-111, r14 ;#0xff91 8932: 7f 40 1d 00 mov.b #29, r15 ;#0x001d 8936: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FREND1, CC1100_FREND1); // Front end RX configuration. 893a: 7e 40 56 00 mov.b #86, r14 ;#0x0056 893e: 7f 40 21 00 mov.b #33, r15 ;#0x0021 8942: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FREND0, CC1100_FREND0); // Front end RX configuration. 8946: 7e 40 10 00 mov.b #16, r14 ;#0x0010 894a: 7f 40 22 00 mov.b #34, r15 ;#0x0022 894e: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FSCAL3, CC1100_FSCAL3); // Frequency synthesizer cal. 8952: 7e 40 e9 ff mov.b #-23, r14 ;#0xffe9 8956: 7f 40 23 00 mov.b #35, r15 ;#0x0023 895a: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FSCAL2, CC1100_FSCAL2); // Frequency synthesizer cal. 895e: 7e 40 2a 00 mov.b #42, r14 ;#0x002a 8962: 7f 40 24 00 mov.b #36, r15 ;#0x0024 8966: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FSCAL1, CC1100_FSCAL1); // Frequency synthesizer cal. 896a: 4e 43 clr.b r14 896c: 7f 40 25 00 mov.b #37, r15 ;#0x0025 8970: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FSCAL0, CC1100_FSCAL0); // Frequency synthesizer cal. 8974: 7e 40 1f 00 mov.b #31, r14 ;#0x001f 8978: 7f 40 26 00 mov.b #38, r15 ;#0x0026 897c: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_FSTEST, CC1100_FSTEST); // Frequency synthesizer cal. 8980: 7e 40 59 00 mov.b #89, r14 ;#0x0059 8984: 7f 40 29 00 mov.b #41, r15 ;#0x0029 8988: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_TEST2, CC1100_TEST2); // Various test settings. 898c: 7e 40 81 ff mov.b #-127, r14 ;#0xff81 8990: 7f 40 2c 00 mov.b #44, r15 ;#0x002c 8994: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_TEST1, CC1100_TEST1); // Various test settings. 8998: 7e 40 35 00 mov.b #53, r14 ;#0x0035 899c: 7f 40 2d 00 mov.b #45, r15 ;#0x002d 89a0: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_TEST0, CC1100_TEST0); // Various test settings. 89a4: 7e 40 09 00 mov.b #9, r14 ;#0x0009 89a8: 7f 40 2e 00 mov.b #46, r15 ;#0x002e 89ac: b0 12 e6 8b call #0x8be6 CC1100_SPI_WRREG(CCxxx0_PATABLE, CC1100_PATABLE); // Output Power 89b0: 7e 40 c0 ff mov.b #-64, r14 ;#0xffc0 89b4: 7f 40 3e 00 mov.b #62, r15 ;#0x003e 89b8: b0 12 e6 8b call #0x8be6 } 89bc: 30 41 ret 000089be : */ void RX_MODE_1100() { //Recieve Mode CC1100_SPI_STROBE(CCxxx0_SRX); 89be: 7f 40 34 00 mov.b #52, r15 ;#0x0034 89c2: b0 12 4c 8b call #0x8b4c while(status_1100!=15) //(15)31 for return to TX on complete, see MCSM1 89c6: f2 90 0f 00 cmp.b #15, &0x0206 ;#0x000f 89ca: 06 02 89cc: 08 24 jz $+18 ;abs 0x89de CC1100_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 89ce: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 89d2: b0 12 4c 8b call #0x8b4c void RX_MODE_1100() { //Recieve Mode CC1100_SPI_STROBE(CCxxx0_SRX); while(status_1100!=15) //(15)31 for return to TX on complete, see MCSM1 89d6: f2 90 0f 00 cmp.b #15, &0x0206 ;#0x000f 89da: 06 02 89dc: f8 23 jnz $-14 ;abs 0x89ce CC1100_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... P4OUT &= ~RF_PA_EN; //make sure that the TX PA is OFF 89de: f2 f0 fb ff and.b #-5, &0x001d ;#0xfffb 89e2: 1d 00 P4OUT |= RF_LNA_EN; //Make sure that the RX LNA is ON 89e4: e2 d3 1d 00 bis.b #2, &0x001d ;r3 As==10 } 89e8: 30 41 ret 000089ea : /** Grab the waiting packet from the CC1100 */ char RX_STRING_1100(unsigned char *buffer, unsigned char length) { 89ea: 0b 12 push r11 89ec: 0a 12 push r10 89ee: 09 12 push r9 89f0: 08 12 push r8 89f2: 07 12 push r7 89f4: 06 12 push r6 89f6: 07 4f mov r15, r7 89f8: 49 4e mov.b r14, r9 //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; #ifndef FIXED_PACKET_MODE pkt_length = CC1100_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet ASSUMING VARIABLE PACKET LENGTH 89fa: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 89fe: b0 12 86 8b call #0x8b86 8a02: 48 4f mov.b r15, r8 #else pkt_length = CC1100_SPI_RDREG(CCxxx0_PKTLEN);//length of the packet ASSUMING VARIABLE PACKET LENGTH #endif real_length = CC1100_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 8a04: 7f 40 3b 00 mov.b #59, r15 ;#0x003b 8a08: b0 12 86 8b call #0x8b86 8a0c: 46 4f mov.b r15, r6 for(i=0; i < length && i < pkt_length; i++) 8a0e: 49 93 tst.b r9 8a10: 67 24 jz $+208 ;abs 0x8ae0 8a12: 48 93 tst.b r8 8a14: 69 24 jz $+212 ;abs 0x8ae8 8a16: 0a 47 mov r7, r10 8a18: 4b 43 clr.b r11 8a1a: 03 3c jmp $+8 ;abs 0x8a22 8a1c: 1a 53 inc r10 8a1e: 48 9b cmp.b r11, r8 8a20: 5c 24 jz $+186 ;abs 0x8ada { buffer[i] = CC1100_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 8a22: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8a26: b0 12 86 8b call #0x8b86 8a2a: ca 4f 00 00 mov.b r15, 0(r10) ;0x0000(r10) pkt_length = CC1100_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet ASSUMING VARIABLE PACKET LENGTH #else pkt_length = CC1100_SPI_RDREG(CCxxx0_PKTLEN);//length of the packet ASSUMING VARIABLE PACKET LENGTH #endif real_length = CC1100_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8a2e: 5b 53 inc.b r11 8a30: 4b 99 cmp.b r9, r11 8a32: f4 23 jnz $-22 ;abs 0x8a1c 8a34: 4e 4b mov.b r11, r14 8a36: 48 48 mov.b r8, r8 { buffer[i] = CC1100_SPI_RDREG(CCxxx0_RXFIFO);//get the byte } buffer[i] = '\0';//set the NULL terminator 8a38: 0e 57 add r7, r14 8a3a: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) RSSI_1100 = CC1100_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 8a3e: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8a42: b0 12 86 8b call #0x8b86 8a46: c2 4f 09 02 mov.b r15, &0x0209 LQI_1100 = CC1100_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 8a4a: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8a4e: b0 12 86 8b call #0x8b86 8a52: c2 4f 08 02 mov.b r15, &0x0208 PKTSTATUS_1100 = CC1100_SPI_RDREG(CCxxx0_PKTSTATUS); 8a56: 7f 40 38 00 mov.b #56, r15 ;#0x0038 8a5a: b0 12 86 8b call #0x8b86 8a5e: c2 4f 0a 02 mov.b r15, &0x020a if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 8a62: 4f 46 mov.b r6, r15 8a64: 28 53 incd r8 8a66: 0f 98 cmp r8, r15 8a68: 0d 24 jz $+28 ;abs 0x8a84 { LQI_1100 &= ~bit7; //force it to be INVALID! 8a6a: f2 f0 7f 00 and.b #127, &0x0208 ;#0x007f 8a6e: 08 02 //guess at length i = strlen(buffer); 8a70: 0b 47 mov r7, r11 8a72: 3b 53 add #-1, r11 ;r3 As==11 8a74: 1b 53 inc r11 8a76: cb 93 00 00 tst.b 0(r11) ;0x0000(r11) 8a7a: fc 23 jnz $-6 ;abs 0x8a74 8a7c: 0b 87 sub r7, r11 if( i > length) 8a7e: 49 9b cmp.b r11, r9 8a80: 1b 28 jnc $+56 ;abs 0x8ab8 8a82: 4b 4b mov.b r11, r11 i = 0; } if (RSSI_1100 >= 128) 8a84: 5e 42 09 02 mov.b &0x0209,r14 8a88: 4e 93 tst.b r14 8a8a: 1b 38 jl $+56 ;abs 0x8ac2 RSSI_DBM_1100 = (int)((int )(RSSI_1100 - 256) / 2) - 72; else RSSI_DBM_1100 = (RSSI_1100 / 2) - 72; 8a8c: 12 c3 clrc 8a8e: 4e 10 rrc.b r14 8a90: 7e 50 b8 ff add.b #-72, r14 ;#0xffb8 8a94: c2 4e 0e 02 mov.b r14, &0x020e CC1100_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 8a98: 7f 40 3a 00 mov.b #58, r15 ;#0x003a 8a9c: b0 12 4c 8b call #0x8b4c CC1100_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 8aa0: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8aa4: b0 12 4c 8b call #0x8b4c return i; //i = real length } 8aa8: 4f 4b mov.b r11, r15 8aaa: 36 41 pop r6 8aac: 37 41 pop r7 8aae: 38 41 pop r8 8ab0: 39 41 pop r9 8ab2: 3a 41 pop r10 8ab4: 3b 41 pop r11 8ab6: 30 41 ret if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported { LQI_1100 &= ~bit7; //force it to be INVALID! //guess at length i = strlen(buffer); if( i > length) 8ab8: 4b 43 clr.b r11 i = 0; } if (RSSI_1100 >= 128) 8aba: 5e 42 09 02 mov.b &0x0209,r14 8abe: 4e 93 tst.b r14 8ac0: e5 37 jge $-52 ;abs 0x8a8c RSSI_DBM_1100 = (int)((int )(RSSI_1100 - 256) / 2) - 72; 8ac2: 4e 4e mov.b r14, r14 8ac4: 0f 4e mov r14, r15 8ac6: 3f 50 00 ff add #-256, r15 ;#0xff00 8aca: 0f 93 tst r15 8acc: 11 38 jl $+36 ;abs 0x8af0 8ace: 0f 11 rra r15 8ad0: 7f 50 b8 ff add.b #-72, r15 ;#0xffb8 8ad4: c2 4f 0e 02 mov.b r15, &0x020e 8ad8: df 3f jmp $-64 ;abs 0x8a98 pkt_length = CC1100_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet ASSUMING VARIABLE PACKET LENGTH #else pkt_length = CC1100_SPI_RDREG(CCxxx0_PKTLEN);//length of the packet ASSUMING VARIABLE PACKET LENGTH #endif real_length = CC1100_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8ada: 48 4b mov.b r11, r8 8adc: 0e 48 mov r8, r14 8ade: ac 3f jmp $-166 ;abs 0x8a38 8ae0: 0e 43 clr r14 8ae2: 4b 43 clr.b r11 8ae4: 48 48 mov.b r8, r8 8ae6: a8 3f jmp $-174 ;abs 0x8a38 8ae8: 0e 43 clr r14 8aea: 4b 43 clr.b r11 8aec: 08 43 clr r8 8aee: a4 3f jmp $-182 ;abs 0x8a38 if( i > length) i = 0; } if (RSSI_1100 >= 128) RSSI_DBM_1100 = (int)((int )(RSSI_1100 - 256) / 2) - 72; 8af0: 1f 53 inc r15 8af2: ed 3f jmp $-36 ;abs 0x8ace 00008af4 : /** Transmit a string of bytes.on the CC1100 */ void TX_1100_STRING(unsigned char *txstring, unsigned char length) { 8af4: 0b 12 push r11 8af6: 0a 12 push r10 8af8: 0b 4f mov r15, r11 8afa: 4a 4e mov.b r14, r10 P4OUT &= ~RF_LNA_EN; //Make sure that the RX LNA is OFF 8afc: f2 f0 fd ff and.b #-3, &0x001d ;#0xfffd 8b00: 1d 00 P4OUT |= RF_PA_EN; //make sure that the TX PA is ON 8b02: e2 d2 1d 00 bis.b #4, &0x001d ;r2 As==10 #ifdef FIXED_PACKET_MODE unsigned char i,pktlen = CC1100_SPI_RDREG(CCxxx0_PKTLEN); #endif //length += 3; do{ CC1100_SPI_STROBE(CCxxx0_SIDLE);//Idle 8b06: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8b0a: b0 12 4c 8b call #0x8b4c }while((status_1100 & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 8b0e: 5f 42 06 02 mov.b &0x0206,r15 8b12: 3f b0 70 00 bit #112, r15 ;#0x0070 8b16: f7 23 jnz $-16 ;abs 0x8b06 { CC1100_SPI_WRREG(CCxxx0_TXFIFO, '\0');//then fill rest will null characters } } #else CC1100_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8b18: 4d 4a mov.b r10, r13 8b1a: 0e 4b mov r11, r14 8b1c: 7f 40 7f 00 mov.b #127, r15 ;#0x007f 8b20: b0 12 36 8c call #0x8c36 #endif CC1100_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8b24: 7f 40 35 00 mov.b #53, r15 ;#0x0035 8b28: b0 12 4c 8b call #0x8b4c 8b2c: 03 3c jmp $+8 ;abs 0x8b34 do{ CC1100_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... if(status_1100 == 31) //fast RX mode yay break; }while((status_1100 & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 8b2e: 3f b0 70 00 bit #112, r15 ;#0x0070 8b32: 09 24 jz $+20 ;abs 0x8b46 CC1100_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) do{ CC1100_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8b34: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8b38: b0 12 4c 8b call #0x8b4c if(status_1100 == 31) //fast RX mode yay 8b3c: 5f 42 06 02 mov.b &0x0206,r15 8b40: 7f 90 1f 00 cmp.b #31, r15 ;#0x001f 8b44: f4 23 jnz $-22 ;abs 0x8b2e break; }while((status_1100 & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 //P2OUT &= ~RF_LNA_EN; //Make sure that the RX LNA is OFF //P3OUT |= RF_PA_EN; //make sure that the TX PA is ON } 8b46: 3a 41 pop r10 8b48: 3b 41 pop r11 8b4a: 30 41 ret 00008b4c : Strobe a command to the CC1100 */ void CC1100_SPI_STROBE(char reg) { status_1100=0; P4OUT &= ~CSn_1100; //pull CSn low to activate chip 8b4c: f2 f0 df ff and.b #-33, &0x001d ;#0xffdf 8b50: 1d 00 while(P3IN & SOMI_1100); //wait for the CCXX good signal, wait for SOMI to drop low 8b52: 5e 42 18 00 mov.b &0x0018,r14 8b56: 2e f2 and #4, r14 ;r2 As==10 8b58: fc 23 jnz $-6 ;abs 0x8b52 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8b5a: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8b5e: 1b 00 IFG2 &= ~UCB0RXIFG; 8b60: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8b64: 03 00 UCB0TXBUF = reg; 8b66: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8b6a: 5f 42 03 00 mov.b &0x0003,r15 8b6e: 2f f2 and #4, r15 ;r2 As==10 8b70: fc 27 jz $-6 ;abs 0x8b6a status_1100 = UCB0RXBUF; 8b72: d2 42 6e 00 mov.b &0x006e,&0x0206 8b76: 06 02 P4OUT |= CSn_1100; //pull CSn high, we're done with the transfer 8b78: f2 d0 20 00 bis.b #32, &0x001d ;#0x0020 8b7c: 1d 00 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8b7e: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8b82: 1b 00 } 8b84: 30 41 ret 00008b86 : Read a register from the CC1100 */ char CC1100_SPI_RDREG(char reg) { unsigned char rx=0; if(reg >= 0x30) 8b86: 7f 90 30 00 cmp.b #48, r15 ;#0x0030 8b8a: 2a 38 jl $+86 ;abs 0x8be0 reg |= 0xC0; 8b8c: 7f d0 c0 ff bis.b #-64, r15 ;#0xffc0 else reg |= 0x80; status_1100=0; P4OUT &= ~CSn_1100; //pull CSn low to activate chip 8b90: f2 f0 df ff and.b #-33, &0x001d ;#0xffdf 8b94: 1d 00 while(P3IN & SOMI_1100); //wait for the CCXX good signal, wait for SOMI to drop low 8b96: 5e 42 18 00 mov.b &0x0018,r14 8b9a: 2e f2 and #4, r14 ;r2 As==10 8b9c: fc 23 jnz $-6 ;abs 0x8b96 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8b9e: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8ba2: 1b 00 IFG2 &= ~UCB0RXIFG; 8ba4: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8ba8: 03 00 UCB0TXBUF = reg; 8baa: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8bae: 5f 42 03 00 mov.b &0x0003,r15 8bb2: 2f f2 and #4, r15 ;r2 As==10 8bb4: fc 27 jz $-6 ;abs 0x8bae status_1100 = UCB0RXBUF; 8bb6: d2 42 6e 00 mov.b &0x006e,&0x0206 8bba: 06 02 IFG2 &= ~UCB0RXIFG; 8bbc: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8bc0: 03 00 UCB0TXBUF = 0; 8bc2: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 while (!(IFG2 & UCB0RXIFG)); 8bc6: 5f 42 03 00 mov.b &0x0003,r15 8bca: 2f f2 and #4, r15 ;r2 As==10 8bcc: fc 27 jz $-6 ;abs 0x8bc6 rx = UCB0RXBUF; 8bce: 5f 42 6e 00 mov.b &0x006e,r15 P4OUT |= CSn_1100; //pull CSn high, we're done with the transfer 8bd2: f2 d0 20 00 bis.b #32, &0x001d ;#0x0020 8bd6: 1d 00 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8bd8: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8bdc: 1b 00 return rx; } 8bde: 30 41 ret { unsigned char rx=0; if(reg >= 0x30) reg |= 0xC0; else reg |= 0x80; 8be0: 7f d0 80 ff bis.b #-128, r15 ;#0xff80 8be4: d5 3f jmp $-84 ;abs 0x8b90 00008be6 : { unsigned char dummy; status_1100=0; P4OUT &= ~CSn_1100; //pull CSn low to activate chip 8be6: f2 f0 df ff and.b #-33, &0x001d ;#0xffdf 8bea: 1d 00 while(P3IN & SOMI_1100); //wait for the CCXX good signal, wait for SOMI to drop low 8bec: 5d 42 18 00 mov.b &0x0018,r13 8bf0: 2d f2 and #4, r13 ;r2 As==10 8bf2: fc 23 jnz $-6 ;abs 0x8bec P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8bf4: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8bf8: 1b 00 IFG2 &= ~UCB0RXIFG; 8bfa: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8bfe: 03 00 UCB0TXBUF = reg; 8c00: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c04: 5f 42 03 00 mov.b &0x0003,r15 8c08: 2f f2 and #4, r15 ;r2 As==10 8c0a: fc 27 jz $-6 ;abs 0x8c04 status_1100 = UCB0RXBUF; 8c0c: d2 42 6e 00 mov.b &0x006e,&0x0206 8c10: 06 02 //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8c12: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c16: 03 00 UCB0TXBUF = byte; 8c18: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c1c: 5f 42 03 00 mov.b &0x0003,r15 8c20: 2f f2 and #4, r15 ;r2 As==10 8c22: fc 27 jz $-6 ;abs 0x8c1c dummy = UCB0RXBUF; 8c24: 5f 42 6e 00 mov.b &0x006e,r15 P4OUT |= CSn_1100; //pull CSn high, we're done with the transfer 8c28: f2 d0 20 00 bis.b #32, &0x001d ;#0x0020 8c2c: 1d 00 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8c2e: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8c32: 1b 00 } 8c34: 30 41 ret 00008c36 : { unsigned char dummy; unsigned int index; status_1100=0; P4OUT &= ~CSn_1100; //pull CSn low to activate chip 8c36: f2 f0 df ff and.b #-33, &0x001d ;#0xffdf 8c3a: 1d 00 while(P3IN & SOMI_1100); //wait for the CCXX good signal, wait for SOMI to drop low 8c3c: 5c 42 18 00 mov.b &0x0018,r12 8c40: 2c f2 and #4, r12 ;r2 As==10 8c42: fc 23 jnz $-6 ;abs 0x8c3c P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8c44: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8c48: 1b 00 IFG2 &= ~UCB0RXIFG; 8c4a: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c4e: 03 00 UCB0TXBUF = reg; 8c50: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c54: 5f 42 03 00 mov.b &0x0003,r15 8c58: 2f f2 and #4, r15 ;r2 As==10 8c5a: fc 27 jz $-6 ;abs 0x8c54 status_1100 = UCB0RXBUF; 8c5c: d2 42 6e 00 mov.b &0x006e,&0x0206 8c60: 06 02 #ifndef FIXED_PACKET_MODE IFG2 &= ~UCB0RXIFG; 8c62: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c66: 03 00 UCB0TXBUF = length; 8c68: c2 4d 6f 00 mov.b r13, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c6c: 5f 42 03 00 mov.b &0x0003,r15 8c70: 2f f2 and #4, r15 ;r2 As==10 8c72: fc 27 jz $-6 ;abs 0x8c6c dummy = UCB0RXBUF; 8c74: 5f 42 6e 00 mov.b &0x006e,r15 #endif for(index = 0; index < length; index++) 8c78: 8d 11 sxt r13 8c7a: 11 24 jz $+36 ;abs 0x8c9e 8c7c: 0c 43 clr r12 { IFG2 &= ~UCB0RXIFG; 8c7e: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c82: 03 00 } /** Write a register from the CC1100 */ void CC1100_SPI_BURST_WRREG(char reg, char *buf, char length) 8c84: 0f 4e mov r14, r15 8c86: 0f 5c add r12, r15 #endif for(index = 0; index < length; index++) { IFG2 &= ~UCB0RXIFG; UCB0TXBUF = buf[index]; 8c88: e2 4f 6f 00 mov.b @r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c8c: 5f 42 03 00 mov.b &0x0003,r15 8c90: 2f f2 and #4, r15 ;r2 As==10 8c92: fc 27 jz $-6 ;abs 0x8c8c dummy = UCB0RXBUF; 8c94: 5f 42 6e 00 mov.b &0x006e,r15 UCB0TXBUF = length; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; #endif for(index = 0; index < length; index++) 8c98: 1c 53 inc r12 8c9a: 0c 9d cmp r13, r12 8c9c: f0 2b jnc $-30 ;abs 0x8c7e UCB0TXBUF = buf[index]; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; } P4OUT |= CSn_1100; //pull CSn high, we're done with the transfer 8c9e: f2 d0 20 00 bis.b #32, &0x001d ;#0x0020 8ca2: 1d 00 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8ca4: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8ca8: 1b 00 } 8caa: 30 41 ret 00008cac <__udivhi3>: 8cac: 7c 40 10 00 mov.b #16, r12 ;#0x0010 8cb0: 0d 4e mov r14, r13 8cb2: 0e 43 clr r14 8cb4: 0f 5f rla r15 8cb6: 0e 6e rlc r14 8cb8: 0e 9d cmp r13, r14 8cba: 02 28 jnc $+6 ;abs 0x8cc0 8cbc: 0e 8d sub r13, r14 8cbe: 1f d3 bis #1, r15 ;r3 As==01 8cc0: 1c 83 dec r12 8cc2: f8 23 jnz $-14 ;abs 0x8cb4 8cc4: 30 41 ret 00008cc6 <__umodhi3>: 8cc6: b0 12 ac 8c call #0x8cac 8cca: 0f 4e mov r14, r15 8ccc: 30 41 ret 00008cce <__udivsi3>: 8cce: 0b 12 push r11 8cd0: 0a 12 push r10 8cd2: 09 12 push r9 8cd4: 79 40 20 00 mov.b #32, r9 ;#0x0020 8cd8: 0a 4c mov r12, r10 8cda: 0b 4d mov r13, r11 8cdc: 0c 43 clr r12 8cde: 0d 43 clr r13 8ce0: 0e 5e rla r14 8ce2: 0f 6f rlc r15 8ce4: 0c 6c rlc r12 8ce6: 0d 6d rlc r13 8ce8: 0d 9b cmp r11, r13 8cea: 06 28 jnc $+14 ;abs 0x8cf8 8cec: 02 20 jnz $+6 ;abs 0x8cf2 8cee: 0c 9a cmp r10, r12 8cf0: 03 28 jnc $+8 ;abs 0x8cf8 8cf2: 0c 8a sub r10, r12 8cf4: 0d 7b subc r11, r13 8cf6: 1e d3 bis #1, r14 ;r3 As==01 8cf8: 19 83 dec r9 8cfa: f2 23 jnz $-26 ;abs 0x8ce0 8cfc: 39 41 pop r9 8cfe: 3a 41 pop r10 8d00: 3b 41 pop r11 8d02: 30 41 ret 00008d04 <__umodsi3>: 8d04: b0 12 ce 8c call #0x8cce 8d08: 0e 4c mov r12, r14 8d0a: 0f 4d mov r13, r15 8d0c: 30 41 ret 00008d0e : 8d0e: 6d 4f mov.b @r15, r13 8d10: 4d 9e cmp.b r14, r13 8d12: 05 24 jz $+12 ;abs 0x8d1e 8d14: 4d 93 tst.b r13 8d16: 02 24 jz $+6 ;abs 0x8d1c 8d18: 1f 53 inc r15 8d1a: f9 3f jmp $-12 ;abs 0x8d0e 8d1c: 0f 43 clr r15 8d1e: 30 41 ret 00008d20 : 8d20: 0b 12 push r11 8d22: 0d 93 tst r13 8d24: 0a 24 jz $+22 ;abs 0x8d3a 8d26: 7b 4f mov.b @r15+, r11 8d28: 7c 4e mov.b @r14+, r12 8d2a: 4b 9c cmp.b r12, r11 8d2c: 04 24 jz $+10 ;abs 0x8d36 8d2e: 4f 4b mov.b r11, r15 8d30: 4e 4c mov.b r12, r14 8d32: 0f 8e sub r14, r15 8d34: 03 3c jmp $+8 ;abs 0x8d3c 8d36: 3d 53 add #-1, r13 ;r3 As==11 8d38: f4 3f jmp $-22 ;abs 0x8d22 8d3a: 0f 43 clr r15 8d3c: 3b 41 pop r11 8d3e: 30 41 ret 00008d40 : 8d40: 0b 12 push r11 8d42: 0a 12 push r10 8d44: 09 12 push r9 8d46: 08 12 push r8 8d48: 3d 90 06 00 cmp #6, r13 ;#0x0006 8d4c: 09 2c jc $+20 ;abs 0x8d60 8d4e: 0c 4f mov r15, r12 8d50: 04 3c jmp $+10 ;abs 0x8d5a 8d52: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 8d56: 1c 53 inc r12 8d58: 3d 53 add #-1, r13 ;r3 As==11 8d5a: 0d 93 tst r13 8d5c: fa 23 jnz $-10 ;abs 0x8d52 8d5e: 20 3c jmp $+66 ;abs 0x8da0 8d60: 4e 4e mov.b r14, r14 8d62: 4b 4e mov.b r14, r11 8d64: 0b 93 tst r11 8d66: 03 24 jz $+8 ;abs 0x8d6e 8d68: 0c 4b mov r11, r12 8d6a: 8c 10 swpb r12 8d6c: 0b dc bis r12, r11 8d6e: 1f b3 bit #1, r15 ;r3 As==01 8d70: 06 24 jz $+14 ;abs 0x8d7e 8d72: 3d 53 add #-1, r13 ;r3 As==11 8d74: cf 4e 00 00 mov.b r14, 0(r15) ;0x0000(r15) 8d78: 09 4f mov r15, r9 8d7a: 19 53 inc r9 8d7c: 01 3c jmp $+4 ;abs 0x8d80 8d7e: 09 4f mov r15, r9 8d80: 0c 4d mov r13, r12 8d82: 12 c3 clrc 8d84: 0c 10 rrc r12 8d86: 0a 49 mov r9, r10 8d88: 08 4c mov r12, r8 8d8a: 8a 4b 00 00 mov r11, 0(r10) ;0x0000(r10) 8d8e: 2a 53 incd r10 8d90: 38 53 add #-1, r8 ;r3 As==11 8d92: fb 23 jnz $-8 ;abs 0x8d8a 8d94: 0c 5c rla r12 8d96: 0c 59 add r9, r12 8d98: 1d f3 and #1, r13 ;r3 As==01 8d9a: 02 24 jz $+6 ;abs 0x8da0 8d9c: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 8da0: 38 41 pop r8 8da2: 39 41 pop r9 8da4: 3a 41 pop r10 8da6: 3b 41 pop r11 8da8: 30 41 ret 00008daa : 8daa: 0b 12 push r11 8dac: 0a 12 push r10 8dae: 09 12 push r9 8db0: 08 12 push r8 8db2: 07 12 push r7 8db4: 0b 4f mov r15, r11 8db6: 69 4e mov.b @r14, r9 8db8: 49 93 tst.b r9 8dba: 1b 24 jz $+56 ;abs 0x8df2 8dbc: 0a 4e mov r14, r10 8dbe: 1a 53 inc r10 8dc0: 0d 4e mov r14, r13 8dc2: 1d 53 inc r13 8dc4: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 8dc8: fc 23 jnz $-6 ;abs 0x8dc2 8dca: 07 4d mov r13, r7 8dcc: 07 8a sub r10, r7 8dce: 01 3c jmp $+4 ;abs 0x8dd2 8dd0: 0b 48 mov r8, r11 8dd2: 6f 4b mov.b @r11, r15 8dd4: 4f 93 tst.b r15 8dd6: 0c 24 jz $+26 ;abs 0x8df0 8dd8: 08 4b mov r11, r8 8dda: 18 53 inc r8 8ddc: 4f 99 cmp.b r9, r15 8dde: f8 23 jnz $-14 ;abs 0x8dd0 8de0: 0d 47 mov r7, r13 8de2: 0e 4a mov r10, r14 8de4: 0f 48 mov r8, r15 8de6: b0 12 7c 97 call #0x977c 8dea: 0f 93 tst r15 8dec: f1 23 jnz $-28 ;abs 0x8dd0 8dee: 01 3c jmp $+4 ;abs 0x8df2 8df0: 0b 43 clr r11 8df2: 0f 4b mov r11, r15 8df4: 37 41 pop r7 8df6: 38 41 pop r8 8df8: 39 41 pop r9 8dfa: 3a 41 pop r10 8dfc: 3b 41 pop r11 8dfe: 30 41 ret 00008e00 : 8e00: 0b 12 push r11 8e02: 0e 4f mov r15, r14 8e04: 01 3c jmp $+4 ;abs 0x8e08 8e06: 1e 53 inc r14 8e08: 6f 4e mov.b @r14, r15 8e0a: 7f 90 20 00 cmp.b #32, r15 ;#0x0020 8e0e: fb 27 jz $-8 ;abs 0x8e06 8e10: 7f 90 09 00 cmp.b #9, r15 ;#0x0009 8e14: f8 27 jz $-14 ;abs 0x8e06 8e16: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 8e1a: f5 27 jz $-20 ;abs 0x8e06 8e1c: 7f 90 0c 00 cmp.b #12, r15 ;#0x000c 8e20: f2 27 jz $-26 ;abs 0x8e06 8e22: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d 8e26: ef 27 jz $-32 ;abs 0x8e06 8e28: 7f 90 0b 00 cmp.b #11, r15 ;#0x000b 8e2c: ec 27 jz $-38 ;abs 0x8e06 8e2e: 7f 90 2d 00 cmp.b #45, r15 ;#0x002d 8e32: 03 20 jnz $+8 ;abs 0x8e3a 8e34: 1e 53 inc r14 8e36: 1b 43 mov #1, r11 ;r3 As==01 8e38: 05 3c jmp $+12 ;abs 0x8e44 8e3a: 7f 90 2b 00 cmp.b #43, r15 ;#0x002b 8e3e: 01 20 jnz $+4 ;abs 0x8e42 8e40: 1e 53 inc r14 8e42: 0b 43 clr r11 8e44: 6f 4e mov.b @r14, r15 8e46: 8f 11 sxt r15 8e48: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8e4c: 3f 90 0a 00 cmp #10, r15 ;#0x000a 8e50: 19 2c jc $+52 ;abs 0x8e84 8e52: 0d 43 clr r13 8e54: 7c 4e mov.b @r14+, r12 8e56: 8c 11 sxt r12 8e58: 0f 4c mov r12, r15 8e5a: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8e5e: 0f 5d add r13, r15 8e60: 6d 4e mov.b @r14, r13 8e62: 8d 11 sxt r13 8e64: 3d 50 d0 ff add #-48, r13 ;#0xffd0 8e68: 3d 90 0a 00 cmp #10, r13 ;#0x000a 8e6c: 06 2c jc $+14 ;abs 0x8e7a 8e6e: 0f 5f rla r15 8e70: 0d 4f mov r15, r13 8e72: 0d 5d rla r13 8e74: 0d 5d rla r13 8e76: 0d 5f add r15, r13 8e78: ed 3f jmp $-36 ;abs 0x8e54 8e7a: 0b 93 tst r11 8e7c: 04 24 jz $+10 ;abs 0x8e86 8e7e: 3f e3 inv r15 8e80: 1f 53 inc r15 8e82: 01 3c jmp $+4 ;abs 0x8e86 8e84: 0f 43 clr r15 8e86: 3b 41 pop r11 8e88: 30 41 ret 00008e8a : 8e8a: 1e 42 04 02 mov &0x0204,r14 8e8e: 1e 93 cmp #1, r14 ;r3 As==01 8e90: 0b 38 jl $+24 ;abs 0x8ea8 8e92: 1d 42 02 02 mov &0x0202,r13 8e96: cd 4f 00 00 mov.b r15, 0(r13) ;0x0000(r13) 8e9a: 1d 53 inc r13 8e9c: 82 4d 02 02 mov r13, &0x0202 8ea0: 3e 53 add #-1, r14 ;r3 As==11 8ea2: 82 4e 04 02 mov r14, &0x0204 8ea6: 30 41 ret 8ea8: 3f 43 mov #-1, r15 ;r3 As==11 8eaa: 30 41 ret 00008eac : 8eac: 0b 12 push r11 8eae: 0a 12 push r10 8eb0: 21 83 decd r1 8eb2: 81 4e 00 00 mov r14, 0(r1) ;0x0000(r1) 8eb6: 1a 42 02 02 mov &0x0202,r10 8eba: 1b 42 04 02 mov &0x0204,r11 8ebe: 0d 4e mov r14, r13 8ec0: 0e 4f mov r15, r14 8ec2: 3f 40 8a 8e mov #-29046,r15 ;#0x8e8a 8ec6: b0 12 de 90 call #0x90de 8eca: 0f 9b cmp r11, r15 8ecc: 05 38 jl $+12 ;abs 0x8ed8 8ece: 0e 4a mov r10, r14 8ed0: 0e 5b add r11, r14 8ed2: ce 43 ff ff mov.b #0, -1(r14) ;r3 As==00, 0xffff(r14) 8ed6: 04 3c jmp $+10 ;abs 0x8ee0 8ed8: 1e 42 02 02 mov &0x0202,r14 8edc: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) 8ee0: 21 53 incd r1 8ee2: 3a 41 pop r10 8ee4: 3b 41 pop r11 8ee6: 30 41 ret 00008ee8 : 8ee8: 92 41 02 00 mov 2(r1), &0x0202 ;0x0002(r1) 8eec: 02 02 8eee: b2 40 ff 7f mov #32767, &0x0204 ;#0x7fff 8ef2: 04 02 8ef4: 0e 41 mov r1, r14 8ef6: 3e 50 06 00 add #6, r14 ;#0x0006 8efa: 1f 41 04 00 mov 4(r1), r15 ;0x0004(r1) 8efe: b0 12 ac 8e call #0x8eac 8f02: 30 41 ret 00008f04 : 8f04: 92 41 02 00 mov 2(r1), &0x0202 ;0x0002(r1) 8f08: 02 02 8f0a: 92 41 04 00 mov 4(r1), &0x0204 ;0x0004(r1) 8f0e: 04 02 8f10: 0e 41 mov r1, r14 8f12: 3e 52 add #8, r14 ;r2 As==11 8f14: 1f 41 06 00 mov 6(r1), r15 ;0x0006(r1) 8f18: b0 12 ac 8e call #0x8eac 8f1c: 30 41 ret 00008f1e : 8f1e: 0c 4e mov r14, r12 8f20: 82 4f 02 02 mov r15, &0x0202 8f24: b2 40 ff 7f mov #32767, &0x0204 ;#0x7fff 8f28: 04 02 8f2a: 0e 4d mov r13, r14 8f2c: 0f 4c mov r12, r15 8f2e: b0 12 ac 8e call #0x8eac 8f32: 30 41 ret 00008f34 : 8f34: 82 4f 02 02 mov r15, &0x0202 8f38: 82 4e 04 02 mov r14, &0x0204 8f3c: 0e 4c mov r12, r14 8f3e: 0f 4d mov r13, r15 8f40: b0 12 ac 8e call #0x8eac 8f44: 30 41 ret 00008f46 : 8f46: 0b 12 push r11 8f48: 0a 12 push r10 8f4a: 09 12 push r9 8f4c: 08 12 push r8 8f4e: 07 12 push r7 8f50: 06 12 push r6 8f52: 05 12 push r5 8f54: 04 12 push r4 8f56: 31 82 sub #8, r1 ;r2 As==11 8f58: 08 4f mov r15, r8 8f5a: 81 4e 04 00 mov r14, 4(r1) ;0x0004(r1) 8f5e: 09 4d mov r13, r9 8f60: 1f 41 1a 00 mov 26(r1), r15 ;0x001a(r1) 8f64: 1d 41 1c 00 mov 28(r1), r13 ;0x001c(r1) 8f68: 4c 4d mov.b r13, r12 8f6a: 04 4d mov r13, r4 8f6c: 84 10 swpb r4 8f6e: 45 44 mov.b r4, r5 8f70: 4e 4f mov.b r15, r14 8f72: 7e b0 40 00 bit.b #64, r14 ;#0x0040 8f76: 11 24 jz $+36 ;abs 0x8f9a 8f78: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) 8f7c: 00 00 8f7e: 0e 4f mov r15, r14 8f80: 8e 10 swpb r14 8f82: 5e f3 and.b #1, r14 ;r3 As==01 8f84: 03 24 jz $+8 ;abs 0x8f8c 8f86: 7e 40 58 00 mov.b #88, r14 ;#0x0058 8f8a: 02 3c jmp $+6 ;abs 0x8f90 8f8c: 7e 40 78 00 mov.b #120, r14 ;#0x0078 8f90: c1 4e 01 00 mov.b r14, 1(r1) ;0x0001(r1) 8f94: 0c 41 mov r1, r12 8f96: 2c 53 incd r12 8f98: 0f 3c jmp $+32 ;abs 0x8fb8 8f9a: 7e f0 20 00 and.b #32, r14 ;#0x0020 8f9e: 04 24 jz $+10 ;abs 0x8fa8 8fa0: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) 8fa4: 00 00 8fa6: 04 3c jmp $+10 ;abs 0x8fb0 8fa8: 4c 93 tst.b r12 8faa: 05 24 jz $+12 ;abs 0x8fb6 8fac: c1 4d 00 00 mov.b r13, 0(r1) ;0x0000(r1) 8fb0: 0c 41 mov r1, r12 8fb2: 1c 53 inc r12 8fb4: 01 3c jmp $+4 ;abs 0x8fb8 8fb6: 0c 41 mov r1, r12 8fb8: 0a 4c mov r12, r10 8fba: 8c 10 swpb r12 8fbc: 8c 11 sxt r12 8fbe: 8c 10 swpb r12 8fc0: 8c 11 sxt r12 8fc2: 0b 4c mov r12, r11 8fc4: 06 41 mov r1, r6 8fc6: 0c 41 mov r1, r12 8fc8: 8c 10 swpb r12 8fca: 8c 11 sxt r12 8fcc: 8c 10 swpb r12 8fce: 8c 11 sxt r12 8fd0: 07 4c mov r12, r7 8fd2: 0a 86 sub r6, r10 8fd4: 0b 77 subc r7, r11 8fd6: 0e 4f mov r15, r14 8fd8: 8e 10 swpb r14 8fda: c1 4e 02 00 mov.b r14, 2(r1) ;0x0002(r1) 8fde: 6e f2 and.b #4, r14 ;r2 As==10 8fe0: 02 24 jz $+6 ;abs 0x8fe6 8fe2: 07 45 mov r5, r7 8fe4: 01 3c jmp $+4 ;abs 0x8fe8 8fe6: 37 43 mov #-1, r7 ;r3 As==11 8fe8: 4f 4f mov.b r15, r15 8fea: 7f b0 10 00 bit.b #16, r15 ;#0x0010 8fee: 3c 20 jnz $+122 ;abs 0x9068 8ff0: 1d 41 04 00 mov 4(r1), r13 ;0x0004(r1) 8ff4: 3d 53 add #-1, r13 ;r3 As==11 8ff6: 1d 53 inc r13 8ff8: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 8ffc: fc 23 jnz $-6 ;abs 0x8ff6 8ffe: 1d 81 04 00 sub 4(r1), r13 ;0x0004(r1) 9002: 09 9a cmp r10, r9 9004: 02 28 jnc $+6 ;abs 0x900a 9006: 09 8a sub r10, r9 9008: 01 3c jmp $+4 ;abs 0x900c 900a: 09 43 clr r9 900c: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) 9010: 05 24 jz $+12 ;abs 0x901c 9012: 09 95 cmp r5, r9 9014: 02 28 jnc $+6 ;abs 0x901a 9016: 09 85 sub r5, r9 9018: 01 3c jmp $+4 ;abs 0x901c 901a: 09 43 clr r9 901c: 05 4d mov r13, r5 901e: 07 9d cmp r13, r7 9020: 01 2c jc $+4 ;abs 0x9024 9022: 05 47 mov r7, r5 9024: 4f 93 tst.b r15 9026: 0d 38 jl $+28 ;abs 0x9042 9028: f1 40 20 00 mov.b #32, 6(r1) ;#0x0020, 0x0006(r1) 902c: 06 00 902e: 06 43 clr r6 9030: 0b 43 clr r11 9032: 0e 3c jmp $+30 ;abs 0x9050 9034: 0f 41 mov r1, r15 9036: 0f 56 add r6, r15 9038: 6f 4f mov.b @r15, r15 903a: 8f 11 sxt r15 903c: 16 53 inc r6 903e: 88 12 call r8 9040: 01 3c jmp $+4 ;abs 0x9044 9042: 06 43 clr r6 9044: 06 9a cmp r10, r6 9046: f6 3b jl $-18 ;abs 0x9034 9048: 0b 4a mov r10, r11 904a: f1 40 30 00 mov.b #48, 6(r1) ;#0x0030, 0x0006(r1) 904e: 06 00 9050: 05 8b sub r11, r5 9052: 05 3c jmp $+12 ;abs 0x905e 9054: 5f 41 06 00 mov.b 6(r1), r15 ;0x0006(r1) 9058: 8f 11 sxt r15 905a: 88 12 call r8 905c: 1b 53 inc r11 905e: 0f 45 mov r5, r15 9060: 0f 5b add r11, r15 9062: 0f 99 cmp r9, r15 9064: f7 2b jnc $-16 ;abs 0x9054 9066: 0a 3c jmp $+22 ;abs 0x907c 9068: 06 43 clr r6 906a: 0b 43 clr r11 906c: 07 3c jmp $+16 ;abs 0x907c 906e: 1b 53 inc r11 9070: 0f 41 mov r1, r15 9072: 0f 56 add r6, r15 9074: 6f 4f mov.b @r15, r15 9076: 8f 11 sxt r15 9078: 16 53 inc r6 907a: 88 12 call r8 907c: 06 9a cmp r10, r6 907e: f7 3b jl $-16 ;abs 0x906e 9080: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) 9084: 02 24 jz $+6 ;abs 0x908a 9086: 4a 44 mov.b r4, r10 9088: 08 3c jmp $+18 ;abs 0x909a 908a: 1a 41 04 00 mov 4(r1), r10 ;0x0004(r1) 908e: 0a 8b sub r11, r10 9090: 0d 3c jmp $+28 ;abs 0x90ac 9092: 3f 40 30 00 mov #48, r15 ;#0x0030 9096: 88 12 call r8 9098: 7a 53 add.b #-1, r10 ;r3 As==11 909a: 4a 93 tst.b r10 909c: fa 23 jnz $-10 ;abs 0x9092 909e: 44 44 mov.b r4, r4 90a0: 0b 54 add r4, r11 90a2: f3 3f jmp $-24 ;abs 0x908a 90a4: 37 53 add #-1, r7 ;r3 As==11 90a6: 8f 11 sxt r15 90a8: 88 12 call r8 90aa: 1b 53 inc r11 90ac: 0f 4a mov r10, r15 90ae: 0f 5b add r11, r15 90b0: 6f 4f mov.b @r15, r15 90b2: 4f 93 tst.b r15 90b4: 07 24 jz $+16 ;abs 0x90c4 90b6: 07 93 tst r7 90b8: f5 23 jnz $-20 ;abs 0x90a4 90ba: 04 3c jmp $+10 ;abs 0x90c4 90bc: 3f 40 20 00 mov #32, r15 ;#0x0020 90c0: 88 12 call r8 90c2: 1b 53 inc r11 90c4: 0b 99 cmp r9, r11 90c6: fa 2b jnc $-10 ;abs 0x90bc 90c8: 0f 4b mov r11, r15 90ca: 31 52 add #8, r1 ;r2 As==11 90cc: 34 41 pop r4 90ce: 35 41 pop r5 90d0: 36 41 pop r6 90d2: 37 41 pop r7 90d4: 38 41 pop r8 90d6: 39 41 pop r9 90d8: 3a 41 pop r10 90da: 3b 41 pop r11 90dc: 30 41 ret 000090de : 90de: 0b 12 push r11 90e0: 0a 12 push r10 90e2: 09 12 push r9 90e4: 08 12 push r8 90e6: 07 12 push r7 90e8: 06 12 push r6 90ea: 05 12 push r5 90ec: 04 12 push r4 90ee: 31 50 b6 ff add #-74, r1 ;#0xffb6 90f2: 81 4f 3a 00 mov r15, 58(r1) ;0x003a(r1) 90f6: 06 4e mov r14, r6 90f8: 05 4d mov r13, r5 90fa: 81 4e 3e 00 mov r14, 62(r1) ;0x003e(r1) 90fe: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) 9102: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9106: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) 910a: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 910e: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) 9112: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) 9116: 07 43 clr r7 9118: 81 43 2c 00 mov #0, 44(r1) ;r3 As==00, 0x002c(r1) 911c: 0e 41 mov r1, r14 911e: 3e 50 1c 00 add #28, r14 ;#0x001c 9122: 81 4e 1c 00 mov r14, 28(r1) ;0x001c(r1) 9126: 30 40 58 97 br #0x9758 912a: 0f 46 mov r6, r15 912c: 1f 53 inc r15 912e: 81 4f 40 00 mov r15, 64(r1) ;0x0040(r1) 9132: 07 93 tst r7 9134: 1e 20 jnz $+62 ;abs 0x9172 9136: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 913a: 13 20 jnz $+40 ;abs 0x9162 913c: 81 43 00 00 mov #0, 0(r1) ;r3 As==00, 0x0000(r1) 9140: 81 43 02 00 mov #0, 2(r1) ;r3 As==00, 0x0002(r1) 9144: 81 46 3e 00 mov r6, 62(r1) ;0x003e(r1) 9148: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) 914c: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9150: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) 9154: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 9158: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) 915c: 30 40 4e 97 br #0x974e 9160: 05 47 mov r7, r5 9162: 8e 11 sxt r14 9164: 0f 4e mov r14, r15 9166: 91 12 3c 00 call 60(r1) ;0x003c(r1) 916a: 91 53 2c 00 inc 44(r1) ;0x002c(r1) 916e: 30 40 34 97 br #0x9734 9172: 7e 90 63 00 cmp.b #99, r14 ;#0x0063 9176: c5 24 jz $+396 ;abs 0x9302 9178: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 917c: 27 34 jge $+80 ;abs 0x91cc 917e: 7e 90 30 00 cmp.b #48, r14 ;#0x0030 9182: 94 24 jz $+298 ;abs 0x92ac 9184: 7e 90 31 00 cmp.b #49, r14 ;#0x0031 9188: 1a 34 jge $+54 ;abs 0x91be 918a: 7e 90 2a 00 cmp.b #42, r14 ;#0x002a 918e: 77 24 jz $+240 ;abs 0x927e 9190: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b 9194: 0a 34 jge $+22 ;abs 0x91aa 9196: 7e 90 23 00 cmp.b #35, r14 ;#0x0023 919a: 42 24 jz $+134 ;abs 0x9220 919c: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 91a0: e0 27 jz $-62 ;abs 0x9162 91a2: 7e 90 20 00 cmp.b #32, r14 ;#0x0020 91a6: 32 20 jnz $+102 ;abs 0x920c 91a8: 56 3c jmp $+174 ;abs 0x9256 91aa: 7e 90 2d 00 cmp.b #45, r14 ;#0x002d 91ae: 49 24 jz $+148 ;abs 0x9242 91b0: 7e 90 2e 00 cmp.b #46, r14 ;#0x002e 91b4: 5b 24 jz $+184 ;abs 0x926c 91b6: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b 91ba: 28 20 jnz $+82 ;abs 0x920c 91bc: 47 3c jmp $+144 ;abs 0x924c 91be: 7e 90 3a 00 cmp.b #58, r14 ;#0x003a 91c2: 8c 38 jl $+282 ;abs 0x92dc 91c4: 7e 90 58 00 cmp.b #88, r14 ;#0x0058 91c8: 21 20 jnz $+68 ;abs 0x920c 91ca: e9 3c jmp $+468 ;abs 0x939e 91cc: 7e 90 6f 00 cmp.b #111, r14 ;#0x006f 91d0: 24 24 jz $+74 ;abs 0x921a 91d2: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 91d6: 0a 34 jge $+22 ;abs 0x91ec 91d8: 7e 90 69 00 cmp.b #105, r14 ;#0x0069 91dc: e3 24 jz $+456 ;abs 0x93a4 91de: 7e 90 6c 00 cmp.b #108, r14 ;#0x006c 91e2: 22 24 jz $+70 ;abs 0x9228 91e4: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 91e8: 11 20 jnz $+36 ;abs 0x920c 91ea: dc 3c jmp $+442 ;abs 0x93a4 91ec: 7e 90 73 00 cmp.b #115, r14 ;#0x0073 91f0: 98 24 jz $+306 ;abs 0x9322 91f2: 7e 90 74 00 cmp.b #116, r14 ;#0x0074 91f6: 04 34 jge $+10 ;abs 0x9200 91f8: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 91fc: 07 20 jnz $+16 ;abs 0x920c 91fe: b8 3c jmp $+370 ;abs 0x9370 9200: 7e 90 75 00 cmp.b #117, r14 ;#0x0075 9204: d1 24 jz $+420 ;abs 0x93a8 9206: 7e 90 78 00 cmp.b #120, r14 ;#0x0078 920a: d2 24 jz $+422 ;abs 0x93b0 920c: 19 41 3e 00 mov 62(r1), r9 ;0x003e(r1) 9210: 18 41 2c 00 mov 44(r1), r8 ;0x002c(r1) 9214: 08 89 sub r9, r8 9216: 30 40 22 97 br #0x9722 921a: b1 42 28 00 mov #8, 40(r1) ;r2 As==11, 0x0028(r1) 921e: cb 3c jmp $+408 ;abs 0x93b6 9220: f1 d2 00 00 bis.b #8, 0(r1) ;r2 As==11, 0x0000(r1) 9224: 30 40 52 97 br #0x9752 9228: 69 41 mov.b @r1, r9 922a: 59 f3 and.b #1, r9 ;r3 As==01 922c: 6e 41 mov.b @r1, r14 922e: 04 24 jz $+10 ;abs 0x9238 9230: 7e f0 fe ff and.b #-2, r14 ;#0xfffe 9234: 6e d3 bis.b #2, r14 ;r3 As==10 9236: 01 3c jmp $+4 ;abs 0x923a 9238: 5e d3 bis.b #1, r14 ;r3 As==01 923a: c1 4e 00 00 mov.b r14, 0(r1) ;0x0000(r1) 923e: 30 40 52 97 br #0x9752 9242: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) 9246: 00 00 9248: 30 40 52 97 br #0x9752 924c: f1 40 2b 00 mov.b #43, 2(r1) ;#0x002b, 0x0002(r1) 9250: 02 00 9252: 30 40 52 97 br #0x9752 9256: f1 90 2b 00 cmp.b #43, 2(r1) ;#0x002b, 0x0002(r1) 925a: 02 00 925c: 02 20 jnz $+6 ;abs 0x9262 925e: 30 40 52 97 br #0x9752 9262: f1 40 20 00 mov.b #32, 2(r1) ;#0x0020, 0x0002(r1) 9266: 02 00 9268: 30 40 52 97 br #0x9752 926c: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9270: 02 24 jz $+6 ;abs 0x9276 9272: 30 40 38 97 br #0x9738 9276: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 927a: 30 40 52 97 br #0x9752 927e: 0e 45 mov r5, r14 9280: 2e 53 incd r14 9282: 2a 45 mov @r5, r10 9284: 0a 93 tst r10 9286: 03 38 jl $+8 ;abs 0x928e 9288: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 928c: 0d 3c jmp $+28 ;abs 0x92a8 928e: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 9292: 02 24 jz $+6 ;abs 0x9298 9294: 30 40 48 97 br #0x9748 9298: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) 929c: 00 00 929e: 3a e3 inv r10 92a0: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 92a4: 91 53 26 00 inc 38(r1) ;0x0026(r1) 92a8: 05 4e mov r14, r5 92aa: 27 3c jmp $+80 ;abs 0x92fa 92ac: 81 93 26 00 tst 38(r1) ;0x0026(r1) 92b0: 15 20 jnz $+44 ;abs 0x92dc 92b2: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 92b6: 12 20 jnz $+38 ;abs 0x92dc 92b8: 69 41 mov.b @r1, r9 92ba: 79 f0 10 00 and.b #16, r9 ;#0x0010 92be: 5e 43 mov.b #1, r14 ;r3 As==01 92c0: 01 24 jz $+4 ;abs 0x92c4 92c2: 4e 43 clr.b r14 92c4: 4e 4e mov.b r14, r14 92c6: 0e 11 rra r14 92c8: 0e 43 clr r14 92ca: 4e 10 rrc.b r14 92cc: 6a 41 mov.b @r1, r10 92ce: 7a f0 7f 00 and.b #127, r10 ;#0x007f 92d2: 4a de bis.b r14, r10 92d4: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) 92d8: 30 40 52 97 br #0x9752 92dc: 1a 41 26 00 mov 38(r1), r10 ;0x0026(r1) 92e0: 0a 5a rla r10 92e2: 0c 4a mov r10, r12 92e4: 0c 5c rla r12 92e6: 0c 5c rla r12 92e8: 0a 5c add r12, r10 92ea: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 92ee: b1 50 d0 ff add #-48, 38(r1) ;#0xffd0, 0x0026(r1) 92f2: 26 00 92f4: 8e 11 sxt r14 92f6: 81 5e 26 00 add r14, 38(r1) ;0x0026(r1) 92fa: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) 92fe: 30 40 52 97 br #0x9752 9302: 07 45 mov r5, r7 9304: 27 53 incd r7 9306: 6e 45 mov.b @r5, r14 9308: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 930c: 03 20 jnz $+8 ;abs 0x9314 930e: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9312: 26 27 jz $-434 ;abs 0x9160 9314: c1 4e 04 00 mov.b r14, 4(r1) ;0x0004(r1) 9318: c1 43 05 00 mov.b #0, 5(r1) ;r3 As==00, 0x0005(r1) 931c: 0e 41 mov r1, r14 931e: 2e 52 add #4, r14 ;r2 As==10 9320: 03 3c jmp $+8 ;abs 0x9328 9322: 07 45 mov r5, r7 9324: 27 53 incd r7 9326: 2e 45 mov @r5, r14 9328: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 932c: 07 24 jz $+16 ;abs 0x933c 932e: e1 d2 01 00 bis.b #4, 1(r1) ;r2 As==10, 0x0001(r1) 9332: 1f 41 26 00 mov 38(r1), r15 ;0x0026(r1) 9336: c1 4f 03 00 mov.b r15, 3(r1) ;0x0003(r1) 933a: 06 3c jmp $+14 ;abs 0x9348 933c: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9340: 03 24 jz $+8 ;abs 0x9348 9342: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 9346: 30 00 9348: 0e 93 tst r14 934a: 02 20 jnz $+6 ;abs 0x9350 934c: 3e 40 55 99 mov #-26283,r14 ;#0x9955 9350: 11 12 04 00 push 4(r1) ;0x0004(r1) 9354: 11 12 04 00 push 4(r1) ;0x0004(r1) 9358: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) 935c: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) 9360: b0 12 46 8f call #0x8f46 9364: 21 52 add #4, r1 ;r2 As==10 9366: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) 936a: 05 47 mov r7, r5 936c: 30 40 34 97 br #0x9734 9370: 07 45 mov r5, r7 9372: 27 53 incd r7 9374: 29 45 mov @r5, r9 9376: 81 49 1e 00 mov r9, 30(r1) ;0x001e(r1) 937a: 5e 43 mov.b #1, r14 ;r3 As==01 937c: 09 93 tst r9 937e: 01 20 jnz $+4 ;abs 0x9382 9380: 4e 43 clr.b r14 9382: 4e 5e rla.b r14 9384: 4e 5e rla.b r14 9386: 4e 5e rla.b r14 9388: 6a 41 mov.b @r1, r10 938a: 7a f0 f7 ff and.b #-9, r10 ;#0xfff7 938e: 4a de bis.b r14, r10 9390: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) 9394: 05 47 mov r7, r5 9396: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) 939a: 28 00 939c: 53 3c jmp $+168 ;abs 0x9444 939e: d1 d3 01 00 bis.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 93a2: 06 3c jmp $+14 ;abs 0x93b0 93a4: e1 d2 00 00 bis.b #4, 0(r1) ;r2 As==10, 0x0000(r1) 93a8: b1 40 0a 00 mov #10, 40(r1) ;#0x000a, 0x0028(r1) 93ac: 28 00 93ae: 03 3c jmp $+8 ;abs 0x93b6 93b0: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) 93b4: 28 00 93b6: 6b 41 mov.b @r1, r11 93b8: 6b b3 bit.b #2, r11 ;r3 As==10 93ba: 24 24 jz $+74 ;abs 0x9404 93bc: 0c 45 mov r5, r12 93be: 3c 52 add #8, r12 ;r2 As==11 93c0: 28 45 mov @r5, r8 93c2: 17 45 02 00 mov 2(r5), r7 ;0x0002(r5) 93c6: 16 45 04 00 mov 4(r5), r6 ;0x0004(r5) 93ca: 1b 45 06 00 mov 6(r5), r11 ;0x0006(r5) 93ce: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) 93d2: 81 47 20 00 mov r7, 32(r1) ;0x0020(r1) 93d6: 81 46 22 00 mov r6, 34(r1) ;0x0022(r1) 93da: 81 4b 24 00 mov r11, 36(r1) ;0x0024(r1) 93de: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 93e2: 08 93 tst r8 93e4: 06 20 jnz $+14 ;abs 0x93f2 93e6: 07 93 tst r7 93e8: 04 20 jnz $+10 ;abs 0x93f2 93ea: 06 93 tst r6 93ec: 02 20 jnz $+6 ;abs 0x93f2 93ee: 0b 93 tst r11 93f0: 02 24 jz $+6 ;abs 0x93f6 93f2: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 93f6: 0b 5b rla r11 93f8: 0b 43 clr r11 93fa: 0b 6b rlc r11 93fc: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) 9400: 05 4c mov r12, r5 9402: 20 3c jmp $+66 ;abs 0x9444 9404: 5b f3 and.b #1, r11 ;r3 As==01 9406: 07 45 mov r5, r7 9408: 0d 24 jz $+28 ;abs 0x9424 940a: 27 52 add #4, r7 ;r2 As==10 940c: 28 45 mov @r5, r8 940e: 1b 45 02 00 mov 2(r5), r11 ;0x0002(r5) 9412: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) 9416: 81 4b 20 00 mov r11, 32(r1) ;0x0020(r1) 941a: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 941e: 08 93 tst r8 9420: 09 20 jnz $+20 ;abs 0x9434 9422: 06 3c jmp $+14 ;abs 0x9430 9424: 27 53 incd r7 9426: 2b 45 mov @r5, r11 9428: 81 4b 1e 00 mov r11, 30(r1) ;0x001e(r1) 942c: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 9430: 0b 93 tst r11 9432: 02 24 jz $+6 ;abs 0x9438 9434: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9438: 0b 5b rla r11 943a: 0b 43 clr r11 943c: 0b 6b rlc r11 943e: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) 9442: 05 47 mov r7, r5 9444: f1 b2 00 00 bit.b #8, 0(r1) ;r2 As==11, 0x0000(r1) 9448: 12 24 jz $+38 ;abs 0x946e 944a: c1 93 2b 00 tst.b 43(r1) ;0x002b(r1) 944e: 0f 20 jnz $+32 ;abs 0x946e 9450: 68 41 mov.b @r1, r8 9452: b1 90 10 00 cmp #16, 40(r1) ;#0x0010, 0x0028(r1) 9456: 28 00 9458: 03 20 jnz $+8 ;abs 0x9460 945a: 78 d0 40 00 bis.b #64, r8 ;#0x0040 945e: 05 3c jmp $+12 ;abs 0x946a 9460: b1 92 28 00 cmp #8, 40(r1) ;r2 As==11, 0x0028(r1) 9464: 04 20 jnz $+10 ;abs 0x946e 9466: 78 d0 20 00 bis.b #32, r8 ;#0x0020 946a: c1 48 00 00 mov.b r8, 0(r1) ;0x0000(r1) 946e: 68 41 mov.b @r1, r8 9470: 68 b2 bit.b #4, r8 ;r2 As==10 9472: 30 24 jz $+98 ;abs 0x94d4 9474: c1 93 2f 00 tst.b 47(r1) ;0x002f(r1) 9478: 2d 24 jz $+92 ;abs 0x94d4 947a: f1 40 2d 00 mov.b #45, 2(r1) ;#0x002d, 0x0002(r1) 947e: 02 00 9480: 68 b3 bit.b #2, r8 ;r3 As==10 9482: 11 24 jz $+36 ;abs 0x94a6 9484: b1 e3 1e 00 xor #-1, 30(r1) ;r3 As==11, 0x001e(r1) 9488: b1 e3 20 00 xor #-1, 32(r1) ;r3 As==11, 0x0020(r1) 948c: b1 e3 22 00 xor #-1, 34(r1) ;r3 As==11, 0x0022(r1) 9490: b1 e3 24 00 xor #-1, 36(r1) ;r3 As==11, 0x0024(r1) 9494: 91 53 1e 00 inc 30(r1) ;0x001e(r1) 9498: 81 63 20 00 adc 32(r1) ;0x0020(r1) 949c: 81 63 22 00 adc 34(r1) ;0x0022(r1) 94a0: 81 63 24 00 adc 36(r1) ;0x0024(r1) 94a4: 17 3c jmp $+48 ;abs 0x94d4 94a6: 58 b3 bit.b #1, r8 ;r3 As==01 94a8: 0f 24 jz $+32 ;abs 0x94c8 94aa: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) 94ae: 1b 41 20 00 mov 32(r1), r11 ;0x0020(r1) 94b2: 3a e3 inv r10 94b4: 3b e3 inv r11 94b6: 0e 4a mov r10, r14 94b8: 0f 4b mov r11, r15 94ba: 1e 53 inc r14 94bc: 0f 63 adc r15 94be: 81 4e 1e 00 mov r14, 30(r1) ;0x001e(r1) 94c2: 81 4f 20 00 mov r15, 32(r1) ;0x0020(r1) 94c6: 06 3c jmp $+14 ;abs 0x94d4 94c8: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) 94cc: 3a e3 inv r10 94ce: 1a 53 inc r10 94d0: 81 4a 1e 00 mov r10, 30(r1) ;0x001e(r1) 94d4: c1 43 1b 00 mov.b #0, 27(r1) ;r3 As==00, 0x001b(r1) 94d8: 68 b3 bit.b #2, r8 ;r3 As==10 94da: 6a 24 jz $+214 ;abs 0x95b0 94dc: 16 41 1e 00 mov 30(r1), r6 ;0x001e(r1) 94e0: 91 41 20 00 mov 32(r1), 60(r1) ;0x0020(r1), 0x003c(r1) 94e4: 3c 00 94e6: 18 41 22 00 mov 34(r1), r8 ;0x0022(r1) 94ea: 14 41 24 00 mov 36(r1), r4 ;0x0024(r1) 94ee: 07 41 mov r1, r7 94f0: 37 50 1a 00 add #26, r7 ;#0x001a 94f4: 09 46 mov r6, r9 94f6: 91 41 28 00 mov 40(r1), 50(r1) ;0x0028(r1), 0x0032(r1) 94fa: 32 00 94fc: 1b 41 28 00 mov 40(r1), r11 ;0x0028(r1) 9500: 8b 10 swpb r11 9502: 8b 11 sxt r11 9504: 8b 10 swpb r11 9506: 8b 11 sxt r11 9508: 81 4b 34 00 mov r11, 52(r1) ;0x0034(r1) 950c: 81 4b 36 00 mov r11, 54(r1) ;0x0036(r1) 9510: 81 4b 38 00 mov r11, 56(r1) ;0x0038(r1) 9514: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9518: 11 12 3a 00 push 58(r1) ;0x003a(r1) 951c: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9520: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9524: 0c 49 mov r9, r12 9526: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 952a: 0e 48 mov r8, r14 952c: 0f 44 mov r4, r15 952e: b0 12 28 98 call #0x9828 9532: 31 52 add #8, r1 ;r2 As==11 9534: 0b 4c mov r12, r11 9536: 3c 90 0a 00 cmp #10, r12 ;#0x000a 953a: 05 34 jge $+12 ;abs 0x9546 953c: 7b 50 30 00 add.b #48, r11 ;#0x0030 9540: c7 4b 00 00 mov.b r11, 0(r7) ;0x0000(r7) 9544: 0c 3c jmp $+26 ;abs 0x955e 9546: 4b 4c mov.b r12, r11 9548: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 954c: 03 24 jz $+8 ;abs 0x9554 954e: 7a 40 37 00 mov.b #55, r10 ;#0x0037 9552: 02 3c jmp $+6 ;abs 0x9558 9554: 7a 40 57 00 mov.b #87, r10 ;#0x0057 9558: 4a 5b add.b r11, r10 955a: c7 4a 00 00 mov.b r10, 0(r7) ;0x0000(r7) 955e: 06 47 mov r7, r6 9560: 36 53 add #-1, r6 ;r3 As==11 9562: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9566: 11 12 3a 00 push 58(r1) ;0x003a(r1) 956a: 11 12 3a 00 push 58(r1) ;0x003a(r1) 956e: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9572: 0c 49 mov r9, r12 9574: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 9578: 0e 48 mov r8, r14 957a: 0f 44 mov r4, r15 957c: b0 12 02 98 call #0x9802 9580: 31 52 add #8, r1 ;r2 As==11 9582: 09 4c mov r12, r9 9584: 81 4d 3c 00 mov r13, 60(r1) ;0x003c(r1) 9588: 08 4e mov r14, r8 958a: 04 4f mov r15, r4 958c: 37 53 add #-1, r7 ;r3 As==11 958e: 0c 93 tst r12 9590: b2 23 jnz $-154 ;abs 0x94f6 9592: 0d 93 tst r13 9594: b0 23 jnz $-158 ;abs 0x94f6 9596: 0e 93 tst r14 9598: ae 23 jnz $-162 ;abs 0x94f6 959a: 0f 93 tst r15 959c: ac 23 jnz $-166 ;abs 0x94f6 959e: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 95a2: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 95a6: 81 43 22 00 mov #0, 34(r1) ;r3 As==00, 0x0022(r1) 95aa: 81 43 24 00 mov #0, 36(r1) ;r3 As==00, 0x0024(r1) 95ae: 6c 3c jmp $+218 ;abs 0x9688 95b0: 58 b3 bit.b #1, r8 ;r3 As==01 95b2: 3e 24 jz $+126 ;abs 0x9630 95b4: 14 41 1e 00 mov 30(r1), r4 ;0x001e(r1) 95b8: 17 41 20 00 mov 32(r1), r7 ;0x0020(r1) 95bc: 08 41 mov r1, r8 95be: 38 50 1a 00 add #26, r8 ;#0x001a 95c2: 19 41 28 00 mov 40(r1), r9 ;0x0028(r1) 95c6: 89 10 swpb r9 95c8: 89 11 sxt r9 95ca: 89 10 swpb r9 95cc: 89 11 sxt r9 95ce: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) 95d2: 0d 49 mov r9, r13 95d4: 0e 44 mov r4, r14 95d6: 0f 47 mov r7, r15 95d8: b0 12 04 8d call #0x8d04 95dc: 0b 4e mov r14, r11 95de: 3e 90 0a 00 cmp #10, r14 ;#0x000a 95e2: 05 34 jge $+12 ;abs 0x95ee 95e4: 7b 50 30 00 add.b #48, r11 ;#0x0030 95e8: c8 4b 00 00 mov.b r11, 0(r8) ;0x0000(r8) 95ec: 0c 3c jmp $+26 ;abs 0x9606 95ee: 4b 4e mov.b r14, r11 95f0: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 95f4: 03 24 jz $+8 ;abs 0x95fc 95f6: 7a 40 37 00 mov.b #55, r10 ;#0x0037 95fa: 02 3c jmp $+6 ;abs 0x9600 95fc: 7a 40 57 00 mov.b #87, r10 ;#0x0057 9600: 4a 5b add.b r11, r10 9602: c8 4a 00 00 mov.b r10, 0(r8) ;0x0000(r8) 9606: 06 48 mov r8, r6 9608: 36 53 add #-1, r6 ;r3 As==11 960a: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) 960e: 0d 49 mov r9, r13 9610: 0e 44 mov r4, r14 9612: 0f 47 mov r7, r15 9614: b0 12 ce 8c call #0x8cce 9618: 04 4e mov r14, r4 961a: 07 4f mov r15, r7 961c: 38 53 add #-1, r8 ;r3 As==11 961e: 0e 93 tst r14 9620: d0 23 jnz $-94 ;abs 0x95c2 9622: 0f 93 tst r15 9624: ce 23 jnz $-98 ;abs 0x95c2 9626: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 962a: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 962e: 2c 3c jmp $+90 ;abs 0x9688 9630: 17 41 1e 00 mov 30(r1), r7 ;0x001e(r1) 9634: 08 41 mov r1, r8 9636: 38 50 1a 00 add #26, r8 ;#0x001a 963a: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) 963e: 0f 47 mov r7, r15 9640: b0 12 c6 8c call #0x8cc6 9644: 0d 4f mov r15, r13 9646: 3f 90 0a 00 cmp #10, r15 ;#0x000a 964a: 05 34 jge $+12 ;abs 0x9656 964c: 7d 50 30 00 add.b #48, r13 ;#0x0030 9650: c8 4d 00 00 mov.b r13, 0(r8) ;0x0000(r8) 9654: 0c 3c jmp $+26 ;abs 0x966e 9656: 4d 4f mov.b r15, r13 9658: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 965c: 03 24 jz $+8 ;abs 0x9664 965e: 7c 40 37 00 mov.b #55, r12 ;#0x0037 9662: 02 3c jmp $+6 ;abs 0x9668 9664: 7c 40 57 00 mov.b #87, r12 ;#0x0057 9668: 4c 5d add.b r13, r12 966a: c8 4c 00 00 mov.b r12, 0(r8) ;0x0000(r8) 966e: 06 48 mov r8, r6 9670: 36 53 add #-1, r6 ;r3 As==11 9672: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) 9676: 0f 47 mov r7, r15 9678: b0 12 ac 8c call #0x8cac 967c: 07 4f mov r15, r7 967e: 38 53 add #-1, r8 ;r3 As==11 9680: 0f 93 tst r15 9682: db 23 jnz $-72 ;abs 0x963a 9684: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 9688: b1 90 0a 00 cmp #10, 40(r1) ;#0x000a, 0x0028(r1) 968c: 28 00 968e: 02 24 jz $+6 ;abs 0x9694 9690: c1 43 02 00 mov.b #0, 2(r1) ;r3 As==00, 0x0002(r1) 9694: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 9698: 2a 24 jz $+86 ;abs 0x96ee 969a: 0f 41 mov r1, r15 969c: 3f 50 1c 00 add #28, r15 ;#0x001c 96a0: 81 4f 42 00 mov r15, 66(r1) ;0x0042(r1) 96a4: 1a 41 1c 00 mov 28(r1), r10 ;0x001c(r1) 96a8: 8a 10 swpb r10 96aa: 8a 11 sxt r10 96ac: 8a 10 swpb r10 96ae: 8a 11 sxt r10 96b0: 81 4a 44 00 mov r10, 68(r1) ;0x0044(r1) 96b4: 81 46 46 00 mov r6, 70(r1) ;0x0046(r1) 96b8: 0a 46 mov r6, r10 96ba: 8a 10 swpb r10 96bc: 8a 11 sxt r10 96be: 8a 10 swpb r10 96c0: 8a 11 sxt r10 96c2: 81 4a 48 00 mov r10, 72(r1) ;0x0048(r1) 96c6: 1c 41 42 00 mov 66(r1), r12 ;0x0042(r1) 96ca: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 96ce: 1c 81 46 00 sub 70(r1), r12 ;0x0046(r1) 96d2: 1d 71 48 00 subc 72(r1), r13 ;0x0048(r1) 96d6: 2c 83 decd r12 96d8: 1c 91 26 00 cmp 38(r1), r12 ;0x0026(r1) 96dc: 0e 2c jc $+30 ;abs 0x96fa 96de: e1 d3 01 00 bis.b #2, 1(r1) ;r3 As==10, 0x0001(r1) 96e2: 5e 41 26 00 mov.b 38(r1), r14 ;0x0026(r1) 96e6: 4e 8c sub.b r12, r14 96e8: c1 4e 03 00 mov.b r14, 3(r1) ;0x0003(r1) 96ec: 06 3c jmp $+14 ;abs 0x96fa 96ee: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 96f2: 03 24 jz $+8 ;abs 0x96fa 96f4: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 96f8: 30 00 96fa: 11 12 04 00 push 4(r1) ;0x0004(r1) 96fe: 11 12 04 00 push 4(r1) ;0x0004(r1) 9702: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) 9706: 0e 46 mov r6, r14 9708: 1e 53 inc r14 970a: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) 970e: b0 12 46 8f call #0x8f46 9712: 21 52 add #4, r1 ;r2 As==10 9714: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) 9718: 0d 3c jmp $+28 ;abs 0x9734 971a: 7f 49 mov.b @r9+, r15 971c: 8f 11 sxt r15 971e: 91 12 3c 00 call 60(r1) ;0x003c(r1) 9722: 0e 49 mov r9, r14 9724: 0e 58 add r8, r14 9726: 19 91 40 00 cmp 64(r1), r9 ;0x0040(r1) 972a: f7 2b jnc $-16 ;abs 0x971a 972c: 81 49 3e 00 mov r9, 62(r1) ;0x003e(r1) 9730: 81 4e 2c 00 mov r14, 44(r1) ;0x002c(r1) 9734: 07 43 clr r7 9736: 0e 3c jmp $+30 ;abs 0x9754 9738: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 973c: 30 00 973e: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 9742: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 9746: 03 3c jmp $+8 ;abs 0x974e 9748: 05 4e mov r14, r5 974a: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) 974e: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) 9752: 17 43 mov #1, r7 ;r3 As==01 9754: 16 41 40 00 mov 64(r1), r6 ;0x0040(r1) 9758: 6e 46 mov.b @r6, r14 975a: 4e 93 tst.b r14 975c: 02 24 jz $+6 ;abs 0x9762 975e: 30 40 2a 91 br #0x912a 9762: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 9766: 31 50 4a 00 add #74, r1 ;#0x004a 976a: 34 41 pop r4 976c: 35 41 pop r5 976e: 36 41 pop r6 9770: 37 41 pop r7 9772: 38 41 pop r8 9774: 39 41 pop r9 9776: 3a 41 pop r10 9778: 3b 41 pop r11 977a: 30 41 ret 0000977c : 977c: 0b 12 push r11 977e: 0d 93 tst r13 9780: 0e 24 jz $+30 ;abs 0x979e 9782: 6c 4f mov.b @r15, r12 9784: 7b 4e mov.b @r14+, r11 9786: 4c 9b cmp.b r11, r12 9788: 05 24 jz $+12 ;abs 0x9794 978a: 4f 4c mov.b r12, r15 978c: 5e 4e ff ff mov.b -1(r14),r14 ;0xffff(r14) 9790: 0f 8e sub r14, r15 9792: 06 3c jmp $+14 ;abs 0x97a0 9794: 1f 53 inc r15 9796: 4c 93 tst.b r12 9798: 02 24 jz $+6 ;abs 0x979e 979a: 3d 53 add #-1, r13 ;r3 As==11 979c: f0 3f jmp $-30 ;abs 0x977e 979e: 0f 43 clr r15 97a0: 3b 41 pop r11 97a2: 30 41 ret 000097a4 <__xabi_udivmod64>: 97a4: 07 12 push r7 97a6: 06 12 push r6 97a8: 05 12 push r5 97aa: 04 12 push r4 97ac: 30 12 40 00 push #64 ;#0x0040 97b0: 04 48 mov r8, r4 97b2: 05 49 mov r9, r5 97b4: 06 4a mov r10, r6 97b6: 07 4b mov r11, r7 97b8: 08 43 clr r8 97ba: 09 43 clr r9 97bc: 0a 43 clr r10 97be: 0b 43 clr r11 97c0: 0c 5c rla r12 97c2: 0d 6d rlc r13 97c4: 0e 6e rlc r14 97c6: 0f 6f rlc r15 97c8: 08 68 rlc r8 97ca: 09 69 rlc r9 97cc: 0a 6a rlc r10 97ce: 0b 6b rlc r11 97d0: 0b 97 cmp r7, r11 97d2: 0e 28 jnc $+30 ;abs 0x97f0 97d4: 08 20 jnz $+18 ;abs 0x97e6 97d6: 0a 96 cmp r6, r10 97d8: 0b 28 jnc $+24 ;abs 0x97f0 97da: 05 20 jnz $+12 ;abs 0x97e6 97dc: 09 95 cmp r5, r9 97de: 08 28 jnc $+18 ;abs 0x97f0 97e0: 02 20 jnz $+6 ;abs 0x97e6 97e2: 08 94 cmp r4, r8 97e4: 05 28 jnc $+12 ;abs 0x97f0 97e6: 08 84 sub r4, r8 97e8: 09 75 subc r5, r9 97ea: 0a 76 subc r6, r10 97ec: 0b 77 subc r7, r11 97ee: 1c d3 bis #1, r12 ;r3 As==01 97f0: 91 83 00 00 dec 0(r1) ;0x0000(r1) 97f4: e5 23 jnz $-52 ;abs 0x97c0 97f6: 21 53 incd r1 97f8: 34 41 pop r4 97fa: 35 41 pop r5 97fc: 36 41 pop r6 97fe: 37 41 pop r7 9800: 30 41 ret 00009802 <__udivdi3>: 9802: 0b 12 push r11 9804: 0a 12 push r10 9806: 09 12 push r9 9808: 08 12 push r8 980a: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) 980e: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) 9812: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) 9816: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) 981a: b0 12 a4 97 call #0x97a4 981e: 38 41 pop r8 9820: 39 41 pop r9 9822: 3a 41 pop r10 9824: 3b 41 pop r11 9826: 30 41 ret 00009828 <__umoddi3>: 9828: 0b 12 push r11 982a: 0a 12 push r10 982c: 09 12 push r9 982e: 08 12 push r8 9830: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) 9834: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) 9838: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) 983c: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) 9840: b0 12 a4 97 call #0x97a4 9844: 0c 48 mov r8, r12 9846: 0d 49 mov r9, r13 9848: 0e 4a mov r10, r14 984a: 0f 4b mov r11, r15 984c: 38 41 pop r8 984e: 39 41 pop r9 9850: 3a 41 pop r10 9852: 3b 41 pop r11 9854: 30 41 ret 00009856 <__udivmoddi4>: 9856: 0b 12 push r11 9858: 0a 12 push r10 985a: 09 12 push r9 985c: 08 12 push r8 985e: 07 12 push r7 9860: 18 41 0c 00 mov 12(r1), r8 ;0x000c(r1) 9864: 19 41 0e 00 mov 14(r1), r9 ;0x000e(r1) 9868: 1a 41 10 00 mov 16(r1), r10 ;0x0010(r1) 986c: 1b 41 12 00 mov 18(r1), r11 ;0x0012(r1) 9870: b0 12 a4 97 call #0x97a4 9874: 17 41 14 00 mov 20(r1), r7 ;0x0014(r1) 9878: 87 48 00 00 mov r8, 0(r7) ;0x0000(r7) 987c: 87 49 02 00 mov r9, 2(r7) ;0x0002(r7) 9880: 87 4a 04 00 mov r10, 4(r7) ;0x0004(r7) 9884: 87 4b 06 00 mov r11, 6(r7) ;0x0006(r7) 9888: 37 41 pop r7 988a: 38 41 pop r8 988c: 39 41 pop r9 988e: 3a 41 pop r10 9890: 3b 41 pop r11 9892: 30 41 ret 00009894 <_unexpected_>: 9894: 00 13 reti Disassembly of section .vectors: 0000ffe0 <__ivtbl_16>: ffe0: e4 85 e4 85 e4 85 e4 85 e4 85 e8 85 e4 85 20 86 .............. . fff0: f0 85 e4 85 e4 85 e4 85 e4 85 e4 85 e4 85 00 80 ................