solarmeter.elf: file format elf32-msp430 SYMBOL TABLE: 00008000 l d .text 00000000 .text 00000200 l d .data 00000000 .data 00000204 l d .bss 00000000 .bss 0000ffe0 l d .vectors 00000000 .vectors 00000000 l d .stab 00000000 .stab 00000000 l d .stabstr 00000000 .stabstr 00000056 l *ABS* 00000000 DCOCTL 00000057 l *ABS* 00000000 BCSCTL1 00000058 l *ABS* 00000000 BCSCTL2 00000053 l *ABS* 00000000 BCSCTL3 00000128 l *ABS* 00000000 FCTL1 0000012a l *ABS* 00000000 FCTL2 0000012c l *ABS* 00000000 FCTL3 00000054 l *ABS* 00000000 EPCTL 0000012e l *ABS* 00000000 TA0IV 00000160 l *ABS* 00000000 TA0CTL 00000170 l *ABS* 00000000 TA0R 00000162 l *ABS* 00000000 TA0CCTL0 00000164 l *ABS* 00000000 TA0CCTL1 00000172 l *ABS* 00000000 TA0CCR0 00000174 l *ABS* 00000000 TA0CCR1 00000166 l *ABS* 00000000 TA0CCTL2 00000176 l *ABS* 00000000 TA0CCR2 0000011e l *ABS* 00000000 TBIV 00000180 l *ABS* 00000000 TBCTL 00000190 l *ABS* 00000000 TBR 00000182 l *ABS* 00000000 TBCCTL0 00000184 l *ABS* 00000000 TBCCTL1 00000186 l *ABS* 00000000 TBCCTL2 00000192 l *ABS* 00000000 TBCCR0 00000194 l *ABS* 00000000 TBCCR1 00000196 l *ABS* 00000000 TBCCR2 00000020 l *ABS* 00000000 P1IN 00000021 l *ABS* 00000000 P1OUT 00000022 l *ABS* 00000000 P1DIR 00000023 l *ABS* 00000000 P1IFG 00000024 l *ABS* 00000000 P1IES 00000025 l *ABS* 00000000 P1IE 00000026 l *ABS* 00000000 P1SEL 00000027 l *ABS* 00000000 P1REN 00000028 l *ABS* 00000000 P2IN 00000029 l *ABS* 00000000 P2OUT 0000002a l *ABS* 00000000 P2DIR 0000002b l *ABS* 00000000 P2IFG 0000002c l *ABS* 00000000 P2IES 0000002d l *ABS* 00000000 P2IE 0000002e l *ABS* 00000000 P2SEL 0000002f l *ABS* 00000000 P2REN 00000018 l *ABS* 00000000 P3IN 00000019 l *ABS* 00000000 P3OUT 0000001a l *ABS* 00000000 P3DIR 0000001b l *ABS* 00000000 P3SEL 00000010 l *ABS* 00000000 P3REN 0000001c l *ABS* 00000000 P4IN 0000001d l *ABS* 00000000 P4OUT 0000001e l *ABS* 00000000 P4DIR 0000001f l *ABS* 00000000 P4SEL 00000011 l *ABS* 00000000 P4REN 00000048 l *ABS* 00000000 ADC10DTC0 00000049 l *ABS* 00000000 ADC10DTC1 0000004a l *ABS* 00000000 ADC10AE0 0000004b l *ABS* 00000000 ADC10AE1 000001b0 l *ABS* 00000000 ADC10CTL0 000001b2 l *ABS* 00000000 ADC10CTL1 000001b4 l *ABS* 00000000 ADC10MEM 000001bc l *ABS* 00000000 ADC10SA 000000c0 l *ABS* 00000000 OA0CTL0 000000c1 l *ABS* 00000000 OA0CTL1 000000c2 l *ABS* 00000000 OA1CTL0 000000c3 l *ABS* 00000000 OA1CTL1 00000060 l *ABS* 00000000 UCA0CTL0 00000061 l *ABS* 00000000 UCA0CTL1 00000062 l *ABS* 00000000 UCA0BR0 00000063 l *ABS* 00000000 UCA0BR1 00000064 l *ABS* 00000000 UCA0MCTL 00000065 l *ABS* 00000000 UCA0STAT 00000066 l *ABS* 00000000 UCA0RXBUF 00000067 l *ABS* 00000000 UCA0TXBUF 0000005d l *ABS* 00000000 UCA0ABCTL 0000005e l *ABS* 00000000 UCA0IRTCTL 0000005f l *ABS* 00000000 UCA0IRRCTL 00000068 l *ABS* 00000000 UCB0CTL0 00000069 l *ABS* 00000000 UCB0CTL1 0000006a l *ABS* 00000000 UCB0BR0 0000006b l *ABS* 00000000 UCB0BR1 0000006c l *ABS* 00000000 UCB0I2CIE 0000006d l *ABS* 00000000 UCB0STAT 0000006e l *ABS* 00000000 UCB0RXBUF 0000006f l *ABS* 00000000 UCB0TXBUF 00000118 l *ABS* 00000000 UCB0I2COA 0000011a l *ABS* 00000000 UCB0I2CSA 00000120 l *ABS* 00000000 WDTCTL 00000000 l *ABS* 00000000 IE1 00000002 l *ABS* 00000000 IFG1 00000001 l *ABS* 00000000 IE2 00000003 l *ABS* 00000000 IFG2 000010f8 l *ABS* 00000000 CALDCO_16MHZ 000010f9 l *ABS* 00000000 CALBC1_16MHZ 000010fa l *ABS* 00000000 CALDCO_12MHZ 000010fb l *ABS* 00000000 CALBC1_12MHZ 000010fc l *ABS* 00000000 CALDCO_8MHZ 000010fd l *ABS* 00000000 CALBC1_8MHZ 000010fe l *ABS* 00000000 CALDCO_1MHZ 000010ff l *ABS* 00000000 CALBC1_1MHZ 00000000 l df *ABS* 00000000 main.c 00000200 l O .data 00000001 make_gdb_happy 00008976 l .text 00000000 Letext 00000000 l df *ABS* 00000000 spi_hardware.c 00008abc l .text 00000000 Letext 00000000 l df *ABS* 00000000 atoi.c 00008b90 l .text 00000000 Letext 00000000 l df *ABS* 00000000 sprintf.c 00008ba6 l .text 00000000 Letext 00000000 l df *ABS* 00000000 snprintf.c 00008bd0 l .text 00000000 Letext 00000000 l df *ABS* 00000000 vsprintf.c 00008bd0 l F .text 00000010 mem_putchar 00000204 l .bss 00000000 mem 00008bfa l .text 00000000 Letext 00000000 l df *ABS* 00000000 vsnprintf.c 00008bfa l F .text 00000020 mem_putchar_limited 00000208 l .bss 00000000 max_s_size 00000206 l .bss 00000000 mem 00008c42 l .text 00000000 Letext 00000000 l df *ABS* 00000000 vuprintf.c 00000202 l O .data 00000002 total_len 00008c42 l F .text 00000030 PRINT 0000020a l .bss 00000000 __write_char 00008c72 l F .text 00000034 __write_pad 0000925c l .text 00000000 Letext 00000000 l df *ABS* 00000000 strchr.c 00009276 l .text 00000000 Letext 00000000 l df *ABS* 00000000 memchr.c 0000929a l .text 00000000 Letext 00000000 l df *ABS* 00000000 memcmp.c 000092ca l .text 00000000 Letext 00000000 l df *ABS* 00000000 strstr.c 00009318 l .text 00000000 Letext 00000000 l df *ABS* 00000000 strncmp.c 00009348 l .text 00000000 Letext 00000004 g *ABS* 00000000 __data_size 000089ac g F .text 0000005c CCXX_SPI_RDREG 0000935e g .text 00000000 __umulhisi3 00008be0 g F .text 0000001a vsprintf 000081d8 g F .text 0000001e init_UART_SPI 00008ba6 g F .text 0000002a snprintf 000093ae g .text 00000000 _etext 00008184 g F .text 00000012 sample_adc 00000014 g *ABS* 00000000 __bss_size 000093ac w .text 00000000 __stop_progExec__ 00008030 g .text 00000000 _unexpected_1_ 00008030 w .text 00000000 vector_ffe0 00008116 g F .text 0000005a sys_init 0000809c g F .text 0000004c tinit 00008c1a g F .text 00000028 vsnprintf 00008036 g F .text 00000020 P2_VEC 00008976 g F .text 00000036 CCXX_SPI_STROBE 00008030 w .text 00000000 vector_ffec 00008056 g .text 00000000 vector_fff0 000093ae g *ABS* 00000000 __data_load_start 00008030 g .text 00000000 __dtors_end 00008030 w .text 00000000 vector_fffc 00008a08 g F .text 00000048 CCXX_SPI_WRREG 00008690 g F .text 0000019e CCXX_WRITE_SPI_RF_SETTINGS 00009348 g .text 00000000 __mulhi3 00008030 w .text 00000000 vector_ffe4 00008a50 g F .text 0000006c CCXX_SPI_BURST_WRREG 0000020c g O .bss 00000001 RSSI_DBM 0000ffe0 g O .vectors 00000020 InterruptVectors 0000020d g O .bss 00000001 RSSI 00009276 g F .text 00000024 memchr 0000801c w .text 00000000 __do_clear_bss 000092ca g F .text 0000004e strstr 00008056 g F .text 00000024 TA1_VEC 000081b8 g F .text 00000020 init_UART_232 00009318 g F .text 00000030 strncmp 0000938c g .text 00000000 __mulsi3 00008030 w .text 00000000 vector_ffe2 00008030 w .text 00000000 vector_ffe8 00008034 w .text 00000000 _unexpected_ 00008030 w .text 00000000 vector_fffa 00008ca6 g F .text 000005b6 vuprintf 0000929a g F .text 00000030 memcmp 00008170 g F .text 00000014 init_adc 00008000 w .text 00000000 _reset_vector__ 00008030 g .text 00000000 __ctors_start 0000800a w .text 00000000 __do_copy_data 00008090 g F .text 0000000c ADC_VEC 00000204 g .bss 00000000 __bss_start 0000807a g .text 00000000 vector_ffee 00008030 w .text 00000000 vector_fff4 000082da g F .text 000003b6 main 00008030 w .text 00000000 vector_fff8 00008030 w .text 00000000 vector_fff2 0000020e g O .bss 00000004 seconds 00010000 g .vectors 00000000 _vectors_end 00008036 g .text 00000000 vector_ffe6 000080e8 g F .text 0000002e delay 0000892c g F .text 0000004a TX_STRING 00008b90 g F .text 00000016 sprintf 00000212 g O .bss 00000001 LQI 0000807a g F .text 00000016 RX_VEC 00008858 g F .text 000000d4 RX_STRING 00008000 w .text 00000000 __init_stack 00000213 g O .bss 00000001 PKTSTATUS 00008030 g .text 00000000 __dtors_start 00008030 g .text 00000000 __ctors_end 00000600 g *ABS* 00000000 __stack 00000204 g .data 00000000 _edata 00000218 g .bss 00000000 _end 00000214 g O .bss 00000002 flags 00009362 g .text 00000000 __udivmodsi4 00008abc g F .text 000000d4 atoi 00008030 w .text 00000000 vector_fff6 0000882e g F .text 0000002a RX_MODE 00008004 w .text 00000000 __low_level_init 0000802c w .text 00000000 __jump_to_main 0000925c g F .text 0000001a strchr 00000200 g .data 00000000 __data_start 00008090 g .text 00000000 vector_ffea 00000216 g O .bss 00000001 status 00000217 g O .bss 00000001 rx_char 00008196 g F .text 00000022 TX232String Disassembly of section .text: 00008000 <__init_stack>: 8000: 31 40 00 06 mov #1536, r1 ;#0x0600 00008004 <__low_level_init>: 8004: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 8008: 20 01 0000800a <__do_copy_data>: 800a: 3f 40 04 00 mov #4, r15 ;#0x0004 800e: 0f 93 tst r15 8010: 05 24 jz $+12 ;abs 0x801c 8012: 2f 83 decd r15 8014: 9f 4f ae 93 mov -27730(r15),512(r15);0x93ae(r15), 0x0200(r15) 8018: 00 02 801a: fb 23 jnz $-8 ;abs 0x8012 0000801c <__do_clear_bss>: 801c: 3f 40 14 00 mov #20, r15 ;#0x0014 8020: 0f 93 tst r15 8022: 04 24 jz $+10 ;abs 0x802c 8024: 1f 83 dec r15 8026: cf 43 04 02 mov.b #0, 516(r15);r3 As==00, 0x0204(r15) 802a: fc 23 jnz $-6 ;abs 0x8024 0000802c <__jump_to_main>: 802c: 30 40 da 82 br #0x82da 00008030 <__ctors_end>: 8030: 30 40 34 80 br #0x8034 00008034 <_unexpected_>: 8034: 00 13 reti 00008036 : This interrupt is caused by the GD0 line from the CC2500 */ // Port 2 interripts : the CC2500 is talking to us interrupt (PORT2_VECTOR) P2_VEC(void) { 8036: 0f 12 push r15 dint(); //no nesting! 8038: 32 c2 dint if((P2IFG & GDO0) == GDO0) 803a: f2 b0 40 00 bit.b #64, &0x002b ;#0x0040 803e: 2b 00 8040: 05 24 jz $+12 ;abs 0x804c { flags |= CONTROLLER_RDY; 8042: a2 d3 14 02 bis #2, &0x0214 ;r3 As==10 LPM3_EXIT; 8046: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 804a: 02 00 //We need to grab that byte! } P2IFG=0x00; 804c: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 eint(); 8050: 32 d2 eint } 8052: 3f 41 pop r15 8054: 00 13 reti 00008056 : /** This is called once every overflow */ interrupt (TIMERA1_VECTOR) TA1_VEC(void) { dint(); //no nesting! 8056: 32 c2 dint if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 8058: b2 90 0a 00 cmp #10, &0x012e ;#0x000a 805c: 2e 01 805e: 0b 20 jnz $+24 ;abs 0x8076 { flags |= TIMER_UP; 8060: 92 d3 14 02 bis #1, &0x0214 ;r3 As==01 seconds++; 8064: 92 53 0e 02 inc &0x020e 8068: 82 63 10 02 adc &0x0210 TACTL &= ~TAIFG; //clear the flag 806c: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 LPM3_EXIT; 8070: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 8074: 00 00 } eint(); 8076: 32 d2 eint } 8078: 00 13 reti 0000807a : /** This is called once for every RS232 character that comes in */ interrupt (USCIAB0RX_VECTOR) RX_VEC(void) { dint(); //no nesting! 807a: 32 c2 dint //P1OUT^=LED_GRN; rx_char = UCA0RXBUF; 807c: d2 42 66 00 mov.b &0x0066,&0x0217 8080: 17 02 flags |= RXCHAR_RDY; 8082: b2 d2 14 02 bis #8, &0x0214 ;r2 As==11 LPM3_EXIT; 8086: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 808a: 00 00 eint(); 808c: 32 d2 eint } 808e: 00 13 reti 00008090 : */ // Port 2 interripts : the allspice controller is talking to us interrupt (ADC10_VECTOR) ADC_VEC(void) { dint(); //no nesting! 8090: 32 c2 dint LPM3_EXIT; 8092: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 8096: 00 00 eint(); 8098: 32 d2 eint } 809a: 00 13 reti 0000809c : /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { 809c: 0b 12 push r11 809e: 0a 12 push r10 80a0: 09 12 push r9 80a2: 08 12 push r8 TACCTL0 = CCIE; // TACCR0 interrupt enabled 80a4: b2 40 10 00 mov #16, &0x0162 ;#0x0010 80a8: 62 01 TACTL = TASSEL_1; // ACLK, upmode 80aa: b2 40 00 01 mov #256, &0x0160 ;#0x0100 80ae: 60 01 TACTL &= ~TAIFG; //clear interrupt 80b0: 92 c3 60 01 bic #1, &0x0160 ;r3 As==01 TACCR0 = (milliseconds * (unsigned long)11260)/1000; //one second intervals 80b4: 0a 4f mov r15, r10 80b6: 3c 40 fc 2b mov #11260, r12 ;#0x2bfc 80ba: 0b 43 clr r11 80bc: 0d 43 clr r13 80be: b0 12 5e 93 call #0x935e 80c2: 0c 4e mov r14, r12 80c4: 0d 4f mov r15, r13 80c6: 3a 40 e8 03 mov #1000, r10 ;#0x03e8 80ca: 0b 43 clr r11 80cc: b0 12 62 93 call #0x9362 80d0: 82 4c 72 01 mov r12, &0x0172 //TACCR0 = 10; // ~1 second TAR = 0; 80d4: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 80d8: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 80dc: 60 01 } 80de: 38 41 pop r8 80e0: 39 41 pop r9 80e2: 3a 41 pop r10 80e4: 3b 41 pop r11 80e6: 30 41 ret 000080e8 : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 8116: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 811a: 20 01 P1OUT = P1OUT_INIT; //Init output data of port1 811c: c2 43 21 00 mov.b #0, &0x0021 ;r3 As==00 P2OUT = P2OUT_INIT; //Init output data of port2 8120: c2 43 29 00 mov.b #0, &0x0029 ;r3 As==00 P3OUT = P3OUT_INIT; 8124: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 P1SEL = P1SEL_INIT; //Select port or module -function on port1 8128: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 P2SEL = P2SEL_INIT; //Select port or module -function on port2 812c: f2 40 03 00 mov.b #3, &0x002e ;#0x0003 8130: 2e 00 P3SEL = P3SEL_INIT; 8132: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 8136: 1b 00 P1DIR = P1DIR_INIT; //Init port direction register of port1 8138: f2 43 22 00 mov.b #-1, &0x0022 ;r3 As==11 P2DIR = P2DIR_INIT; //Init port direction register of port2 813c: f2 40 3c 00 mov.b #60, &0x002a ;#0x003c 8140: 2a 00 P3DIR = P3DIR_INIT; 8142: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 8146: 1a 00 P1IES = P1IES_INIT; //init port interrupts 8148: c2 43 24 00 mov.b #0, &0x0024 ;r3 As==00 P2IES = P2IES_INIT; 814c: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 8150: 2c 00 P1IE = P1IE_INIT; 8152: c2 43 25 00 mov.b #0, &0x0025 ;r3 As==00 P2IE = P2IE_INIT; 8156: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 815a: 2d 00 BCSCTL1 = CALBC1_8MHZ; // Set DCO 815c: d2 42 fd 10 mov.b &0x10fd,&0x0057 8160: 57 00 DCOCTL = CALDCO_8MHZ; 8162: d2 42 fc 10 mov.b &0x10fc,&0x0056 8166: 56 00 BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 8168: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 816c: 53 00 } 816e: 30 41 ret 00008170 : /**init the ADC10 */ void init_adc() { ADC10AE = bit0|bit1; 8170: f2 40 03 00 mov.b #3, &0x004a ;#0x0003 8174: 4a 00 ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 8176: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 817a: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 817c: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8180: b2 01 } 8182: 30 41 ret 00008184 : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 8184: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8188: b0 01 while(ADC10CTL1 & ADC10BUSY); 818a: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 818e: fd 23 jnz $-4 ;abs 0x818a return ADC10MEM; 8190: 1f 42 b4 01 mov &0x01b4,r15 } 8194: 30 41 ret 00008196 : void TX232String( char* string, int length ) { 8196: 21 83 decd r1 8198: 0c 4f mov r15, r12 int pointer; for( pointer = 0; pointer < length; pointer++) 819a: 0d 43 clr r13 819c: 0d 9e cmp r14, r13 819e: 0a 34 jge $+22 ;abs 0x81b4 { volatile int i; UCA0TXBUF = string[pointer]; 81a0: 0f 4c mov r12, r15 81a2: 0f 5d add r13, r15 81a4: e2 4f 67 00 mov.b @r15, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 81a8: e2 b3 03 00 bit.b #2, &0x0003 ;r3 As==10 81ac: fd 27 jz $-4 ;abs 0x81a8 } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 81ae: 1d 53 inc r13 81b0: 0d 9e cmp r14, r13 81b2: f6 3b jl $-18 ;abs 0x81a0 { volatile int i; UCA0TXBUF = string[pointer]; while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? } } 81b4: 21 53 incd r1 81b6: 30 41 ret 000081b8 : void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 81b8: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 81bc: 61 00 //UCA0BR0 = 0x82; UCA0BR1 = 0x6; // 9600 from 16Mhz UCA0BR0 = 0x41; UCA0BR1 = 0x3; // 9600 from 8Mhz 81be: f2 40 41 00 mov.b #65, &0x0062 ;#0x0041 81c2: 62 00 81c4: f2 40 03 00 mov.b #3, &0x0063 ;#0x0003 81c8: 63 00 //UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 //UCA0BR0=0xA0; UCA0BR1=0x01; //19200 from 8 //UCA0BR0=0x71; UCA0BR1=0x02; //19200 from 12MHz UCA0MCTL = UCBRS_2; 81ca: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 81ce: d2 c3 61 00 bic.b #1, &0x0061 ;r3 As==01 IE2 |= UCA0RXIE; 81d2: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 } 81d6: 30 41 ret 000081d8 : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 81d8: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 81dc: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 81e0: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 81e2: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 81e6: 68 00 UCB0BR0 = 2; //12MHz / 2 = 6MHz clock 81e8: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 81ec: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 81f0: d2 c3 69 00 bic.b #1, &0x0069 ;r3 As==01 } 81f4: 30 41 ret 81f6: 54 69 6d 65 addc.b 25965(r9),r4 ;0x656d(r9) 81fa: 09 54 add r4, r9 81fc: 65 6d addc.b @r13, r5 81fe: 70 09 .word 0x0970; ???? 8200: 76 53 add.b #-1, r6 ;r3 As==11 8202: 75 70 70 6c subc.b #27760, r5 ;#0x6c70 8206: 79 09 .word 0x0979; ???? 8208: 56 73 subc.b #1, r6 ;r3 As==01 820a: 75 6e addc.b @r14+, r5 820c: 09 69 rlc r9 820e: 53 75 .word 0x7553; ???? Illegal as 2-op instr 8210: 6e 00 .word 0x006e; ???? 8212: 0d 0a .word 0x0a0d; ???? 8214: 00 25 jz $+514 ;abs 0x8416 8216: 73 20 jnz $+232 ;abs 0x82fe 8218: 1b 5b 33 32 add 12851(r11),r11 ;0x3233(r11) 821c: 6d 3a jl $-804 ;abs 0x7ef8 821e: 25 64 addc @r4, r5 8220: 64 42 mov.b #4, r4 ;r2 As==10 8222: 6d 1b .word 0x1b6d; ???? 8224: 5b 33 jn $-328 ;abs 0x80dc 8226: 30 6d addc @r13+, r0 8228: 00 53 add #0, r0 ;r3 As==00 822a: 4f 4c mov.b r12, r15 822c: 00 69 addc r9, r0 822e: 6e 74 subc.b @r4, r14 8230: 65 72 subc.b #4, r5 ;r2 As==10 8232: 76 61 addc.b @r1+, r6 8234: 6c 00 .word 0x006c; ???? 8236: 1b 5b 33 32 add 12851(r11),r11 ;0x3233(r11) 823a: 6d 47 mov.b @r7, r13 823c: 4e 44 mov.b r4, r14 823e: 3a 4d mov @r13+, r10 8240: 4f 4e mov.b r14, r15 8242: 20 49 br @r9 8244: 6e 74 subc.b @r4, r14 8246: 65 72 subc.b #4, r5 ;r2 As==10 8248: 76 61 addc.b @r1+, r6 824a: 6c 20 jnz $+218 ;abs 0x8324 824c: 69 73 subc.b #2, r9 ;r3 As==10 824e: 20 6e addc @r14, r0 8250: 6f 77 subc.b @r7, r15 8252: 20 25 jz $+578 ;abs 0x8494 8254: 64 1b .word 0x1b64; ???? 8256: 5b 33 jn $-328 ;abs 0x810e 8258: 30 6d addc @r13+, r0 825a: 00 25 jz $+514 ;abs 0x845c 825c: 6c 75 subc.b @r5, r12 825e: 09 25 jz $+532 ;abs 0x8472 8260: 75 09 .word 0x0975; ???? 8262: 25 64 addc @r4, r5 8264: 09 25 jz $+532 ;abs 0x8478 8266: 75 09 .word 0x0975; ???? 8268: 25 75 subc @r5, r5 826a: 00 1b .word 0x1b00; ???? 826c: 5b 33 jn $-328 ;abs 0x8124 826e: 32 6d addc @r13+, r2 8270: 47 4e mov.b r14, r7 8272: 44 3a jl $-886 ;abs 0x7efc 8274: 4d 4f mov.b r15, r13 8276: 4e 20 jnz $+158 ;abs 0x8314 8278: 52 65 70 6f addc.b 28528(r5),r2 ;0x6f70(r5) 827c: 72 74 subc.b @r4+, r2 827e: 69 6e addc.b @r14, r9 8280: 67 20 jnz $+208 ;abs 0x8350 8282: 65 76 subc.b @r6, r5 8284: 65 72 subc.b #4, r5 ;r2 As==10 8286: 79 20 jnz $+244 ;abs 0x837a 8288: 25 64 addc @r4, r5 828a: 20 73 subc #2, r0 ;r3 As==10 828c: 65 63 addc.b #2, r5 ;r3 As==10 828e: 6f 6e addc.b @r14, r15 8290: 64 73 subc.b #2, r4 ;r3 As==10 8292: 1b 5b 33 30 add 12339(r11),r11 ;0x3033(r11) 8296: 6d 00 .word 0x006d; ???? 8298: 73 74 .word 0x7473; ???? Illegal as 2-op instr 829a: 61 74 subc.b @r4, r1 829c: 75 73 subc.b #-1, r5 ;r3 As==11 829e: 00 47 br r7 82a0: 4e 44 mov.b r4, r14 82a2: 3a 25 jz $+630 ;abs 0x8518 82a4: 73 20 jnz $+232 ;abs 0x838c 82a6: 52 53 inc.b r2 82a8: 53 49 .word 0x4953; ???? Illegal as 2-op instr 82aa: 3a 25 jz $+630 ;abs 0x8520 82ac: 64 64 addc.b @r4, r4 82ae: 42 6d addc.b r13, r2 82b0: 20 4c br @r12 82b2: 51 49 3a 25 mov.b 9530(r9),r1 ;0x253a(r9) 82b6: 64 00 .word 0x0064; ???? 82b8: 6e 6f addc.b @r15, r14 82ba: 77 00 .word 0x0077; ???? 82bc: 1b 5b 33 34 add 13363(r11),r11 ;0x3433(r11) 82c0: 6d 47 mov.b @r7, r13 82c2: 4e 44 mov.b r4, r14 82c4: 3a 4d mov @r13+, r10 82c6: 4f 4e mov.b r14, r15 82c8: 20 50 add @r0, r0 82ca: 6f 6e addc.b @r14, r15 82cc: 67 21 jnz $+720 ;abs 0x859c 82ce: 1b 5b 33 30 add 12339(r11),r11 ;0x3033(r11) 82d2: 6d 00 .word 0x006d; ???? 82d4: 50 6f 6e 67 addc.b 26478(r15),r0 ;0x676e(r15) 82d8: 21 00 .word 0x0021; ???? 000082da
: /** Main function. */ int main(void) { 82da: 31 40 ee 04 mov #1262, r1 ;#0x04ee 82de: 04 41 mov r1, r4 unsigned int interchiplength=0,sample,length=0,i,rs232buflength=0; 82e0: 05 43 clr r5 char interchip[80],rs232buf[64],rxbuf[128], *result; //receive buffer int loop=0,interval=1; //programmable variables 82e2: 94 43 10 01 mov #1, 272(r4) ;r3 As==01, 0x0110(r4) int degC, vSupply, vSun, iSun; int traw,vraw; sys_init(); //initialize system parameters 82e6: b0 12 16 81 call #0x8116 init_UART_232(); 82ea: b0 12 b8 81 call #0x81b8 init_UART_SPI(); //get the UART into SPI mode such that we can talk to the radio 82ee: b0 12 d8 81 call #0x81d8 init_adc(); //turn on the ADC 82f2: b0 12 70 81 call #0x8170 P1OUT ^= LED_GRN; 82f6: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 delay(0xFFFF); //lil bit O delay 82fa: 3f 43 mov #-1, r15 ;r3 As==11 82fc: b0 12 e8 80 call #0x80e8 P1OUT ^= LED_GRN; 8300: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 memset(rxbuf, 0, 64); //clear the buffer 8304: 3e 40 40 00 mov #64, r14 ;#0x0040 8308: 06 44 mov r4, r6 830a: 36 50 90 00 add #144, r6 ;#0x0090 830e: 0f 46 mov r6, r15 8310: cf 43 00 00 mov.b #0, 0(r15) ;r3 As==00, 0x0000(r15) 8314: 1f 53 inc r15 8316: 1e 83 dec r14 8318: fb 23 jnz $-8 ;abs 0x8310 P3OUT &= ~CSn; //power on reset for radio, strobe CSn 831a: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 delay(0xFF); 831e: 3f 40 ff 00 mov #255, r15 ;#0x00ff 8322: b0 12 e8 80 call #0x80e8 P3OUT |= CSn; 8326: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 delay(0xFFFF); 832a: 3f 43 mov #-1, r15 ;r3 As==11 832c: b0 12 e8 80 call #0x80e8 CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 8330: 7f 40 30 00 mov.b #48, r15 ;#0x0030 8334: b0 12 76 89 call #0x8976 CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 8338: b0 12 90 86 call #0x8690 CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 833c: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8340: b0 12 76 89 call #0x8976 do{ i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 8344: 7f 40 35 00 mov.b #53, r15 ;#0x0035 8348: b0 12 ac 89 call #0x89ac 834c: 8f 11 sxt r15 }while(i != 1); //this loop won't finish if theres a problem with the chip 834e: 1f 93 cmp #1, r15 ;r3 As==01 8350: f9 23 jnz $-12 ;abs 0x8344 //P1SEL |= bit4; P1OUT ^= LED_RED; 8352: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 delay(0xFF); //lil bit O delay 8356: 3f 40 ff 00 mov #255, r15 ;#0x00ff 835a: b0 12 e8 80 call #0x80e8 P1OUT ^= LED_RED; 835e: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 flags = 0; 8362: 82 43 14 02 mov #0, &0x0214 ;r3 As==00 P2IFG = 0x00; 8366: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 tinit(1000); //start generating interrupts every second! 836a: 3f 40 e8 03 mov #1000, r15 ;#0x03e8 836e: b0 12 9c 80 call #0x809c seconds = 0; 8372: 82 43 0e 02 mov #0, &0x020e ;r3 As==00 8376: 82 43 10 02 mov #0, &0x0210 ;r3 As==00 eint(); //enable interrupts 837a: 32 d2 eint CCXX_SPI_STROBE(CCxxx0_SIDLE); //IDLE CC1101 837c: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8380: b0 12 76 89 call #0x8976 CCXX_SPI_STROBE(CCxxx0_SPWD); //shut down CC1101 8384: 7f 40 39 00 mov.b #57, r15 ;#0x0039 8388: b0 12 76 89 call #0x8976 //RX_MODE(); //put radio into listen mode. while(seconds < 4); 838c: 1e 42 0e 02 mov &0x020e,r14 8390: 1f 42 10 02 mov &0x0210,r15 8394: 2e 82 sub #4, r14 ;r2 As==10 8396: 0f 73 sbc r15 8398: f9 2b jnc $-12 ;abs 0x838c length=snprintf(rxbuf, 128, "Time\tTemp\tvSupply\tVsun\tiSun"); //send the temperature to the ground 839a: 30 12 f6 81 push #-32266 ;#0x81f6 839e: 30 12 80 00 push #128 ;#0x0080 83a2: 06 12 push r6 83a4: b0 12 a6 8b call #0x8ba6 83a8: 0e 4f mov r15, r14 TX232String(rxbuf,length); 83aa: 0f 46 mov r6, r15 83ac: b0 12 96 81 call #0x8196 TX232String("\r\n",2); 83b0: 2e 43 mov #2, r14 ;r3 As==10 83b2: 3f 40 12 82 mov #-32238,r15 ;#0x8212 83b6: b0 12 96 81 call #0x8196 while (1) //main loop, never ends... 83ba: 31 50 06 00 add #6, r1 ;#0x0006 { loop = 0; 83be: 07 43 clr r7 if(flags & RXCHAR_RDY) 83c0: b2 b2 14 02 bit #8, &0x0214 ;r2 As==11 83c4: 1a 24 jz $+54 ;abs 0x83fa { dint(); 83c6: 32 c2 dint loop = 1; 83c8: 17 43 mov #1, r7 ;r3 As==01 flags &= ~RXCHAR_RDY; 83ca: b2 c2 14 02 bic #8, &0x0214 ;r2 As==11 if(rx_char == '\r' || rx_char == '\n'); //don't count a return in the buffer! 83ce: 5e 42 17 02 mov.b &0x0217,r14 83d2: 7e 90 0d 00 cmp.b #13, r14 ;#0x000d 83d6: 08 24 jz $+18 ;abs 0x83e8 83d8: 7e 90 0a 00 cmp.b #10, r14 ;#0x000a 83dc: 05 24 jz $+12 ;abs 0x83e8 else //Normal characters are nice { rs232buf[rs232buflength]=rx_char; 83de: 0f 45 mov r5, r15 83e0: 0f 54 add r4, r15 83e2: cf 4e 50 00 mov.b r14, 80(r15) ;0x0050(r15) rs232buflength++; 83e6: 15 53 inc r5 } if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) 83e8: 35 90 3d 00 cmp #61, r5 ;#0x003d 83ec: 44 2d jc $+650 ;abs 0x8676 83ee: 7e 90 0d 00 cmp.b #13, r14 ;#0x000d 83f2: 3f 25 jz $+640 ;abs 0x8672 P1OUT &= ~LED_RED; } //////////////////////////// P1OUT &= ~LED_RED; 83f4: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 eint(); 83f8: 32 d2 eint } if(flags & CONTROLLER_RDY) //Someone is sending us something 83fa: a2 b3 14 02 bit #2, &0x0214 ;r3 As==10 83fe: 52 24 jz $+166 ;abs 0x84a4 { dint(); 8400: 32 c2 dint loop = 1; 8402: 17 43 mov #1, r7 ;r3 As==01 P1OUT |= LED_RED; 8404: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 flags &= ~CONTROLLER_RDY; 8408: a2 c3 14 02 bic #2, &0x0214 ;r3 As==10 memset(rxbuf, 0, 64); 840c: 3f 40 40 00 mov #64, r15 ;#0x0040 8410: 0e 46 mov r6, r14 8412: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) 8416: 1e 53 inc r14 8418: 1f 83 dec r15 841a: fb 23 jnz $-8 ;abs 0x8412 841c: 06 44 mov r4, r6 841e: 36 50 90 00 add #144, r6 ;#0x0090 length = RX_STRING(rxbuf, 64); 8422: 7e 40 40 00 mov.b #64, r14 ;#0x0040 8426: 0f 46 mov r6, r15 8428: b0 12 58 88 call #0x8858 if(LQI & bit7) //CRC ok 842c: c2 93 12 02 tst.b &0x0212 8430: 31 34 jge $+100 ;abs 0x8494 { P1OUT |= LED_GRN; 8432: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 interchiplength = sprintf(interchip,"%s \e[32m:%ddBm\e[30m",rxbuf, RSSI_DBM); 8436: 5f 42 0c 02 mov.b &0x020c,r15 843a: 8f 11 sxt r15 843c: 0f 12 push r15 843e: 06 12 push r6 8440: 30 12 15 82 push #-32235 ;#0x8215 8444: 04 12 push r4 8446: b0 12 90 8b call #0x8b90 //TX232String(interchip,interchiplength); //TX232String("\r\n",2); if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 844a: 3d 40 03 00 mov #3, r13 ;#0x0003 844e: 0e 46 mov r6, r14 8450: 3f 40 29 82 mov #-32215,r15 ;#0x8229 8454: b0 12 9a 92 call #0x929a 8458: 31 52 add #8, r1 ;r2 As==11 845a: 0f 93 tst r15 845c: fa 20 jnz $+502 ;abs 0x8652 { if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 845e: 3e 40 2d 82 mov #-32211,r14 ;#0x822d 8462: 0f 46 mov r6, r15 8464: b0 12 ca 92 call #0x92ca 8468: 0f 93 tst r15 846a: c9 24 jz $+404 ;abs 0x85fe { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 846c: 3e 40 3d 00 mov #61, r14 ;#0x003d 8470: 0f 46 mov r6, r15 8472: b0 12 5c 92 call #0x925c 8476: 1f 53 inc r15 8478: b0 12 bc 8a call #0x8abc if(length > 0) 847c: 0f 93 tst r15 847e: ba 24 jz $+374 ;abs 0x85f4 { interval = length; 8480: 84 4f 10 01 mov r15, 272(r4) ;0x0110(r4) length = sprintf(rxbuf,"\e[32mGND:MON Interval is now %d\e[30m",interval); 8484: 0f 12 push r15 8486: 30 12 36 82 push #-32202 ;#0x8236 848a: 06 12 push r6 848c: b0 12 90 8b call #0x8b90 8490: 31 50 06 00 add #6, r1 ;#0x0006 } } } P2IFG &= ~GDO0; //reset trashed interrupt state 8494: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8498: 2b 00 //RX_MODE(); //set the radio back to RX mode so we don't miss any packets //turn off LEDs P1OUT &= ~LED_RED; 849a: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 P1OUT &= ~LED_GRN; 849e: e2 c3 21 00 bic.b #2, &0x0021 ;r3 As==10 eint(); 84a2: 32 d2 eint } if(flags & TIMER_UP) //Did the timer expire? report your findings! 84a4: 92 b3 14 02 bit #1, &0x0214 ;r3 As==01 84a8: 9d 24 jz $+316 ;abs 0x85e4 { loop = 1; 84aa: 17 43 mov #1, r7 ;r3 As==01 if(((seconds) % interval) == 0 || (flags & GO_NOW)) //report every 60 second by default 84ac: 1e 44 10 01 mov 272(r4),r14 ;0x0110(r4) 84b0: 0f 4e mov r14, r15 84b2: 0f 5f rla r15 84b4: 0f 7f subc r15, r15 84b6: 3f e3 inv r15 84b8: 1c 42 0e 02 mov &0x020e,r12 84bc: 1d 42 10 02 mov &0x0210,r13 84c0: 0a 4e mov r14, r10 84c2: 0b 4f mov r15, r11 84c4: b0 12 62 93 call #0x9362 84c8: 0f de bis r14, r15 84ca: 0f 93 tst r15 84cc: 03 24 jz $+8 ;abs 0x84d4 84ce: a2 b2 14 02 bit #4, &0x0214 ;r2 As==10 84d2: 88 24 jz $+274 ;abs 0x85e4 //if(flags & GO_NOW) //report every 60 second by default { flags &= ~(TIMER_UP|GO_NOW); //clear the flag 84d4: b2 f0 fa ff and #-6, &0x0214 ;#0xfffa 84d8: 14 02 P1OUT |= LED_RED; 84da: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 ADC10CTL1 = INCH_10 + ADC10DIV_4; // Temp Sensor ADC10CLK/5 84de: b2 40 80 a0 mov #-24448,&0x01b2 ;#0xa080 84e2: b2 01 ADC10CTL0 = SREF_1 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE + ADC10SR; 84e4: b2 40 38 3c mov #15416, &0x01b0 ;#0x3c38 84e8: b0 01 for( degC = 240; degC > 0; degC-- ); // delay to allow reference to settle 84ea: 3f 40 f0 00 mov #240, r15 ;#0x00f0 84ee: 3f 50 e2 ff add #-30, r15 ;#0xffe2 84f2: 1f 93 cmp #1, r15 ;r3 As==01 84f4: fc 37 jge $-6 ;abs 0x84ee ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 84f6: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 84fa: b0 01 LPM3; 84fc: 32 d0 d0 00 bis #208, r2 ;#0x00d0 traw = ADC10MEM; 8500: 19 42 b4 01 mov &0x01b4,r9 ADC10CTL0 &= ~ENC; 8504: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 ADC10CTL1 = INCH_11 + ADC10DIV_4; // AVcc/2 8508: b2 40 80 b0 mov #-20352,&0x01b2 ;#0xb080 850c: b2 01 ADC10CTL0 = SREF_1 + ADC10SHT_2 + REFON + ADC10ON + ADC10IE + REF2_5V; 850e: b2 40 78 30 mov #12408, &0x01b0 ;#0x3078 8512: b0 01 for( degC = 240; degC > 0; degC-- ); // delay to allow reference to settle 8514: 3f 40 f0 00 mov #240, r15 ;#0x00f0 8518: 3f 50 e2 ff add #-30, r15 ;#0xffe2 851c: 1f 93 cmp #1, r15 ;r3 As==01 851e: fc 37 jge $-6 ;abs 0x8518 ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 8520: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8524: b0 01 LPM3; 8526: 32 d0 d0 00 bis #208, r2 ;#0x00d0 vraw = ADC10MEM; 852a: 1a 42 b4 01 mov &0x01b4,r10 ADC10CTL0 &= ~ENC; 852e: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 ADC10CTL1 = INCH_0 + ADC10DIV_4; // Voltage Sensor ADC10CLK/5 8532: b2 40 80 00 mov #128, &0x01b2 ;#0x0080 8536: b2 01 ADC10CTL0 = SREF_1 + ADC10SHT_3 + REF2_5V + REFON + ADC10ON + ADC10IE + ADC10SR; 8538: b2 40 78 3c mov #15480, &0x01b0 ;#0x3c78 853c: b0 01 for( degC = 240; degC > 0; degC-- ); // delay to allow reference to settle 853e: 3f 40 f0 00 mov #240, r15 ;#0x00f0 8542: 3f 50 e2 ff add #-30, r15 ;#0xffe2 8546: 1f 93 cmp #1, r15 ;r3 As==01 8548: fc 37 jge $-6 ;abs 0x8542 ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 854a: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 854e: b0 01 LPM3; 8550: 32 d0 d0 00 bis #208, r2 ;#0x00d0 vSun = ADC10MEM; 8554: 1b 42 b4 01 mov &0x01b4,r11 ADC10CTL0 &= ~ENC; 8558: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 ADC10CTL1 = INCH_1 + ADC10DIV_7; // Current Sensor ADC10CLK/5 855c: b2 40 e0 10 mov #4320, &0x01b2 ;#0x10e0 8560: b2 01 ADC10CTL0 = SREF_1 + ADC10SHT_3 + REFON + ADC10ON + ADC10IE + ADC10SR; 8562: b2 40 38 3c mov #15416, &0x01b0 ;#0x3c38 8566: b0 01 for( degC = 240; degC > 0; degC-- ); // delay to allow reference to settle 8568: 3f 40 f0 00 mov #240, r15 ;#0x00f0 856c: 3f 50 e2 ff add #-30, r15 ;#0xffe2 8570: 1f 93 cmp #1, r15 ;r3 As==01 8572: fc 37 jge $-6 ;abs 0x856c ADC10CTL0 |= ENC + ADC10SC; // Sampling and conversion start 8574: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8578: b0 01 LPM3; 857a: 32 d0 d0 00 bis #208, r2 ;#0x00d0 iSun = ADC10MEM; 857e: 1d 42 b4 01 mov &0x01b4,r13 ADC10CTL0 &= ~ENC; 8582: a2 c3 b0 01 bic #2, &0x01b0 ;r3 As==10 ADC10CTL0 &= ~(REFON + ADC10ON); // turn off A/D to save power 8586: b2 f0 cf ff and #-49, &0x01b0 ;#0xffcf 858a: b0 01 dint(); 858c: 32 c2 dint //{ // degC += CAL_OFFSET_TEMP; // } vSupply = (vraw*25)/512; 858e: 3c 40 19 00 mov #25, r12 ;#0x0019 8592: b0 12 48 93 call #0x9348 8596: 0e 93 tst r14 8598: 2a 38 jl $+86 ;abs 0x85ee 859a: 0f 4e mov r14, r15 859c: 8f 10 swpb r15 859e: 8f 11 sxt r15 85a0: 0f 11 rra r15 //CAL DATA //19.8mA = ADC 862, 0mA = ADC 2 so I = 2.302E-5*ADC - 4.605E-5; //3.028V = ADC 620 length=snprintf(rxbuf, 128, "%lu\t%u\t%d\t%u\t%u", seconds, traw, vSupply, vSun, iSun); //send tthe data to the openlog 85a2: 0d 12 push r13 85a4: 0b 12 push r11 85a6: 0f 12 push r15 85a8: 09 12 push r9 85aa: 12 12 10 02 push &0x0210 85ae: 12 12 0e 02 push &0x020e 85b2: 30 12 5b 82 push #-32165 ;#0x825b 85b6: 30 12 80 00 push #128 ;#0x0080 85ba: 06 12 push r6 85bc: b0 12 a6 8b call #0x8ba6 85c0: 0e 4f mov r15, r14 TX232String(rxbuf,length); 85c2: 0f 46 mov r6, r15 85c4: b0 12 96 81 call #0x8196 TX232String("\r\n",2); 85c8: 2e 43 mov #2, r14 ;r3 As==10 85ca: 3f 40 12 82 mov #-32238,r15 ;#0x8212 85ce: b0 12 96 81 call #0x8196 //TX_STRING(rxbuf,length); //P2IFG &= ~GDO0; //clear our soiled GDO0 register //RX_MODE(); P1OUT &= ~LED_RED; 85d2: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 //CCXX_SPI_STROBE(CCxxx0_SIDLE); //IDLE CC1101 CCXX_SPI_STROBE(CCxxx0_SPWD); //shut down CC1101 85d6: 7f 40 39 00 mov.b #57, r15 ;#0x0039 85da: b0 12 76 89 call #0x8976 eint(); 85de: 32 d2 eint 85e0: 31 50 12 00 add #18, r1 ;#0x0012 } } if(loop == 0) 85e4: 07 93 tst r7 85e6: eb 22 jnz $-552 ;abs 0x83be LPM3; //when we wake up it'll be because of an event 85e8: 32 d0 d0 00 bis #208, r2 ;#0x00d0 85ec: e8 3e jmp $-558 ;abs 0x83be 85ee: 3e 50 ff 01 add #511, r14 ;#0x01ff 85f2: d3 3f jmp $-88 ;abs 0x859a { interval = length; length = sprintf(rxbuf,"\e[32mGND:MON Interval is now %d\e[30m",interval); } else length = sprintf(rxbuf,"\e[32mGND:MON Reporting every %d seconds\e[30m",interval); 85f4: 14 12 10 01 push 272(r4) ;0x0110(r4) 85f8: 30 12 6b 82 push #-32149 ;#0x826b 85fc: 46 3f jmp $-370 ;abs 0x848a //TX_STRING(rxbuf,length); } else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 85fe: 3e 40 98 82 mov #-32104,r14 ;#0x8298 8602: 0f 46 mov r6, r15 8604: b0 12 ca 92 call #0x92ca 8608: 0f 93 tst r15 860a: 11 24 jz $+36 ;abs 0x862e { length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 860c: 5f 42 12 02 mov.b &0x0212,r15 8610: 0f 12 push r15 8612: 5f 42 0c 02 mov.b &0x020c,r15 8616: 8f 11 sxt r15 8618: 0f 12 push r15 861a: 30 12 29 82 push #-32215 ;#0x8229 861e: 30 12 9f 82 push #-32097 ;#0x829f 8622: 06 12 push r6 8624: b0 12 90 8b call #0x8b90 8628: 31 50 0a 00 add #10, r1 ;#0x000a 862c: 33 3f jmp $-408 ;abs 0x8494 //TX_STRING(rxbuf,length); } else if(strstr( rxbuf, "now" ) != NULL) //report now 862e: 3e 40 b8 82 mov #-32072,r14 ;#0x82b8 8632: 0f 46 mov r6, r15 8634: b0 12 ca 92 call #0x92ca 8638: 0f 93 tst r15 863a: 04 24 jz $+10 ;abs 0x8644 { flags |= GO_NOW | TIMER_UP; ///set event flags to trigger the reporting 863c: b2 d0 05 00 bis #5, &0x0214 ;#0x0005 8640: 14 02 8642: 28 3f jmp $-430 ;abs 0x8494 } else //command not recognized, give a pong to ack reception { length = sprintf(rxbuf,"\e[34mGND:MON Pong!\e[30m"); 8644: 30 12 bc 82 push #-32068 ;#0x82bc 8648: 06 12 push r6 864a: b0 12 90 8b call #0x8b90 864e: 21 52 add #4, r1 ;r2 As==10 8650: 21 3f jmp $-444 ;abs 0x8494 } } else { if(memcmp("Pong!",rxbuf,5)==0) //if this is an ack to an outbound packet then we'll light a green light 8652: 3d 40 05 00 mov #5, r13 ;#0x0005 8656: 0e 46 mov r6, r14 8658: 3f 40 d4 82 mov #-32044,r15 ;#0x82d4 865c: b0 12 9a 92 call #0x929a 8660: 0f 93 tst r15 8662: 18 23 jnz $-462 ;abs 0x8494 { P1OUT |= LED_GRN; 8664: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 delay(0xFFF); 8668: 3f 40 ff 0f mov #4095, r15 ;#0x0fff 866c: b0 12 e8 80 call #0x80e8 8670: 11 3f jmp $-476 ;abs 0x8494 8672: 05 93 tst r5 8674: bf 26 jz $-640 ;abs 0x83f4 rs232buflength++; } if(rs232buflength > 60 || (rx_char == '\r' && rs232buflength > 0)) { P1OUT |= LED_RED; 8676: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 //TX_STRING(rs232buf,rs232buflength); //Send the string out P2IFG &= ~GDO0; //reset trashed interrupt state 867a: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 867e: 2b 00 //RX_MODE(); //set the radio back to RX mode so we don't miss any packets rs232buflength = 0; 8680: 05 43 clr r5 P1OUT &= ~LED_RED; 8682: d2 c3 21 00 bic.b #1, &0x0021 ;r3 As==01 8686: b6 3e jmp $-658 ;abs 0x83f4 } } if(loop == 0) LPM3; //when we wake up it'll be because of an event } } 8688: 31 50 12 01 add #274, r1 ;#0x0112 868c: 30 40 ac 93 br #0x93ac 00008690 : void CCXX_WRITE_SPI_RF_SETTINGS() { // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 8690: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8694: 4f 43 clr.b r15 8696: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 869a: 7e 40 06 00 mov.b #6, r14 ;#0x0006 869e: 6f 43 mov.b #2, r15 ;r3 As==10 86a0: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 86a4: 7e 40 3c 00 mov.b #60, r14 ;#0x003c 86a8: 7f 40 06 00 mov.b #6, r15 ;#0x0006 86ac: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 86b0: 6e 42 mov.b #4, r14 ;r2 As==10 86b2: 7f 40 07 00 mov.b #7, r15 ;#0x0007 86b6: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 86ba: 7e 40 05 00 mov.b #5, r14 ;#0x0005 86be: 7f 42 mov.b #8, r15 ;r2 As==11 86c0: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 86c4: 5e 43 mov.b #1, r14 ;r3 As==01 86c6: 7f 40 09 00 mov.b #9, r15 ;#0x0009 86ca: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 86ce: 7e 40 9a ff mov.b #-102, r14 ;#0xff9a 86d2: 7f 40 0a 00 mov.b #10, r15 ;#0x000a 86d6: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 86da: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 86de: 7f 40 0b 00 mov.b #11, r15 ;#0x000b 86e2: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 86e6: 4e 43 clr.b r14 86e8: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 86ec: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 86f0: 7e 40 5c 00 mov.b #92, r14 ;#0x005c 86f4: 7f 40 0d 00 mov.b #13, r15 ;#0x000d 86f8: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 86fc: 7e 40 4f 00 mov.b #79, r14 ;#0x004f 8700: 7f 40 0e 00 mov.b #14, r15 ;#0x000e 8704: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 8708: 7e 40 c0 ff mov.b #-64, r14 ;#0xffc0 870c: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 8710: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 8714: 7e 40 2d 00 mov.b #45, r14 ;#0x002d 8718: 7f 40 10 00 mov.b #16, r15 ;#0x0010 871c: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 8720: 7e 40 3b 00 mov.b #59, r14 ;#0x003b 8724: 7f 40 11 00 mov.b #17, r15 ;#0x0011 8728: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 872c: 7e 40 73 00 mov.b #115, r14 ;#0x0073 8730: 7f 40 12 00 mov.b #18, r15 ;#0x0012 8734: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 8738: 7e 40 23 00 mov.b #35, r14 ;#0x0023 873c: 7f 40 13 00 mov.b #19, r15 ;#0x0013 8740: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 8744: 7e 40 b9 ff mov.b #-71, r14 ;#0xffb9 8748: 7f 40 14 00 mov.b #20, r15 ;#0x0014 874c: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 8750: 5e 43 mov.b #1, r14 ;r3 As==01 8752: 7f 40 15 00 mov.b #21, r15 ;#0x0015 8756: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 875a: 7e 40 33 00 mov.b #51, r14 ;#0x0033 875e: 7f 40 17 00 mov.b #23, r15 ;#0x0017 8762: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 8766: 7e 40 18 00 mov.b #24, r14 ;#0x0018 876a: 7f 40 18 00 mov.b #24, r15 ;#0x0018 876e: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 8772: 7e 40 1d 00 mov.b #29, r14 ;#0x001d 8776: 7f 40 19 00 mov.b #25, r15 ;#0x0019 877a: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 877e: 7e 40 1c 00 mov.b #28, r14 ;#0x001c 8782: 7f 40 1a 00 mov.b #26, r15 ;#0x001a 8786: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 878a: 7e 40 c7 ff mov.b #-57, r14 ;#0xffc7 878e: 7f 40 1b 00 mov.b #27, r15 ;#0x001b 8792: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 8796: 4e 43 clr.b r14 8798: 7f 40 1c 00 mov.b #28, r15 ;#0x001c 879c: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 87a0: 7e 40 b0 ff mov.b #-80, r14 ;#0xffb0 87a4: 7f 40 1d 00 mov.b #29, r15 ;#0x001d 87a8: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 87ac: 7e 40 b6 ff mov.b #-74, r14 ;#0xffb6 87b0: 7f 40 21 00 mov.b #33, r15 ;#0x0021 87b4: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 87b8: 7e 40 10 00 mov.b #16, r14 ;#0x0010 87bc: 7f 40 22 00 mov.b #34, r15 ;#0x0022 87c0: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 87c4: 7e 40 ea ff mov.b #-22, r14 ;#0xffea 87c8: 7f 40 23 00 mov.b #35, r15 ;#0x0023 87cc: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 87d0: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 87d4: 7f 40 24 00 mov.b #36, r15 ;#0x0024 87d8: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 87dc: 4e 43 clr.b r14 87de: 7f 40 25 00 mov.b #37, r15 ;#0x0025 87e2: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 87e6: 7e 40 11 00 mov.b #17, r14 ;#0x0011 87ea: 7f 40 26 00 mov.b #38, r15 ;#0x0026 87ee: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 87f2: 7e 40 59 00 mov.b #89, r14 ;#0x0059 87f6: 7f 40 29 00 mov.b #41, r15 ;#0x0029 87fa: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 87fe: 7e 40 88 ff mov.b #-120, r14 ;#0xff88 8802: 7f 40 2c 00 mov.b #44, r15 ;#0x002c 8806: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 880a: 7e 40 31 00 mov.b #49, r14 ;#0x0031 880e: 7f 40 2d 00 mov.b #45, r15 ;#0x002d 8812: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 8816: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 881a: 7f 40 2e 00 mov.b #46, r15 ;#0x002e 881e: b0 12 08 8a call #0x8a08 CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 8822: 7e 43 mov.b #-1, r14 ;r3 As==11 8824: 7f 40 3e 00 mov.b #62, r15 ;#0x003e 8828: b0 12 08 8a call #0x8a08 } 882c: 30 41 ret 0000882e : Interrupt driven! yay! */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); 882e: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8832: b0 12 76 89 call #0x8976 while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8836: f2 90 0f 00 cmp.b #15, &0x0216 ;#0x000f 883a: 16 02 883c: 08 24 jz $+18 ;abs 0x884e CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 883e: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8842: b0 12 76 89 call #0x8976 8846: f2 90 0f 00 cmp.b #15, &0x0216 ;#0x000f 884a: 16 02 884c: f8 23 jnz $-14 ;abs 0x883e CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 884e: 7f 40 34 00 mov.b #52, r15 ;#0x0034 8852: b0 12 76 89 call #0x8976 } 8856: 30 41 ret 00008858 : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 8858: 0b 12 push r11 885a: 0a 12 push r10 885c: 09 12 push r9 885e: 08 12 push r8 8860: 07 12 push r7 8862: 06 12 push r6 8864: 0a 4f mov r15, r10 8866: 47 4e mov.b r14, r7 //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 8868: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 886c: b0 12 ac 89 call #0x89ac 8870: 48 4f mov.b r15, r8 real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 8872: 7f 40 3b 00 mov.b #59, r15 ;#0x003b 8876: b0 12 ac 89 call #0x89ac 887a: 46 4f mov.b r15, r6 for(i=0; i < length && i < pkt_length; i++) 887c: 49 43 clr.b r9 887e: 49 97 cmp.b r7, r9 8880: 02 2c jc $+6 ;abs 0x8886 8882: 58 93 cmp.b #1, r8 ;r3 As==01 8884: 2f 2c jc $+96 ;abs 0x88e4 { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte //tmpbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 8886: 4f 49 mov.b r9, r15 8888: 0a 5f add r15, r10 888a: ca 43 00 00 mov.b #0, 0(r10) ;r3 As==00, 0x0000(r10) RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 888e: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8892: b0 12 ac 89 call #0x89ac 8896: c2 4f 0d 02 mov.b r15, &0x020d LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 889a: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 889e: b0 12 ac 89 call #0x89ac 88a2: c2 4f 12 02 mov.b r15, &0x0212 PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 88a6: 7f 40 38 00 mov.b #56, r15 ;#0x0038 88aa: b0 12 ac 89 call #0x89ac 88ae: c2 4f 13 02 mov.b r15, &0x0213 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 88b2: 4e 46 mov.b r6, r14 88b4: 4f 48 mov.b r8, r15 88b6: 2f 53 incd r15 88b8: 0e 9f cmp r15, r14 88ba: 03 24 jz $+8 ;abs 0x88c2 LQI &= ~bit7; //force it to be INVALID! 88bc: f2 f0 7f 00 and.b #127, &0x0212 ;#0x007f 88c0: 12 02 if (RSSI >= 128) 88c2: 5f 42 0d 02 mov.b &0x020d,r15 88c6: 7f 90 80 00 cmp.b #128, r15 ;#0x0080 88ca: 09 28 jnc $+20 ;abs 0x88de RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 88cc: 4e 4f mov.b r15, r14 88ce: 0f 4e mov r14, r15 88d0: 3f 50 00 ff add #-256, r15 ;#0xff00 88d4: 02 30 jn $+6 ;abs 0x88da 88d6: 0f 11 rra r15 88d8: 14 3c jmp $+42 ;abs 0x8902 88da: 1f 53 inc r15 88dc: fc 3f jmp $-6 ;abs 0x88d6 else RSSI_DBM = (RSSI / 2) - 72; 88de: 12 c3 clrc 88e0: 4f 10 rrc.b r15 88e2: 0f 3c jmp $+32 ;abs 0x8902 pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 88e4: 4f 49 mov.b r9, r15 88e6: 0b 4a mov r10, r11 88e8: 0b 5f add r15, r11 88ea: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 88ee: b0 12 ac 89 call #0x89ac 88f2: cb 4f 00 00 mov.b r15, 0(r11) ;0x0000(r11) //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 88f6: 59 53 inc.b r9 88f8: 49 97 cmp.b r7, r9 88fa: c5 2f jc $-116 ;abs 0x8886 88fc: 49 98 cmp.b r8, r9 88fe: f2 2b jnc $-26 ;abs 0x88e4 8900: c2 3f jmp $-122 ;abs 0x8886 8902: 7f 50 b8 ff add.b #-72, r15 ;#0xffb8 8906: c2 4f 0c 02 mov.b r15, &0x020c RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 890a: 7f 40 3a 00 mov.b #58, r15 ;#0x003a 890e: b0 12 76 89 call #0x8976 CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 8912: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8916: b0 12 76 89 call #0x8976 return i; //i = real length 891a: 4f 49 mov.b r9, r15 891c: 8f 11 sxt r15 } 891e: 36 41 pop r6 8920: 37 41 pop r7 8922: 38 41 pop r8 8924: 39 41 pop r9 8926: 3a 41 pop r10 8928: 3b 41 pop r11 892a: 30 41 ret 0000892c : /** Transmit a string of bytes. (use burst write) */ void TX_STRING(unsigned char *txstring, unsigned char length) { 892c: 0b 12 push r11 892e: 0a 12 push r10 8930: 0a 4f mov r15, r10 8932: 4b 4e mov.b r14, r11 //unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8934: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8938: b0 12 76 89 call #0x8976 }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 893c: f2 b0 70 00 bit.b #112, &0x0216 ;#0x0070 8940: 16 02 8942: f8 23 jnz $-14 ;abs 0x8934 //CC2500_SPI_WRREG(CCxxx0_TXFIFO, length);//Write the data length first CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8944: 4d 4b mov.b r11, r13 8946: 0e 4a mov r10, r14 8948: 7f 40 7f 00 mov.b #127, r15 ;#0x007f 894c: b0 12 50 8a call #0x8a50 CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8950: 7f 40 35 00 mov.b #53, r15 ;#0x0035 8954: b0 12 76 89 call #0x8976 do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8958: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 895c: b0 12 76 89 call #0x8976 if(status == 31) //fast RX mode yay 8960: 5f 42 16 02 mov.b &0x0216,r15 8964: 7f 90 1f 00 cmp.b #31, r15 ;#0x001f 8968: 03 24 jz $+8 ;abs 0x8970 break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 896a: 7f f0 70 00 and.b #112, r15 ;#0x0070 896e: f4 23 jnz $-22 ;abs 0x8958 } 8970: 3a 41 pop r10 8972: 3b 41 pop r11 8974: 30 41 ret 00008976 : #include "hardware.h" /** Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { 8976: 4e 4f mov.b r15, r14 status=0; 8978: c2 43 16 02 mov.b #0, &0x0216 ;r3 As==00 P3OUT &= ~CSn; //pull CSn low to activate chip 897c: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8980: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8984: fd 23 jnz $-4 ;abs 0x8980 P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8986: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 898a: 1b 00 IFG2 &= ~UCB0RXIFG; 898c: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = reg; 8990: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 8994: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8998: fd 27 jz $-4 ;abs 0x8994 status = UCB0RXBUF; 899a: d2 42 6e 00 mov.b &0x006e,&0x0216 899e: 16 02 P3OUT |= CSn; //pull CSn high, we're done with the transfer 89a0: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 89a4: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 89a8: 1b 00 } 89aa: 30 41 ret 000089ac : /** Read a register from the CCXX */ char CCXX_SPI_RDREG(char reg) { 89ac: 4e 4f mov.b r15, r14 unsigned char rx=0; if(reg >= 0x30) 89ae: 7f 90 30 00 cmp.b #48, r15 ;#0x0030 89b2: 1e 38 jl $+62 ;abs 0x89f0 reg |= 0xC0; 89b4: 7e d0 c0 ff bis.b #-64, r14 ;#0xffc0 else reg |= 0x80; status=0; 89b8: c2 43 16 02 mov.b #0, &0x0216 ;r3 As==00 P3OUT &= ~CSn; //pull CSn low to activate chip 89bc: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 89c0: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 89c4: fd 23 jnz $-4 ;abs 0x89c0 P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 89c6: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 89ca: 1b 00 IFG2 &= ~UCB0RXIFG; 89cc: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = reg; 89d0: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 89d4: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 89d8: fd 27 jz $-4 ;abs 0x89d4 status = UCB0RXBUF; 89da: d2 42 6e 00 mov.b &0x006e,&0x0216 89de: 16 02 IFG2 &= ~UCB0RXIFG; 89e0: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = 0; 89e4: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 while (!(IFG2 & UCB0RXIFG)); 89e8: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 89ec: fd 27 jz $-4 ;abs 0x89e8 89ee: 03 3c jmp $+8 ;abs 0x89f6 { unsigned char rx=0; if(reg >= 0x30) reg |= 0xC0; else reg |= 0x80; 89f0: 7e d0 80 ff bis.b #-128, r14 ;#0xff80 89f4: e1 3f jmp $-60 ;abs 0x89b8 status = UCB0RXBUF; IFG2 &= ~UCB0RXIFG; UCB0TXBUF = 0; while (!(IFG2 & UCB0RXIFG)); rx = UCB0RXBUF; 89f6: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 89fa: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 89fe: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8a02: 1b 00 return rx; 8a04: 8f 11 sxt r15 } 8a06: 30 41 ret 00008a08 : /** Write a register from the CCXX */ void CCXX_SPI_WRREG(char reg, char byte) { 8a08: 4d 4f mov.b r15, r13 unsigned char dummy; status=0; 8a0a: c2 43 16 02 mov.b #0, &0x0216 ;r3 As==00 P3OUT &= ~CSn; //pull CSn low to activate chip 8a0e: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8a12: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8a16: fd 23 jnz $-4 ;abs 0x8a12 P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8a18: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8a1c: 1b 00 IFG2 &= ~UCB0RXIFG; 8a1e: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = reg; 8a22: c2 4d 6f 00 mov.b r13, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a26: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8a2a: fd 27 jz $-4 ;abs 0x8a26 status = UCB0RXBUF; 8a2c: d2 42 6e 00 mov.b &0x006e,&0x0216 8a30: 16 02 //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8a32: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = byte; 8a36: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a3a: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8a3e: fd 27 jz $-4 ;abs 0x8a3a dummy = UCB0RXBUF; 8a40: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8a44: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8a48: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8a4c: 1b 00 } 8a4e: 30 41 ret 00008a50 : /** Burst write registers to the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) { 8a50: 4c 4f mov.b r15, r12 unsigned char dummy; unsigned int index; status=0; 8a52: c2 43 16 02 mov.b #0, &0x0216 ;r3 As==00 P3OUT &= ~CSn; //pull CSn low to activate chip 8a56: d2 c3 19 00 bic.b #1, &0x0019 ;r3 As==01 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8a5a: e2 b2 18 00 bit.b #4, &0x0018 ;r2 As==10 8a5e: fd 23 jnz $-4 ;abs 0x8a5a P3SEL |= UART0_SPI_MODULES; //this will bring the clock edge high 8a60: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8a64: 1b 00 IFG2 &= ~UCB0RXIFG; 8a66: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = reg; 8a6a: c2 4c 6f 00 mov.b r12, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a6e: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8a72: fd 27 jz $-4 ;abs 0x8a6e status = UCB0RXBUF; 8a74: d2 42 6e 00 mov.b &0x006e,&0x0216 8a78: 16 02 IFG2 &= ~UCB0RXIFG; 8a7a: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = length; 8a7e: c2 4d 6f 00 mov.b r13, &0x006f while (!(IFG2 & UCB0RXIFG)); 8a82: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8a86: fd 27 jz $-4 ;abs 0x8a82 dummy = UCB0RXBUF; 8a88: 5f 42 6e 00 mov.b &0x006e,r15 for(index = 0; index < length; index++) 8a8c: 0c 43 clr r12 8a8e: 8d 11 sxt r13 8a90: 0c 9d cmp r13, r12 8a92: 0e 2c jc $+30 ;abs 0x8ab0 { IFG2 &= ~UCB0RXIFG; 8a94: e2 c2 03 00 bic.b #4, &0x0003 ;r2 As==10 UCB0TXBUF = buf[index]; 8a98: 0f 4e mov r14, r15 8a9a: 0f 5c add r12, r15 8a9c: e2 4f 6f 00 mov.b @r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8aa0: e2 b2 03 00 bit.b #4, &0x0003 ;r2 As==10 8aa4: fd 27 jz $-4 ;abs 0x8aa0 dummy = UCB0RXBUF; 8aa6: 5f 42 6e 00 mov.b &0x006e,r15 IFG2 &= ~UCB0RXIFG; UCB0TXBUF = length; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; for(index = 0; index < length; index++) 8aaa: 1c 53 inc r12 8aac: 0c 9d cmp r13, r12 8aae: f2 2b jnc $-26 ;abs 0x8a94 UCB0TXBUF = buf[index]; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; } P3OUT |= CSn; //pull CSn high, we're done with the transfer 8ab0: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UART0_SPI_MODULES; //take the pins back out of SPI mode 8ab4: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8ab8: 1b 00 } 8aba: 30 41 ret 00008abc : 8abc: 0b 12 push r11 8abe: 0a 12 push r10 8ac0: 0c 4f mov r15, r12 8ac2: 0a 43 clr r10 8ac4: 0b 43 clr r11 8ac6: 6d 4f mov.b @r15, r13 8ac8: 7d 90 20 00 cmp.b #32, r13 ;#0x0020 8acc: 49 24 jz $+148 ;abs 0x8b60 8ace: 7d 90 09 00 cmp.b #9, r13 ;#0x0009 8ad2: 46 24 jz $+142 ;abs 0x8b60 8ad4: 7d 90 0a 00 cmp.b #10, r13 ;#0x000a 8ad8: 43 24 jz $+136 ;abs 0x8b60 8ada: 7d 90 0c 00 cmp.b #12, r13 ;#0x000c 8ade: 40 24 jz $+130 ;abs 0x8b60 8ae0: 7d 90 0d 00 cmp.b #13, r13 ;#0x000d 8ae4: 3d 24 jz $+124 ;abs 0x8b60 8ae6: 7d 90 0b 00 cmp.b #11, r13 ;#0x000b 8aea: 3a 24 jz $+118 ;abs 0x8b60 8aec: 7d 90 2d 00 cmp.b #45, r13 ;#0x002d 8af0: 35 24 jz $+108 ;abs 0x8b5c 8af2: 7d 90 2b 00 cmp.b #43, r13 ;#0x002b 8af6: 2f 24 jz $+96 ;abs 0x8b56 8af8: 4f 4d mov.b r13, r15 8afa: 8f 11 sxt r15 8afc: 0e 43 clr r14 8afe: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8b02: 3f 90 0a 00 cmp #10, r15 ;#0x000a 8b06: 01 2c jc $+4 ;abs 0x8b0a 8b08: 1e 43 mov #1, r14 ;r3 As==01 8b0a: 0e 93 tst r14 8b0c: 02 20 jnz $+6 ;abs 0x8b12 8b0e: 0f 43 clr r15 8b10: 3c 3c jmp $+122 ;abs 0x8b8a 8b12: 4f 4d mov.b r13, r15 8b14: 8f 11 sxt r15 8b16: 0b 5f add r15, r11 8b18: 3b 50 d0 ff add #-48, r11 ;#0xffd0 8b1c: 1c 53 inc r12 8b1e: 6f 4c mov.b @r12, r15 8b20: 4d 4f mov.b r15, r13 8b22: 8f 11 sxt r15 8b24: 0e 43 clr r14 8b26: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8b2a: 3f 90 0a 00 cmp #10, r15 ;#0x000a 8b2e: 01 2c jc $+4 ;abs 0x8b32 8b30: 1e 43 mov #1, r14 ;r3 As==01 8b32: 0e 93 tst r14 8b34: 0a 24 jz $+22 ;abs 0x8b4a 8b36: 0f 4b mov r11, r15 8b38: 0f 5f rla r15 8b3a: 0f 5f rla r15 8b3c: 0e 4b mov r11, r14 8b3e: 0e 5e rla r14 8b40: 0b 4f mov r15, r11 8b42: 0b 5e add r14, r11 8b44: 0b 5e add r14, r11 8b46: 0b 5e add r14, r11 8b48: e4 3f jmp $-54 ;abs 0x8b12 8b4a: 0a 93 tst r10 8b4c: 02 24 jz $+6 ;abs 0x8b52 8b4e: 3b e3 inv r11 8b50: 1b 53 inc r11 8b52: 0f 4b mov r11, r15 8b54: 1a 3c jmp $+54 ;abs 0x8b8a 8b56: 1c 53 inc r12 8b58: 6d 4c mov.b @r12, r13 8b5a: ce 3f jmp $-98 ;abs 0x8af8 8b5c: 1a 43 mov #1, r10 ;r3 As==01 8b5e: fb 3f jmp $-8 ;abs 0x8b56 8b60: 1c 53 inc r12 8b62: 6d 4c mov.b @r12, r13 8b64: 7d 90 20 00 cmp.b #32, r13 ;#0x0020 8b68: fb 27 jz $-8 ;abs 0x8b60 8b6a: 7d 90 09 00 cmp.b #9, r13 ;#0x0009 8b6e: f8 27 jz $-14 ;abs 0x8b60 8b70: 7d 90 0a 00 cmp.b #10, r13 ;#0x000a 8b74: f5 27 jz $-20 ;abs 0x8b60 8b76: 7d 90 0c 00 cmp.b #12, r13 ;#0x000c 8b7a: f2 27 jz $-26 ;abs 0x8b60 8b7c: 7d 90 0d 00 cmp.b #13, r13 ;#0x000d 8b80: ef 27 jz $-32 ;abs 0x8b60 8b82: 7d 90 0b 00 cmp.b #11, r13 ;#0x000b 8b86: ec 27 jz $-38 ;abs 0x8b60 8b88: b1 3f jmp $-156 ;abs 0x8aec 8b8a: 3a 41 pop r10 8b8c: 3b 41 pop r11 8b8e: 30 41 ret 00008b90 : 8b90: 2f 43 mov #2, r15 ;r3 As==10 8b92: 0f 51 add r1, r15 8b94: 2c 4f mov @r15, r12 8b96: 1e 4f 02 00 mov 2(r15), r14 ;0x0002(r15) 8b9a: 2f 52 add #4, r15 ;r2 As==10 8b9c: 0d 4f mov r15, r13 8b9e: 0f 4c mov r12, r15 8ba0: b0 12 e0 8b call #0x8be0 8ba4: 30 41 ret 00008ba6 : 8ba6: 0b 12 push r11 8ba8: 0a 12 push r10 8baa: 3f 40 06 00 mov #6, r15 ;#0x0006 8bae: 0f 51 add r1, r15 8bb0: 2a 4f mov @r15, r10 8bb2: 1b 4f 02 00 mov 2(r15), r11 ;0x0002(r15) 8bb6: 1e 4f 04 00 mov 4(r15), r14 ;0x0004(r15) 8bba: 3f 50 06 00 add #6, r15 ;#0x0006 8bbe: 0c 4f mov r15, r12 8bc0: 0d 4e mov r14, r13 8bc2: 0e 4b mov r11, r14 8bc4: 0f 4a mov r10, r15 8bc6: b0 12 1a 8c call #0x8c1a 8bca: 3a 41 pop r10 8bcc: 3b 41 pop r11 8bce: 30 41 ret 00008bd0 : 8bd0: 1e 42 04 02 mov &0x0204,r14 8bd4: ce 4f 00 00 mov.b r15, 0(r14) ;0x0000(r14) 8bd8: 92 53 04 02 inc &0x0204 8bdc: 7f f3 and.b #-1, r15 ;r3 As==11 8bde: 30 41 ret 00008be0 : 8be0: 0b 12 push r11 8be2: 0b 4f mov r15, r11 8be4: 82 4f 04 02 mov r15, &0x0204 8be8: 3f 40 d0 8b mov #-29744,r15 ;#0x8bd0 8bec: b0 12 a6 8c call #0x8ca6 8bf0: 0b 5f add r15, r11 8bf2: cb 43 00 00 mov.b #0, 0(r11) ;r3 As==00, 0x0000(r11) 8bf6: 3b 41 pop r11 8bf8: 30 41 ret 00008bfa : 8bfa: 0e 4f mov r15, r14 8bfc: a2 93 08 02 cmp #2, &0x0208 ;r3 As==10 8c00: 0a 28 jnc $+22 ;abs 0x8c16 8c02: 1f 42 06 02 mov &0x0206,r15 8c06: cf 4e 00 00 mov.b r14, 0(r15) ;0x0000(r15) 8c0a: 92 53 06 02 inc &0x0206 8c0e: b2 53 08 02 add #-1, &0x0208 ;r3 As==11 8c12: 4f 4e mov.b r14, r15 8c14: 30 41 ret 8c16: 3f 43 mov #-1, r15 ;r3 As==11 8c18: 30 41 ret 00008c1a : 8c1a: 0b 12 push r11 8c1c: 0a 12 push r10 8c1e: 0b 4f mov r15, r11 8c20: 0a 4d mov r13, r10 8c22: 82 4b 06 02 mov r11, &0x0206 8c26: 82 4e 08 02 mov r14, &0x0208 8c2a: 0d 4c mov r12, r13 8c2c: 0e 4a mov r10, r14 8c2e: 3f 40 fa 8b mov #-29702,r15 ;#0x8bfa 8c32: b0 12 a6 8c call #0x8ca6 8c36: 0b 5f add r15, r11 8c38: cb 43 00 00 mov.b #0, 0(r11) ;r3 As==00, 0x0000(r11) 8c3c: 3a 41 pop r10 8c3e: 3b 41 pop r11 8c40: 30 41 ret 00008c42 : 8c42: 0b 12 push r11 8c44: 0a 12 push r10 8c46: 0a 4f mov r15, r10 8c48: 0b 4e mov r14, r11 8c4a: 0e 93 tst r14 8c4c: 02 20 jnz $+6 ;abs 0x8c52 8c4e: 1f 43 mov #1, r15 ;r3 As==01 8c50: 0d 3c jmp $+28 ;abs 0x8c6c 8c52: 6f 4a mov.b @r10, r15 8c54: 8f 11 sxt r15 8c56: 1a 53 inc r10 8c58: 92 12 0a 02 call &0x020a 8c5c: 0f 93 tst r15 8c5e: 05 38 jl $+12 ;abs 0x8c6a 8c60: 92 53 02 02 inc &0x0202 8c64: 3b 53 add #-1, r11 ;r3 As==11 8c66: f5 23 jnz $-20 ;abs 0x8c52 8c68: f2 3f jmp $-26 ;abs 0x8c4e 8c6a: 3f 43 mov #-1, r15 ;r3 As==11 8c6c: 3a 41 pop r10 8c6e: 3b 41 pop r11 8c70: 30 41 ret 00008c72 <__write_pad>: 8c72: 0b 12 push r11 8c74: 0a 12 push r10 8c76: 09 12 push r9 8c78: 49 4f mov.b r15, r9 8c7a: 4b 4e mov.b r14, r11 8c7c: 5e 93 cmp.b #1, r14 ;r3 As==01 8c7e: 0c 38 jl $+26 ;abs 0x8c98 8c80: 4a 4f mov.b r15, r10 8c82: 8a 11 sxt r10 8c84: 0f 4a mov r10, r15 8c86: 92 12 0a 02 call &0x020a 8c8a: 0f 93 tst r15 8c8c: 07 38 jl $+16 ;abs 0x8c9c 8c8e: 92 53 02 02 inc &0x0202 8c92: 7b 53 add.b #-1, r11 ;r3 As==11 8c94: 5b 93 cmp.b #1, r11 ;r3 As==01 8c96: f6 37 jge $-18 ;abs 0x8c84 8c98: 4f 49 mov.b r9, r15 8c9a: 01 3c jmp $+4 ;abs 0x8c9e 8c9c: 3f 43 mov #-1, r15 ;r3 As==11 8c9e: 39 41 pop r9 8ca0: 3a 41 pop r10 8ca2: 3b 41 pop r11 8ca4: 30 41 ret 00008ca6 : 8ca6: 0b 12 push r11 8ca8: 0a 12 push r10 8caa: 09 12 push r9 8cac: 08 12 push r8 8cae: 07 12 push r7 8cb0: 06 12 push r6 8cb2: 05 12 push r5 8cb4: 04 12 push r4 8cb6: 31 80 3c 00 sub #60, r1 ;#0x003c 8cba: 05 4d mov r13, r5 8cbc: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) 8cc0: 81 43 32 00 mov #0, 50(r1) ;r3 As==00, 0x0032(r1) 8cc4: 82 43 02 02 mov #0, &0x0202 ;r3 As==00 8cc8: 82 4f 0a 02 mov r15, &0x020a 8ccc: 06 4e mov r14, r6 8cce: 0f 46 mov r6, r15 8cd0: 67 46 mov.b @r6, r7 8cd2: 47 93 tst.b r7 8cd4: 0a 24 jz $+22 ;abs 0x8cea 8cd6: 77 90 25 00 cmp.b #37, r7 ;#0x0025 8cda: 07 24 jz $+16 ;abs 0x8cea 8cdc: 16 53 inc r6 8cde: 67 46 mov.b @r6, r7 8ce0: 47 93 tst.b r7 8ce2: 03 24 jz $+8 ;abs 0x8cea 8ce4: 77 90 25 00 cmp.b #37, r7 ;#0x0025 8ce8: f9 23 jnz $-12 ;abs 0x8cdc 8cea: 0d 46 mov r6, r13 8cec: 0d 8f sub r15, r13 8cee: 02 24 jz $+6 ;abs 0x8cf4 8cf0: 30 40 34 92 br #0x9234 8cf4: 47 93 tst.b r7 8cf6: 02 20 jnz $+6 ;abs 0x8cfc 8cf8: 30 40 42 92 br #0x9242 8cfc: 16 53 inc r6 8cfe: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) 8d02: c1 43 35 00 mov.b #0, 53(r1) ;r3 As==00, 0x0035(r1) 8d06: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) 8d0a: 7b 43 mov.b #-1, r11 ;r3 As==11 8d0c: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 8d10: 67 46 mov.b @r6, r7 8d12: 16 53 inc r6 8d14: 77 90 75 00 cmp.b #117, r7 ;#0x0075 8d18: 02 20 jnz $+6 ;abs 0x8d1e 8d1a: 30 40 0e 92 br #0x920e 8d1e: 4f 47 mov.b r7, r15 8d20: 7f d0 20 00 bis.b #32, r15 ;#0x0020 8d24: 7f 90 78 00 cmp.b #120, r15 ;#0x0078 8d28: 02 20 jnz $+6 ;abs 0x8d2e 8d2a: 30 40 0e 92 br #0x920e 8d2e: 77 90 20 00 cmp.b #32, r7 ;#0x0020 8d32: 02 20 jnz $+6 ;abs 0x8d38 8d34: 30 40 fa 91 br #0x91fa 8d38: 77 90 23 00 cmp.b #35, r7 ;#0x0023 8d3c: 02 20 jnz $+6 ;abs 0x8d42 8d3e: 30 40 f2 91 br #0x91f2 8d42: 77 90 2a 00 cmp.b #42, r7 ;#0x002a 8d46: 02 20 jnz $+6 ;abs 0x8d4c 8d48: 30 40 d6 91 br #0x91d6 8d4c: 77 90 2d 00 cmp.b #45, r7 ;#0x002d 8d50: 02 20 jnz $+6 ;abs 0x8d56 8d52: 30 40 c6 91 br #0x91c6 8d56: 77 90 2b 00 cmp.b #43, r7 ;#0x002b 8d5a: 02 20 jnz $+6 ;abs 0x8d60 8d5c: 30 40 bc 91 br #0x91bc 8d60: 77 90 2e 00 cmp.b #46, r7 ;#0x002e 8d64: 02 20 jnz $+6 ;abs 0x8d6a 8d66: 30 40 56 91 br #0x9156 8d6a: 77 90 30 00 cmp.b #48, r7 ;#0x0030 8d6e: 02 20 jnz $+6 ;abs 0x8d74 8d70: 30 40 40 91 br #0x9140 8d74: 4f 47 mov.b r7, r15 8d76: 7f 50 cf ff add.b #-49, r15 ;#0xffcf 8d7a: 7f 90 09 00 cmp.b #9, r15 ;#0x0009 8d7e: 1a 2c jc $+54 ;abs 0x8db4 8d80: 0d 43 clr r13 8d82: 0f 4d mov r13, r15 8d84: 0f 5f rla r15 8d86: 0f 5f rla r15 8d88: 0e 4d mov r13, r14 8d8a: 0e 5e rla r14 8d8c: 0d 4f mov r15, r13 8d8e: 0d 5e add r14, r13 8d90: 0d 5e add r14, r13 8d92: 0d 5e add r14, r13 8d94: 4f 47 mov.b r7, r15 8d96: 8f 11 sxt r15 8d98: 0d 5f add r15, r13 8d9a: 3d 50 d0 ff add #-48, r13 ;#0xffd0 8d9e: 67 46 mov.b @r6, r7 8da0: 16 53 inc r6 8da2: 4f 47 mov.b r7, r15 8da4: 7f 50 d0 ff add.b #-48, r15 ;#0xffd0 8da8: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 8dac: ea 2b jnc $-42 ;abs 0x8d82 8dae: c1 4d 2f 00 mov.b r13, 47(r1) ;0x002f(r1) 8db2: b0 3f jmp $-158 ;abs 0x8d14 8db4: 77 90 68 00 cmp.b #104, r7 ;#0x0068 8db8: bf 25 jz $+896 ;abs 0x9138 8dba: 77 90 6c 00 cmp.b #108, r7 ;#0x006c 8dbe: 03 20 jnz $+8 ;abs 0x8dc6 8dc0: d1 d3 2e 00 bis.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 8dc4: a5 3f jmp $-180 ;abs 0x8d10 8dc6: 77 90 63 00 cmp.b #99, r7 ;#0x0063 8dca: af 25 jz $+864 ;abs 0x912a 8dcc: 77 90 44 00 cmp.b #68, r7 ;#0x0044 8dd0: a9 25 jz $+852 ;abs 0x9124 8dd2: 77 90 64 00 cmp.b #100, r7 ;#0x0064 8dd6: 7a 25 jz $+758 ;abs 0x90cc 8dd8: 77 90 69 00 cmp.b #105, r7 ;#0x0069 8ddc: 77 25 jz $+752 ;abs 0x90cc 8dde: 77 90 4f 00 cmp.b #79, r7 ;#0x004f 8de2: 71 25 jz $+740 ;abs 0x90c6 8de4: 77 90 6f 00 cmp.b #111, r7 ;#0x006f 8de8: 6b 25 jz $+728 ;abs 0x90c0 8dea: 77 90 70 00 cmp.b #112, r7 ;#0x0070 8dee: 59 25 jz $+692 ;abs 0x90a2 8df0: 77 90 73 00 cmp.b #115, r7 ;#0x0073 8df4: 1a 25 jz $+566 ;abs 0x902a 8df6: 77 90 55 00 cmp.b #85, r7 ;#0x0055 8dfa: 14 25 jz $+554 ;abs 0x9024 8dfc: 77 90 75 00 cmp.b #117, r7 ;#0x0075 8e00: 0d 25 jz $+540 ;abs 0x901c 8e02: 77 90 58 00 cmp.b #88, r7 ;#0x0058 8e06: 8a 24 jz $+278 ;abs 0x8f1c 8e08: 77 90 78 00 cmp.b #120, r7 ;#0x0078 8e0c: 87 24 jz $+272 ;abs 0x8f1c 8e0e: 47 93 tst.b r7 8e10: 02 20 jnz $+6 ;abs 0x8e16 8e12: 30 40 42 92 br #0x9242 8e16: 81 41 2c 00 mov r1, 44(r1) ;0x002c(r1) 8e1a: c1 47 00 00 mov.b r7, 0(r1) ;0x0000(r1) 8e1e: 59 43 mov.b #1, r9 ;r3 As==01 8e20: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 8e24: 4b 49 mov.b r9, r11 8e26: 5a 41 35 00 mov.b 53(r1), r10 ;0x0035(r1) 8e2a: 4a 89 sub.b r9, r10 8e2c: 75 30 jn $+236 ;abs 0x8f18 8e2e: 5e 41 2a 00 mov.b 42(r1), r14 ;0x002a(r1) 8e32: 4e 93 tst.b r14 8e34: 6b 24 jz $+216 ;abs 0x8f0c 8e36: 5b 53 inc.b r11 8e38: 4b 5a add.b r10, r11 8e3a: 58 41 2e 00 mov.b 46(r1), r8 ;0x002e(r1) 8e3e: 78 f0 30 00 and.b #48, r8 ;#0x0030 8e42: 13 20 jnz $+40 ;abs 0x8e6a 8e44: 5d 41 2f 00 mov.b 47(r1), r13 ;0x002f(r1) 8e48: 8d 11 sxt r13 8e4a: 4f 4b mov.b r11, r15 8e4c: 8f 11 sxt r15 8e4e: 0d 8f sub r15, r13 8e50: 1d 93 cmp #1, r13 ;r3 As==01 8e52: 0b 38 jl $+24 ;abs 0x8e6a 8e54: 4e 4d mov.b r13, r14 8e56: 7f 40 20 00 mov.b #32, r15 ;#0x0020 8e5a: b0 12 72 8c call #0x8c72 8e5e: 0f 93 tst r15 8e60: 02 34 jge $+6 ;abs 0x8e66 8e62: 30 40 42 92 br #0x9242 8e66: 5e 41 2a 00 mov.b 42(r1), r14 ;0x002a(r1) 8e6a: 4e 93 tst.b r14 8e6c: 4a 20 jnz $+150 ;abs 0x8f02 8e6e: f1 b0 40 00 bit.b #64, 46(r1) ;#0x0040, 0x002e(r1) 8e72: 2e 00 8e74: 0f 24 jz $+32 ;abs 0x8e94 8e76: f1 40 30 00 mov.b #48, 40(r1) ;#0x0030, 0x0028(r1) 8e7a: 28 00 8e7c: c1 47 29 00 mov.b r7, 41(r1) ;0x0029(r1) 8e80: 2e 43 mov #2, r14 ;r3 As==10 8e82: 0f 41 mov r1, r15 8e84: 3f 50 28 00 add #40, r15 ;#0x0028 8e88: b0 12 42 8c call #0x8c42 8e8c: 0f 93 tst r15 8e8e: 02 34 jge $+6 ;abs 0x8e94 8e90: 30 40 42 92 br #0x9242 8e94: 78 90 20 00 cmp.b #32, r8 ;#0x0020 8e98: 24 24 jz $+74 ;abs 0x8ee2 8e9a: 4e 4a mov.b r10, r14 8e9c: 7f 40 30 00 mov.b #48, r15 ;#0x0030 8ea0: b0 12 72 8c call #0x8c72 8ea4: 0f 93 tst r15 8ea6: cd 39 jl $+924 ;abs 0x9242 8ea8: 4f 49 mov.b r9, r15 8eaa: 8f 11 sxt r15 8eac: 0e 4f mov r15, r14 8eae: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 8eb2: b0 12 42 8c call #0x8c42 8eb6: 0f 93 tst r15 8eb8: c4 39 jl $+906 ;abs 0x9242 8eba: f1 b0 10 00 bit.b #16, 46(r1) ;#0x0010, 0x002e(r1) 8ebe: 2e 00 8ec0: 06 27 jz $-498 ;abs 0x8cce 8ec2: 5d 41 2f 00 mov.b 47(r1), r13 ;0x002f(r1) 8ec6: 8d 11 sxt r13 8ec8: 4f 4b mov.b r11, r15 8eca: 8f 11 sxt r15 8ecc: 0d 8f sub r15, r13 8ece: 1d 93 cmp #1, r13 ;r3 As==01 8ed0: fe 3a jl $-514 ;abs 0x8cce 8ed2: 4e 4d mov.b r13, r14 8ed4: 7f 40 20 00 mov.b #32, r15 ;#0x0020 8ed8: b0 12 72 8c call #0x8c72 8edc: 0f 93 tst r15 8ede: f7 36 jge $-528 ;abs 0x8cce 8ee0: b0 3d jmp $+866 ;abs 0x9242 8ee2: 5d 41 2f 00 mov.b 47(r1), r13 ;0x002f(r1) 8ee6: 8d 11 sxt r13 8ee8: 4f 4b mov.b r11, r15 8eea: 8f 11 sxt r15 8eec: 0d 8f sub r15, r13 8eee: 1d 93 cmp #1, r13 ;r3 As==01 8ef0: d4 3b jl $-86 ;abs 0x8e9a 8ef2: 4e 4d mov.b r13, r14 8ef4: 7f 40 30 00 mov.b #48, r15 ;#0x0030 8ef8: b0 12 72 8c call #0x8c72 8efc: 0f 93 tst r15 8efe: cd 37 jge $-100 ;abs 0x8e9a 8f00: a0 3d jmp $+834 ;abs 0x9242 8f02: 1e 43 mov #1, r14 ;r3 As==01 8f04: 0f 41 mov r1, r15 8f06: 3f 50 2a 00 add #42, r15 ;#0x002a 8f0a: be 3f jmp $-130 ;abs 0x8e88 8f0c: f1 b0 40 00 bit.b #64, 46(r1) ;#0x0040, 0x002e(r1) 8f10: 2e 00 8f12: 92 27 jz $-218 ;abs 0x8e38 8f14: 6b 53 incd.b r11 8f16: 90 3f jmp $-222 ;abs 0x8e38 8f18: 4a 43 clr.b r10 8f1a: 89 3f jmp $-236 ;abs 0x8e2e 8f1c: f1 40 10 00 mov.b #16, 52(r1) ;#0x0010, 0x0034(r1) 8f20: 34 00 8f22: f1 b2 2e 00 bit.b #8, 46(r1) ;r2 As==11, 0x002e(r1) 8f26: 09 24 jz $+20 ;abs 0x8f3a 8f28: 81 93 30 00 tst 48(r1) ;0x0030(r1) 8f2c: 03 20 jnz $+8 ;abs 0x8f34 8f2e: 81 93 32 00 tst 50(r1) ;0x0032(r1) 8f32: 03 24 jz $+8 ;abs 0x8f3a 8f34: f1 d0 40 00 bis.b #64, 46(r1) ;#0x0040, 0x002e(r1) 8f38: 2e 00 8f3a: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 8f3e: c1 4b 35 00 mov.b r11, 53(r1) ;0x0035(r1) 8f42: 4b 93 tst.b r11 8f44: 03 38 jl $+8 ;abs 0x8f4c 8f46: f1 f0 df ff and.b #-33, 46(r1) ;#0xffdf, 0x002e(r1) 8f4a: 2e 00 8f4c: 0f 41 mov r1, r15 8f4e: 3f 50 28 00 add #40, r15 ;#0x0028 8f52: 81 4f 2c 00 mov r15, 44(r1) ;0x002c(r1) 8f56: 81 93 30 00 tst 48(r1) ;0x0030(r1) 8f5a: 06 20 jnz $+14 ;abs 0x8f68 8f5c: 81 93 32 00 tst 50(r1) ;0x0032(r1) 8f60: 03 20 jnz $+8 ;abs 0x8f68 8f62: c1 93 35 00 tst.b 53(r1) ;0x0035(r1) 8f66: 3e 24 jz $+126 ;abs 0x8fe4 8f68: d1 41 34 00 mov.b 52(r1), 56(r1) ;0x0034(r1), 0x0038(r1) 8f6c: 38 00 8f6e: c1 43 39 00 mov.b #0, 57(r1) ;r3 As==00, 0x0039(r1) 8f72: 81 43 3a 00 mov #0, 58(r1) ;r3 As==00, 0x003a(r1) 8f76: c1 43 36 00 mov.b #0, 54(r1) ;r3 As==00, 0x0036(r1) 8f7a: 1e 41 30 00 mov 48(r1), r14 ;0x0030(r1) 8f7e: 1f 41 32 00 mov 50(r1), r15 ;0x0032(r1) 8f82: 1e 81 38 00 sub 56(r1), r14 ;0x0038(r1) 8f86: 1f 71 3a 00 subc 58(r1), r15 ;0x003a(r1) 8f8a: 02 28 jnc $+6 ;abs 0x8f90 8f8c: d1 43 36 00 mov.b #1, 54(r1) ;r3 As==01, 0x0036(r1) 8f90: 1c 41 30 00 mov 48(r1), r12 ;0x0030(r1) 8f94: 1d 41 32 00 mov 50(r1), r13 ;0x0032(r1) 8f98: 1a 41 38 00 mov 56(r1), r10 ;0x0038(r1) 8f9c: 1b 41 3a 00 mov 58(r1), r11 ;0x003a(r1) 8fa0: b0 12 62 93 call #0x9362 8fa4: 44 4e mov.b r14, r4 8fa6: 7e 90 0a 00 cmp.b #10, r14 ;#0x000a 8faa: 30 2c jc $+98 ;abs 0x900c 8fac: 74 50 30 00 add.b #48, r4 ;#0x0030 8fb0: b1 53 2c 00 add #-1, 44(r1) ;r3 As==11, 0x002c(r1) 8fb4: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 8fb8: cf 44 00 00 mov.b r4, 0(r15) ;0x0000(r15) 8fbc: 1c 41 30 00 mov 48(r1), r12 ;0x0030(r1) 8fc0: 1d 41 32 00 mov 50(r1), r13 ;0x0032(r1) 8fc4: 1a 41 38 00 mov 56(r1), r10 ;0x0038(r1) 8fc8: 1b 41 3a 00 mov 58(r1), r11 ;0x003a(r1) 8fcc: b0 12 62 93 call #0x9362 8fd0: 81 4c 30 00 mov r12, 48(r1) ;0x0030(r1) 8fd4: 81 4d 32 00 mov r13, 50(r1) ;0x0032(r1) 8fd8: c1 93 36 00 tst.b 54(r1) ;0x0036(r1) 8fdc: cc 23 jnz $-102 ;abs 0x8f76 8fde: f1 92 34 00 cmp.b #8, 52(r1) ;r2 As==11, 0x0034(r1) 8fe2: 06 24 jz $+14 ;abs 0x8ff0 8fe4: 49 41 mov.b r1, r9 8fe6: 59 81 2c 00 sub.b 44(r1), r9 ;0x002c(r1) 8fea: 79 50 28 00 add.b #40, r9 ;#0x0028 8fee: 1a 3f jmp $-458 ;abs 0x8e24 8ff0: f1 b2 2e 00 bit.b #8, 46(r1) ;r2 As==11, 0x002e(r1) 8ff4: f7 27 jz $-16 ;abs 0x8fe4 8ff6: 74 90 30 00 cmp.b #48, r4 ;#0x0030 8ffa: f4 27 jz $-22 ;abs 0x8fe4 8ffc: b1 53 2c 00 add #-1, 44(r1) ;r3 As==11, 0x002c(r1) 9000: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 9004: ff 40 30 00 mov.b #48, 0(r15) ;#0x0030, 0x0000(r15) 9008: 00 00 900a: ec 3f jmp $-38 ;abs 0x8fe4 900c: 74 50 57 00 add.b #87, r4 ;#0x0057 9010: 77 90 58 00 cmp.b #88, r7 ;#0x0058 9014: cd 23 jnz $-100 ;abs 0x8fb0 9016: 74 f0 df ff and.b #-33, r4 ;#0xffdf 901a: ca 3f jmp $-106 ;abs 0x8fb0 901c: f1 40 0a 00 mov.b #10, 52(r1) ;#0x000a, 0x0034(r1) 9020: 34 00 9022: 8b 3f jmp $-232 ;abs 0x8f3a 9024: d1 d3 2e 00 bis.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 9028: f9 3f jmp $-12 ;abs 0x901c 902a: 0f 45 mov r5, r15 902c: 25 53 incd r5 902e: a1 4f 2c 00 mov @r15, 44(r1) ;0x002c(r1) 9032: 81 93 2c 00 tst 44(r1) ;0x002c(r1) 9036: 1e 24 jz $+62 ;abs 0x9074 9038: 4b 93 tst.b r11 903a: 11 38 jl $+36 ;abs 0x905e 903c: 4f 4b mov.b r11, r15 903e: 8f 11 sxt r15 9040: 0d 4f mov r15, r13 9042: 0e 43 clr r14 9044: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 9048: b0 12 76 92 call #0x9276 904c: 0f 93 tst r15 904e: 05 24 jz $+12 ;abs 0x905a 9050: 49 4f mov.b r15, r9 9052: 59 81 2c 00 sub.b 44(r1), r9 ;0x002c(r1) 9056: 4b 99 cmp.b r9, r11 9058: e3 36 jge $-568 ;abs 0x8e20 905a: 49 4b mov.b r11, r9 905c: e1 3e jmp $-572 ;abs 0x8e20 905e: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 9062: 1f 83 dec r15 9064: 1f 53 inc r15 9066: cf 93 00 00 tst.b 0(r15) ;0x0000(r15) 906a: fc 23 jnz $-6 ;abs 0x9064 906c: 49 4f mov.b r15, r9 906e: 59 81 2c 00 sub.b 44(r1), r9 ;0x002c(r1) 9072: d6 3e jmp $-594 ;abs 0x8e20 9074: 81 41 2c 00 mov r1, 44(r1) ;0x002c(r1) 9078: f1 40 28 00 mov.b #40, 0(r1) ;#0x0028, 0x0000(r1) 907c: 00 00 907e: f1 40 6e 00 mov.b #110, 1(r1) ;#0x006e, 0x0001(r1) 9082: 01 00 9084: f1 40 75 00 mov.b #117, 2(r1) ;#0x0075, 0x0002(r1) 9088: 02 00 908a: f1 40 6c 00 mov.b #108, 3(r1) ;#0x006c, 0x0003(r1) 908e: 03 00 9090: f1 40 6c 00 mov.b #108, 4(r1) ;#0x006c, 0x0004(r1) 9094: 04 00 9096: f1 40 29 00 mov.b #41, 5(r1) ;#0x0029, 0x0005(r1) 909a: 05 00 909c: c1 43 06 00 mov.b #0, 6(r1) ;r3 As==00, 0x0006(r1) 90a0: cb 3f jmp $-104 ;abs 0x9038 90a2: 0f 45 mov r5, r15 90a4: 25 53 incd r5 90a6: a1 4f 30 00 mov @r15, 48(r1) ;0x0030(r1) 90aa: 81 43 32 00 mov #0, 50(r1) ;r3 As==00, 0x0032(r1) 90ae: f1 40 10 00 mov.b #16, 52(r1) ;#0x0010, 0x0034(r1) 90b2: 34 00 90b4: f1 d0 40 00 bis.b #64, 46(r1) ;#0x0040, 0x002e(r1) 90b8: 2e 00 90ba: 77 40 78 00 mov.b #120, r7 ;#0x0078 90be: 3d 3f jmp $-388 ;abs 0x8f3a 90c0: f1 42 34 00 mov.b #8, 52(r1) ;r2 As==11, 0x0034(r1) 90c4: 3a 3f jmp $-394 ;abs 0x8f3a 90c6: d1 d3 2e 00 bis.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 90ca: fa 3f jmp $-10 ;abs 0x90c0 90cc: d1 b3 2e 00 bit.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 90d0: 19 24 jz $+52 ;abs 0x9104 90d2: 0f 45 mov r5, r15 90d4: 25 52 add #4, r5 ;r2 As==10 90d6: b1 4f 30 00 mov @r15+, 48(r1) ;0x0030(r1) 90da: b1 4f 32 00 mov @r15+, 50(r1) ;0x0032(r1) 90de: 81 93 32 00 tst 50(r1) ;0x0032(r1) 90e2: 04 38 jl $+10 ;abs 0x90ec 90e4: f1 40 0a 00 mov.b #10, 52(r1) ;#0x000a, 0x0034(r1) 90e8: 34 00 90ea: 29 3f jmp $-428 ;abs 0x8f3e 90ec: b1 e3 30 00 xor #-1, 48(r1) ;r3 As==11, 0x0030(r1) 90f0: b1 e3 32 00 xor #-1, 50(r1) ;r3 As==11, 0x0032(r1) 90f4: 91 53 30 00 inc 48(r1) ;0x0030(r1) 90f8: 81 63 32 00 adc 50(r1) ;0x0032(r1) 90fc: f1 40 2d 00 mov.b #45, 42(r1) ;#0x002d, 0x002a(r1) 9100: 2a 00 9102: f0 3f jmp $-30 ;abs 0x90e4 9104: 0f 45 mov r5, r15 9106: 25 53 incd r5 9108: a1 4f 30 00 mov @r15, 48(r1) ;0x0030(r1) 910c: 91 41 30 00 mov 48(r1), 50(r1) ;0x0030(r1), 0x0032(r1) 9110: 32 00 9112: 91 51 32 00 rla 50(r1) ;0x0032(r1) 9116: 32 00 9118: 91 71 32 00 subc 50(r1), 50(r1) ;0x0032(r1), 0x0032(r1) 911c: 32 00 911e: b1 e3 32 00 xor #-1, 50(r1) ;r3 As==11, 0x0032(r1) 9122: dd 3f jmp $-68 ;abs 0x90de 9124: d1 d3 2e 00 bis.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 9128: d1 3f jmp $-92 ;abs 0x90cc 912a: 81 41 2c 00 mov r1, 44(r1) ;0x002c(r1) 912e: 0f 45 mov r5, r15 9130: 25 53 incd r5 9132: e1 4f 00 00 mov.b @r15, 0(r1) ;0x0000(r1) 9136: 73 3e jmp $-792 ;abs 0x8e1e 9138: e1 d2 2e 00 bis.b #4, 46(r1) ;r2 As==10, 0x002e(r1) 913c: 30 40 10 8d br #0x8d10 9140: f1 b0 10 00 bit.b #16, 46(r1) ;#0x0010, 0x002e(r1) 9144: 2e 00 9146: 02 24 jz $+6 ;abs 0x914c 9148: 30 40 10 8d br #0x8d10 914c: f1 d0 20 00 bis.b #32, 46(r1) ;#0x0020, 0x002e(r1) 9150: 2e 00 9152: 30 40 10 8d br #0x8d10 9156: 67 46 mov.b @r6, r7 9158: 16 53 inc r6 915a: 77 90 2a 00 cmp.b #42, r7 ;#0x002a 915e: 24 24 jz $+74 ;abs 0x91a8 9160: 0d 43 clr r13 9162: 4f 47 mov.b r7, r15 9164: 7f 50 d0 ff add.b #-48, r15 ;#0xffd0 9168: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 916c: 16 2c jc $+46 ;abs 0x919a 916e: 0f 4d mov r13, r15 9170: 0f 5f rla r15 9172: 0f 5f rla r15 9174: 0e 4d mov r13, r14 9176: 0e 5e rla r14 9178: 0d 4f mov r15, r13 917a: 0d 5e add r14, r13 917c: 0d 5e add r14, r13 917e: 0d 5e add r14, r13 9180: 4f 47 mov.b r7, r15 9182: 8f 11 sxt r15 9184: 0d 5f add r15, r13 9186: 3d 50 d0 ff add #-48, r13 ;#0xffd0 918a: 67 46 mov.b @r6, r7 918c: 16 53 inc r6 918e: 4f 47 mov.b r7, r15 9190: 7f 50 d0 ff add.b #-48, r15 ;#0xffd0 9194: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 9198: ea 2b jnc $-42 ;abs 0x916e 919a: 0f 4d mov r13, r15 919c: 3d 93 cmp #-1, r13 ;r3 As==11 919e: 01 34 jge $+4 ;abs 0x91a2 91a0: 3f 43 mov #-1, r15 ;r3 As==11 91a2: 4b 4f mov.b r15, r11 91a4: 30 40 14 8d br #0x8d14 91a8: 0f 45 mov r5, r15 91aa: 25 53 incd r5 91ac: 2d 4f mov @r15, r13 91ae: 0f 4d mov r13, r15 91b0: 3d 93 cmp #-1, r13 ;r3 As==11 91b2: 01 34 jge $+4 ;abs 0x91b6 91b4: 3f 43 mov #-1, r15 ;r3 As==11 91b6: 4b 4f mov.b r15, r11 91b8: 30 40 10 8d br #0x8d10 91bc: f1 40 2b 00 mov.b #43, 42(r1) ;#0x002b, 0x002a(r1) 91c0: 2a 00 91c2: 30 40 10 8d br #0x8d10 91c6: f1 d0 10 00 bis.b #16, 46(r1) ;#0x0010, 0x002e(r1) 91ca: 2e 00 91cc: f1 f0 df ff and.b #-33, 46(r1) ;#0xffdf, 0x002e(r1) 91d0: 2e 00 91d2: 30 40 10 8d br #0x8d10 91d6: 0f 45 mov r5, r15 91d8: 25 53 incd r5 91da: e1 4f 2f 00 mov.b @r15, 47(r1) ;0x002f(r1) 91de: c1 93 2f 00 tst.b 47(r1) ;0x002f(r1) 91e2: 02 38 jl $+6 ;abs 0x91e8 91e4: 30 40 10 8d br #0x8d10 91e8: f1 e3 2f 00 xor.b #-1, 47(r1) ;r3 As==11, 0x002f(r1) 91ec: d1 53 2f 00 inc.b 47(r1) ;0x002f(r1) 91f0: ea 3f jmp $-42 ;abs 0x91c6 91f2: f1 d2 2e 00 bis.b #8, 46(r1) ;r2 As==11, 0x002e(r1) 91f6: 30 40 10 8d br #0x8d10 91fa: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 91fe: 02 24 jz $+6 ;abs 0x9204 9200: 30 40 10 8d br #0x8d10 9204: f1 40 20 00 mov.b #32, 42(r1) ;#0x0020, 0x002a(r1) 9208: 2a 00 920a: 30 40 10 8d br #0x8d10 920e: d1 b3 2e 00 bit.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 9212: 08 24 jz $+18 ;abs 0x9224 9214: 0f 45 mov r5, r15 9216: 25 52 add #4, r5 ;r2 As==10 9218: b1 4f 30 00 mov @r15+, 48(r1) ;0x0030(r1) 921c: b1 4f 32 00 mov @r15+, 50(r1) ;0x0032(r1) 9220: 30 40 2e 8d br #0x8d2e 9224: 0f 45 mov r5, r15 9226: 25 53 incd r5 9228: a1 4f 30 00 mov @r15, 48(r1) ;0x0030(r1) 922c: 81 43 32 00 mov #0, 50(r1) ;r3 As==00, 0x0032(r1) 9230: 30 40 2e 8d br #0x8d2e 9234: 0e 4d mov r13, r14 9236: b0 12 42 8c call #0x8c42 923a: 0f 93 tst r15 923c: 02 38 jl $+6 ;abs 0x9242 923e: 30 40 f4 8c br #0x8cf4 9242: 1f 42 02 02 mov &0x0202,r15 9246: 31 50 3c 00 add #60, r1 ;#0x003c 924a: 34 41 pop r4 924c: 35 41 pop r5 924e: 36 41 pop r6 9250: 37 41 pop r7 9252: 38 41 pop r8 9254: 39 41 pop r9 9256: 3a 41 pop r10 9258: 3b 41 pop r11 925a: 30 41 ret 0000925c : 925c: 0d 4f mov r15, r13 925e: 0f 4e mov r14, r15 9260: 6e 4d mov.b @r13, r14 9262: 4e 9f cmp.b r15, r14 9264: 06 24 jz $+14 ;abs 0x9272 9266: 4e 93 tst.b r14 9268: 02 24 jz $+6 ;abs 0x926e 926a: 1d 53 inc r13 926c: f9 3f jmp $-12 ;abs 0x9260 926e: 0f 43 clr r15 9270: 30 41 ret 9272: 0f 4d mov r13, r15 9274: 30 41 ret 00009276 : 9276: 0b 12 push r11 9278: 0b 4f mov r15, r11 927a: 4c 4e mov.b r14, r12 927c: 0d 93 tst r13 927e: 07 24 jz $+16 ;abs 0x928e 9280: 0e 4b mov r11, r14 9282: 6f 4e mov.b @r14, r15 9284: 1e 53 inc r14 9286: 4f 9c cmp.b r12, r15 9288: 04 24 jz $+10 ;abs 0x9292 928a: 3d 53 add #-1, r13 ;r3 As==11 928c: fa 23 jnz $-10 ;abs 0x9282 928e: 0f 43 clr r15 9290: 02 3c jmp $+6 ;abs 0x9296 9292: 0f 4e mov r14, r15 9294: 3f 53 add #-1, r15 ;r3 As==11 9296: 3b 41 pop r11 9298: 30 41 ret 0000929a : 929a: 0b 12 push r11 929c: 0b 4d mov r13, r11 929e: 0d 93 tst r13 92a0: 0a 24 jz $+22 ;abs 0x92b6 92a2: 0c 4f mov r15, r12 92a4: 0d 4e mov r14, r13 92a6: 6e 4d mov.b @r13, r14 92a8: 1d 53 inc r13 92aa: 6f 4c mov.b @r12, r15 92ac: 1c 53 inc r12 92ae: 4f 9e cmp.b r14, r15 92b0: 04 20 jnz $+10 ;abs 0x92ba 92b2: 3b 53 add #-1, r11 ;r3 As==11 92b4: f8 23 jnz $-14 ;abs 0x92a6 92b6: 0c 43 clr r12 92b8: 05 3c jmp $+12 ;abs 0x92c4 92ba: 5c 4c ff ff mov.b -1(r12),r12 ;0xffff(r12) 92be: 5f 4d ff ff mov.b -1(r13),r15 ;0xffff(r13) 92c2: 0c 8f sub r15, r12 92c4: 0f 4c mov r12, r15 92c6: 3b 41 pop r11 92c8: 30 41 ret 000092ca : 92ca: 0b 12 push r11 92cc: 0a 12 push r10 92ce: 09 12 push r9 92d0: 08 12 push r8 92d2: 0b 4f mov r15, r11 92d4: 0a 4e mov r14, r10 92d6: 69 4e mov.b @r14, r9 92d8: 1a 53 inc r10 92da: 49 93 tst.b r9 92dc: 15 24 jz $+44 ;abs 0x9308 92de: 08 4a mov r10, r8 92e0: 18 83 dec r8 92e2: 18 53 inc r8 92e4: c8 93 00 00 tst.b 0(r8) ;0x0000(r8) 92e8: fc 23 jnz $-6 ;abs 0x92e2 92ea: 08 8a sub r10, r8 92ec: 6f 4b mov.b @r11, r15 92ee: 1b 53 inc r11 92f0: 4f 93 tst.b r15 92f2: 0c 24 jz $+26 ;abs 0x930c 92f4: 4f 99 cmp.b r9, r15 92f6: fa 23 jnz $-10 ;abs 0x92ec 92f8: 0d 48 mov r8, r13 92fa: 0e 4a mov r10, r14 92fc: 0f 4b mov r11, r15 92fe: b0 12 18 93 call #0x9318 9302: 0f 93 tst r15 9304: f3 23 jnz $-24 ;abs 0x92ec 9306: 3b 53 add #-1, r11 ;r3 As==11 9308: 0f 4b mov r11, r15 930a: 01 3c jmp $+4 ;abs 0x930e 930c: 0f 43 clr r15 930e: 38 41 pop r8 9310: 39 41 pop r9 9312: 3a 41 pop r10 9314: 3b 41 pop r11 9316: 30 41 ret 00009318 : 9318: 0b 12 push r11 931a: 0b 4f mov r15, r11 931c: 0d 93 tst r13 931e: 02 20 jnz $+6 ;abs 0x9324 9320: 0d 43 clr r13 9322: 0f 3c jmp $+32 ;abs 0x9342 9324: 6f 4e mov.b @r14, r15 9326: 1e 53 inc r14 9328: 6c 4b mov.b @r11, r12 932a: 4c 9f cmp.b r15, r12 932c: 06 20 jnz $+14 ;abs 0x933a 932e: 1b 53 inc r11 9330: 4c 93 tst.b r12 9332: f6 27 jz $-18 ;abs 0x9320 9334: 3d 53 add #-1, r13 ;r3 As==11 9336: f6 23 jnz $-18 ;abs 0x9324 9338: f3 3f jmp $-24 ;abs 0x9320 933a: 4d 4c mov.b r12, r13 933c: 5f 4e ff ff mov.b -1(r14),r15 ;0xffff(r14) 9340: 0d 8f sub r15, r13 9342: 0f 4d mov r13, r15 9344: 3b 41 pop r11 9346: 30 41 ret 00009348 <__mulhi3>: 9348: 0e 43 clr r14 934a: 0a 93 tst r10 934c: 07 24 jz $+16 ;abs 0x935c 934e: 12 c3 clrc 9350: 0c 10 rrc r12 9352: 01 28 jnc $+4 ;abs 0x9356 9354: 0e 5a add r10, r14 9356: 0a 5a rla r10 9358: 0c 93 tst r12 935a: f7 23 jnz $-16 ;abs 0x934a 935c: 30 41 ret 0000935e <__umulhisi3>: 935e: 30 40 8c 93 br #0x938c 00009362 <__udivmodsi4>: 9362: 0f ef xor r15, r15 9364: 0e ee xor r14, r14 9366: 39 40 21 00 mov #33, r9 ;#0x0021 936a: 0a 3c jmp $+22 ;abs 0x9380 936c: 08 10 rrc r8 936e: 0e 6e rlc r14 9370: 0f 6f rlc r15 9372: 0f 9b cmp r11, r15 9374: 05 28 jnc $+12 ;abs 0x9380 9376: 02 20 jnz $+6 ;abs 0x937c 9378: 0e 9a cmp r10, r14 937a: 02 28 jnc $+6 ;abs 0x9380 937c: 0e 8a sub r10, r14 937e: 0f 7b subc r11, r15 9380: 0c 6c rlc r12 9382: 0d 6d rlc r13 9384: 08 68 rlc r8 9386: 19 83 dec r9 9388: f1 23 jnz $-28 ;abs 0x936c 938a: 30 41 ret 0000938c <__mulsi3>: 938c: 0e 43 clr r14 938e: 0f 43 clr r15 9390: 08 3c jmp $+18 ;abs 0x93a2 9392: 12 c3 clrc 9394: 0d 10 rrc r13 9396: 0c 10 rrc r12 9398: 02 28 jnc $+6 ;abs 0x939e 939a: 0e 5a add r10, r14 939c: 0f 6b addc r11, r15 939e: 0a 5a rla r10 93a0: 0b 6b rlc r11 93a2: 0c 93 tst r12 93a4: f6 23 jnz $-18 ;abs 0x9392 93a6: 0d 93 tst r13 93a8: f4 23 jnz $-22 ;abs 0x9392 93aa: 30 41 ret 000093ac <__stop_progExec__>: 93ac: ff 3f jmp $+0 ;abs 0x93ac Disassembly of section .vectors: 0000ffe0 : ffe0: 30 80 30 80 30 80 36 80 30 80 90 80 30 80 7a 80 0.0.0.6.0...0.z. fff0: 56 80 30 80 30 80 30 80 30 80 30 80 30 80 00 80 V.0.0.0.0.0.0...