zstack.elf: file format elf32-msp430 SYMBOL TABLE: 00008000 l d .text 00000000 .text 000098ca l d .rodata 00000000 .rodata 00000200 l d .bss 00000000 .bss 00000210 l d .noinit 00000000 .noinit 0000ffe0 l d .vectors 00000000 .vectors 00000000 l d .debug_aranges 00000000 .debug_aranges 00000000 l d .debug_info 00000000 .debug_info 00000000 l d .debug_abbrev 00000000 .debug_abbrev 00000000 l d .debug_line 00000000 .debug_line 00000000 l d .debug_frame 00000000 .debug_frame 00000000 l d .debug_str 00000000 .debug_str 00000000 l d .debug_loc 00000000 .debug_loc 00000000 l d .debug_ranges 00000000 .debug_ranges 00000000 l df *ABS* 00000000 main.c 00008678 l .text 00000000 __br_unexpected_ 00000000 l df *ABS* 00000000 spi_hardware.c 00000000 l df *ABS* 00000000 strchr.c 00000000 l df *ABS* 00000000 memcmp.c 00000000 l df *ABS* 00000000 memset.c 00000000 l df *ABS* 00000000 strstr.c 00000000 l df *ABS* 00000000 atoi.c 00000000 l df *ABS* 00000000 sprintf.c 00008f04 l F .text 00000022 append 00000202 l O .bss 00000002 available_ 00000200 l O .bss 00000002 destination_ 00008f26 l F .text 0000003c call_vuprintf 00000000 l df *ABS* 00000000 vuprintf.c 00008fc0 l F .text 0000018a print_field 00000000 l df *ABS* 00000000 strncmp.c 00000057 g *ABS* 00000000 __BCSCTL1 00000174 g *ABS* 00000000 __TACCR1 00000000 g *ABS* 00000000 __data_size 00008678 w .text 00000000 __isr_14 00000128 g *ABS* 00000000 __FCTL1 00008c06 g F .text 0000005e CCXX_SPI_RDREG 00000024 g *ABS* 00000000 __P1IES 0000004b g *ABS* 00000000 __ADC10AE1 00000069 g *ABS* 00000000 __UCB0CTL1 00008f98 g F .text 00000016 vsprintf 00008678 w .text 00000000 __isr_4 00000002 g *ABS* 00000000 __IFG1 00000060 g *ABS* 00000000 __UCA0CTL0 000088ae g F .text 00000020 init_UART_SPI 00000204 g O .bss 00000002 now 0000012e g *ABS* 00000000 __TAIV 00008f7e g F .text 0000001a snprintf 00000000 g .vectors 00000000 _efartext 00008d26 g F .text 00000000 __udivhi3 00000001 g *ABS* 00000000 __IE2 0000002b g *ABS* 00000000 __P2IFG 0000001a g *ABS* 00000000 __P3DIR 00009ab6 g *ABS* 00000000 _etext 00000190 g *ABS* 00000000 __TBR 000010f8 g *ABS* 00000000 __CALDCO_16MHZ 0000001d g *ABS* 00000000 __P4OUT 0000885e g F .text 00000012 sample_adc 00000010 g *ABS* 00000000 __bss_size 000010fd g *ABS* 00000000 __CALBC1_8MHZ 00008000 w .text 00000000 __watchdog_support 00008672 w .text 00000000 __stop_progExec__ 0000002d g *ABS* 00000000 __P2IE 000087e2 g F .text 0000006a sys_init 00000192 g *ABS* 00000000 __TBCCR0 00008678 w .text 00000000 __isr_11 00000186 g *ABS* 00000000 __TBCCTL2 00008d48 g F .text 00000000 __udivsi3 00000025 g *ABS* 00000000 __P1IE 0000006b g *ABS* 00000000 __UCB0BR1 0000872a g F .text 0000008a tinit 00008fae g F .text 00000012 vsnprintf 00000049 g *ABS* 00000000 __ADC10DTC1 00000066 g *ABS* 00000000 __UCA0RXBUF 00000061 g *ABS* 00000000 __UCA0CTL1 0000988a g .text 00000000 __udivmoddi4 000086a0 g F .text 00000024 P2_VEC 00008bce g F .text 00000038 CCXX_SPI_STROBE 00000182 g *ABS* 00000000 __TBCCTL0 0000006d g *ABS* 00000000 __UCB0STAT 000086c4 g .text 00000000 __isr_5 00000063 g *ABS* 00000000 __UCA0BR1 0000985c g F .text 00000000 __umoddi3 00009ab6 g *ABS* 00000000 __data_load_start 00008678 g .text 00000000 __dtors_end 00000053 g *ABS* 00000000 __BCSCTL3 000001bc g *ABS* 00000000 __ADC10SA 00000166 g *ABS* 00000000 __TACCTL2 00008c64 g F .text 0000004e CCXX_SPI_WRREG 00009836 g F .text 00000000 __udivdi3 00000065 g *ABS* 00000000 __UCA0STAT 0000867c g .text 00000000 __isr_2 000088ce g F .text 0000019e CCXX_WRITE_SPI_RF_SETTINGS 00000160 g *ABS* 00000000 __TACTL 0000012c g *ABS* 00000000 __FCTL3 00008678 w .text 00000000 __isr_10 0000002e g *ABS* 00000000 __P2SEL 00000180 g *ABS* 00000000 __TBCTL 000010f9 g *ABS* 00000000 __CALBC1_16MHZ 000000c3 g *ABS* 00000000 __OA1CTL1 00000023 g *ABS* 00000000 __P1IFG 000010fb g *ABS* 00000000 __CALBC1_12MHZ 00008cb2 g F .text 00000074 CCXX_SPI_BURST_WRREG 00000206 g O .bss 00000001 RSSI_DBM 0000004a g *ABS* 00000000 __ADC10AE0 0000011a g *ABS* 00000000 __UCB0I2CSA 00000172 g *ABS* 00000000 __TACCR0 00000056 g *ABS* 00000000 __DCOCTL 00000003 g *ABS* 00000000 __IFG2 00000210 g O .noinit 00000002 __wdt_clear_value 0000001b g *ABS* 00000000 __P3SEL 0000870e g .text 00000000 __isr_7 0000ffe0 g O .vectors 00000020 __ivtbl_16 0000006c g *ABS* 00000000 __UCB0I2CIE 0000006a g *ABS* 00000000 __UCB0BR0 00008d7e g F .text 00000000 __umodsi3 00000028 g *ABS* 00000000 __P2IN 00000118 g *ABS* 00000000 __UCB0I2COA 00000184 g *ABS* 00000000 __TBCCTL1 000001b4 g *ABS* 00000000 __ADC10MEM 00008d40 g F .text 00000000 __umodhi3 00008678 w .text 00000000 __isr_0 00000207 g O .bss 00000001 RSSI 00000029 g *ABS* 00000000 __P2OUT 0000012a g *ABS* 00000000 __FCTL2 00000064 g *ABS* 00000000 __UCA0MCTL 00008028 w .text 00000000 __do_clear_bss 00000021 g *ABS* 00000000 __P1OUT 0000002c g *ABS* 00000000 __P2IES 00000026 g *ABS* 00000000 __P1SEL 00008e24 g F .text 00000056 strstr 000086d2 g F .text 0000003c TA1_VEC 0000888e g F .text 00000020 init_UART_232 000097b0 g F .text 00000028 strncmp 00008d48 g .text 00000000 __ext_udivmod32 00000027 g *ABS* 00000000 __P1REN 000000c0 g *ABS* 00000000 __OA0CTL0 000098c8 w .text 00000000 _unexpected_ 000086d2 g .text 00000000 __isr_8 000086a0 g .text 00000000 __isr_3 0000914a g F .text 00000666 vuprintf 00008d9a g F .text 00000020 memcmp 0000884c g F .text 00000012 init_adc 000010fc g *ABS* 00000000 __CALDCO_8MHZ 0000867c g F .text 00000024 P1_VEC 00008d26 g .text 00000000 __ext_udivmod16 00008000 w .text 00000000 _reset_vector__ 00008678 g .text 00000000 __ctors_start 000097d8 g .text 00000000 __xabi_udivmod64 00008678 w .text 00000000 __isr_12 000010fa g *ABS* 00000000 __CALDCO_12MHZ 00000018 g *ABS* 00000000 __P3IN 00008010 w .text 00000000 __do_copy_data 000086c4 g F .text 0000000e ADC_VEC 00000200 g .bss 00000000 __bss_start 00008dba g F .text 0000006a memset 0000803e g F .text 00000634 main 00000176 g *ABS* 00000000 __TACCR2 000000c2 g *ABS* 00000000 __OA1CTL0 00008678 w .text 00000000 __isr_13 00000170 g *ABS* 00000000 __TAR 0000001e g *ABS* 00000000 __P4DIR 00000162 g *ABS* 00000000 __TACCTL0 00010000 g .vectors 00000000 _vectors_end 0000002a g *ABS* 00000000 __P2DIR 000087b4 g F .text 0000002e delay 00000068 g *ABS* 00000000 __UCB0CTL0 00008b82 g F .text 0000004c TX_STRING 0000002f g *ABS* 00000000 __P2REN 00008f62 g F .text 0000001c sprintf 00000208 g O .bss 00000001 LQI 0000870e g F .text 0000001c RX_VEC 0000006e g *ABS* 00000000 __UCB0RXBUF 000001b0 g *ABS* 00000000 __ADC10CTL0 00008678 w .text 00000000 __isr_9 0000005e g *ABS* 00000000 __UCA0IRTCTL 00008a96 g F .text 000000ec RX_STRING 000010fe g *ABS* 00000000 __CALDCO_1MHZ 00000067 g *ABS* 00000000 __UCA0TXBUF 0000800c w .text 00000000 __init_stack 0000005d g *ABS* 00000000 __UCA0ABCTL 00000019 g *ABS* 00000000 __P3OUT 000000c1 g *ABS* 00000000 __OA0CTL1 00000209 g O .bss 00000001 PKTSTATUS 00008678 g .text 00000000 __dtors_start 00008678 w .text 00000000 __isr_6 00008678 g .text 00000000 __ctors_end 00000062 g *ABS* 00000000 __UCA0BR0 00000600 g *ABS* 00000000 __stack 00008678 w .text 00000000 __isr_1 00000200 g .rodata 00000000 _edata 00000212 g *ABS* 00000000 _end 00000194 g *ABS* 00000000 __TBCCR1 00000048 g *ABS* 00000000 __ADC10DTC0 0000011e g *ABS* 00000000 __TBIV 000001b2 g *ABS* 00000000 __ADC10CTL1 0000020a g O .bss 00000002 flags 00000058 g *ABS* 00000000 __BCSCTL2 00008672 w .text 00000000 _endless_loop__ 0000001f g *ABS* 00000000 __P4SEL 00000196 g *ABS* 00000000 __TBCCR2 00008e7a g F .text 0000008a atoi 00000022 g *ABS* 00000000 __P1DIR 0000020c g O .bss 00000002 future_time 00008a6c g F .text 0000002a RX_MODE 0000005f g *ABS* 00000000 __UCA0IRRCTL 00000010 g *ABS* 00000000 __P3REN 00000164 g *ABS* 00000000 __TACCTL1 0000006f g *ABS* 00000000 __UCB0TXBUF 000010ff g *ABS* 00000000 __CALBC1_1MHZ 00008010 w .text 00000000 __low_level_init 00008d88 g F .text 00000012 strchr 00000011 g *ABS* 00000000 __P4REN 00000200 g .rodata 00000000 __data_start 00000120 g *ABS* 00000000 __WDTCTL 00000000 g *ABS* 00000000 __IE1 00000020 g *ABS* 00000000 __P1IN 0000001c g *ABS* 00000000 __P4IN 0000020e g O .bss 00000001 status 0000020f g O .bss 00000001 rx_char 00008870 g F .text 0000001e TX232String Disassembly of section .text: 00008000 <__watchdog_support>: 8000: 55 42 20 01 mov.b &0x0120,r5 8004: 35 d0 08 5a bis #23048, r5 ;#0x5a08 8008: 82 45 10 02 mov r5, &0x0210 0000800c <__init_stack>: 800c: 31 40 00 06 mov #1536, r1 ;#0x0600 00008010 <__do_copy_data>: 8010: 3f 40 00 00 mov #0, r15 ;#0x0000 8014: 0f 93 tst r15 8016: 08 24 jz $+18 ;abs 0x8028 8018: 92 42 10 02 mov &0x0210,&0x0120 801c: 20 01 801e: 2f 83 decd r15 8020: 9f 4f b6 9a mov -25930(r15),512(r15);0x9ab6(r15), 0x0200(r15) 8024: 00 02 8026: f8 23 jnz $-14 ;abs 0x8018 00008028 <__do_clear_bss>: 8028: 3f 40 10 00 mov #16, r15 ;#0x0010 802c: 0f 93 tst r15 802e: 07 24 jz $+16 ;abs 0x803e 8030: 92 42 10 02 mov &0x0210,&0x0120 8034: 20 01 8036: 1f 83 dec r15 8038: cf 43 00 02 mov.b #0, 512(r15);r3 As==00, 0x0200(r15) 803c: f9 23 jnz $-12 ;abs 0x8030 0000803e
: /** Main function. */ int main(void) { 803e: 04 41 mov r1, r4 8040: 34 50 10 00 add #16, r4 ;#0x0010 8044: 31 50 bc ff add #-68, r1 ;#0xffbc volatile long traw,vraw; unsigned int step_interval=4; //programmable variables unsigned int frame_interval=125; //programmable variables sys_init(); //initialize system parameters 8048: b0 12 e2 87 call #0x87e2 IE2 |= UCA0RXIE; } void init_UART_SPI() { UCB0CTL1 = UCSWRST; 804c: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 8050: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 8054: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 8056: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 805a: 68 00 UCB0BR0 = 2; 805c: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 8060: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 8064: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 8068: 69 00 /**init the ADC10 */ void init_adc() { ADC10AE0 = ADC_IN; 806a: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 806e: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 8072: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8074: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 8078: b2 01 //init_UART_232(); //uncommect to enable RS232 init_UART_SPI(); //get the UART into SPI mode such that we can talk to the radio init_adc(); //turn on the ADC P1OUT ^= LED_GRN; 807a: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 delay(0xFFFF); //lil bit O delay 807e: 3f 43 mov #-1, r15 ;r3 As==11 8080: b0 12 b4 87 call #0x87b4 P1OUT ^= LED_GRN; 8084: e2 e3 21 00 xor.b #2, &0x0021 ;r3 As==10 memset(rxbuf, '\0', 64); //clear the buffer 8088: 3d 40 40 00 mov #64, r13 ;#0x0040 808c: 0e 43 clr r14 808e: 0f 44 mov r4, r15 8090: 3f 50 ac ff add #-84, r15 ;#0xffac 8094: b0 12 ba 8d call #0x8dba P3OUT &= ~CSn; //power on reset for radio, strobe CSn 8098: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 809c: 19 00 delay(0xFF); 809e: 3f 40 ff 00 mov #255, r15 ;#0x00ff 80a2: b0 12 b4 87 call #0x87b4 P3OUT |= CSn; 80a6: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 delay(0xFFFF); 80aa: 3f 43 mov #-1, r15 ;r3 As==11 80ac: b0 12 b4 87 call #0x87b4 CCXX_SPI_STROBE(CCxxx0_SRES); //reset chip 80b0: 7f 40 30 00 mov.b #48, r15 ;#0x0030 80b4: b0 12 ce 8b call #0x8bce CCXX_WRITE_SPI_RF_SETTINGS(); //init chip 80b8: b0 12 ce 88 call #0x88ce CCXX_SPI_STROBE(CCxxx0_SIDLE); //put into idle state 80bc: 7f 40 36 00 mov.b #54, r15 ;#0x0036 80c0: b0 12 ce 8b call #0x8bce do{ i = CCXX_SPI_RDREG(CCxxx0_MARCSTATE);//wait for IDLE 80c4: 7f 40 35 00 mov.b #53, r15 ;#0x0035 80c8: b0 12 06 8c call #0x8c06 }while(i != 1); //this loop won't finish if theres a problem with the chip 80cc: 5f 93 cmp.b #1, r15 ;r3 As==01 80ce: fa 23 jnz $-10 ;abs 0x80c4 //P1SEL |= bit4; P1OUT ^= LED_RED; 80d0: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 delay(0xFF); //lil bit O delay 80d4: 3f 40 ff 00 mov #255, r15 ;#0x00ff 80d8: b0 12 b4 87 call #0x87b4 P1OUT ^= LED_RED; 80dc: d2 e3 21 00 xor.b #1, &0x0021 ;r3 As==01 flags = 0; 80e0: 82 43 0a 02 mov #0, &0x020a ;r3 As==00 P2IFG = 0x00; 80e4: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { TACCTL0 = CCIE; // TACCR0 interrupt enabled 80e8: b2 40 10 00 mov #16, &0x0162 ;#0x0010 80ec: 62 01 TACTL = TASSEL_1; // ACLK, upmode 80ee: b2 40 00 01 mov #256, &0x0160 ;#0x0100 80f2: 60 01 TACTL &= ~TAIFG; //clear interrupt 80f4: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 80f8: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 80fa: b2 40 78 00 mov #120, &0x0172 ;#0x0078 80fe: 72 01 //TACCR0 = 12000; // ~1 second TAR = 0; 8100: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 8104: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 8108: 60 01 P1OUT ^= LED_RED; flags = 0; P2IFG = 0x00; tinit(10); //Generate interrupts every 10ms now = 0; 810a: 82 43 04 02 mov #0, &0x0204 ;r3 As==00 future_time = 0; 810e: 82 43 0c 02 mov #0, &0x020c ;r3 As==00 TX_STRING("GND:STK Startup", 15); 8112: 7e 40 0f 00 mov.b #15, r14 ;#0x000f 8116: 3f 40 ca 98 mov #-26422,r15 ;#0x98ca 811a: b0 12 82 8b call #0x8b82 P2IFG &= ~GDO0; //reset trashed interrupt state 811e: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 8122: 2b 00 P1IFG &= ~BUTTON; 8124: f2 f0 fb ff and.b #-5, &0x0023 ;#0xfffb 8128: 23 00 eint(); //enable interrupts 812a: 32 d2 eint RX_MODE(); //put radio into listen mode. 812c: b0 12 6c 8a call #0x8a6c int degC, volt; volatile long traw,vraw; unsigned int step_interval=4; //programmable variables unsigned int frame_interval=125; //programmable variables 8130: 38 40 7d 00 mov #125, r8 ;#0x007d unsigned int numsteps=0, dir=1, steps_per_frame=26, frames_per_stack=10, numframes=0; //26 per 10 microns int degC, volt; volatile long traw,vraw; unsigned int step_interval=4; //programmable variables 8134: 27 42 mov #4, r7 ;r2 As==10 int main(void) { unsigned int sample,length=0,i; unsigned char rxbuf[64]; unsigned char loop, shutterflag=0;//,step_index=0; unsigned int numsteps=0, dir=1, steps_per_frame=26, frames_per_stack=10, numframes=0; //26 per 10 microns 8136: 0b 43 clr r11 8138: 3a 40 0a 00 mov #10, r10 ;#0x000a 813c: b4 40 1a 00 mov #26, -18(r4) ;#0x001a, 0xffee(r4) 8140: ee ff 8142: 94 43 ec ff mov #1, -20(r4) ;r3 As==01, 0xffec(r4) 8146: 06 43 clr r6 */ int main(void) { unsigned int sample,length=0,i; unsigned char rxbuf[64]; unsigned char loop, shutterflag=0;//,step_index=0; 8148: 45 43 clr.b r5 RX_MODE(); //put radio into listen mode. while (1) //main loop, never ends... { loop = 0; if(flags & RXCHAR_RDY) 814a: b2 b2 0a 02 bit #8, &0x020a ;r2 As==11 814e: 12 20 jnz $+38 ;abs 0x8174 RX_MODE(); //put radio into listen mode. while (1) //main loop, never ends... { loop = 0; 8150: 4d 43 clr.b r13 flags &= ~RXCHAR_RDY; //do stuff here P1OUT &= ~LED_RED; eint(); } if(flags & BUTTON_PUSH) 8152: b2 b0 40 00 bit #64, &0x020a ;#0x0040 8156: 0a 02 8158: 1d 20 jnz $+60 ;abs 0x8194 P2OUT &= ~STEP_EN; future_time = now + frame_interval/2; //start in half of a second eint(); } if(flags & CONTROLLER_RDY) //Someone is sending us something 815a: a2 b3 0a 02 bit #2, &0x020a ;r3 As==10 815e: 33 20 jnz $+104 ;abs 0x81c6 //turn off LEDs P1OUT &= ~(LED_RED | LED_GRN); eint(); } if(flags & TIMER_UP) //Did the timer expire? report your findings! 8160: 92 b3 0a 02 bit #1, &0x020a ;r3 As==01 8164: 57 20 jnz $+176 ;abs 0x8214 } } } eint(); } if(loop == 0) 8166: 4d 93 tst.b r13 8168: f0 23 jnz $-30 ;abs 0x814a LPM3; //when we wake up it'll be because of an event 816a: 32 d0 d0 00 bis #208, r2 ;#0x00d0 RX_MODE(); //put radio into listen mode. while (1) //main loop, never ends... { loop = 0; if(flags & RXCHAR_RDY) 816e: b2 b2 0a 02 bit #8, &0x020a ;r2 As==11 8172: ee 27 jz $-34 ;abs 0x8150 { dint(); 8174: 32 c2 dint 8176: 03 43 nop P1OUT |= LED_RED; 8178: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 loop = 1; flags &= ~RXCHAR_RDY; 817c: b2 f0 f7 ff and #-9, &0x020a ;#0xfff7 8180: 0a 02 //do stuff here P1OUT &= ~LED_RED; 8182: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 8186: 21 00 eint(); 8188: 32 d2 eint if(flags & RXCHAR_RDY) { dint(); P1OUT |= LED_RED; loop = 1; 818a: 5d 43 mov.b #1, r13 ;r3 As==01 flags &= ~RXCHAR_RDY; //do stuff here P1OUT &= ~LED_RED; eint(); } if(flags & BUTTON_PUSH) 818c: b2 b0 40 00 bit #64, &0x020a ;#0x0040 8190: 0a 02 8192: e3 27 jz $-56 ;abs 0x815a { dint(); 8194: 32 c2 dint 8196: 03 43 nop flags &= ~BUTTON_PUSH; 8198: b2 f0 bf ff and #-65, &0x020a ;#0xffbf 819c: 0a 02 loop = 1; flags |= STACK; //set event flag to start stepping 819e: b2 d0 20 00 bis #32, &0x020a ;#0x0020 81a2: 0a 02 numframes = frames_per_stack; //enable stepper //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; 81a4: f2 f0 f7 ff and.b #-9, &0x0029 ;#0xfff7 81a8: 29 00 future_time = now + frame_interval/2; //start in half of a second 81aa: 1d 42 04 02 mov &0x0204,r13 81ae: 0f 48 mov r8, r15 81b0: 12 c3 clrc 81b2: 0f 10 rrc r15 81b4: 0f 5d add r13, r15 81b6: 82 4f 0c 02 mov r15, &0x020c eint(); 81ba: 32 d2 eint { dint(); flags &= ~BUTTON_PUSH; loop = 1; flags |= STACK; //set event flag to start stepping numframes = frames_per_stack; 81bc: 0b 4a mov r10, r11 } if(flags & BUTTON_PUSH) { dint(); flags &= ~BUTTON_PUSH; loop = 1; 81be: 5d 43 mov.b #1, r13 ;r3 As==01 P2OUT &= ~STEP_EN; future_time = now + frame_interval/2; //start in half of a second eint(); } if(flags & CONTROLLER_RDY) //Someone is sending us something 81c0: a2 b3 0a 02 bit #2, &0x020a ;r3 As==10 81c4: cd 27 jz $-100 ;abs 0x8160 { dint(); 81c6: 32 c2 dint 81c8: 03 43 nop loop = 1; P1OUT |= LED_RED; 81ca: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 flags &= ~CONTROLLER_RDY; 81ce: b2 f0 fd ff and #-3, &0x020a ;#0xfffd 81d2: 0a 02 memset(rxbuf, 0, 64); 81d4: 3d 40 40 00 mov #64, r13 ;#0x0040 81d8: 0e 43 clr r14 81da: 0f 44 mov r4, r15 81dc: 3f 50 ac ff add #-84, r15 ;#0xffac 81e0: b0 12 ba 8d call #0x8dba length = RX_STRING(rxbuf, 64); 81e4: 7e 40 40 00 mov.b #64, r14 ;#0x0040 81e8: 0f 44 mov r4, r15 81ea: 3f 50 ac ff add #-84, r15 ;#0xffac 81ee: b0 12 96 8a call #0x8a96 if(LQI & bit7) //CRC ok 81f2: 59 42 08 02 mov.b &0x0208,r9 81f6: 49 93 tst.b r9 81f8: 43 38 jl $+136 ;abs 0x8280 } } } P2IFG &= ~GDO0; //reset trashed interrupt state 81fa: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 81fe: 2b 00 RX_MODE(); //set the radio back to RX mode so we don't miss any packets 8200: b0 12 6c 8a call #0x8a6c //turn off LEDs P1OUT &= ~(LED_RED | LED_GRN); 8204: f2 f0 fc ff and.b #-4, &0x0021 ;#0xfffc 8208: 21 00 eint(); 820a: 32 d2 eint eint(); } if(flags & CONTROLLER_RDY) //Someone is sending us something { dint(); loop = 1; 820c: 5d 43 mov.b #1, r13 ;r3 As==01 //turn off LEDs P1OUT &= ~(LED_RED | LED_GRN); eint(); } if(flags & TIMER_UP) //Did the timer expire? report your findings! 820e: 92 b3 0a 02 bit #1, &0x020a ;r3 As==01 8212: a9 27 jz $-172 ;abs 0x8166 { dint(); 8214: 32 c2 dint 8216: 03 43 nop //P1OUT ^= LED_RED; loop = 1; flags &= ~TIMER_UP; 8218: b2 f0 fe ff and #-2, &0x020a ;#0xfffe 821c: 0a 02 if(((now % step_interval) == 0) && (flags & STEP)) 821e: 1f 42 04 02 mov &0x0204,r15 8222: 0e 47 mov r7, r14 8224: b0 12 40 8d call #0x8d40 8228: 0f 93 tst r15 822a: 04 20 jnz $+10 ;abs 0x8234 822c: b2 b0 10 00 bit #16, &0x020a ;#0x0010 8230: 0a 02 8232: 5e 20 jnz $+190 ;abs 0x82f0 shutterflag = 1; } } //P4OUT |= SHUTTER; if((now > future_time) && (flags & STACK) && !(flags & STEP)) //don't issue a new step if there is a step active 8234: 1f 42 04 02 mov &0x0204,r15 8238: 1d 42 0c 02 mov &0x020c,r13 823c: 0d 9f cmp r15, r13 823e: 1e 2c jc $+62 ;abs 0x827c 8240: b2 b0 20 00 bit #32, &0x020a ;#0x0020 8244: 0a 02 8246: 1a 24 jz $+54 ;abs 0x827c 8248: b2 b0 10 00 bit #16, &0x020a ;#0x0010 824c: 0a 02 824e: 16 20 jnz $+46 ;abs 0x827c { if(shutterflag == 1) 8250: 55 93 cmp.b #1, r5 ;r3 As==01 8252: bc 24 jz $+378 ;abs 0x83cc shutterflag = 0; } else { numsteps = steps_per_frame; numframes --; 8254: 3b 53 add #-1, r11 ;r3 As==11 P4OUT &= ~SHUTTER; 8256: f2 f0 df ff and.b #-33, &0x001d ;#0xffdf 825a: 1d 00 P1OUT &= ~LED_GRN; 825c: f2 f0 fd ff and.b #-3, &0x0021 ;#0xfffd 8260: 21 00 //P1OUT ^= LED_RED; if(numframes == 0) { flags &= ~STACK; //Stepping done -- clear timer and stop stepping 8262: 1f 42 0a 02 mov &0x020a,r15 numsteps = steps_per_frame; numframes --; P4OUT &= ~SHUTTER; P1OUT &= ~LED_GRN; //P1OUT ^= LED_RED; if(numframes == 0) 8266: 0b 93 tst r11 8268: 7f 20 jnz $+256 ;abs 0x8368 { flags &= ~STACK; //Stepping done -- clear timer and stop stepping 826a: 3f f0 df ff and #-33, r15 ;#0xffdf 826e: 82 4f 0a 02 mov r15, &0x020a //P2OUT |= (STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT |= STEP_EN; 8272: f2 d2 29 00 bis.b #8, &0x0029 ;r2 As==11 future_time = now + frame_interval/2; //start in half of a second shutterflag = 0; } else { numsteps = steps_per_frame; 8276: 16 44 ee ff mov -18(r4),r6 ;0xffee(r4) //P1OUT ^= LED_RED; if(numframes == 0) { flags &= ~STACK; //Stepping done -- clear timer and stop stepping //P2OUT |= (STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT |= STEP_EN; 827a: 45 43 clr.b r5 //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; } } } eint(); 827c: 32 d2 eint 827e: 65 3f jmp $-308 ;abs 0x814a memset(rxbuf, 0, 64); length = RX_STRING(rxbuf, 64); if(LQI & bit7) //CRC ok { P1OUT |= LED_GRN; 8280: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 if(!memcmp(CALLSIGN,rxbuf,3)) //packet addressed to us 8284: 3d 40 03 00 mov #3, r13 ;#0x0003 8288: 0e 44 mov r4, r14 828a: 3e 50 ac ff add #-84, r14 ;#0xffac 828e: 3f 40 da 98 mov #-26406,r15 ;#0x98da 8292: b0 12 9a 8d call #0x8d9a 8296: 0f 93 tst r15 8298: b0 23 jnz $-158 ;abs 0x81fa { if(strstr( rxbuf, "interval" ) != NULL) //its an interval query 829a: 3e 40 de 98 mov #-26402,r14 ;#0x98de 829e: 0f 44 mov r4, r15 82a0: 3f 50 ac ff add #-84, r15 ;#0xffac 82a4: b0 12 24 8e call #0x8e24 82a8: 0f 93 tst r15 82aa: 6b 24 jz $+216 ;abs 0x8382 { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 82ac: 3e 40 3d 00 mov #61, r14 ;#0x003d 82b0: 0f 44 mov r4, r15 82b2: 3f 50 ac ff add #-84, r15 ;#0xffac 82b6: b0 12 88 8d call #0x8d88 82ba: 1f 53 inc r15 82bc: b0 12 7a 8e call #0x8e7a 82c0: 09 4f mov r15, r9 if(length > 0) 82c2: 0f 93 tst r15 82c4: 3d 24 jz $+124 ;abs 0x8340 { step_interval = length; //length = sprintf(rxbuf,"\e[32mGND:%s Interval is now %d\e[30m",CALLSIGN,step_interval); length = sprintf(rxbuf,"GND:%s Interval is now %d",CALLSIGN,step_interval); 82c6: 0f 12 push r15 82c8: 30 12 da 98 push #-26406 ;#0x98da 82cc: 30 12 e7 98 push #-26393 ;#0x98e7 82d0: 3f 40 ac ff mov #-84, r15 ;#0xffac 82d4: 0f 54 add r4, r15 82d6: 0f 12 push r15 82d8: b0 12 62 8f call #0x8f62 82dc: 31 52 add #8, r1 ;r2 As==11 82de: 0e 4f mov r15, r14 82e0: 07 49 mov r9, r7 } else //length = sprintf(rxbuf,"\e[32mGND:%s Set for %d frames\e[30m",CALLSIGN,frames_per_stack); length = sprintf(rxbuf,"GND:%s Set for %d frames",CALLSIGN,frames_per_stack); TX_STRING(rxbuf,length); 82e2: 4e 4e mov.b r14, r14 82e4: 0f 44 mov r4, r15 82e6: 3f 50 ac ff add #-84, r15 ;#0xffac 82ea: b0 12 82 8b call #0x8b82 82ee: 85 3f jmp $-244 ;abs 0x81fa flags &= ~TIMER_UP; if(((now % step_interval) == 0) && (flags & STEP)) { numsteps --; 82f0: 36 53 add #-1, r6 ;r3 As==11 if(step_index > 3) step_index = 3; } */ P2OUT &= ~STEP_STEP; 82f2: f2 f0 fb ff and.b #-5, &0x0029 ;#0xfffb 82f6: 29 00 P1OUT &= ~LED_RED; 82f8: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 82fc: 21 00 delay(0x1); 82fe: 1f 43 mov #1, r15 ;r3 As==01 8300: b0 12 b4 87 call #0x87b4 //delay(0xFFFF); P2OUT |= STEP_STEP; 8304: e2 d2 29 00 bis.b #4, &0x0029 ;r2 As==10 P1OUT |= LED_RED; 8308: d2 d3 21 00 bis.b #1, &0x0021 ;r3 As==01 //delay(0xFFFF); delay(0x1); 830c: 1f 43 mov #1, r15 ;r3 As==01 830e: b0 12 b4 87 call #0x87b4 P2OUT &= ~STEP_STEP; 8312: f2 f0 fb ff and.b #-5, &0x0029 ;#0xfffb 8316: 29 00 P1OUT &= ~LED_RED; 8318: f2 f0 fe ff and.b #-2, &0x0021 ;#0xfffe 831c: 21 00 if(numsteps == 0) 831e: 06 93 tst r6 8320: 89 23 jnz $-236 ;abs 0x8234 { //P1OUT ^= LED_RED; flags &= ~STEP; //Stepping done -- clear timer and stop stepping 8322: b2 f0 ef ff and #-17, &0x020a ;#0xffef 8326: 0a 02 //P2OUT |= (STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT |= STEP_EN; 8328: f2 d2 29 00 bis.b #8, &0x0029 ;r2 As==11 //P4OUT |= SHUTTER; //no picture on last frame future_time = now + frame_interval/2; //small delay 832c: 1e 42 04 02 mov &0x0204,r14 8330: 0f 48 mov r8, r15 8332: 12 c3 clrc 8334: 0f 10 rrc r15 8336: 0f 5e add r14, r15 8338: 82 4f 0c 02 mov r15, &0x020c shutterflag = 1; 833c: 55 43 mov.b #1, r5 ;r3 As==01 833e: 7a 3f jmp $-266 ;abs 0x8234 //length = sprintf(rxbuf,"\e[32mGND:%s Interval is now %d\e[30m",CALLSIGN,step_interval); length = sprintf(rxbuf,"GND:%s Interval is now %d",CALLSIGN,step_interval); } else //length = sprintf(rxbuf,"\e[32mGND:%s Stepping every %d milliseconds\e[30m",CALLSIGN,step_interval*10); length = sprintf(rxbuf,"GND:%s Stepping every %d milliseconds",CALLSIGN,step_interval*10); 8340: 0e 47 mov r7, r14 8342: 0e 5e rla r14 8344: 0f 4e mov r14, r15 8346: 0f 5f rla r15 8348: 0f 5f rla r15 834a: 0f 5e add r14, r15 834c: 0f 12 push r15 834e: 30 12 da 98 push #-26406 ;#0x98da 8352: 30 12 01 99 push #-26367 ;#0x9901 //length = sprintf(rxbuf,"\e[32mGND:%s Num of frames is now %d\e[30m",CALLSIGN,frames_per_stack); length = sprintf(rxbuf,"GND:%s Num of frames is now %d",CALLSIGN,frames_per_stack); } else //length = sprintf(rxbuf,"\e[32mGND:%s Set for %d frames\e[30m",CALLSIGN,frames_per_stack); length = sprintf(rxbuf,"GND:%s Set for %d frames",CALLSIGN,frames_per_stack); 8356: 3f 40 ac ff mov #-84, r15 ;#0xffac 835a: 0f 54 add r4, r15 835c: 0f 12 push r15 835e: b0 12 62 8f call #0x8f62 8362: 31 52 add #8, r1 ;r2 As==11 8364: 0e 4f mov r15, r14 8366: bd 3f jmp $-132 ;abs 0x82e2 //P2OUT |= (STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT |= STEP_EN; } else { flags |= STEP; 8368: 3f d0 10 00 bis #16, r15 ;#0x0010 836c: 82 4f 0a 02 mov r15, &0x020a //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; 8370: f2 f0 f7 ff and.b #-9, &0x0029 ;#0xfff7 8374: 29 00 future_time = now + frame_interval/2; //start in half of a second shutterflag = 0; } else { numsteps = steps_per_frame; 8376: 16 44 ee ff mov -18(r4),r6 ;0xffee(r4) } else { flags |= STEP; //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; 837a: 45 43 clr.b r5 } } } eint(); 837c: 32 d2 eint 837e: 30 40 4a 81 br #0x814a //length = sprintf(rxbuf,"\e[32mGND:%s Stepping every %d milliseconds\e[30m",CALLSIGN,step_interval*10); length = sprintf(rxbuf,"GND:%s Stepping every %d milliseconds",CALLSIGN,step_interval*10); TX_STRING(rxbuf,length); } else if(strstr( rxbuf, "delay" ) != NULL) //its an interval query 8382: 3e 40 27 99 mov #-26329,r14 ;#0x9927 8386: 0f 44 mov r4, r15 8388: 3f 50 ac ff add #-84, r15 ;#0xffac 838c: b0 12 24 8e call #0x8e24 8390: 0f 93 tst r15 8392: 57 24 jz $+176 ;abs 0x8442 { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8394: 3e 40 3d 00 mov #61, r14 ;#0x003d 8398: 0f 44 mov r4, r15 839a: 3f 50 ac ff add #-84, r15 ;#0xffac 839e: b0 12 88 8d call #0x8d88 83a2: 1f 53 inc r15 83a4: b0 12 7a 8e call #0x8e7a 83a8: 09 4f mov r15, r9 if(length > 0) 83aa: 0f 93 tst r15 83ac: 3e 24 jz $+126 ;abs 0x842a { frame_interval = length; //length = sprintf(rxbuf,"\e[32mGND:%s Interframe delay is now %d\e[30m",CALLSIGN,frame_interval); length = sprintf(rxbuf,"GND:%s Interframe delay is now %d",CALLSIGN,frame_interval); 83ae: 0f 12 push r15 83b0: 30 12 da 98 push #-26406 ;#0x98da 83b4: 30 12 2d 99 push #-26323 ;#0x992d 83b8: 3f 40 ac ff mov #-84, r15 ;#0xffac 83bc: 0f 54 add r4, r15 83be: 0f 12 push r15 83c0: b0 12 62 8f call #0x8f62 83c4: 31 52 add #8, r1 ;r2 As==11 83c6: 0e 4f mov r15, r14 83c8: 08 49 mov r9, r8 83ca: 8b 3f jmp $-232 ;abs 0x82e2 { if(shutterflag == 1) { P4OUT |= SHUTTER; 83cc: f2 d0 20 00 bis.b #32, &0x001d ;#0x0020 83d0: 1d 00 P1OUT |= LED_GRN; 83d2: e2 d3 21 00 bis.b #2, &0x0021 ;r3 As==10 if(dir == 1) 83d6: 94 93 ec ff cmp #1, -20(r4) ;r3 As==01, 0xffec(r4) 83da: 58 24 jz $+178 ;abs 0x848c //length = sprintf(rxbuf,"\e[34mGND:%s Frame %d out of %d CCW\e[30m",CALLSIGN,frames_per_stack-numframes,frames_per_stack); length = sprintf(rxbuf,"GND:%s Frame %d out of %d CCW",CALLSIGN,frames_per_stack-numframes,frames_per_stack); else //length = sprintf(rxbuf,"\e[34mGND:%s Frame %d out of %d CW\e[30m",CALLSIGN,frames_per_stack-numframes,frames_per_stack); length = sprintf(rxbuf,"GND:%s Frame %d out of %d CW",CALLSIGN,frames_per_stack-numframes,frames_per_stack); 83dc: 0a 12 push r10 83de: 0f 4a mov r10, r15 83e0: 0f 8b sub r11, r15 83e2: 0f 12 push r15 83e4: 30 12 da 98 push #-26406 ;#0x98da 83e8: 30 12 92 9a push #-25966 ;#0x9a92 83ec: 3f 40 ac ff mov #-84, r15 ;#0xffac 83f0: 0f 54 add r4, r15 83f2: 0f 12 push r15 83f4: b0 12 62 8f call #0x8f62 83f8: 31 50 0a 00 add #10, r1 ;#0x000a TX_STRING(rxbuf, length); 83fc: 4e 4f mov.b r15, r14 83fe: 0f 44 mov r4, r15 8400: 3f 50 ac ff add #-84, r15 ;#0xffac 8404: b0 12 82 8b call #0x8b82 P2IFG &= ~GDO0; //reset trashed interrupt state 8408: f2 f0 bf ff and.b #-65, &0x002b ;#0xffbf 840c: 2b 00 RX_MODE(); //set the radio back to RX mode so we don't miss any packets 840e: b0 12 6c 8a call #0x8a6c future_time = now + frame_interval/2; //start in half of a second 8412: 1e 42 04 02 mov &0x0204,r14 8416: 0f 48 mov r8, r15 8418: 12 c3 clrc 841a: 0f 10 rrc r15 841c: 0f 5e add r14, r15 841e: 82 4f 0c 02 mov r15, &0x020c shutterflag = 0; 8422: 45 43 clr.b r5 //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; } } } eint(); 8424: 32 d2 eint 8426: 30 40 4a 81 br #0x814a //length = sprintf(rxbuf,"\e[32mGND:%s Interframe delay is now %d\e[30m",CALLSIGN,frame_interval); length = sprintf(rxbuf,"GND:%s Interframe delay is now %d",CALLSIGN,frame_interval); } else //length = sprintf(rxbuf,"\e[32mGND:%s Frame delay every %d milliseconds\e[30m",CALLSIGN,frame_interval*10); length = sprintf(rxbuf,"GND:%s Frame delay every %d milliseconds",CALLSIGN,frame_interval*10); 842a: 0e 48 mov r8, r14 842c: 0e 5e rla r14 842e: 0f 4e mov r14, r15 8430: 0f 5f rla r15 8432: 0f 5f rla r15 8434: 0f 5e add r14, r15 8436: 0f 12 push r15 8438: 30 12 da 98 push #-26406 ;#0x98da 843c: 30 12 4f 99 push #-26289 ;#0x994f 8440: 8a 3f jmp $-234 ;abs 0x8356 TX_STRING(rxbuf,length); } else if(strstr( rxbuf, "frames" ) != NULL) //its an interval query 8442: 3e 40 78 99 mov #-26248,r14 ;#0x9978 8446: 0f 44 mov r4, r15 8448: 3f 50 ac ff add #-84, r15 ;#0xffac 844c: b0 12 24 8e call #0x8e24 8450: 0f 93 tst r15 8452: 2b 24 jz $+88 ;abs 0x84aa { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 8454: 3e 40 3d 00 mov #61, r14 ;#0x003d 8458: 0f 44 mov r4, r15 845a: 3f 50 ac ff add #-84, r15 ;#0xffac 845e: b0 12 88 8d call #0x8d88 8462: 1f 53 inc r15 8464: b0 12 7a 8e call #0x8e7a 8468: 09 4f mov r15, r9 if(length > 0) 846a: 0f 93 tst r15 846c: 18 24 jz $+50 ;abs 0x849e { frames_per_stack = length; //length = sprintf(rxbuf,"\e[32mGND:%s Num of frames is now %d\e[30m",CALLSIGN,frames_per_stack); length = sprintf(rxbuf,"GND:%s Num of frames is now %d",CALLSIGN,frames_per_stack); 846e: 0f 12 push r15 8470: 30 12 da 98 push #-26406 ;#0x98da 8474: 30 12 7f 99 push #-26241 ;#0x997f 8478: 3f 40 ac ff mov #-84, r15 ;#0xffac 847c: 0f 54 add r4, r15 847e: 0f 12 push r15 8480: b0 12 62 8f call #0x8f62 8484: 31 52 add #8, r1 ;r2 As==11 8486: 0e 4f mov r15, r14 8488: 0a 49 mov r9, r10 848a: 2b 3f jmp $-424 ;abs 0x82e2 P4OUT |= SHUTTER; P1OUT |= LED_GRN; if(dir == 1) //length = sprintf(rxbuf,"\e[34mGND:%s Frame %d out of %d CCW\e[30m",CALLSIGN,frames_per_stack-numframes,frames_per_stack); length = sprintf(rxbuf,"GND:%s Frame %d out of %d CCW",CALLSIGN,frames_per_stack-numframes,frames_per_stack); 848c: 0a 12 push r10 848e: 0f 4a mov r10, r15 8490: 0f 8b sub r11, r15 8492: 0f 12 push r15 8494: 30 12 da 98 push #-26406 ;#0x98da 8498: 30 12 74 9a push #-25996 ;#0x9a74 849c: a7 3f jmp $-176 ;abs 0x83ec //length = sprintf(rxbuf,"\e[32mGND:%s Num of frames is now %d\e[30m",CALLSIGN,frames_per_stack); length = sprintf(rxbuf,"GND:%s Num of frames is now %d",CALLSIGN,frames_per_stack); } else //length = sprintf(rxbuf,"\e[32mGND:%s Set for %d frames\e[30m",CALLSIGN,frames_per_stack); length = sprintf(rxbuf,"GND:%s Set for %d frames",CALLSIGN,frames_per_stack); 849e: 0a 12 push r10 84a0: 30 12 da 98 push #-26406 ;#0x98da 84a4: 30 12 9e 99 push #-26210 ;#0x999e 84a8: 56 3f jmp $-338 ;abs 0x8356 TX_STRING(rxbuf,length); } else if(strstr( rxbuf, "steps" ) != NULL) //its an interval query 84aa: 3e 40 b7 99 mov #-26185,r14 ;#0x99b7 84ae: 0f 44 mov r4, r15 84b0: 3f 50 ac ff add #-84, r15 ;#0xffac 84b4: b0 12 24 8e call #0x8e24 84b8: 0f 93 tst r15 84ba: 31 24 jz $+100 ;abs 0x851e { length = atoi(strchr(rxbuf, '=' )+1); //The new interval should follow the equals sign 84bc: 3e 40 3d 00 mov #61, r14 ;#0x003d 84c0: 0f 44 mov r4, r15 84c2: 3f 50 ac ff add #-84, r15 ;#0xffac 84c6: b0 12 88 8d call #0x8d88 84ca: 1f 53 inc r15 84cc: b0 12 7a 8e call #0x8e7a 84d0: 09 4f mov r15, r9 if(length > 0) 84d2: 0f 93 tst r15 84d4: 16 24 jz $+46 ;abs 0x8502 { steps_per_frame = length; //length = sprintf(rxbuf,"\e[32mGND:%s Steps per frame is now %d\e[30m",CALLSIGN,steps_per_frame); length = sprintf(rxbuf,"GND:%s Steps per frame is now %d",CALLSIGN,steps_per_frame); 84d6: 0f 12 push r15 84d8: 30 12 da 98 push #-26406 ;#0x98da 84dc: 30 12 bd 99 push #-26179 ;#0x99bd 84e0: 3f 40 ac ff mov #-84, r15 ;#0xffac 84e4: 0f 54 add r4, r15 84e6: 0f 12 push r15 84e8: b0 12 62 8f call #0x8f62 84ec: 31 52 add #8, r1 ;r2 As==11 84ee: 84 49 ee ff mov r9, -18(r4) ;0xffee(r4) else //command not recognized, give a pong to ack reception { //length = sprintf(rxbuf,"\e[34mGND:%s Pong!\e[30m",CALLSIGN); length = sprintf(rxbuf,"GND:%s Pong!",CALLSIGN); TX_STRING(rxbuf, length); 84f2: 4e 4f mov.b r15, r14 84f4: 0f 44 mov r4, r15 84f6: 3f 50 ac ff add #-84, r15 ;#0xffac 84fa: b0 12 82 8b call #0x8b82 84fe: 30 40 fa 81 br #0x81fa //length = sprintf(rxbuf,"\e[32mGND:%s Steps per frame is now %d\e[30m",CALLSIGN,steps_per_frame); length = sprintf(rxbuf,"GND:%s Steps per frame is now %d",CALLSIGN,steps_per_frame); } else //length = sprintf(rxbuf,"\e[32mGND:%s Set for %d steps per frame\e[30m",CALLSIGN,steps_per_frame); length = sprintf(rxbuf,"GND:%s Set for %d steps per frame",CALLSIGN,steps_per_frame); 8502: 14 12 ee ff push -18(r4) ;0xffee(r4) 8506: 30 12 da 98 push #-26406 ;#0x98da 850a: 30 12 de 99 push #-26146 ;#0x99de 850e: 3f 40 ac ff mov #-84, r15 ;#0xffac 8512: 0f 54 add r4, r15 8514: 0f 12 push r15 8516: b0 12 62 8f call #0x8f62 851a: 31 52 add #8, r1 ;r2 As==11 851c: ea 3f jmp $-42 ;abs 0x84f2 TX_STRING(rxbuf,length); } else if(strstr( rxbuf, "status" ) != NULL) //its a status inquiery 851e: 3e 40 00 9a mov #-26112,r14 ;#0x9a00 8522: 0f 44 mov r4, r15 8524: 3f 50 ac ff add #-84, r15 ;#0xffac 8528: b0 12 24 8e call #0x8e24 852c: 0f 93 tst r15 852e: 1a 24 jz $+54 ;abs 0x8564 { length = sprintf(rxbuf,"GND:%s RSSI:%ddBm LQI:%d", CALLSIGN, RSSI_DBM, LQI); 8530: 49 49 mov.b r9, r9 8532: 09 12 push r9 8534: 5f 42 06 02 mov.b &0x0206,r15 8538: 8f 11 sxt r15 853a: 0f 12 push r15 853c: 30 12 da 98 push #-26406 ;#0x98da 8540: 30 12 07 9a push #-26105 ;#0x9a07 8544: 3f 40 ac ff mov #-84, r15 ;#0xffac 8548: 0f 54 add r4, r15 854a: 0f 12 push r15 854c: b0 12 62 8f call #0x8f62 8550: 31 50 0a 00 add #10, r1 ;#0x000a TX_STRING(rxbuf,length); 8554: 4e 4f mov.b r15, r14 8556: 0f 44 mov r4, r15 8558: 3f 50 ac ff add #-84, r15 ;#0xffac 855c: b0 12 82 8b call #0x8b82 8560: 30 40 fa 81 br #0x81fa } else if(strstr( rxbuf, "reverse" ) != NULL) //report now 8564: 3e 40 20 9a mov #-26080,r14 ;#0x9a20 8568: 0f 44 mov r4, r15 856a: 3f 50 ac ff add #-84, r15 ;#0xffac 856e: b0 12 24 8e call #0x8e24 8572: 0f 93 tst r15 8574: 1b 24 jz $+56 ;abs 0x85ac { if(dir == 0) 8576: 84 93 ec ff tst -20(r4) ;0xffec(r4) 857a: 2b 20 jnz $+88 ;abs 0x85d2 { dir = 1; P2OUT |= STEP_DIR; 857c: e2 d3 29 00 bis.b #2, &0x0029 ;r3 As==10 length = sprintf(rxbuf,"GND:%s direction is CCW", CALLSIGN); 8580: 30 12 da 98 push #-26406 ;#0x98da 8584: 30 12 28 9a push #-26072 ;#0x9a28 8588: 3f 40 ac ff mov #-84, r15 ;#0xffac 858c: 0f 54 add r4, r15 858e: 0f 12 push r15 8590: b0 12 62 8f call #0x8f62 8594: 31 50 06 00 add #6, r1 ;#0x0006 TX_STRING(rxbuf,length); 8598: 4e 4f mov.b r15, r14 859a: 0f 44 mov r4, r15 859c: 3f 50 ac ff add #-84, r15 ;#0xffac 85a0: b0 12 82 8b call #0x8b82 } else if(strstr( rxbuf, "reverse" ) != NULL) //report now { if(dir == 0) { dir = 1; 85a4: 94 43 ec ff mov #1, -20(r4) ;r3 As==01, 0xffec(r4) 85a8: 30 40 fa 81 br #0x81fa P2OUT &= ~STEP_DIR; length = sprintf(rxbuf,"GND:%s direction is CW", CALLSIGN); TX_STRING(rxbuf,length); } } else if(strstr( rxbuf, "step" ) != NULL) //report now 85ac: 3e 40 57 9a mov #-26025,r14 ;#0x9a57 85b0: 0f 44 mov r4, r15 85b2: 3f 50 ac ff add #-84, r15 ;#0xffac 85b6: b0 12 24 8e call #0x8e24 85ba: 0f 93 tst r15 85bc: 23 24 jz $+72 ;abs 0x8604 { flags |= STEP; ///set event flag to start stepping 85be: b2 d0 10 00 bis #16, &0x020a ;#0x0010 85c2: 0a 02 numsteps = steps_per_frame; //enable stepper //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; 85c4: f2 f0 f7 ff and.b #-9, &0x0029 ;#0xfff7 85c8: 29 00 } } else if(strstr( rxbuf, "step" ) != NULL) //report now { flags |= STEP; ///set event flag to start stepping numsteps = steps_per_frame; 85ca: 16 44 ee ff mov -18(r4),r6 ;0xffee(r4) 85ce: 30 40 fa 81 br #0x81fa TX_STRING(rxbuf,length); } else { dir = 0; P2OUT &= ~STEP_DIR; 85d2: f2 f0 fd ff and.b #-3, &0x0029 ;#0xfffd 85d6: 29 00 length = sprintf(rxbuf,"GND:%s direction is CW", CALLSIGN); 85d8: 30 12 da 98 push #-26406 ;#0x98da 85dc: 30 12 40 9a push #-26048 ;#0x9a40 85e0: 3f 40 ac ff mov #-84, r15 ;#0xffac 85e4: 0f 54 add r4, r15 85e6: 0f 12 push r15 85e8: b0 12 62 8f call #0x8f62 85ec: 31 50 06 00 add #6, r1 ;#0x0006 TX_STRING(rxbuf,length); 85f0: 4e 4f mov.b r15, r14 85f2: 0f 44 mov r4, r15 85f4: 3f 50 ac ff add #-84, r15 ;#0xffac 85f8: b0 12 82 8b call #0x8b82 length = sprintf(rxbuf,"GND:%s direction is CCW", CALLSIGN); TX_STRING(rxbuf,length); } else { dir = 0; 85fc: 84 43 ec ff mov #0, -20(r4) ;r3 As==00, 0xffec(r4) 8600: 30 40 fa 81 br #0x81fa //enable stepper //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; //P2OUT |= STEP_STEP; } else if(strstr( rxbuf, "stack" ) != NULL) //report now 8604: 3e 40 5c 9a mov #-26020,r14 ;#0x9a5c 8608: 0f 44 mov r4, r15 860a: 3f 50 ac ff add #-84, r15 ;#0xffac 860e: b0 12 24 8e call #0x8e24 8612: 0f 93 tst r15 8614: 11 24 jz $+36 ;abs 0x8638 { flags |= STACK; ///set event flag to start stepping 8616: b2 d0 20 00 bis #32, &0x020a ;#0x0020 861a: 0a 02 numframes = frames_per_stack; //enable stepper //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; 861c: f2 f0 f7 ff and.b #-9, &0x0029 ;#0xfff7 8620: 29 00 future_time = now + frame_interval/2; //start in half of a second 8622: 1e 42 04 02 mov &0x0204,r14 8626: 0f 48 mov r8, r15 8628: 12 c3 clrc 862a: 0f 10 rrc r15 862c: 0f 5e add r14, r15 862e: 82 4f 0c 02 mov r15, &0x020c //P2OUT |= STEP_STEP; } else if(strstr( rxbuf, "stack" ) != NULL) //report now { flags |= STACK; ///set event flag to start stepping numframes = frames_per_stack; 8632: 0b 4a mov r10, r11 8634: 30 40 fa 81 br #0x81fa //P2OUT &= ~(STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT &= ~STEP_EN; future_time = now + frame_interval/2; //start in half of a second } else if(strstr( rxbuf, "stop" ) != NULL) //report now 8638: 3e 40 62 9a mov #-26014,r14 ;#0x9a62 863c: 0f 44 mov r4, r15 863e: 3f 50 ac ff add #-84, r15 ;#0xffac 8642: b0 12 24 8e call #0x8e24 8646: 0f 93 tst r15 8648: 07 24 jz $+16 ;abs 0x8658 { flags &= ~(STEP|STACK); ///set event flag to start stepping 864a: b2 f0 cf ff and #-49, &0x020a ;#0xffcf 864e: 0a 02 //enable stepper //P2OUT |= (STEP_I00 | STEP_I01 | STEP_I10 | STEP_I11); P2OUT |= STEP_EN; 8650: f2 d2 29 00 bis.b #8, &0x0029 ;r2 As==11 8654: 30 40 fa 81 br #0x81fa else //command not recognized, give a pong to ack reception { //length = sprintf(rxbuf,"\e[34mGND:%s Pong!\e[30m",CALLSIGN); length = sprintf(rxbuf,"GND:%s Pong!",CALLSIGN); 8658: 30 12 da 98 push #-26406 ;#0x98da 865c: 30 12 67 9a push #-26009 ;#0x9a67 8660: 3f 40 ac ff mov #-84, r15 ;#0xffac 8664: 0f 54 add r4, r15 8666: 0f 12 push r15 8668: b0 12 62 8f call #0x8f62 866c: 31 50 06 00 add #6, r1 ;#0x0006 8670: 40 3f jmp $-382 ;abs 0x84f2 00008672 <__stop_progExec__>: 8672: 32 d0 f0 00 bis #240, r2 ;#0x00f0 8676: fd 3f jmp $-4 ;abs 0x8672 00008678 <__ctors_end>: 8678: 30 40 c8 98 br #0x98c8 0000867c : /*__attribute__((interrupt(TIMERA0_VECTOR))) void Timer_A(void){ //code goes here }*/ // Port 1 interripts : A button has been pushed interrupt(PORT1_VECTOR) P1_VEC(void) { 867c: 0f 12 push r15 dint(); //no nesting! 867e: 32 c2 dint 8680: 03 43 nop if((P1IFG & BUTTON) == BUTTON) 8682: 5f 42 23 00 mov.b &0x0023,r15 8686: 2f f2 and #4, r15 ;r2 As==10 8688: 06 24 jz $+14 ;abs 0x8696 { flags |= BUTTON_PUSH; 868a: b2 d0 40 00 bis #64, &0x020a ;#0x0040 868e: 0a 02 LPM3_EXIT; 8690: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8694: 02 00 //P1OUT ^= LED_RED; //do button push stuff! } P1IFG=0x00; 8696: c2 43 23 00 mov.b #0, &0x0023 ;r3 As==00 eint(); 869a: 32 d2 eint } 869c: 3f 41 pop r15 869e: 00 13 reti 000086a0 : This interrupt is caused by external pin events on handshake lines */ // Port 2 interripts : the allspice controller is talking to us interrupt (PORT2_VECTOR) P2_VEC(void) { 86a0: 0f 12 push r15 dint(); //no nesting! 86a2: 32 c2 dint 86a4: 03 43 nop if((P2IFG & GDO0) == GDO0) 86a6: 5f 42 2b 00 mov.b &0x002b,r15 86aa: 3f f0 40 00 and #64, r15 ;#0x0040 86ae: 05 24 jz $+12 ;abs 0x86ba { flags |= CONTROLLER_RDY; 86b0: a2 d3 0a 02 bis #2, &0x020a ;r3 As==10 LPM3_EXIT; 86b4: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 86b8: 02 00 //We need to grab that byte! } P2IFG=0x00; 86ba: c2 43 2b 00 mov.b #0, &0x002b ;r3 As==00 eint(); 86be: 32 d2 eint } 86c0: 3f 41 pop r15 86c2: 00 13 reti 000086c4 : */ // Port 2 interripts : the allspice controller is talking to us interrupt (ADC10_VECTOR) ADC_VEC(void) { dint(); //no nesting! 86c4: 32 c2 dint 86c6: 03 43 nop LPM3_EXIT; 86c8: b1 c0 d0 00 bic #208, 0(r1) ;#0x00d0, 0x0000(r1) 86cc: 00 00 eint(); 86ce: 32 d2 eint } 86d0: 00 13 reti 000086d2 : /** This is called once every overflow */ interrupt (TIMERA1_VECTOR) TA1_VEC(void) { 86d2: 0f 12 push r15 dint(); //no nesting! 86d4: 32 c2 dint 86d6: 03 43 nop if(TAIV == 0x0A) //reading this bit will clear the interrupt flags 86d8: 1f 42 2e 01 mov &0x012e,r15 86dc: 3f 90 0a 00 cmp #10, r15 ;#0x000a 86e0: 03 24 jz $+8 ;abs 0x86e8 if(now == 0) future_time = 0; TACTL &= ~TAIFG; //clear the flag LPM3_EXIT; } eint(); 86e2: 32 d2 eint } 86e4: 3f 41 pop r15 86e6: 00 13 reti dint(); //no nesting! if(TAIV == 0x0A) //reading this bit will clear the interrupt flags { //P1OUT ^= LED_RED; flags |= TIMER_UP; 86e8: 92 d3 0a 02 bis #1, &0x020a ;r3 As==01 now++; 86ec: 92 53 04 02 inc &0x0204 if(now == 0) 86f0: 1f 42 04 02 mov &0x0204,r15 86f4: 0f 93 tst r15 86f6: 02 20 jnz $+6 ;abs 0x86fc future_time = 0; 86f8: 82 43 0c 02 mov #0, &0x020c ;r3 As==00 TACTL &= ~TAIFG; //clear the flag 86fc: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 8700: 60 01 LPM3_EXIT; 8702: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8706: 02 00 } eint(); 8708: 32 d2 eint } 870a: 3f 41 pop r15 870c: 00 13 reti 0000870e : /** This is called once for every RS232 character that comes in */ interrupt (USCIAB0RX_VECTOR) RX_VEC(void) { 870e: 0f 12 push r15 dint(); //no nesting! 8710: 32 c2 dint 8712: 03 43 nop rx_char = UCA0RXBUF; 8714: d2 42 66 00 mov.b &0x0066,&0x020f 8718: 0f 02 flags |= RXCHAR_RDY; 871a: b2 d2 0a 02 bis #8, &0x020a ;r2 As==11 LPM3_EXIT; 871e: b1 c0 d0 00 bic #208, 2(r1) ;#0x00d0, 0x0002(r1) 8722: 02 00 eint(); 8724: 32 d2 eint } 8726: 3f 41 pop r15 8728: 00 13 reti 0000872a : /** Setup the timer to generate an interrupt at an interval of milliseconds */ void tinit(unsigned int milliseconds) { 872a: 0b 12 push r11 872c: 0a 12 push r10 TACCTL0 = CCIE; // TACCR0 interrupt enabled 872e: b2 40 10 00 mov #16, &0x0162 ;#0x0010 8732: 62 01 TACTL = TASSEL_1; // ACLK, upmode 8734: b2 40 00 01 mov #256, &0x0160 ;#0x0100 8738: 60 01 TACTL &= ~TAIFG; //clear interrupt 873a: b2 f0 fe ff and #-2, &0x0160 ;#0xfffe 873e: 60 01 TACCR0 = (milliseconds * (unsigned long)12000)/1000; //one second intervals 8740: 0c 43 clr r12 8742: 0e 4f mov r15, r14 8744: 0f 4c mov r12, r15 8746: 0e 5e rla r14 8748: 0f 6f rlc r15 874a: 0e 5e rla r14 874c: 0f 6f rlc r15 874e: 0e 5e rla r14 8750: 0f 6f rlc r15 8752: 0e 5e rla r14 8754: 0f 6f rlc r15 8756: 0e 5e rla r14 8758: 0f 6f rlc r15 875a: 0c 4e mov r14, r12 875c: 0d 4f mov r15, r13 875e: 0c 5c rla r12 8760: 0d 6d rlc r13 8762: 0c 5c rla r12 8764: 0d 6d rlc r13 8766: 0e 5c add r12, r14 8768: 0f 6d addc r13, r15 876a: 0c 4e mov r14, r12 876c: 0d 4f mov r15, r13 876e: 0c 5c rla r12 8770: 0d 6d rlc r13 8772: 0c 5c rla r12 8774: 0d 6d rlc r13 8776: 0a 4e mov r14, r10 8778: 0b 4f mov r15, r11 877a: 0a 5c add r12, r10 877c: 0b 6d addc r13, r11 877e: 0e 4a mov r10, r14 8780: 0f 4b mov r11, r15 8782: 0e 5e rla r14 8784: 0f 6f rlc r15 8786: 0e 5e rla r14 8788: 0f 6f rlc r15 878a: 0e 5e rla r14 878c: 0f 6f rlc r15 878e: 0e 5e rla r14 8790: 0f 6f rlc r15 8792: 3c 40 e8 03 mov #1000, r12 ;#0x03e8 8796: 0d 43 clr r13 8798: 0e 8a sub r10, r14 879a: 0f 7b subc r11, r15 879c: b0 12 48 8d call #0x8d48 87a0: 82 4e 72 01 mov r14, &0x0172 //TACCR0 = 12000; // ~1 second TAR = 0; 87a4: 82 43 70 01 mov #0, &0x0170 ;r3 As==00 TACTL |= MC_UPTO_CCR0 | TAIE; //enable interrupts, start counting! 87a8: b2 d0 12 00 bis #18, &0x0160 ;#0x0012 87ac: 60 01 } 87ae: 3a 41 pop r10 87b0: 3b 41 pop r11 87b2: 30 41 ret 000087b4 : Delay function. */ void delay(unsigned int d) { int i; for (i = 0; i: Set up the system */ void sys_init() { WDTCTL = WDTCTL_INIT; //Init watchdog timer 87e2: b2 40 80 5a mov #23168, &0x0120 ;#0x5a80 87e6: 20 01 P1DIR = P1DIR_INIT; //Init port direction register of port1 87e8: f2 40 fb ff mov.b #-5, &0x0022 ;#0xfffb 87ec: 22 00 P2DIR = P2DIR_INIT; //Init port direction register of port2 87ee: f2 40 3f 00 mov.b #63, &0x002a ;#0x003f 87f2: 2a 00 P3DIR = P3DIR_INIT; 87f4: f2 40 db ff mov.b #-37, &0x001a ;#0xffdb 87f8: 1a 00 P4DIR = P4DIR_INIT; 87fa: f2 43 1e 00 mov.b #-1, &0x001e ;r3 As==11 P1OUT = P1OUT_INIT; //Init output data of port1 87fe: e2 42 21 00 mov.b #4, &0x0021 ;r2 As==10 P2OUT = P2OUT_INIT; //Init output data of port2 8802: f2 42 29 00 mov.b #8, &0x0029 ;r2 As==11 P3OUT = P3OUT_INIT; 8806: d2 43 19 00 mov.b #1, &0x0019 ;r3 As==01 P4OUT = P4OUT_INIT; 880a: c2 43 1d 00 mov.b #0, &0x001d ;r3 As==00 P1SEL = P1SEL_INIT; //Select port or module -function on port1 880e: c2 43 26 00 mov.b #0, &0x0026 ;r3 As==00 P2SEL = P2SEL_INIT; //Select port or module -function on port2 8812: c2 43 2e 00 mov.b #0, &0x002e ;r3 As==00 P3SEL = P3SEL_INIT; 8816: f2 40 30 00 mov.b #48, &0x001b ;#0x0030 881a: 1b 00 P4SEL = P4SEL_INIT; 881c: c2 43 1f 00 mov.b #0, &0x001f ;r3 As==00 P1REN = P1REN_INIT; //Set pullup resistor state 8820: e2 42 27 00 mov.b #4, &0x0027 ;r2 As==10 P1IES = P1IES_INIT; //init port interrupts 8824: d2 43 24 00 mov.b #1, &0x0024 ;r3 As==01 P2IES = P2IES_INIT; 8828: f2 40 40 00 mov.b #64, &0x002c ;#0x0040 882c: 2c 00 P1IE = P1IE_INIT; 882e: e2 42 25 00 mov.b #4, &0x0025 ;r2 As==10 P2IE = P2IE_INIT; 8832: f2 40 40 00 mov.b #64, &0x002d ;#0x0040 8836: 2d 00 BCSCTL1 = CALBC1_12MHZ; // Set DCO 8838: d2 42 fb 10 mov.b &0x10fb,&0x0057 883c: 57 00 DCOCTL = CALDCO_12MHZ; 883e: d2 42 fa 10 mov.b &0x10fa,&0x0056 8842: 56 00 BCSCTL3 = LFXT1S_2; //use the ultra low oscilator for wakeup intervals, not very accurate/ 8844: f2 40 20 00 mov.b #32, &0x0053 ;#0x0020 8848: 53 00 } 884a: 30 41 ret 0000884c : /**init the ADC10 */ void init_adc() { ADC10AE0 = ADC_IN; 884c: d2 43 4a 00 mov.b #1, &0x004a ;r3 As==01 ADC10CTL0 = ADC10SR | ADC10ON | ADC10SHT_DIV64; //50kbps reduced power mode, ADC on, 16 clocks per sample window 8850: b2 40 10 1c mov #7184, &0x01b0 ;#0x1c10 8854: b0 01 ADC10CTL1 = ADC10SSEL_ACLK | INCH_2; //ACLK sourced, A2 input 8856: b2 40 08 20 mov #8200, &0x01b2 ;#0x2008 885a: b2 01 } 885c: 30 41 ret 0000885e : //get a reading from the ADC10MEM int sample_adc() { ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start 885e: b2 d0 03 00 bis #3, &0x01b0 ;#0x0003 8862: b0 01 while(ADC10CTL1 & ADC10BUSY); 8864: 92 b3 b2 01 bit #1, &0x01b2 ;r3 As==01 8868: fd 23 jnz $-4 ;abs 0x8864 return ADC10MEM; 886a: 1f 42 b4 01 mov &0x01b4,r15 } 886e: 30 41 ret 00008870 : void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 8870: 1e 93 cmp #1, r14 ;r3 As==01 8872: 0c 38 jl $+26 ;abs 0x888c 8874: 0c 43 clr r12 ADC10CTL0 |= ENC | ADC10SC; // Sampling and conversion start while(ADC10CTL1 & ADC10BUSY); return ADC10MEM; } void TX232String( char* string, int length ) 8876: 0d 4f mov r15, r13 8878: 0d 5c add r12, r13 { int pointer; for( pointer = 0; pointer < length; pointer++) { volatile int i; UCA0TXBUF = string[pointer]; 887a: e2 4d 67 00 mov.b @r13, &0x0067 while (!(IFG2&UCA0TXIFG)); // USCI_A0 TX buffer ready? 887e: 5d 42 03 00 mov.b &0x0003,r13 8882: 2d f3 and #2, r13 ;r3 As==10 8884: fc 27 jz $-6 ;abs 0x887e } void TX232String( char* string, int length ) { int pointer; for( pointer = 0; pointer < length; pointer++) 8886: 1c 53 inc r12 8888: 0c 9e cmp r14, r12 888a: f5 23 jnz $-20 ;abs 0x8876 888c: 30 41 ret 0000888e : } } void init_UART_232() { UCA0CTL1 = UCSSEL_2; // SMCLK 888e: f2 40 80 ff mov.b #-128, &0x0061 ;#0xff80 8892: 61 00 //UCA0BR1 = 0x3; //UCA0BR0 = 0x82; // 9600 from 16Mhz //UCA0BR1 = 0x6; UCA0BR0=0xE2; UCA0BR1=0x04; //9600 from 12 8894: f2 40 e2 ff mov.b #-30, &0x0062 ;#0xffe2 8898: 62 00 889a: e2 42 63 00 mov.b #4, &0x0063 ;r2 As==10 UCA0MCTL = UCBRS_2; 889e: e2 42 64 00 mov.b #4, &0x0064 ;r2 As==10 UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** 88a2: f2 f0 fe ff and.b #-2, &0x0061 ;#0xfffe 88a6: 61 00 IE2 |= UCA0RXIE; 88a8: d2 d3 01 00 bis.b #1, &0x0001 ;r3 As==01 } 88ac: 30 41 ret 000088ae : void init_UART_SPI() { UCB0CTL1 = UCSWRST; 88ae: d2 43 69 00 mov.b #1, &0x0069 ;r3 As==01 UCB0CTL1 = UCSWRST | UCSSEL1; 88b2: f2 40 81 ff mov.b #-127, &0x0069 ;#0xff81 88b6: 69 00 UCB0CTL0 = UCCKPH | UCMSB | UCMST | UCSYNC; 88b8: f2 40 a9 ff mov.b #-87, &0x0068 ;#0xffa9 88bc: 68 00 UCB0BR0 = 2; 88be: e2 43 6a 00 mov.b #2, &0x006a ;r3 As==10 UCB0BR1 = 0; 88c2: c2 43 6b 00 mov.b #0, &0x006b ;r3 As==00 UCB0CTL1 &= ~UCSWRST; 88c6: f2 f0 fe ff and.b #-2, &0x0069 ;#0xfffe 88ca: 69 00 } 88cc: 30 41 ret 000088ce : void CCXX_WRITE_SPI_RF_SETTINGS() { // Write register settings CCXX_SPI_WRREG(CCxxx0_IOCFG2, P2_IOCFG2); // GDO2 output pin config. 88ce: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 88d2: 4f 43 clr.b r15 88d4: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_IOCFG0, P2_IOCFG0); // GDO0 output pin config. 88d8: 7e 40 06 00 mov.b #6, r14 ;#0x0006 88dc: 6f 43 mov.b #2, r15 ;r3 As==10 88de: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_PKTLEN, P2_PKTLEN); // Packet length. 88e2: 7e 40 3c 00 mov.b #60, r14 ;#0x003c 88e6: 7f 40 06 00 mov.b #6, r15 ;#0x0006 88ea: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_PKTCTRL1, P2_PKTCTRL1); // Packet automation control. 88ee: 6e 42 mov.b #4, r14 ;r2 As==10 88f0: 7f 40 07 00 mov.b #7, r15 ;#0x0007 88f4: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_PKTCTRL0, P2_PKTCTRL0); // Packet automation control. 88f8: 7e 40 05 00 mov.b #5, r14 ;#0x0005 88fc: 7f 42 mov.b #8, r15 ;r2 As==11 88fe: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_ADDR, P2_ADDR); // Device address. 8902: 5e 43 mov.b #1, r14 ;r3 As==01 8904: 7f 40 09 00 mov.b #9, r15 ;#0x0009 8908: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_CHANNR, P2_CHANNR); // Channel number. 890c: 7e 40 9a ff mov.b #-102, r14 ;#0xff9a 8910: 7f 40 0a 00 mov.b #10, r15 ;#0x000a 8914: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FSCTRL1, P2_FSCTRL1); // Freq synthesizer control. 8918: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 891c: 7f 40 0b 00 mov.b #11, r15 ;#0x000b 8920: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FSCTRL0, P2_FSCTRL0); // Freq synthesizer control. 8924: 4e 43 clr.b r14 8926: 7f 40 0c 00 mov.b #12, r15 ;#0x000c 892a: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FREQ2, P2_FREQ2); // Freq control word, high byte 892e: 7e 40 5c 00 mov.b #92, r14 ;#0x005c 8932: 7f 40 0d 00 mov.b #13, r15 ;#0x000d 8936: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FREQ1, P2_FREQ1); // Freq control word, mid byte. 893a: 7e 40 4f 00 mov.b #79, r14 ;#0x004f 893e: 7f 40 0e 00 mov.b #14, r15 ;#0x000e 8942: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FREQ0, P2_FREQ0); // Freq control word, low byte. 8946: 7e 40 c0 ff mov.b #-64, r14 ;#0xffc0 894a: 7f 40 0f 00 mov.b #15, r15 ;#0x000f 894e: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_MDMCFG4, P2_MDMCFG4); // Modem configuration. 8952: 7e 40 2d 00 mov.b #45, r14 ;#0x002d 8956: 7f 40 10 00 mov.b #16, r15 ;#0x0010 895a: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_MDMCFG3, P2_MDMCFG3); // Modem configuration. 895e: 7e 40 3b 00 mov.b #59, r14 ;#0x003b 8962: 7f 40 11 00 mov.b #17, r15 ;#0x0011 8966: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_MDMCFG2, P2_MDMCFG2); // Modem configuration. 896a: 7e 40 73 00 mov.b #115, r14 ;#0x0073 896e: 7f 40 12 00 mov.b #18, r15 ;#0x0012 8972: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_MDMCFG1, P2_MDMCFG1); // Modem configuration. 8976: 7e 40 23 00 mov.b #35, r14 ;#0x0023 897a: 7f 40 13 00 mov.b #19, r15 ;#0x0013 897e: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_MDMCFG0, P2_MDMCFG0); // Modem configuration. 8982: 7e 40 b9 ff mov.b #-71, r14 ;#0xffb9 8986: 7f 40 14 00 mov.b #20, r15 ;#0x0014 898a: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_DEVIATN, P2_DEVIATN); // Modem dev (when FSK mod en) 898e: 5e 43 mov.b #1, r14 ;r3 As==01 8990: 7f 40 15 00 mov.b #21, r15 ;#0x0015 8994: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_MCSM1 , P2_MCSM1 ); //MainRadio Cntrl State Machine 8998: 7e 40 33 00 mov.b #51, r14 ;#0x0033 899c: 7f 40 17 00 mov.b #23, r15 ;#0x0017 89a0: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_MCSM0 , P2_MCSM0 ); //MainRadio Cntrl State Machine 89a4: 7e 40 18 00 mov.b #24, r14 ;#0x0018 89a8: 7f 40 18 00 mov.b #24, r15 ;#0x0018 89ac: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FOCCFG, P2_FOCCFG); // Freq Offset Compens. Config 89b0: 7e 40 1d 00 mov.b #29, r14 ;#0x001d 89b4: 7f 40 19 00 mov.b #25, r15 ;#0x0019 89b8: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_BSCFG, P2_BSCFG); // Bit synchronization config. 89bc: 7e 40 1c 00 mov.b #28, r14 ;#0x001c 89c0: 7f 40 1a 00 mov.b #26, r15 ;#0x001a 89c4: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_AGCCTRL2, P2_AGCCTRL2); // AGC control. 89c8: 7e 40 c7 ff mov.b #-57, r14 ;#0xffc7 89cc: 7f 40 1b 00 mov.b #27, r15 ;#0x001b 89d0: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_AGCCTRL1, P2_AGCCTRL1); // AGC control. 89d4: 4e 43 clr.b r14 89d6: 7f 40 1c 00 mov.b #28, r15 ;#0x001c 89da: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_AGCCTRL0, P2_AGCCTRL0); // AGC control. 89de: 7e 40 b0 ff mov.b #-80, r14 ;#0xffb0 89e2: 7f 40 1d 00 mov.b #29, r15 ;#0x001d 89e6: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FREND1, P2_FREND1); // Front end RX configuration. 89ea: 7e 40 b6 ff mov.b #-74, r14 ;#0xffb6 89ee: 7f 40 21 00 mov.b #33, r15 ;#0x0021 89f2: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FREND0, P2_FREND0); // Front end RX configuration. 89f6: 7e 40 10 00 mov.b #16, r14 ;#0x0010 89fa: 7f 40 22 00 mov.b #34, r15 ;#0x0022 89fe: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FSCAL3, P2_FSCAL3); // Frequency synthesizer cal. 8a02: 7e 40 ea ff mov.b #-22, r14 ;#0xffea 8a06: 7f 40 23 00 mov.b #35, r15 ;#0x0023 8a0a: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FSCAL2, P2_FSCAL2); // Frequency synthesizer cal. 8a0e: 7e 40 0a 00 mov.b #10, r14 ;#0x000a 8a12: 7f 40 24 00 mov.b #36, r15 ;#0x0024 8a16: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FSCAL1, P2_FSCAL1); // Frequency synthesizer cal. 8a1a: 4e 43 clr.b r14 8a1c: 7f 40 25 00 mov.b #37, r15 ;#0x0025 8a20: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FSCAL0, P2_FSCAL0); // Frequency synthesizer cal. 8a24: 7e 40 11 00 mov.b #17, r14 ;#0x0011 8a28: 7f 40 26 00 mov.b #38, r15 ;#0x0026 8a2c: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_FSTEST, P2_FSTEST); // Frequency synthesizer cal. 8a30: 7e 40 59 00 mov.b #89, r14 ;#0x0059 8a34: 7f 40 29 00 mov.b #41, r15 ;#0x0029 8a38: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_TEST2, P2_TEST2); // Various test settings. 8a3c: 7e 40 88 ff mov.b #-120, r14 ;#0xff88 8a40: 7f 40 2c 00 mov.b #44, r15 ;#0x002c 8a44: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_TEST1, P2_TEST1); // Various test settings. 8a48: 7e 40 31 00 mov.b #49, r14 ;#0x0031 8a4c: 7f 40 2d 00 mov.b #45, r15 ;#0x002d 8a50: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_TEST0, P2_TEST0); // Various test settings. 8a54: 7e 40 0b 00 mov.b #11, r14 ;#0x000b 8a58: 7f 40 2e 00 mov.b #46, r15 ;#0x002e 8a5c: b0 12 64 8c call #0x8c64 CCXX_SPI_WRREG(CCxxx0_PATABLE, P2_PATABLE); // Output Power 8a60: 7e 43 mov.b #-1, r14 ;r3 As==11 8a62: 7f 40 3e 00 mov.b #62, r15 ;#0x003e 8a66: b0 12 64 8c call #0x8c64 } 8a6a: 30 41 ret 00008a6c : Interrupt driven! yay! */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); 8a6c: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8a70: b0 12 ce 8b call #0x8bce while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8a74: f2 90 0f 00 cmp.b #15, &0x020e ;#0x000f 8a78: 0e 02 8a7a: 08 24 jz $+18 ;abs 0x8a8c CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8a7c: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8a80: b0 12 ce 8b call #0x8bce */ void RX_MODE() { CCXX_SPI_STROBE(CCxxx0_SIDLE); while(status!=15) //(15)31 for return to TX on complete, see MCSM1 8a84: f2 90 0f 00 cmp.b #15, &0x020e ;#0x000f 8a88: 0e 02 8a8a: f8 23 jnz $-14 ;abs 0x8a7c CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... CCXX_SPI_STROBE(CCxxx0_SRX);//Recieve Mode 8a8c: 7f 40 34 00 mov.b #52, r15 ;#0x0034 8a90: b0 12 ce 8b call #0x8bce } 8a94: 30 41 ret 00008a96 : char RX_STRING(unsigned char *rxbuf, unsigned char length) { 8a96: 0b 12 push r11 8a98: 0a 12 push r10 8a9a: 09 12 push r9 8a9c: 08 12 push r8 8a9e: 07 12 push r7 8aa0: 06 12 push r6 8aa2: 07 4f mov r15, r7 8aa4: 48 4e mov.b r14, r8 //interrupt driven, GDO0 had better be low! //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet 8aa6: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8aaa: b0 12 06 8c call #0x8c06 8aae: 49 4f mov.b r15, r9 real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet 8ab0: 7f 40 3b 00 mov.b #59, r15 ;#0x003b 8ab4: b0 12 06 8c call #0x8c06 8ab8: 46 4f mov.b r15, r6 for(i=0; i < length && i < pkt_length; i++) 8aba: 48 93 tst.b r8 8abc: 58 24 jz $+178 ;abs 0x8b6e 8abe: 49 93 tst.b r9 8ac0: 5a 24 jz $+182 ;abs 0x8b76 8ac2: 0a 47 mov r7, r10 8ac4: 4b 43 clr.b r11 8ac6: 03 3c jmp $+8 ;abs 0x8ace 8ac8: 1a 53 inc r10 8aca: 49 9b cmp.b r11, r9 8acc: 41 24 jz $+132 ;abs 0x8b50 { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte 8ace: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8ad2: b0 12 06 8c call #0x8c06 8ad6: ca 4f 00 00 mov.b r15, 0(r10) ;0x0000(r10) //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8ada: 5b 53 inc.b r11 8adc: 4b 98 cmp.b r8, r11 8ade: f4 23 jnz $-22 ;abs 0x8ac8 8ae0: 4e 4b mov.b r11, r14 8ae2: 4a 49 mov.b r9, r10 { rxbuf[i] = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the byte //GPSbuf[i] = rxbuf[i]; } rxbuf[i] = '\0';//set the NULL terminator 8ae4: 0e 57 add r7, r14 8ae6: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) RSSI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the ESSI 8aea: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8aee: b0 12 06 8c call #0x8c06 8af2: c2 4f 07 02 mov.b r15, &0x0207 LQI = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//get the CRC 8af6: 7f 40 bf ff mov.b #-65, r15 ;#0xffbf 8afa: b0 12 06 8c call #0x8c06 8afe: c2 4f 08 02 mov.b r15, &0x0208 PKTSTATUS = CCXX_SPI_RDREG(CCxxx0_PKTSTATUS); 8b02: 7f 40 38 00 mov.b #56, r15 ;#0x0038 8b06: b0 12 06 8c call #0x8c06 8b0a: c2 4f 09 02 mov.b r15, &0x0209 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported 8b0e: 4e 46 mov.b r6, r14 8b10: 2a 53 incd r10 8b12: 0e 9a cmp r10, r14 8b14: 03 24 jz $+8 ;abs 0x8b1c LQI &= ~bit7; //force it to be INVALID! 8b16: f2 f0 7f 00 and.b #127, &0x0208 ;#0x007f 8b1a: 08 02 if (RSSI >= 128) 8b1c: 5e 42 07 02 mov.b &0x0207,r14 8b20: 4e 93 tst.b r14 8b22: 1a 38 jl $+54 ;abs 0x8b58 RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; else RSSI_DBM = (RSSI / 2) - 72; 8b24: 12 c3 clrc 8b26: 4e 10 rrc.b r14 8b28: 7e 50 b8 ff add.b #-72, r14 ;#0xffb8 8b2c: c2 4e 06 02 mov.b r14, &0x0206 CCXX_SPI_STROBE(CCxxx0_SFRX); //flush the buffer 8b30: 7f 40 3a 00 mov.b #58, r15 ;#0x003a 8b34: b0 12 ce 8b call #0x8bce CCXX_SPI_STROBE(CCxxx0_SIDLE); //return to IDLE state 8b38: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8b3c: b0 12 ce 8b call #0x8bce return i; //i = real length } 8b40: 4f 4b mov.b r11, r15 8b42: 36 41 pop r6 8b44: 37 41 pop r7 8b46: 38 41 pop r8 8b48: 39 41 pop r9 8b4a: 3a 41 pop r10 8b4c: 3b 41 pop r11 8b4e: 30 41 ret //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8b50: 4a 49 mov.b r9, r10 8b52: 0e 4a mov r10, r14 8b54: 4b 49 mov.b r9, r11 8b56: c6 3f jmp $-114 ;abs 0x8ae4 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8b58: 4e 4e mov.b r14, r14 8b5a: 0f 4e mov r14, r15 8b5c: 3f 50 00 ff add #-256, r15 ;#0xff00 8b60: 0e 38 jl $+30 ;abs 0x8b7e 8b62: 0f 11 rra r15 8b64: 7f 50 b8 ff add.b #-72, r15 ;#0xffb8 8b68: c2 4f 06 02 mov.b r15, &0x0206 8b6c: e1 3f jmp $-60 ;abs 0x8b30 //if((P2IN&GDO0) == GDO0) //wait wha? // break; pkt_length = CCXX_SPI_RDREG(CCxxx0_RXFIFO);//length of the packet real_length = CCXX_SPI_RDREG(CCxxx0_RXBYTES);//length of the packet for(i=0; i < length && i < pkt_length; i++) 8b6e: 4b 43 clr.b r11 8b70: 0e 43 clr r14 8b72: 4a 49 mov.b r9, r10 8b74: b7 3f jmp $-144 ;abs 0x8ae4 8b76: 4b 43 clr.b r11 8b78: 0e 43 clr r14 8b7a: 0a 43 clr r10 8b7c: b3 3f jmp $-152 ;abs 0x8ae4 if(real_length != (pkt_length + 2)) //packets lengths dont match, LQI mis-reported LQI &= ~bit7; //force it to be INVALID! if (RSSI >= 128) RSSI_DBM = (int)((int )(RSSI - 256) / 2) - 72; 8b7e: 1f 53 inc r15 8b80: f0 3f jmp $-30 ;abs 0x8b62 00008b82 : /** Transmit a string of bytes. */ void TX_STRING(unsigned char *txstring, unsigned char length) { 8b82: 0b 12 push r11 8b84: 0a 12 push r10 8b86: 0b 4f mov r15, r11 8b88: 4a 4e mov.b r14, r10 //unsigned char i; //length += 3; do{ CCXX_SPI_STROBE(CCxxx0_SIDLE);//Idle 8b8a: 7f 40 36 00 mov.b #54, r15 ;#0x0036 8b8e: b0 12 ce 8b call #0x8bce }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //wait for idle 8b92: 5f 42 0e 02 mov.b &0x020e,r15 8b96: 3f b0 70 00 bit #112, r15 ;#0x0070 8b9a: f7 23 jnz $-16 ;abs 0x8b8a { if(i < length) CCXX_SPI_WRREG(CCxxx0_TXFIFO, txstring[i]);//Write data to FIFO }*/ CCXX_SPI_BURST_WRREG(CCxxx0_TXFIFO_BURST, txstring, length); 8b9c: 4d 4a mov.b r10, r13 8b9e: 0e 4b mov r11, r14 8ba0: 7f 40 7f 00 mov.b #127, r15 ;#0x007f 8ba4: b0 12 b2 8c call #0x8cb2 CCXX_SPI_STROBE(CCxxx0_STX); // send tx strobe and TX begins, returns to 15 or 31 when complete (depending on MCSM1) 8ba8: 7f 40 35 00 mov.b #53, r15 ;#0x0035 8bac: b0 12 ce 8b call #0x8bce do { CCXX_SPI_STROBE(CCxxx0_SNOP) ; //(wait for 15, idle)read status byte.... 8bb0: 7f 40 3d 00 mov.b #61, r15 ;#0x003d 8bb4: b0 12 ce 8b call #0x8bce if(status == 31) //fast RX mode yay 8bb8: 5f 42 0e 02 mov.b &0x020e,r15 8bbc: 7f 90 1f 00 cmp.b #31, r15 ;#0x001f 8bc0: 03 24 jz $+8 ;abs 0x8bc8 break; }while((status & CCxxx0_STAT_ADDR) != CCxxx0_STAT_IDLE); //(15)31 for return to TX on complete, see MCSM1 8bc2: 3f b0 70 00 bit #112, r15 ;#0x0070 8bc6: f4 23 jnz $-22 ;abs 0x8bb0 } 8bc8: 3a 41 pop r10 8bca: 3b 41 pop r11 8bcc: 30 41 ret 00008bce : Strobe a command to the CCXX */ void CCXX_SPI_STROBE(char reg) { status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8bce: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8bd2: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8bd4: 5e 42 18 00 mov.b &0x0018,r14 8bd8: 2e f2 and #4, r14 ;r2 As==10 8bda: fc 23 jnz $-6 ;abs 0x8bd4 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8bdc: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8be0: 1b 00 IFG2 &= ~UCB0RXIFG; 8be2: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8be6: 03 00 UCB0TXBUF = reg; 8be8: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8bec: 5f 42 03 00 mov.b &0x0003,r15 8bf0: 2f f2 and #4, r15 ;r2 As==10 8bf2: fc 27 jz $-6 ;abs 0x8bec status = UCB0RXBUF; 8bf4: d2 42 6e 00 mov.b &0x006e,&0x020e 8bf8: 0e 02 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8bfa: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8bfe: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8c02: 1b 00 } 8c04: 30 41 ret 00008c06 : */ char CCXX_SPI_RDREG(char reg) { unsigned char rx=0; if(reg >= 0x30) 8c06: 7f 90 30 00 cmp.b #48, r15 ;#0x0030 8c0a: 29 38 jl $+84 ;abs 0x8c5e reg |= 0xC0; 8c0c: 7f d0 c0 ff bis.b #-64, r15 ;#0xffc0 else reg |= 0x80; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8c10: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8c14: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8c16: 5e 42 18 00 mov.b &0x0018,r14 8c1a: 2e f2 and #4, r14 ;r2 As==10 8c1c: fc 23 jnz $-6 ;abs 0x8c16 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8c1e: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8c22: 1b 00 IFG2 &= ~UCB0RXIFG; 8c24: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c28: 03 00 UCB0TXBUF = reg; 8c2a: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c2e: 5f 42 03 00 mov.b &0x0003,r15 8c32: 2f f2 and #4, r15 ;r2 As==10 8c34: fc 27 jz $-6 ;abs 0x8c2e status = UCB0RXBUF; 8c36: d2 42 6e 00 mov.b &0x006e,&0x020e 8c3a: 0e 02 IFG2 &= ~UCB0RXIFG; 8c3c: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c40: 03 00 UCB0TXBUF = 0; 8c42: c2 43 6f 00 mov.b #0, &0x006f ;r3 As==00 while (!(IFG2 & UCB0RXIFG)); 8c46: 5f 42 03 00 mov.b &0x0003,r15 8c4a: 2f f2 and #4, r15 ;r2 As==10 8c4c: fc 27 jz $-6 ;abs 0x8c46 rx = UCB0RXBUF; 8c4e: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8c52: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8c56: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8c5a: 1b 00 return rx; } 8c5c: 30 41 ret { unsigned char rx=0; if(reg >= 0x30) reg |= 0xC0; else reg |= 0x80; 8c5e: 7f d0 80 ff bis.b #-128, r15 ;#0xff80 8c62: d6 3f jmp $-82 ;abs 0x8c10 00008c64 : { unsigned char dummy; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8c64: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8c68: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8c6a: 5d 42 18 00 mov.b &0x0018,r13 8c6e: 2d f2 and #4, r13 ;r2 As==10 8c70: fc 23 jnz $-6 ;abs 0x8c6a P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8c72: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8c76: 1b 00 IFG2 &= ~UCB0RXIFG; 8c78: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c7c: 03 00 UCB0TXBUF = reg; 8c7e: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c82: 5f 42 03 00 mov.b &0x0003,r15 8c86: 2f f2 and #4, r15 ;r2 As==10 8c88: fc 27 jz $-6 ;abs 0x8c82 status = UCB0RXBUF; 8c8a: d2 42 6e 00 mov.b &0x006e,&0x020e 8c8e: 0e 02 //lil delay //delay(1); IFG2 &= ~UCB0RXIFG; 8c90: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8c94: 03 00 UCB0TXBUF = byte; 8c96: c2 4e 6f 00 mov.b r14, &0x006f while (!(IFG2 & UCB0RXIFG)); 8c9a: 5f 42 03 00 mov.b &0x0003,r15 8c9e: 2f f2 and #4, r15 ;r2 As==10 8ca0: fc 27 jz $-6 ;abs 0x8c9a dummy = UCB0RXBUF; 8ca2: 5f 42 6e 00 mov.b &0x006e,r15 P3OUT |= CSn; //pull CSn high, we're done with the transfer 8ca6: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8caa: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8cae: 1b 00 } 8cb0: 30 41 ret 00008cb2 : { unsigned char dummy; unsigned int index; status=0; P3OUT &= ~CSn; //pull CSn low to activate chip 8cb2: f2 f0 fe ff and.b #-2, &0x0019 ;#0xfffe 8cb6: 19 00 while(P3IN & SOMI); //wait for the CCXX good signal, wait for SOMI to drop low 8cb8: 5c 42 18 00 mov.b &0x0018,r12 8cbc: 2c f2 and #4, r12 ;r2 As==10 8cbe: fc 23 jnz $-6 ;abs 0x8cb8 P3SEL |= UARTB0_SPI_MODULES; //this will bring the clock edge high 8cc0: f2 d0 0e 00 bis.b #14, &0x001b ;#0x000e 8cc4: 1b 00 IFG2 &= ~UCB0RXIFG; 8cc6: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8cca: 03 00 UCB0TXBUF = reg; 8ccc: c2 4f 6f 00 mov.b r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8cd0: 5f 42 03 00 mov.b &0x0003,r15 8cd4: 2f f2 and #4, r15 ;r2 As==10 8cd6: fc 27 jz $-6 ;abs 0x8cd0 status = UCB0RXBUF; 8cd8: d2 42 6e 00 mov.b &0x006e,&0x020e 8cdc: 0e 02 IFG2 &= ~UCB0RXIFG; 8cde: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8ce2: 03 00 UCB0TXBUF = length; 8ce4: c2 4d 6f 00 mov.b r13, &0x006f while (!(IFG2 & UCB0RXIFG)); 8ce8: 5f 42 03 00 mov.b &0x0003,r15 8cec: 2f f2 and #4, r15 ;r2 As==10 8cee: fc 27 jz $-6 ;abs 0x8ce8 dummy = UCB0RXBUF; 8cf0: 5f 42 6e 00 mov.b &0x006e,r15 for(index = 0; index < length; index++) 8cf4: 8d 11 sxt r13 8cf6: 11 24 jz $+36 ;abs 0x8d1a 8cf8: 0c 43 clr r12 { IFG2 &= ~UCB0RXIFG; 8cfa: f2 f0 fb ff and.b #-5, &0x0003 ;#0xfffb 8cfe: 03 00 } /** Write a register from the CCXX */ void CCXX_SPI_BURST_WRREG(char reg, char *buf, char length) 8d00: 0f 4e mov r14, r15 8d02: 0f 5c add r12, r15 dummy = UCB0RXBUF; for(index = 0; index < length; index++) { IFG2 &= ~UCB0RXIFG; UCB0TXBUF = buf[index]; 8d04: e2 4f 6f 00 mov.b @r15, &0x006f while (!(IFG2 & UCB0RXIFG)); 8d08: 5f 42 03 00 mov.b &0x0003,r15 8d0c: 2f f2 and #4, r15 ;r2 As==10 8d0e: fc 27 jz $-6 ;abs 0x8d08 dummy = UCB0RXBUF; 8d10: 5f 42 6e 00 mov.b &0x006e,r15 IFG2 &= ~UCB0RXIFG; UCB0TXBUF = length; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; for(index = 0; index < length; index++) 8d14: 1c 53 inc r12 8d16: 0c 9d cmp r13, r12 8d18: f0 2b jnc $-30 ;abs 0x8cfa UCB0TXBUF = buf[index]; while (!(IFG2 & UCB0RXIFG)); dummy = UCB0RXBUF; } P3OUT |= CSn; //pull CSn high, we're done with the transfer 8d1a: d2 d3 19 00 bis.b #1, &0x0019 ;r3 As==01 P3SEL &= ~UARTB0_SPI_MODULES; //take the pins back out of SPI mode 8d1e: f2 f0 f1 ff and.b #-15, &0x001b ;#0xfff1 8d22: 1b 00 } 8d24: 30 41 ret 00008d26 <__udivhi3>: 8d26: 7c 40 10 00 mov.b #16, r12 ;#0x0010 8d2a: 0d 4e mov r14, r13 8d2c: 0e 43 clr r14 8d2e: 0f 5f rla r15 8d30: 0e 6e rlc r14 8d32: 0e 9d cmp r13, r14 8d34: 02 28 jnc $+6 ;abs 0x8d3a 8d36: 0e 8d sub r13, r14 8d38: 1f d3 bis #1, r15 ;r3 As==01 8d3a: 1c 83 dec r12 8d3c: f8 23 jnz $-14 ;abs 0x8d2e 8d3e: 30 41 ret 00008d40 <__umodhi3>: 8d40: b0 12 26 8d call #0x8d26 8d44: 0f 4e mov r14, r15 8d46: 30 41 ret 00008d48 <__udivsi3>: 8d48: 0b 12 push r11 8d4a: 0a 12 push r10 8d4c: 09 12 push r9 8d4e: 79 40 20 00 mov.b #32, r9 ;#0x0020 8d52: 0a 4c mov r12, r10 8d54: 0b 4d mov r13, r11 8d56: 0c 43 clr r12 8d58: 0d 43 clr r13 8d5a: 0e 5e rla r14 8d5c: 0f 6f rlc r15 8d5e: 0c 6c rlc r12 8d60: 0d 6d rlc r13 8d62: 0d 9b cmp r11, r13 8d64: 06 28 jnc $+14 ;abs 0x8d72 8d66: 02 20 jnz $+6 ;abs 0x8d6c 8d68: 0c 9a cmp r10, r12 8d6a: 03 28 jnc $+8 ;abs 0x8d72 8d6c: 0c 8a sub r10, r12 8d6e: 0d 7b subc r11, r13 8d70: 1e d3 bis #1, r14 ;r3 As==01 8d72: 19 83 dec r9 8d74: f2 23 jnz $-26 ;abs 0x8d5a 8d76: 39 41 pop r9 8d78: 3a 41 pop r10 8d7a: 3b 41 pop r11 8d7c: 30 41 ret 00008d7e <__umodsi3>: 8d7e: b0 12 48 8d call #0x8d48 8d82: 0e 4c mov r12, r14 8d84: 0f 4d mov r13, r15 8d86: 30 41 ret 00008d88 : 8d88: 6d 4f mov.b @r15, r13 8d8a: 4d 9e cmp.b r14, r13 8d8c: 05 24 jz $+12 ;abs 0x8d98 8d8e: 4d 93 tst.b r13 8d90: 02 24 jz $+6 ;abs 0x8d96 8d92: 1f 53 inc r15 8d94: f9 3f jmp $-12 ;abs 0x8d88 8d96: 0f 43 clr r15 8d98: 30 41 ret 00008d9a : 8d9a: 0b 12 push r11 8d9c: 0d 93 tst r13 8d9e: 0a 24 jz $+22 ;abs 0x8db4 8da0: 7b 4f mov.b @r15+, r11 8da2: 7c 4e mov.b @r14+, r12 8da4: 4b 9c cmp.b r12, r11 8da6: 04 24 jz $+10 ;abs 0x8db0 8da8: 4f 4b mov.b r11, r15 8daa: 4e 4c mov.b r12, r14 8dac: 0f 8e sub r14, r15 8dae: 03 3c jmp $+8 ;abs 0x8db6 8db0: 3d 53 add #-1, r13 ;r3 As==11 8db2: f4 3f jmp $-22 ;abs 0x8d9c 8db4: 0f 43 clr r15 8db6: 3b 41 pop r11 8db8: 30 41 ret 00008dba : 8dba: 0b 12 push r11 8dbc: 0a 12 push r10 8dbe: 09 12 push r9 8dc0: 08 12 push r8 8dc2: 3d 90 06 00 cmp #6, r13 ;#0x0006 8dc6: 09 2c jc $+20 ;abs 0x8dda 8dc8: 0c 4f mov r15, r12 8dca: 04 3c jmp $+10 ;abs 0x8dd4 8dcc: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 8dd0: 1c 53 inc r12 8dd2: 3d 53 add #-1, r13 ;r3 As==11 8dd4: 0d 93 tst r13 8dd6: fa 23 jnz $-10 ;abs 0x8dcc 8dd8: 20 3c jmp $+66 ;abs 0x8e1a 8dda: 4e 4e mov.b r14, r14 8ddc: 4b 4e mov.b r14, r11 8dde: 0b 93 tst r11 8de0: 03 24 jz $+8 ;abs 0x8de8 8de2: 0c 4b mov r11, r12 8de4: 8c 10 swpb r12 8de6: 0b dc bis r12, r11 8de8: 1f b3 bit #1, r15 ;r3 As==01 8dea: 06 24 jz $+14 ;abs 0x8df8 8dec: 3d 53 add #-1, r13 ;r3 As==11 8dee: cf 4e 00 00 mov.b r14, 0(r15) ;0x0000(r15) 8df2: 09 4f mov r15, r9 8df4: 19 53 inc r9 8df6: 01 3c jmp $+4 ;abs 0x8dfa 8df8: 09 4f mov r15, r9 8dfa: 0c 4d mov r13, r12 8dfc: 12 c3 clrc 8dfe: 0c 10 rrc r12 8e00: 0a 49 mov r9, r10 8e02: 08 4c mov r12, r8 8e04: 8a 4b 00 00 mov r11, 0(r10) ;0x0000(r10) 8e08: 2a 53 incd r10 8e0a: 38 53 add #-1, r8 ;r3 As==11 8e0c: fb 23 jnz $-8 ;abs 0x8e04 8e0e: 0c 5c rla r12 8e10: 0c 59 add r9, r12 8e12: 1d f3 and #1, r13 ;r3 As==01 8e14: 02 24 jz $+6 ;abs 0x8e1a 8e16: cc 4e 00 00 mov.b r14, 0(r12) ;0x0000(r12) 8e1a: 38 41 pop r8 8e1c: 39 41 pop r9 8e1e: 3a 41 pop r10 8e20: 3b 41 pop r11 8e22: 30 41 ret 00008e24 : 8e24: 0b 12 push r11 8e26: 0a 12 push r10 8e28: 09 12 push r9 8e2a: 08 12 push r8 8e2c: 07 12 push r7 8e2e: 0b 4f mov r15, r11 8e30: 69 4e mov.b @r14, r9 8e32: 49 93 tst.b r9 8e34: 1b 24 jz $+56 ;abs 0x8e6c 8e36: 0a 4e mov r14, r10 8e38: 1a 53 inc r10 8e3a: 0d 4e mov r14, r13 8e3c: 1d 53 inc r13 8e3e: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 8e42: fc 23 jnz $-6 ;abs 0x8e3c 8e44: 07 4d mov r13, r7 8e46: 07 8a sub r10, r7 8e48: 01 3c jmp $+4 ;abs 0x8e4c 8e4a: 0b 48 mov r8, r11 8e4c: 6f 4b mov.b @r11, r15 8e4e: 4f 93 tst.b r15 8e50: 0c 24 jz $+26 ;abs 0x8e6a 8e52: 08 4b mov r11, r8 8e54: 18 53 inc r8 8e56: 4f 99 cmp.b r9, r15 8e58: f8 23 jnz $-14 ;abs 0x8e4a 8e5a: 0d 47 mov r7, r13 8e5c: 0e 4a mov r10, r14 8e5e: 0f 48 mov r8, r15 8e60: b0 12 b0 97 call #0x97b0 8e64: 0f 93 tst r15 8e66: f1 23 jnz $-28 ;abs 0x8e4a 8e68: 01 3c jmp $+4 ;abs 0x8e6c 8e6a: 0b 43 clr r11 8e6c: 0f 4b mov r11, r15 8e6e: 37 41 pop r7 8e70: 38 41 pop r8 8e72: 39 41 pop r9 8e74: 3a 41 pop r10 8e76: 3b 41 pop r11 8e78: 30 41 ret 00008e7a : 8e7a: 0b 12 push r11 8e7c: 0e 4f mov r15, r14 8e7e: 01 3c jmp $+4 ;abs 0x8e82 8e80: 1e 53 inc r14 8e82: 6f 4e mov.b @r14, r15 8e84: 7f 90 20 00 cmp.b #32, r15 ;#0x0020 8e88: fb 27 jz $-8 ;abs 0x8e80 8e8a: 7f 90 09 00 cmp.b #9, r15 ;#0x0009 8e8e: f8 27 jz $-14 ;abs 0x8e80 8e90: 7f 90 0a 00 cmp.b #10, r15 ;#0x000a 8e94: f5 27 jz $-20 ;abs 0x8e80 8e96: 7f 90 0c 00 cmp.b #12, r15 ;#0x000c 8e9a: f2 27 jz $-26 ;abs 0x8e80 8e9c: 7f 90 0d 00 cmp.b #13, r15 ;#0x000d 8ea0: ef 27 jz $-32 ;abs 0x8e80 8ea2: 7f 90 0b 00 cmp.b #11, r15 ;#0x000b 8ea6: ec 27 jz $-38 ;abs 0x8e80 8ea8: 7f 90 2d 00 cmp.b #45, r15 ;#0x002d 8eac: 03 20 jnz $+8 ;abs 0x8eb4 8eae: 1e 53 inc r14 8eb0: 1b 43 mov #1, r11 ;r3 As==01 8eb2: 05 3c jmp $+12 ;abs 0x8ebe 8eb4: 7f 90 2b 00 cmp.b #43, r15 ;#0x002b 8eb8: 01 20 jnz $+4 ;abs 0x8ebc 8eba: 1e 53 inc r14 8ebc: 0b 43 clr r11 8ebe: 6f 4e mov.b @r14, r15 8ec0: 8f 11 sxt r15 8ec2: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8ec6: 3f 90 0a 00 cmp #10, r15 ;#0x000a 8eca: 19 2c jc $+52 ;abs 0x8efe 8ecc: 0d 43 clr r13 8ece: 7c 4e mov.b @r14+, r12 8ed0: 8c 11 sxt r12 8ed2: 0f 4c mov r12, r15 8ed4: 3f 50 d0 ff add #-48, r15 ;#0xffd0 8ed8: 0f 5d add r13, r15 8eda: 6d 4e mov.b @r14, r13 8edc: 8d 11 sxt r13 8ede: 3d 50 d0 ff add #-48, r13 ;#0xffd0 8ee2: 3d 90 0a 00 cmp #10, r13 ;#0x000a 8ee6: 06 2c jc $+14 ;abs 0x8ef4 8ee8: 0f 5f rla r15 8eea: 0d 4f mov r15, r13 8eec: 0d 5d rla r13 8eee: 0d 5d rla r13 8ef0: 0d 5f add r15, r13 8ef2: ed 3f jmp $-36 ;abs 0x8ece 8ef4: 0b 93 tst r11 8ef6: 04 24 jz $+10 ;abs 0x8f00 8ef8: 3f e3 inv r15 8efa: 1f 53 inc r15 8efc: 01 3c jmp $+4 ;abs 0x8f00 8efe: 0f 43 clr r15 8f00: 3b 41 pop r11 8f02: 30 41 ret 00008f04 : 8f04: 1e 42 02 02 mov &0x0202,r14 8f08: 1e 93 cmp #1, r14 ;r3 As==01 8f0a: 0b 38 jl $+24 ;abs 0x8f22 8f0c: 1d 42 00 02 mov &0x0200,r13 8f10: cd 4f 00 00 mov.b r15, 0(r13) ;0x0000(r13) 8f14: 1d 53 inc r13 8f16: 82 4d 00 02 mov r13, &0x0200 8f1a: 3e 53 add #-1, r14 ;r3 As==11 8f1c: 82 4e 02 02 mov r14, &0x0202 8f20: 30 41 ret 8f22: 3f 43 mov #-1, r15 ;r3 As==11 8f24: 30 41 ret 00008f26 : 8f26: 0b 12 push r11 8f28: 0a 12 push r10 8f2a: 21 83 decd r1 8f2c: 81 4e 00 00 mov r14, 0(r1) ;0x0000(r1) 8f30: 1a 42 00 02 mov &0x0200,r10 8f34: 1b 42 02 02 mov &0x0202,r11 8f38: 0d 4e mov r14, r13 8f3a: 0e 4f mov r15, r14 8f3c: 3f 40 04 8f mov #-28924,r15 ;#0x8f04 8f40: b0 12 4a 91 call #0x914a 8f44: 0f 9b cmp r11, r15 8f46: 05 38 jl $+12 ;abs 0x8f52 8f48: 0e 4a mov r10, r14 8f4a: 0e 5b add r11, r14 8f4c: ce 43 ff ff mov.b #0, -1(r14) ;r3 As==00, 0xffff(r14) 8f50: 04 3c jmp $+10 ;abs 0x8f5a 8f52: 1e 42 00 02 mov &0x0200,r14 8f56: ce 43 00 00 mov.b #0, 0(r14) ;r3 As==00, 0x0000(r14) 8f5a: 21 53 incd r1 8f5c: 3a 41 pop r10 8f5e: 3b 41 pop r11 8f60: 30 41 ret 00008f62 : 8f62: 92 41 02 00 mov 2(r1), &0x0200 ;0x0002(r1) 8f66: 00 02 8f68: b2 40 ff 7f mov #32767, &0x0202 ;#0x7fff 8f6c: 02 02 8f6e: 0e 41 mov r1, r14 8f70: 3e 50 06 00 add #6, r14 ;#0x0006 8f74: 1f 41 04 00 mov 4(r1), r15 ;0x0004(r1) 8f78: b0 12 26 8f call #0x8f26 8f7c: 30 41 ret 00008f7e : 8f7e: 92 41 02 00 mov 2(r1), &0x0200 ;0x0002(r1) 8f82: 00 02 8f84: 92 41 04 00 mov 4(r1), &0x0202 ;0x0004(r1) 8f88: 02 02 8f8a: 0e 41 mov r1, r14 8f8c: 3e 52 add #8, r14 ;r2 As==11 8f8e: 1f 41 06 00 mov 6(r1), r15 ;0x0006(r1) 8f92: b0 12 26 8f call #0x8f26 8f96: 30 41 ret 00008f98 : 8f98: 0c 4e mov r14, r12 8f9a: 82 4f 00 02 mov r15, &0x0200 8f9e: b2 40 ff 7f mov #32767, &0x0202 ;#0x7fff 8fa2: 02 02 8fa4: 0e 4d mov r13, r14 8fa6: 0f 4c mov r12, r15 8fa8: b0 12 26 8f call #0x8f26 8fac: 30 41 ret 00008fae : 8fae: 82 4f 00 02 mov r15, &0x0200 8fb2: 82 4e 02 02 mov r14, &0x0202 8fb6: 0e 4c mov r12, r14 8fb8: 0f 4d mov r13, r15 8fba: b0 12 26 8f call #0x8f26 8fbe: 30 41 ret 00008fc0 : 8fc0: 0b 12 push r11 8fc2: 0a 12 push r10 8fc4: 09 12 push r9 8fc6: 08 12 push r8 8fc8: 07 12 push r7 8fca: 06 12 push r6 8fcc: 05 12 push r5 8fce: 04 12 push r4 8fd0: 31 50 f6 ff add #-10, r1 ;#0xfff6 8fd4: 07 4f mov r15, r7 8fd6: 04 4e mov r14, r4 8fd8: 0b 4d mov r13, r11 8fda: 1f 41 1c 00 mov 28(r1), r15 ;0x001c(r1) 8fde: 1d 41 1e 00 mov 30(r1), r13 ;0x001e(r1) 8fe2: 4a 4d mov.b r13, r10 8fe4: 05 4d mov r13, r5 8fe6: 85 10 swpb r5 8fe8: 4c 45 mov.b r5, r12 8fea: 4e 4f mov.b r15, r14 8fec: 7e b0 40 00 bit.b #64, r14 ;#0x0040 8ff0: 11 24 jz $+36 ;abs 0x9014 8ff2: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) 8ff6: 00 00 8ff8: 0e 4f mov r15, r14 8ffa: 8e 10 swpb r14 8ffc: 5e f3 and.b #1, r14 ;r3 As==01 8ffe: 03 24 jz $+8 ;abs 0x9006 9000: 7e 40 58 00 mov.b #88, r14 ;#0x0058 9004: 02 3c jmp $+6 ;abs 0x900a 9006: 7e 40 78 00 mov.b #120, r14 ;#0x0078 900a: c1 4e 01 00 mov.b r14, 1(r1) ;0x0001(r1) 900e: 08 41 mov r1, r8 9010: 28 53 incd r8 9012: 0f 3c jmp $+32 ;abs 0x9032 9014: 7e f0 20 00 and.b #32, r14 ;#0x0020 9018: 04 24 jz $+10 ;abs 0x9022 901a: f1 40 30 00 mov.b #48, 0(r1) ;#0x0030, 0x0000(r1) 901e: 00 00 9020: 04 3c jmp $+10 ;abs 0x902a 9022: 4a 93 tst.b r10 9024: 05 24 jz $+12 ;abs 0x9030 9026: c1 4d 00 00 mov.b r13, 0(r1) ;0x0000(r1) 902a: 08 41 mov r1, r8 902c: 18 53 inc r8 902e: 01 3c jmp $+4 ;abs 0x9032 9030: 08 41 mov r1, r8 9032: 08 81 sub r1, r8 9034: 0e 4f mov r15, r14 9036: 8e 10 swpb r14 9038: c1 4e 02 00 mov.b r14, 2(r1) ;0x0002(r1) 903c: 6e f2 and.b #4, r14 ;r2 As==10 903e: 02 24 jz $+6 ;abs 0x9044 9040: 06 4c mov r12, r6 9042: 01 3c jmp $+4 ;abs 0x9046 9044: 36 43 mov #-1, r6 ;r3 As==11 9046: 4f 4f mov.b r15, r15 9048: 7f b0 10 00 bit.b #16, r15 ;#0x0010 904c: 44 20 jnz $+138 ;abs 0x90d6 904e: 0d 44 mov r4, r13 9050: 3d 53 add #-1, r13 ;r3 As==11 9052: 1d 53 inc r13 9054: cd 93 00 00 tst.b 0(r13) ;0x0000(r13) 9058: fc 23 jnz $-6 ;abs 0x9052 905a: 0d 84 sub r4, r13 905c: 0b 98 cmp r8, r11 905e: 02 28 jnc $+6 ;abs 0x9064 9060: 0b 88 sub r8, r11 9062: 01 3c jmp $+4 ;abs 0x9066 9064: 0b 43 clr r11 9066: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) 906a: 05 24 jz $+12 ;abs 0x9076 906c: 0b 9c cmp r12, r11 906e: 02 28 jnc $+6 ;abs 0x9074 9070: 0b 8c sub r12, r11 9072: 01 3c jmp $+4 ;abs 0x9076 9074: 0b 43 clr r11 9076: 06 9d cmp r13, r6 9078: 01 2c jc $+4 ;abs 0x907c 907a: 0d 46 mov r6, r13 907c: 4f 93 tst.b r15 907e: 11 38 jl $+36 ;abs 0x90a2 9080: f1 40 20 00 mov.b #32, 4(r1) ;#0x0020, 0x0004(r1) 9084: 04 00 9086: 09 43 clr r9 9088: 0a 43 clr r10 908a: 16 3c jmp $+46 ;abs 0x90b8 908c: 0f 41 mov r1, r15 908e: 0f 5a add r10, r15 9090: 6f 4f mov.b @r15, r15 9092: 8f 11 sxt r15 9094: 1a 53 inc r10 9096: 81 4d 08 00 mov r13, 8(r1) ;0x0008(r1) 909a: 87 12 call r7 909c: 1d 41 08 00 mov 8(r1), r13 ;0x0008(r1) 90a0: 01 3c jmp $+4 ;abs 0x90a4 90a2: 0a 43 clr r10 90a4: 0a 98 cmp r8, r10 90a6: f2 3b jl $-26 ;abs 0x908c 90a8: 09 48 mov r8, r9 90aa: 08 93 tst r8 90ac: 01 34 jge $+4 ;abs 0x90b0 90ae: 09 43 clr r9 90b0: 0a 48 mov r8, r10 90b2: f1 40 30 00 mov.b #48, 4(r1) ;#0x0030, 0x0004(r1) 90b6: 04 00 90b8: 0d 8a sub r10, r13 90ba: 81 4d 06 00 mov r13, 6(r1) ;0x0006(r1) 90be: 05 3c jmp $+12 ;abs 0x90ca 90c0: 5f 41 04 00 mov.b 4(r1), r15 ;0x0004(r1) 90c4: 8f 11 sxt r15 90c6: 87 12 call r7 90c8: 1a 53 inc r10 90ca: 1f 41 06 00 mov 6(r1), r15 ;0x0006(r1) 90ce: 0f 5a add r10, r15 90d0: 0f 9b cmp r11, r15 90d2: f6 2b jnc $-18 ;abs 0x90c0 90d4: 0a 3c jmp $+22 ;abs 0x90ea 90d6: 09 43 clr r9 90d8: 0a 43 clr r10 90da: 07 3c jmp $+16 ;abs 0x90ea 90dc: 1a 53 inc r10 90de: 0f 41 mov r1, r15 90e0: 0f 59 add r9, r15 90e2: 6f 4f mov.b @r15, r15 90e4: 8f 11 sxt r15 90e6: 19 53 inc r9 90e8: 87 12 call r7 90ea: 09 98 cmp r8, r9 90ec: f7 3b jl $-16 ;abs 0x90dc 90ee: e1 b3 02 00 bit.b #2, 2(r1) ;r3 As==10, 0x0002(r1) 90f2: 02 24 jz $+6 ;abs 0x90f8 90f4: 49 45 mov.b r5, r9 90f6: 06 3c jmp $+14 ;abs 0x9104 90f8: 04 8a sub r10, r4 90fa: 0d 3c jmp $+28 ;abs 0x9116 90fc: 3f 40 30 00 mov #48, r15 ;#0x0030 9100: 87 12 call r7 9102: 79 53 add.b #-1, r9 ;r3 As==11 9104: 49 93 tst.b r9 9106: fa 23 jnz $-10 ;abs 0x90fc 9108: 45 45 mov.b r5, r5 910a: 0a 55 add r5, r10 910c: f5 3f jmp $-20 ;abs 0x90f8 910e: 36 53 add #-1, r6 ;r3 As==11 9110: 8f 11 sxt r15 9112: 87 12 call r7 9114: 1a 53 inc r10 9116: 0f 44 mov r4, r15 9118: 0f 5a add r10, r15 911a: 6f 4f mov.b @r15, r15 911c: 4f 93 tst.b r15 911e: 07 24 jz $+16 ;abs 0x912e 9120: 06 93 tst r6 9122: f5 23 jnz $-20 ;abs 0x910e 9124: 04 3c jmp $+10 ;abs 0x912e 9126: 3f 40 20 00 mov #32, r15 ;#0x0020 912a: 87 12 call r7 912c: 1a 53 inc r10 912e: 0a 9b cmp r11, r10 9130: fa 2b jnc $-10 ;abs 0x9126 9132: 0f 4a mov r10, r15 9134: 31 50 0a 00 add #10, r1 ;#0x000a 9138: 34 41 pop r4 913a: 35 41 pop r5 913c: 36 41 pop r6 913e: 37 41 pop r7 9140: 38 41 pop r8 9142: 39 41 pop r9 9144: 3a 41 pop r10 9146: 3b 41 pop r11 9148: 30 41 ret 0000914a : 914a: 0b 12 push r11 914c: 0a 12 push r10 914e: 09 12 push r9 9150: 08 12 push r8 9152: 07 12 push r7 9154: 06 12 push r6 9156: 05 12 push r5 9158: 04 12 push r4 915a: 31 50 be ff add #-66, r1 ;#0xffbe 915e: 81 4f 3a 00 mov r15, 58(r1) ;0x003a(r1) 9162: 06 4e mov r14, r6 9164: 05 4d mov r13, r5 9166: 81 4e 3e 00 mov r14, 62(r1) ;0x003e(r1) 916a: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) 916e: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9172: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) 9176: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 917a: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) 917e: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) 9182: 07 43 clr r7 9184: 81 43 2c 00 mov #0, 44(r1) ;r3 As==00, 0x002c(r1) 9188: 0e 41 mov r1, r14 918a: 3e 50 1a 00 add #26, r14 ;#0x001a 918e: 81 4e 1c 00 mov r14, 28(r1) ;0x001c(r1) 9192: 30 40 8c 97 br #0x978c 9196: 0f 46 mov r6, r15 9198: 1f 53 inc r15 919a: 81 4f 40 00 mov r15, 64(r1) ;0x0040(r1) 919e: 07 93 tst r7 91a0: 1e 20 jnz $+62 ;abs 0x91de 91a2: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 91a6: 13 20 jnz $+40 ;abs 0x91ce 91a8: 81 43 00 00 mov #0, 0(r1) ;r3 As==00, 0x0000(r1) 91ac: 81 43 02 00 mov #0, 2(r1) ;r3 As==00, 0x0002(r1) 91b0: 81 46 3e 00 mov r6, 62(r1) ;0x003e(r1) 91b4: c1 43 2f 00 mov.b #0, 47(r1) ;r3 As==00, 0x002f(r1) 91b8: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 91bc: c1 43 2e 00 mov.b #0, 46(r1) ;r3 As==00, 0x002e(r1) 91c0: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 91c4: 81 43 30 00 mov #0, 48(r1) ;r3 As==00, 0x0030(r1) 91c8: 30 40 82 97 br #0x9782 91cc: 05 47 mov r7, r5 91ce: 8e 11 sxt r14 91d0: 0f 4e mov r14, r15 91d2: 91 12 3c 00 call 60(r1) ;0x003c(r1) 91d6: 91 53 2c 00 inc 44(r1) ;0x002c(r1) 91da: 30 40 68 97 br #0x9768 91de: 7e 90 63 00 cmp.b #99, r14 ;#0x0063 91e2: c5 24 jz $+396 ;abs 0x936e 91e4: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 91e8: 27 34 jge $+80 ;abs 0x9238 91ea: 7e 90 30 00 cmp.b #48, r14 ;#0x0030 91ee: 94 24 jz $+298 ;abs 0x9318 91f0: 7e 90 31 00 cmp.b #49, r14 ;#0x0031 91f4: 1a 34 jge $+54 ;abs 0x922a 91f6: 7e 90 2a 00 cmp.b #42, r14 ;#0x002a 91fa: 77 24 jz $+240 ;abs 0x92ea 91fc: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b 9200: 0a 34 jge $+22 ;abs 0x9216 9202: 7e 90 23 00 cmp.b #35, r14 ;#0x0023 9206: 42 24 jz $+134 ;abs 0x928c 9208: 7e 90 25 00 cmp.b #37, r14 ;#0x0025 920c: e0 27 jz $-62 ;abs 0x91ce 920e: 7e 90 20 00 cmp.b #32, r14 ;#0x0020 9212: 32 20 jnz $+102 ;abs 0x9278 9214: 56 3c jmp $+174 ;abs 0x92c2 9216: 7e 90 2d 00 cmp.b #45, r14 ;#0x002d 921a: 49 24 jz $+148 ;abs 0x92ae 921c: 7e 90 2e 00 cmp.b #46, r14 ;#0x002e 9220: 5b 24 jz $+184 ;abs 0x92d8 9222: 7e 90 2b 00 cmp.b #43, r14 ;#0x002b 9226: 28 20 jnz $+82 ;abs 0x9278 9228: 47 3c jmp $+144 ;abs 0x92b8 922a: 7e 90 3a 00 cmp.b #58, r14 ;#0x003a 922e: 8c 38 jl $+282 ;abs 0x9348 9230: 7e 90 58 00 cmp.b #88, r14 ;#0x0058 9234: 21 20 jnz $+68 ;abs 0x9278 9236: e9 3c jmp $+468 ;abs 0x940a 9238: 7e 90 6f 00 cmp.b #111, r14 ;#0x006f 923c: 24 24 jz $+74 ;abs 0x9286 923e: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 9242: 0a 34 jge $+22 ;abs 0x9258 9244: 7e 90 69 00 cmp.b #105, r14 ;#0x0069 9248: e3 24 jz $+456 ;abs 0x9410 924a: 7e 90 6c 00 cmp.b #108, r14 ;#0x006c 924e: 22 24 jz $+70 ;abs 0x9294 9250: 7e 90 64 00 cmp.b #100, r14 ;#0x0064 9254: 11 20 jnz $+36 ;abs 0x9278 9256: dc 3c jmp $+442 ;abs 0x9410 9258: 7e 90 73 00 cmp.b #115, r14 ;#0x0073 925c: 98 24 jz $+306 ;abs 0x938e 925e: 7e 90 74 00 cmp.b #116, r14 ;#0x0074 9262: 04 34 jge $+10 ;abs 0x926c 9264: 7e 90 70 00 cmp.b #112, r14 ;#0x0070 9268: 07 20 jnz $+16 ;abs 0x9278 926a: b8 3c jmp $+370 ;abs 0x93dc 926c: 7e 90 75 00 cmp.b #117, r14 ;#0x0075 9270: d1 24 jz $+420 ;abs 0x9414 9272: 7e 90 78 00 cmp.b #120, r14 ;#0x0078 9276: d2 24 jz $+422 ;abs 0x941c 9278: 19 41 3e 00 mov 62(r1), r9 ;0x003e(r1) 927c: 18 41 2c 00 mov 44(r1), r8 ;0x002c(r1) 9280: 08 89 sub r9, r8 9282: 30 40 56 97 br #0x9756 9286: b1 42 28 00 mov #8, 40(r1) ;r2 As==11, 0x0028(r1) 928a: cb 3c jmp $+408 ;abs 0x9422 928c: f1 d2 00 00 bis.b #8, 0(r1) ;r2 As==11, 0x0000(r1) 9290: 30 40 86 97 br #0x9786 9294: 69 41 mov.b @r1, r9 9296: 59 f3 and.b #1, r9 ;r3 As==01 9298: 6e 41 mov.b @r1, r14 929a: 04 24 jz $+10 ;abs 0x92a4 929c: 7e f0 fe ff and.b #-2, r14 ;#0xfffe 92a0: 6e d3 bis.b #2, r14 ;r3 As==10 92a2: 01 3c jmp $+4 ;abs 0x92a6 92a4: 5e d3 bis.b #1, r14 ;r3 As==01 92a6: c1 4e 00 00 mov.b r14, 0(r1) ;0x0000(r1) 92aa: 30 40 86 97 br #0x9786 92ae: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) 92b2: 00 00 92b4: 30 40 86 97 br #0x9786 92b8: f1 40 2b 00 mov.b #43, 2(r1) ;#0x002b, 0x0002(r1) 92bc: 02 00 92be: 30 40 86 97 br #0x9786 92c2: f1 90 2b 00 cmp.b #43, 2(r1) ;#0x002b, 0x0002(r1) 92c6: 02 00 92c8: 02 20 jnz $+6 ;abs 0x92ce 92ca: 30 40 86 97 br #0x9786 92ce: f1 40 20 00 mov.b #32, 2(r1) ;#0x0020, 0x0002(r1) 92d2: 02 00 92d4: 30 40 86 97 br #0x9786 92d8: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 92dc: 02 24 jz $+6 ;abs 0x92e2 92de: 30 40 6c 97 br #0x976c 92e2: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 92e6: 30 40 86 97 br #0x9786 92ea: 0e 45 mov r5, r14 92ec: 2e 53 incd r14 92ee: 2a 45 mov @r5, r10 92f0: 0a 93 tst r10 92f2: 03 38 jl $+8 ;abs 0x92fa 92f4: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 92f8: 0d 3c jmp $+28 ;abs 0x9314 92fa: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 92fe: 02 24 jz $+6 ;abs 0x9304 9300: 30 40 7c 97 br #0x977c 9304: f1 d0 10 00 bis.b #16, 0(r1) ;#0x0010, 0x0000(r1) 9308: 00 00 930a: 3a e3 inv r10 930c: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 9310: 91 53 26 00 inc 38(r1) ;0x0026(r1) 9314: 05 4e mov r14, r5 9316: 27 3c jmp $+80 ;abs 0x9366 9318: 81 93 26 00 tst 38(r1) ;0x0026(r1) 931c: 15 20 jnz $+44 ;abs 0x9348 931e: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 9322: 12 20 jnz $+38 ;abs 0x9348 9324: 69 41 mov.b @r1, r9 9326: 79 f0 10 00 and.b #16, r9 ;#0x0010 932a: 5e 43 mov.b #1, r14 ;r3 As==01 932c: 01 24 jz $+4 ;abs 0x9330 932e: 4e 43 clr.b r14 9330: 4e 4e mov.b r14, r14 9332: 0e 11 rra r14 9334: 0e 43 clr r14 9336: 4e 10 rrc.b r14 9338: 6a 41 mov.b @r1, r10 933a: 7a f0 7f 00 and.b #127, r10 ;#0x007f 933e: 4a de bis.b r14, r10 9340: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) 9344: 30 40 86 97 br #0x9786 9348: 1a 41 26 00 mov 38(r1), r10 ;0x0026(r1) 934c: 0a 5a rla r10 934e: 0c 4a mov r10, r12 9350: 0c 5c rla r12 9352: 0c 5c rla r12 9354: 0a 5c add r12, r10 9356: 81 4a 26 00 mov r10, 38(r1) ;0x0026(r1) 935a: b1 50 d0 ff add #-48, 38(r1) ;#0xffd0, 0x0026(r1) 935e: 26 00 9360: 8e 11 sxt r14 9362: 81 5e 26 00 add r14, 38(r1) ;0x0026(r1) 9366: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) 936a: 30 40 86 97 br #0x9786 936e: 07 45 mov r5, r7 9370: 27 53 incd r7 9372: 6e 45 mov.b @r5, r14 9374: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 9378: 03 20 jnz $+8 ;abs 0x9380 937a: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 937e: 26 27 jz $-434 ;abs 0x91cc 9380: c1 4e 04 00 mov.b r14, 4(r1) ;0x0004(r1) 9384: c1 43 05 00 mov.b #0, 5(r1) ;r3 As==00, 0x0005(r1) 9388: 0e 41 mov r1, r14 938a: 2e 52 add #4, r14 ;r2 As==10 938c: 03 3c jmp $+8 ;abs 0x9394 938e: 07 45 mov r5, r7 9390: 27 53 incd r7 9392: 2e 45 mov @r5, r14 9394: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 9398: 07 24 jz $+16 ;abs 0x93a8 939a: e1 d2 01 00 bis.b #4, 1(r1) ;r2 As==10, 0x0001(r1) 939e: 1f 41 26 00 mov 38(r1), r15 ;0x0026(r1) 93a2: c1 4f 03 00 mov.b r15, 3(r1) ;0x0003(r1) 93a6: 06 3c jmp $+14 ;abs 0x93b4 93a8: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 93ac: 03 24 jz $+8 ;abs 0x93b4 93ae: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 93b2: 30 00 93b4: 0e 93 tst r14 93b6: 02 20 jnz $+6 ;abs 0x93bc 93b8: 3e 40 af 9a mov #-25937,r14 ;#0x9aaf 93bc: 11 12 04 00 push 4(r1) ;0x0004(r1) 93c0: 11 12 04 00 push 4(r1) ;0x0004(r1) 93c4: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) 93c8: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) 93cc: b0 12 c0 8f call #0x8fc0 93d0: 21 52 add #4, r1 ;r2 As==10 93d2: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) 93d6: 05 47 mov r7, r5 93d8: 30 40 68 97 br #0x9768 93dc: 07 45 mov r5, r7 93de: 27 53 incd r7 93e0: 29 45 mov @r5, r9 93e2: 81 49 1e 00 mov r9, 30(r1) ;0x001e(r1) 93e6: 5e 43 mov.b #1, r14 ;r3 As==01 93e8: 09 93 tst r9 93ea: 01 20 jnz $+4 ;abs 0x93ee 93ec: 4e 43 clr.b r14 93ee: 4e 5e rla.b r14 93f0: 4e 5e rla.b r14 93f2: 4e 5e rla.b r14 93f4: 6a 41 mov.b @r1, r10 93f6: 7a f0 f7 ff and.b #-9, r10 ;#0xfff7 93fa: 4a de bis.b r14, r10 93fc: c1 4a 00 00 mov.b r10, 0(r1) ;0x0000(r1) 9400: 05 47 mov r7, r5 9402: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) 9406: 28 00 9408: 53 3c jmp $+168 ;abs 0x94b0 940a: d1 d3 01 00 bis.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 940e: 06 3c jmp $+14 ;abs 0x941c 9410: e1 d2 00 00 bis.b #4, 0(r1) ;r2 As==10, 0x0000(r1) 9414: b1 40 0a 00 mov #10, 40(r1) ;#0x000a, 0x0028(r1) 9418: 28 00 941a: 03 3c jmp $+8 ;abs 0x9422 941c: b1 40 10 00 mov #16, 40(r1) ;#0x0010, 0x0028(r1) 9420: 28 00 9422: 6b 41 mov.b @r1, r11 9424: 6b b3 bit.b #2, r11 ;r3 As==10 9426: 24 24 jz $+74 ;abs 0x9470 9428: 0c 45 mov r5, r12 942a: 3c 52 add #8, r12 ;r2 As==11 942c: 28 45 mov @r5, r8 942e: 17 45 02 00 mov 2(r5), r7 ;0x0002(r5) 9432: 16 45 04 00 mov 4(r5), r6 ;0x0004(r5) 9436: 1b 45 06 00 mov 6(r5), r11 ;0x0006(r5) 943a: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) 943e: 81 47 20 00 mov r7, 32(r1) ;0x0020(r1) 9442: 81 46 22 00 mov r6, 34(r1) ;0x0022(r1) 9446: 81 4b 24 00 mov r11, 36(r1) ;0x0024(r1) 944a: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 944e: 08 93 tst r8 9450: 06 20 jnz $+14 ;abs 0x945e 9452: 07 93 tst r7 9454: 04 20 jnz $+10 ;abs 0x945e 9456: 06 93 tst r6 9458: 02 20 jnz $+6 ;abs 0x945e 945a: 0b 93 tst r11 945c: 02 24 jz $+6 ;abs 0x9462 945e: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 9462: 0b 5b rla r11 9464: 0b 43 clr r11 9466: 0b 6b rlc r11 9468: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) 946c: 05 4c mov r12, r5 946e: 20 3c jmp $+66 ;abs 0x94b0 9470: 5b f3 and.b #1, r11 ;r3 As==01 9472: 07 45 mov r5, r7 9474: 0d 24 jz $+28 ;abs 0x9490 9476: 27 52 add #4, r7 ;r2 As==10 9478: 28 45 mov @r5, r8 947a: 1b 45 02 00 mov 2(r5), r11 ;0x0002(r5) 947e: 81 48 1e 00 mov r8, 30(r1) ;0x001e(r1) 9482: 81 4b 20 00 mov r11, 32(r1) ;0x0020(r1) 9486: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 948a: 08 93 tst r8 948c: 09 20 jnz $+20 ;abs 0x94a0 948e: 06 3c jmp $+14 ;abs 0x949c 9490: 27 53 incd r7 9492: 2b 45 mov @r5, r11 9494: 81 4b 1e 00 mov r11, 30(r1) ;0x001e(r1) 9498: d1 43 2b 00 mov.b #1, 43(r1) ;r3 As==01, 0x002b(r1) 949c: 0b 93 tst r11 949e: 02 24 jz $+6 ;abs 0x94a4 94a0: c1 43 2b 00 mov.b #0, 43(r1) ;r3 As==00, 0x002b(r1) 94a4: 0b 5b rla r11 94a6: 0b 43 clr r11 94a8: 0b 6b rlc r11 94aa: c1 4b 2f 00 mov.b r11, 47(r1) ;0x002f(r1) 94ae: 05 47 mov r7, r5 94b0: f1 b2 00 00 bit.b #8, 0(r1) ;r2 As==11, 0x0000(r1) 94b4: 12 24 jz $+38 ;abs 0x94da 94b6: c1 93 2b 00 tst.b 43(r1) ;0x002b(r1) 94ba: 0f 20 jnz $+32 ;abs 0x94da 94bc: 68 41 mov.b @r1, r8 94be: b1 90 10 00 cmp #16, 40(r1) ;#0x0010, 0x0028(r1) 94c2: 28 00 94c4: 03 20 jnz $+8 ;abs 0x94cc 94c6: 78 d0 40 00 bis.b #64, r8 ;#0x0040 94ca: 05 3c jmp $+12 ;abs 0x94d6 94cc: b1 92 28 00 cmp #8, 40(r1) ;r2 As==11, 0x0028(r1) 94d0: 04 20 jnz $+10 ;abs 0x94da 94d2: 78 d0 20 00 bis.b #32, r8 ;#0x0020 94d6: c1 48 00 00 mov.b r8, 0(r1) ;0x0000(r1) 94da: 68 41 mov.b @r1, r8 94dc: 68 b2 bit.b #4, r8 ;r2 As==10 94de: 30 24 jz $+98 ;abs 0x9540 94e0: c1 93 2f 00 tst.b 47(r1) ;0x002f(r1) 94e4: 2d 24 jz $+92 ;abs 0x9540 94e6: f1 40 2d 00 mov.b #45, 2(r1) ;#0x002d, 0x0002(r1) 94ea: 02 00 94ec: 68 b3 bit.b #2, r8 ;r3 As==10 94ee: 11 24 jz $+36 ;abs 0x9512 94f0: b1 e3 1e 00 xor #-1, 30(r1) ;r3 As==11, 0x001e(r1) 94f4: b1 e3 20 00 xor #-1, 32(r1) ;r3 As==11, 0x0020(r1) 94f8: b1 e3 22 00 xor #-1, 34(r1) ;r3 As==11, 0x0022(r1) 94fc: b1 e3 24 00 xor #-1, 36(r1) ;r3 As==11, 0x0024(r1) 9500: 91 53 1e 00 inc 30(r1) ;0x001e(r1) 9504: 81 63 20 00 adc 32(r1) ;0x0020(r1) 9508: 81 63 22 00 adc 34(r1) ;0x0022(r1) 950c: 81 63 24 00 adc 36(r1) ;0x0024(r1) 9510: 17 3c jmp $+48 ;abs 0x9540 9512: 58 b3 bit.b #1, r8 ;r3 As==01 9514: 0f 24 jz $+32 ;abs 0x9534 9516: 1a 41 1e 00 mov 30(r1), r10 ;0x001e(r1) 951a: 1b 41 20 00 mov 32(r1), r11 ;0x0020(r1) 951e: 3a e3 inv r10 9520: 3b e3 inv r11 9522: 0e 4a mov r10, r14 9524: 0f 4b mov r11, r15 9526: 1e 53 inc r14 9528: 0f 63 adc r15 952a: 81 4e 1e 00 mov r14, 30(r1) ;0x001e(r1) 952e: 81 4f 20 00 mov r15, 32(r1) ;0x0020(r1) 9532: 06 3c jmp $+14 ;abs 0x9540 9534: 19 41 1e 00 mov 30(r1), r9 ;0x001e(r1) 9538: 39 e3 inv r9 953a: 19 53 inc r9 953c: 81 49 1e 00 mov r9, 30(r1) ;0x001e(r1) 9540: c1 43 1b 00 mov.b #0, 27(r1) ;r3 As==00, 0x001b(r1) 9544: 68 b3 bit.b #2, r8 ;r3 As==10 9546: 6a 24 jz $+214 ;abs 0x961c 9548: 16 41 1e 00 mov 30(r1), r6 ;0x001e(r1) 954c: 91 41 20 00 mov 32(r1), 60(r1) ;0x0020(r1), 0x003c(r1) 9550: 3c 00 9552: 14 41 22 00 mov 34(r1), r4 ;0x0022(r1) 9556: 17 41 24 00 mov 36(r1), r7 ;0x0024(r1) 955a: 08 41 mov r1, r8 955c: 38 50 1a 00 add #26, r8 ;#0x001a 9560: 09 46 mov r6, r9 9562: 91 41 28 00 mov 40(r1), 50(r1) ;0x0028(r1), 0x0032(r1) 9566: 32 00 9568: 1b 41 28 00 mov 40(r1), r11 ;0x0028(r1) 956c: 8b 10 swpb r11 956e: 8b 11 sxt r11 9570: 8b 10 swpb r11 9572: 8b 11 sxt r11 9574: 81 4b 34 00 mov r11, 52(r1) ;0x0034(r1) 9578: 81 4b 36 00 mov r11, 54(r1) ;0x0036(r1) 957c: 81 4b 38 00 mov r11, 56(r1) ;0x0038(r1) 9580: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9584: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9588: 11 12 3a 00 push 58(r1) ;0x003a(r1) 958c: 11 12 3a 00 push 58(r1) ;0x003a(r1) 9590: 0c 49 mov r9, r12 9592: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 9596: 0e 44 mov r4, r14 9598: 0f 47 mov r7, r15 959a: b0 12 5c 98 call #0x985c 959e: 31 52 add #8, r1 ;r2 As==11 95a0: 0b 4c mov r12, r11 95a2: 3c 90 0a 00 cmp #10, r12 ;#0x000a 95a6: 05 34 jge $+12 ;abs 0x95b2 95a8: 7b 50 30 00 add.b #48, r11 ;#0x0030 95ac: c8 4b 00 00 mov.b r11, 0(r8) ;0x0000(r8) 95b0: 0c 3c jmp $+26 ;abs 0x95ca 95b2: 4b 4c mov.b r12, r11 95b4: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 95b8: 03 24 jz $+8 ;abs 0x95c0 95ba: 7a 40 37 00 mov.b #55, r10 ;#0x0037 95be: 02 3c jmp $+6 ;abs 0x95c4 95c0: 7a 40 57 00 mov.b #87, r10 ;#0x0057 95c4: 4a 5b add.b r11, r10 95c6: c8 4a 00 00 mov.b r10, 0(r8) ;0x0000(r8) 95ca: 06 48 mov r8, r6 95cc: 36 53 add #-1, r6 ;r3 As==11 95ce: 11 12 3a 00 push 58(r1) ;0x003a(r1) 95d2: 11 12 3a 00 push 58(r1) ;0x003a(r1) 95d6: 11 12 3a 00 push 58(r1) ;0x003a(r1) 95da: 11 12 3a 00 push 58(r1) ;0x003a(r1) 95de: 0c 49 mov r9, r12 95e0: 1d 41 44 00 mov 68(r1), r13 ;0x0044(r1) 95e4: 0e 44 mov r4, r14 95e6: 0f 47 mov r7, r15 95e8: b0 12 36 98 call #0x9836 95ec: 31 52 add #8, r1 ;r2 As==11 95ee: 09 4c mov r12, r9 95f0: 81 4d 3c 00 mov r13, 60(r1) ;0x003c(r1) 95f4: 04 4e mov r14, r4 95f6: 07 4f mov r15, r7 95f8: 38 53 add #-1, r8 ;r3 As==11 95fa: 0c 93 tst r12 95fc: b2 23 jnz $-154 ;abs 0x9562 95fe: 0d 93 tst r13 9600: b0 23 jnz $-158 ;abs 0x9562 9602: 0e 93 tst r14 9604: ae 23 jnz $-162 ;abs 0x9562 9606: 0f 93 tst r15 9608: ac 23 jnz $-166 ;abs 0x9562 960a: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 960e: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 9612: 81 43 22 00 mov #0, 34(r1) ;r3 As==00, 0x0022(r1) 9616: 81 43 24 00 mov #0, 36(r1) ;r3 As==00, 0x0024(r1) 961a: 6c 3c jmp $+218 ;abs 0x96f4 961c: 58 b3 bit.b #1, r8 ;r3 As==01 961e: 3e 24 jz $+126 ;abs 0x969c 9620: 14 41 1e 00 mov 30(r1), r4 ;0x001e(r1) 9624: 17 41 20 00 mov 32(r1), r7 ;0x0020(r1) 9628: 08 41 mov r1, r8 962a: 38 50 1a 00 add #26, r8 ;#0x001a 962e: 19 41 28 00 mov 40(r1), r9 ;0x0028(r1) 9632: 89 10 swpb r9 9634: 89 11 sxt r9 9636: 89 10 swpb r9 9638: 89 11 sxt r9 963a: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) 963e: 0d 49 mov r9, r13 9640: 0e 44 mov r4, r14 9642: 0f 47 mov r7, r15 9644: b0 12 7e 8d call #0x8d7e 9648: 0b 4e mov r14, r11 964a: 3e 90 0a 00 cmp #10, r14 ;#0x000a 964e: 05 34 jge $+12 ;abs 0x965a 9650: 7b 50 30 00 add.b #48, r11 ;#0x0030 9654: c8 4b 00 00 mov.b r11, 0(r8) ;0x0000(r8) 9658: 0c 3c jmp $+26 ;abs 0x9672 965a: 4b 4e mov.b r14, r11 965c: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 9660: 03 24 jz $+8 ;abs 0x9668 9662: 7a 40 37 00 mov.b #55, r10 ;#0x0037 9666: 02 3c jmp $+6 ;abs 0x966c 9668: 7a 40 57 00 mov.b #87, r10 ;#0x0057 966c: 4a 5b add.b r11, r10 966e: c8 4a 00 00 mov.b r10, 0(r8) ;0x0000(r8) 9672: 06 48 mov r8, r6 9674: 36 53 add #-1, r6 ;r3 As==11 9676: 1c 41 28 00 mov 40(r1), r12 ;0x0028(r1) 967a: 0d 49 mov r9, r13 967c: 0e 44 mov r4, r14 967e: 0f 47 mov r7, r15 9680: b0 12 48 8d call #0x8d48 9684: 04 4e mov r14, r4 9686: 07 4f mov r15, r7 9688: 38 53 add #-1, r8 ;r3 As==11 968a: 0e 93 tst r14 968c: d0 23 jnz $-94 ;abs 0x962e 968e: 0f 93 tst r15 9690: ce 23 jnz $-98 ;abs 0x962e 9692: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 9696: 81 43 20 00 mov #0, 32(r1) ;r3 As==00, 0x0020(r1) 969a: 2c 3c jmp $+90 ;abs 0x96f4 969c: 17 41 1e 00 mov 30(r1), r7 ;0x001e(r1) 96a0: 08 41 mov r1, r8 96a2: 38 50 1a 00 add #26, r8 ;#0x001a 96a6: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) 96aa: 0f 47 mov r7, r15 96ac: b0 12 40 8d call #0x8d40 96b0: 0d 4f mov r15, r13 96b2: 3f 90 0a 00 cmp #10, r15 ;#0x000a 96b6: 05 34 jge $+12 ;abs 0x96c2 96b8: 7d 50 30 00 add.b #48, r13 ;#0x0030 96bc: c8 4d 00 00 mov.b r13, 0(r8) ;0x0000(r8) 96c0: 0c 3c jmp $+26 ;abs 0x96da 96c2: 4d 4f mov.b r15, r13 96c4: d1 b3 01 00 bit.b #1, 1(r1) ;r3 As==01, 0x0001(r1) 96c8: 03 24 jz $+8 ;abs 0x96d0 96ca: 7c 40 37 00 mov.b #55, r12 ;#0x0037 96ce: 02 3c jmp $+6 ;abs 0x96d4 96d0: 7c 40 57 00 mov.b #87, r12 ;#0x0057 96d4: 4c 5d add.b r13, r12 96d6: c8 4c 00 00 mov.b r12, 0(r8) ;0x0000(r8) 96da: 06 48 mov r8, r6 96dc: 36 53 add #-1, r6 ;r3 As==11 96de: 1e 41 28 00 mov 40(r1), r14 ;0x0028(r1) 96e2: 0f 47 mov r7, r15 96e4: b0 12 26 8d call #0x8d26 96e8: 07 4f mov r15, r7 96ea: 38 53 add #-1, r8 ;r3 As==11 96ec: 0f 93 tst r15 96ee: db 23 jnz $-72 ;abs 0x96a6 96f0: 81 43 1e 00 mov #0, 30(r1) ;r3 As==00, 0x001e(r1) 96f4: b1 90 0a 00 cmp #10, 40(r1) ;#0x000a, 0x0028(r1) 96f8: 28 00 96fa: 02 24 jz $+6 ;abs 0x9700 96fc: c1 43 02 00 mov.b #0, 2(r1) ;r3 As==00, 0x0002(r1) 9700: c1 93 2e 00 tst.b 46(r1) ;0x002e(r1) 9704: 0e 24 jz $+30 ;abs 0x9722 9706: 18 41 1c 00 mov 28(r1), r8 ;0x001c(r1) 970a: 08 86 sub r6, r8 970c: 18 91 26 00 cmp 38(r1), r8 ;0x0026(r1) 9710: 0e 2c jc $+30 ;abs 0x972e 9712: e1 d3 01 00 bis.b #2, 1(r1) ;r3 As==10, 0x0001(r1) 9716: 5f 41 26 00 mov.b 38(r1), r15 ;0x0026(r1) 971a: 4f 88 sub.b r8, r15 971c: c1 4f 03 00 mov.b r15, 3(r1) ;0x0003(r1) 9720: 06 3c jmp $+14 ;abs 0x972e 9722: c1 93 2a 00 tst.b 42(r1) ;0x002a(r1) 9726: 03 24 jz $+8 ;abs 0x972e 9728: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 972c: 30 00 972e: 11 12 04 00 push 4(r1) ;0x0004(r1) 9732: 11 12 04 00 push 4(r1) ;0x0004(r1) 9736: 1d 41 34 00 mov 52(r1), r13 ;0x0034(r1) 973a: 0e 46 mov r6, r14 973c: 1e 53 inc r14 973e: 1f 41 3e 00 mov 62(r1), r15 ;0x003e(r1) 9742: b0 12 c0 8f call #0x8fc0 9746: 21 52 add #4, r1 ;r2 As==10 9748: 81 5f 2c 00 add r15, 44(r1) ;0x002c(r1) 974c: 0d 3c jmp $+28 ;abs 0x9768 974e: 7f 49 mov.b @r9+, r15 9750: 8f 11 sxt r15 9752: 91 12 3c 00 call 60(r1) ;0x003c(r1) 9756: 0e 49 mov r9, r14 9758: 0e 58 add r8, r14 975a: 19 91 40 00 cmp 64(r1), r9 ;0x0040(r1) 975e: f7 2b jnc $-16 ;abs 0x974e 9760: 81 49 3e 00 mov r9, 62(r1) ;0x003e(r1) 9764: 81 4e 2c 00 mov r14, 44(r1) ;0x002c(r1) 9768: 07 43 clr r7 976a: 0e 3c jmp $+30 ;abs 0x9788 976c: 91 41 26 00 mov 38(r1), 48(r1) ;0x0026(r1), 0x0030(r1) 9770: 30 00 9772: d1 43 2e 00 mov.b #1, 46(r1) ;r3 As==01, 0x002e(r1) 9776: c1 43 2a 00 mov.b #0, 42(r1) ;r3 As==00, 0x002a(r1) 977a: 03 3c jmp $+8 ;abs 0x9782 977c: 05 4e mov r14, r5 977e: d1 43 2a 00 mov.b #1, 42(r1) ;r3 As==01, 0x002a(r1) 9782: 81 43 26 00 mov #0, 38(r1) ;r3 As==00, 0x0026(r1) 9786: 17 43 mov #1, r7 ;r3 As==01 9788: 16 41 40 00 mov 64(r1), r6 ;0x0040(r1) 978c: 6e 46 mov.b @r6, r14 978e: 4e 93 tst.b r14 9790: 02 24 jz $+6 ;abs 0x9796 9792: 30 40 96 91 br #0x9196 9796: 1f 41 2c 00 mov 44(r1), r15 ;0x002c(r1) 979a: 31 50 42 00 add #66, r1 ;#0x0042 979e: 34 41 pop r4 97a0: 35 41 pop r5 97a2: 36 41 pop r6 97a4: 37 41 pop r7 97a6: 38 41 pop r8 97a8: 39 41 pop r9 97aa: 3a 41 pop r10 97ac: 3b 41 pop r11 97ae: 30 41 ret 000097b0 : 97b0: 0b 12 push r11 97b2: 0d 93 tst r13 97b4: 0e 24 jz $+30 ;abs 0x97d2 97b6: 6c 4f mov.b @r15, r12 97b8: 7b 4e mov.b @r14+, r11 97ba: 4c 9b cmp.b r11, r12 97bc: 05 24 jz $+12 ;abs 0x97c8 97be: 4f 4c mov.b r12, r15 97c0: 5e 4e ff ff mov.b -1(r14),r14 ;0xffff(r14) 97c4: 0f 8e sub r14, r15 97c6: 06 3c jmp $+14 ;abs 0x97d4 97c8: 1f 53 inc r15 97ca: 4c 93 tst.b r12 97cc: 02 24 jz $+6 ;abs 0x97d2 97ce: 3d 53 add #-1, r13 ;r3 As==11 97d0: f0 3f jmp $-30 ;abs 0x97b2 97d2: 0f 43 clr r15 97d4: 3b 41 pop r11 97d6: 30 41 ret 000097d8 <__xabi_udivmod64>: 97d8: 07 12 push r7 97da: 06 12 push r6 97dc: 05 12 push r5 97de: 04 12 push r4 97e0: 30 12 40 00 push #64 ;#0x0040 97e4: 04 48 mov r8, r4 97e6: 05 49 mov r9, r5 97e8: 06 4a mov r10, r6 97ea: 07 4b mov r11, r7 97ec: 08 43 clr r8 97ee: 09 43 clr r9 97f0: 0a 43 clr r10 97f2: 0b 43 clr r11 97f4: 0c 5c rla r12 97f6: 0d 6d rlc r13 97f8: 0e 6e rlc r14 97fa: 0f 6f rlc r15 97fc: 08 68 rlc r8 97fe: 09 69 rlc r9 9800: 0a 6a rlc r10 9802: 0b 6b rlc r11 9804: 0b 97 cmp r7, r11 9806: 0e 28 jnc $+30 ;abs 0x9824 9808: 08 20 jnz $+18 ;abs 0x981a 980a: 0a 96 cmp r6, r10 980c: 0b 28 jnc $+24 ;abs 0x9824 980e: 05 20 jnz $+12 ;abs 0x981a 9810: 09 95 cmp r5, r9 9812: 08 28 jnc $+18 ;abs 0x9824 9814: 02 20 jnz $+6 ;abs 0x981a 9816: 08 94 cmp r4, r8 9818: 05 28 jnc $+12 ;abs 0x9824 981a: 08 84 sub r4, r8 981c: 09 75 subc r5, r9 981e: 0a 76 subc r6, r10 9820: 0b 77 subc r7, r11 9822: 1c d3 bis #1, r12 ;r3 As==01 9824: 91 83 00 00 dec 0(r1) ;0x0000(r1) 9828: e5 23 jnz $-52 ;abs 0x97f4 982a: 21 53 incd r1 982c: 34 41 pop r4 982e: 35 41 pop r5 9830: 36 41 pop r6 9832: 37 41 pop r7 9834: 30 41 ret 00009836 <__udivdi3>: 9836: 0b 12 push r11 9838: 0a 12 push r10 983a: 09 12 push r9 983c: 08 12 push r8 983e: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) 9842: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) 9846: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) 984a: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) 984e: b0 12 d8 97 call #0x97d8 9852: 38 41 pop r8 9854: 39 41 pop r9 9856: 3a 41 pop r10 9858: 3b 41 pop r11 985a: 30 41 ret 0000985c <__umoddi3>: 985c: 0b 12 push r11 985e: 0a 12 push r10 9860: 09 12 push r9 9862: 08 12 push r8 9864: 18 41 0a 00 mov 10(r1), r8 ;0x000a(r1) 9868: 19 41 0c 00 mov 12(r1), r9 ;0x000c(r1) 986c: 1a 41 0e 00 mov 14(r1), r10 ;0x000e(r1) 9870: 1b 41 10 00 mov 16(r1), r11 ;0x0010(r1) 9874: b0 12 d8 97 call #0x97d8 9878: 0c 48 mov r8, r12 987a: 0d 49 mov r9, r13 987c: 0e 4a mov r10, r14 987e: 0f 4b mov r11, r15 9880: 38 41 pop r8 9882: 39 41 pop r9 9884: 3a 41 pop r10 9886: 3b 41 pop r11 9888: 30 41 ret 0000988a <__udivmoddi4>: 988a: 0b 12 push r11 988c: 0a 12 push r10 988e: 09 12 push r9 9890: 08 12 push r8 9892: 07 12 push r7 9894: 18 41 0c 00 mov 12(r1), r8 ;0x000c(r1) 9898: 19 41 0e 00 mov 14(r1), r9 ;0x000e(r1) 989c: 1a 41 10 00 mov 16(r1), r10 ;0x0010(r1) 98a0: 1b 41 12 00 mov 18(r1), r11 ;0x0012(r1) 98a4: b0 12 d8 97 call #0x97d8 98a8: 17 41 14 00 mov 20(r1), r7 ;0x0014(r1) 98ac: 87 48 00 00 mov r8, 0(r7) ;0x0000(r7) 98b0: 87 49 02 00 mov r9, 2(r7) ;0x0002(r7) 98b4: 87 4a 04 00 mov r10, 4(r7) ;0x0004(r7) 98b8: 87 4b 06 00 mov r11, 6(r7) ;0x0006(r7) 98bc: 37 41 pop r7 98be: 38 41 pop r8 98c0: 39 41 pop r9 98c2: 3a 41 pop r10 98c4: 3b 41 pop r11 98c6: 30 41 ret 000098c8 <_unexpected_>: 98c8: 00 13 reti Disassembly of section .vectors: 0000ffe0 <__ivtbl_16>: ffe0: 78 86 78 86 7c 86 a0 86 78 86 c4 86 78 86 0e 87 x.x.|...x...x... fff0: d2 86 78 86 78 86 78 86 78 86 78 86 78 86 00 80 ..x.x.x.x.x.x...